1 /*
   2  * Copyright (c) 2016, 2017, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2016, 2017, SAP SE. All rights reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
  22  * questions.
  23  *
  24  */
  25 
  26 #include "precompiled.hpp"
  27 #include "c1/c1_Compilation.hpp"
  28 #include "c1/c1_FrameMap.hpp"
  29 #include "c1/c1_Instruction.hpp"
  30 #include "c1/c1_LIRAssembler.hpp"
  31 #include "c1/c1_LIRGenerator.hpp"
  32 #include "c1/c1_Runtime1.hpp"
  33 #include "c1/c1_ValueStack.hpp"
  34 #include "ci/ciArray.hpp"
  35 #include "ci/ciObjArrayKlass.hpp"
  36 #include "ci/ciTypeArrayKlass.hpp"
  37 #include "runtime/sharedRuntime.hpp"
  38 #include "runtime/stubRoutines.hpp"
  39 #include "vmreg_s390.inline.hpp"
  40 
  41 #ifdef ASSERT
  42 #define __ gen()->lir(__FILE__, __LINE__)->
  43 #else
  44 #define __ gen()->lir()->
  45 #endif
  46 
  47 void LIRItem::load_byte_item() {
  48   // Byte loads use same registers as other loads.
  49   load_item();
  50 }
  51 
  52 void LIRItem::load_nonconstant(int bits) {
  53   LIR_Opr r = value()->operand();
  54   if (_gen->can_inline_as_constant(value(), bits)) {
  55     if (!r->is_constant()) {
  56       r = LIR_OprFact::value_type(value()->type());
  57     }
  58     _result = r;
  59   } else {
  60     load_item();
  61   }
  62 }
  63 
  64 //--------------------------------------------------------------
  65 //               LIRGenerator
  66 //--------------------------------------------------------------
  67 
  68 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::as_oop_opr(Z_EXC_OOP); }
  69 LIR_Opr LIRGenerator::exceptionPcOpr()  { return FrameMap::as_opr(Z_EXC_PC); }
  70 LIR_Opr LIRGenerator::divInOpr()        { return FrameMap::Z_R11_opr; }
  71 LIR_Opr LIRGenerator::divOutOpr()       { return FrameMap::Z_R11_opr; }
  72 LIR_Opr LIRGenerator::remOutOpr()       { return FrameMap::Z_R10_opr; }
  73 LIR_Opr LIRGenerator::ldivInOpr()       { return FrameMap::Z_R11_long_opr; }
  74 LIR_Opr LIRGenerator::ldivOutOpr()      { return FrameMap::Z_R11_long_opr; }
  75 LIR_Opr LIRGenerator::lremOutOpr()      { return FrameMap::Z_R10_long_opr; }
  76 LIR_Opr LIRGenerator::syncLockOpr()     { return new_register(T_INT); }
  77 LIR_Opr LIRGenerator::syncTempOpr()     { return FrameMap::Z_R13_opr; }
  78 LIR_Opr LIRGenerator::getThreadTemp()   { return LIR_OprFact::illegalOpr; }
  79 
  80 LIR_Opr LIRGenerator::result_register_for (ValueType* type, bool callee) {
  81   LIR_Opr opr;
  82   switch (type->tag()) {
  83     case intTag:    opr = FrameMap::Z_R2_opr;        break;
  84     case objectTag: opr = FrameMap::Z_R2_oop_opr;    break;
  85     case longTag:   opr = FrameMap::Z_R2_long_opr;   break;
  86     case floatTag:  opr = FrameMap::Z_F0_opr;        break;
  87     case doubleTag: opr = FrameMap::Z_F0_double_opr; break;
  88 
  89     case addressTag:
  90     default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
  91   }
  92 
  93   assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
  94   return opr;
  95 }
  96 
  97 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
  98   return new_register(T_INT);
  99 }
 100 
 101 //--------- Loading items into registers. --------------------------------
 102 
 103 // z/Architecture cannot inline all constants.
 104 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
 105   if (v->type()->as_IntConstant() != NULL) {
 106     return Immediate::is_simm16(v->type()->as_IntConstant()->value());
 107   } else if (v->type()->as_LongConstant() != NULL) {
 108     return Immediate::is_simm16(v->type()->as_LongConstant()->value());
 109   } else if (v->type()->as_ObjectConstant() != NULL) {
 110     return v->type()->as_ObjectConstant()->value()->is_null_object();
 111   } else {
 112     return false;
 113   }
 114 }
 115 
 116 bool LIRGenerator::can_inline_as_constant(Value i, int bits) const {
 117   if (i->type()->as_IntConstant() != NULL) {
 118     return Assembler::is_simm(i->type()->as_IntConstant()->value(), bits);
 119   } else if (i->type()->as_LongConstant() != NULL) {
 120     return Assembler::is_simm(i->type()->as_LongConstant()->value(), bits);
 121   } else {
 122     return can_store_as_constant(i, as_BasicType(i->type()));
 123   }
 124 }
 125 
 126 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
 127   if (c->type() == T_INT) {
 128     return Immediate::is_simm20(c->as_jint());
 129   } else   if (c->type() == T_LONG) {
 130     return Immediate::is_simm20(c->as_jlong());
 131   }
 132   return false;
 133 }
 134 
 135 LIR_Opr LIRGenerator::safepoint_poll_register() {
 136   return new_register(longType);
 137 }
 138 
 139 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
 140                                             int shift, int disp, BasicType type) {
 141   assert(base->is_register(), "must be");
 142   if (index->is_constant()) {
 143     intptr_t large_disp = ((intx)(index->as_constant_ptr()->as_jint()) << shift) + disp;
 144     if (Displacement::is_validDisp(large_disp)) {
 145       return new LIR_Address(base, large_disp, type);
 146     }
 147     // Index is illegal so replace it with the displacement loaded into a register.
 148     index = new_pointer_register();
 149     __ move(LIR_OprFact::intptrConst(large_disp), index);
 150     return new LIR_Address(base, index, type);
 151   } else {
 152     if (shift > 0) {
 153       LIR_Opr tmp = new_pointer_register();
 154       __ shift_left(index, shift, tmp);
 155       index = tmp;
 156     }
 157     return new LIR_Address(base, index, disp, type);
 158   }
 159 }
 160 
 161 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
 162                                               BasicType type, bool needs_card_mark) {
 163   int elem_size = type2aelembytes(type);
 164   int shift = exact_log2(elem_size);
 165   int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
 166 
 167   LIR_Address* addr;
 168   if (index_opr->is_constant()) {
 169     addr = new LIR_Address(array_opr,
 170                            offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type);
 171   } else {
 172     if (index_opr->type() == T_INT) {
 173       LIR_Opr tmp = new_register(T_LONG);
 174       __ convert(Bytecodes::_i2l, index_opr, tmp);
 175       index_opr = tmp;
 176     }
 177     if (shift > 0) {
 178       __ shift_left(index_opr, shift, index_opr);
 179     }
 180     addr = new LIR_Address(array_opr,
 181                            index_opr,
 182                            offset_in_bytes, type);
 183   }
 184   if (needs_card_mark) {
 185     // This store will need a precise card mark, so go ahead and
 186     // compute the full adddres instead of computing once for the
 187     // store and again for the card mark.
 188     LIR_Opr tmp = new_pointer_register();
 189     __ leal(LIR_OprFact::address(addr), tmp);
 190     return new LIR_Address(tmp, type);
 191   } else {
 192     return addr;
 193   }
 194 }
 195 
 196 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
 197   LIR_Opr r = LIR_OprFact::illegalOpr;
 198   if (type == T_LONG) {
 199     r = LIR_OprFact::longConst(x);
 200   } else if (type == T_INT) {
 201     r = LIR_OprFact::intConst(x);
 202   } else {
 203     ShouldNotReachHere();
 204   }
 205   return r;
 206 }
 207 
 208 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
 209   LIR_Opr pointer = new_pointer_register();
 210   __ move(LIR_OprFact::intptrConst(counter), pointer);
 211   LIR_Address* addr = new LIR_Address(pointer, type);
 212   increment_counter(addr, step);
 213 }
 214 
 215 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
 216   __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
 217 }
 218 
 219 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
 220   LIR_Opr scratch = FrameMap::Z_R1_opr;
 221   __ load(new LIR_Address(base, disp, T_INT), scratch, info);
 222   __ cmp(condition, scratch, c);
 223 }
 224 
 225 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
 226   __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
 227 }
 228 
 229 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
 230   __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
 231 }
 232 
 233 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
 234   if (tmp->is_valid()) {
 235     if (is_power_of_2(c + 1)) {
 236       __ move(left, tmp);
 237       __ shift_left(left, log2_intptr(c + 1), left);
 238       __ sub(left, tmp, result);
 239       return true;
 240     } else if (is_power_of_2(c - 1)) {
 241       __ move(left, tmp);
 242       __ shift_left(left, log2_intptr(c - 1), left);
 243       __ add(left, tmp, result);
 244       return true;
 245     }
 246   }
 247   return false;
 248 }
 249 
 250 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
 251   BasicType type = item->type();
 252   __ store(item, new LIR_Address(FrameMap::Z_SP_opr, in_bytes(offset_from_sp), type));
 253 }
 254 
 255 //----------------------------------------------------------------------
 256 //             visitor functions
 257 //----------------------------------------------------------------------
 258 
 259 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
 260   assert(x->is_pinned(),"");
 261   bool needs_range_check = x->compute_needs_range_check();
 262   bool use_length = x->length() != NULL;
 263   bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
 264   bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
 265                                          !get_jobject_constant(x->value())->is_null_object() ||
 266                                          x->should_profile());
 267 
 268   LIRItem array(x->array(), this);
 269   LIRItem index(x->index(), this);
 270   LIRItem value(x->value(), this);
 271   LIRItem length(this);
 272 
 273   array.load_item();
 274   index.load_nonconstant(20);
 275 
 276   if (use_length && needs_range_check) {
 277     length.set_instruction(x->length());
 278     length.load_item();
 279   }
 280   if (needs_store_check || x->check_boolean()) {
 281     value.load_item();
 282   } else {
 283     value.load_for_store(x->elt_type());
 284   }
 285 
 286   set_no_result(x);
 287 
 288   // The CodeEmitInfo must be duplicated for each different
 289   // LIR-instruction because spilling can occur anywhere between two
 290   // instructions and so the debug information must be different.
 291   CodeEmitInfo* range_check_info = state_for (x);
 292   CodeEmitInfo* null_check_info = NULL;
 293   if (x->needs_null_check()) {
 294     null_check_info = new CodeEmitInfo(range_check_info);
 295   }
 296 
 297   // Emit array address setup early so it schedules better.
 298   LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
 299   if (value.result()->is_constant() && array_addr->index()->is_valid()) {
 300     // Constants cannot be stored with index register on ZARCH_64 (see LIR_Assembler::const2mem()).
 301     LIR_Opr tmp = new_pointer_register();
 302     __ leal(LIR_OprFact::address(array_addr), tmp);
 303     array_addr = new LIR_Address(tmp, x->elt_type());
 304   }
 305 
 306   if (GenerateRangeChecks && needs_range_check) {
 307     if (use_length) {
 308       __ cmp(lir_cond_belowEqual, length.result(), index.result());
 309       __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
 310     } else {
 311       array_range_check(array.result(), index.result(), null_check_info, range_check_info);
 312       // Range_check also does the null check.
 313       null_check_info = NULL;
 314     }
 315   }
 316 
 317   if (GenerateArrayStoreCheck && needs_store_check) {
 318     LIR_Opr tmp1 = new_register(objectType);
 319     LIR_Opr tmp2 = new_register(objectType);
 320     LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
 321 
 322     CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
 323     __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci());
 324   }
 325 
 326   if (obj_store) {
 327     // Needs GC write barriers.
 328     pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
 329                 true /* do_load */, false /* patch */, NULL);
 330   }
 331 
 332   LIR_Opr result = maybe_mask_boolean(x, array.result(), value.result(), null_check_info);
 333   __ move(result, array_addr, null_check_info);
 334 
 335   if (obj_store) {
 336     // Precise card mark
 337     post_barrier(LIR_OprFact::address(array_addr), value.result());
 338   }
 339 }
 340 
 341 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
 342   assert(x->is_pinned(),"");
 343   LIRItem obj(x->obj(), this);
 344   obj.load_item();
 345 
 346   set_no_result(x);
 347 
 348   // "lock" stores the address of the monitor stack slot, so this is not an oop.
 349   LIR_Opr lock = new_register(T_INT);
 350 
 351   CodeEmitInfo* info_for_exception = NULL;
 352   if (x->needs_null_check()) {
 353     info_for_exception = state_for (x);
 354   }
 355   // This CodeEmitInfo must not have the xhandlers because here the
 356   // object is already locked (xhandlers expect object to be unlocked).
 357   CodeEmitInfo* info = state_for (x, x->state(), true);
 358   monitor_enter(obj.result(), lock, syncTempOpr(), LIR_OprFact::illegalOpr,
 359                 x->monitor_no(), info_for_exception, info);
 360 }
 361 
 362 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
 363   assert(x->is_pinned(),"");
 364 
 365   LIRItem obj(x->obj(), this);
 366   obj.dont_load_item();
 367 
 368   LIR_Opr lock = new_register(T_INT);
 369   LIR_Opr obj_temp = new_register(T_INT);
 370   set_no_result(x);
 371   monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
 372 }
 373 
 374 // _ineg, _lneg, _fneg, _dneg
 375 void LIRGenerator::do_NegateOp(NegateOp* x) {
 376   LIRItem value(x->x(), this);
 377   value.load_item();
 378   LIR_Opr reg = rlock_result(x);
 379   __ negate(value.result(), reg);
 380 }
 381 
 382 // for _fadd, _fmul, _fsub, _fdiv, _frem
 383 //     _dadd, _dmul, _dsub, _ddiv, _drem
 384 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
 385   LIRItem left(x->x(),  this);
 386   LIRItem right(x->y(), this);
 387   LIRItem* left_arg  = &left;
 388   LIRItem* right_arg = &right;
 389   assert(!left.is_stack(), "can't both be memory operands");
 390   left.load_item();
 391 
 392   if (right.is_register() || right.is_constant()) {
 393     right.load_item();
 394   } else {
 395     right.dont_load_item();
 396   }
 397 
 398   if ((x->op() == Bytecodes::_frem) || (x->op() == Bytecodes::_drem)) {
 399     address entry;
 400     switch (x->op()) {
 401     case Bytecodes::_frem:
 402       entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
 403       break;
 404     case Bytecodes::_drem:
 405       entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
 406       break;
 407     default:
 408       ShouldNotReachHere();
 409     }
 410     LIR_Opr result = call_runtime(x->x(), x->y(), entry, x->type(), NULL);
 411     set_result(x, result);
 412   } else {
 413     LIR_Opr reg = rlock(x);
 414     LIR_Opr tmp = LIR_OprFact::illegalOpr;
 415     arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp);
 416     set_result(x, reg);
 417   }
 418 }
 419 
 420 // for _ladd, _lmul, _lsub, _ldiv, _lrem
 421 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
 422   if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem) {
 423     // Use shifts if divisior is a power of 2 otherwise use DSGR instruction.
 424     // Instruction: DSGR R1, R2
 425     // input : R1+1: dividend   (R1, R1+1 designate a register pair, R1 must be even)
 426     //         R2:   divisor
 427     //
 428     // output: R1+1: quotient
 429     //         R1:   remainder
 430     //
 431     // Register selection: R1:   Z_R10
 432     //                     R1+1: Z_R11
 433     //                     R2:   to be chosen by register allocator (linear scan)
 434 
 435     // R1, and R1+1 will be destroyed.
 436 
 437     LIRItem right(x->y(), this);
 438     LIRItem left(x->x() , this);   // Visit left second, so that the is_register test is valid.
 439 
 440     // Call state_for before load_item_force because state_for may
 441     // force the evaluation of other instructions that are needed for
 442     // correct debug info. Otherwise the live range of the fix
 443     // register might be too long.
 444     CodeEmitInfo* info = state_for (x);
 445 
 446     LIR_Opr result = rlock_result(x);
 447     LIR_Opr result_reg = result;
 448     LIR_Opr tmp = LIR_OprFact::illegalOpr;
 449     LIR_Opr divisor_opr = right.result();
 450     if (divisor_opr->is_constant() && is_power_of_2(divisor_opr->as_jlong())) {
 451       left.load_item();
 452       right.dont_load_item();
 453     } else {
 454       left.load_item_force(ldivInOpr());
 455       right.load_item();
 456 
 457       // DSGR instruction needs register pair.
 458       if (x->op() == Bytecodes::_ldiv) {
 459         result_reg = ldivOutOpr();
 460         tmp        = lremOutOpr();
 461       } else {
 462         result_reg = lremOutOpr();
 463         tmp        = ldivOutOpr();
 464       }
 465     }
 466 
 467     if (!ImplicitDiv0Checks) {
 468       __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
 469       __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
 470       // Idiv/irem cannot trap (passing info would generate an assertion).
 471       info = NULL;
 472     }
 473 
 474     if (x->op() == Bytecodes::_lrem) {
 475       __ irem(left.result(), right.result(), result_reg, tmp, info);
 476     } else if (x->op() == Bytecodes::_ldiv) {
 477       __ idiv(left.result(), right.result(), result_reg, tmp, info);
 478     } else {
 479       ShouldNotReachHere();
 480     }
 481 
 482     if (result_reg != result) {
 483       __ move(result_reg, result);
 484     }
 485   } else {
 486     LIRItem left(x->x(), this);
 487     LIRItem right(x->y(), this);
 488 
 489     left.load_item();
 490     right.load_nonconstant(32);
 491     rlock_result(x);
 492     arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
 493   }
 494 }
 495 
 496 // for: _iadd, _imul, _isub, _idiv, _irem
 497 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
 498   if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
 499     // Use shifts if divisior is a power of 2 otherwise use DSGFR instruction.
 500     // Instruction: DSGFR R1, R2
 501     // input : R1+1: dividend   (R1, R1+1 designate a register pair, R1 must be even)
 502     //         R2:   divisor
 503     //
 504     // output: R1+1: quotient
 505     //         R1:   remainder
 506     //
 507     // Register selection: R1:   Z_R10
 508     //                     R1+1: Z_R11
 509     //                     R2:   To be chosen by register allocator (linear scan).
 510 
 511     // R1, and R1+1 will be destroyed.
 512 
 513     LIRItem right(x->y(), this);
 514     LIRItem left(x->x() , this);   // Visit left second, so that the is_register test is valid.
 515 
 516     // Call state_for before load_item_force because state_for may
 517     // force the evaluation of other instructions that are needed for
 518     // correct debug info. Otherwise the live range of the fix
 519     // register might be too long.
 520     CodeEmitInfo* info = state_for (x);
 521 
 522     LIR_Opr result = rlock_result(x);
 523     LIR_Opr result_reg = result;
 524     LIR_Opr tmp = LIR_OprFact::illegalOpr;
 525     LIR_Opr divisor_opr = right.result();
 526     if (divisor_opr->is_constant() && is_power_of_2(divisor_opr->as_jint())) {
 527       left.load_item();
 528       right.dont_load_item();
 529     } else {
 530       left.load_item_force(divInOpr());
 531       right.load_item();
 532 
 533       // DSGFR instruction needs register pair.
 534       if (x->op() == Bytecodes::_idiv) {
 535         result_reg = divOutOpr();
 536         tmp        = remOutOpr();
 537       } else {
 538         result_reg = remOutOpr();
 539         tmp        = divOutOpr();
 540       }
 541     }
 542 
 543     if (!ImplicitDiv0Checks) {
 544       __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
 545       __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));
 546       // Idiv/irem cannot trap (passing info would generate an assertion).
 547       info = NULL;
 548     }
 549 
 550     if (x->op() == Bytecodes::_irem) {
 551       __ irem(left.result(), right.result(), result_reg, tmp, info);
 552     } else if (x->op() == Bytecodes::_idiv) {
 553       __ idiv(left.result(), right.result(), result_reg, tmp, info);
 554     } else {
 555       ShouldNotReachHere();
 556     }
 557 
 558     if (result_reg != result) {
 559       __ move(result_reg, result);
 560     }
 561   } else {
 562     LIRItem left(x->x(),  this);
 563     LIRItem right(x->y(), this);
 564     LIRItem* left_arg = &left;
 565     LIRItem* right_arg = &right;
 566     if (x->is_commutative() && left.is_stack() && right.is_register()) {
 567       // swap them if left is real stack (or cached) and right is real register(not cached)
 568       left_arg = &right;
 569       right_arg = &left;
 570     }
 571 
 572     left_arg->load_item();
 573 
 574     // Do not need to load right, as we can handle stack and constants.
 575     if (x->op() == Bytecodes::_imul) {
 576       bool use_tmp = false;
 577       if (right_arg->is_constant()) {
 578         int iconst = right_arg->get_jint_constant();
 579         if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
 580           use_tmp = true;
 581         }
 582       }
 583       right_arg->dont_load_item();
 584       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 585       if (use_tmp) {
 586         tmp = new_register(T_INT);
 587       }
 588       rlock_result(x);
 589 
 590       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 591     } else {
 592       right_arg->dont_load_item();
 593       rlock_result(x);
 594       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 595       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 596     }
 597   }
 598 }
 599 
 600 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
 601   // If an operand with use count 1 is the left operand, then it is
 602   // likely that no move for 2-operand-LIR-form is necessary.
 603   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 604     x->swap_operands();
 605   }
 606 
 607   ValueTag tag = x->type()->tag();
 608   assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
 609   switch (tag) {
 610     case floatTag:
 611     case doubleTag: do_ArithmeticOp_FPU(x);  return;
 612     case longTag:   do_ArithmeticOp_Long(x); return;
 613     case intTag:    do_ArithmeticOp_Int(x);  return;
 614   }
 615   ShouldNotReachHere();
 616 }
 617 
 618 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
 619 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
 620   // count must always be in rcx
 621   LIRItem value(x->x(), this);
 622   LIRItem count(x->y(), this);
 623 
 624   ValueTag elemType = x->type()->tag();
 625   bool must_load_count = !count.is_constant();
 626   if (must_load_count) {
 627     count.load_item();
 628   } else {
 629     count.dont_load_item();
 630   }
 631   value.load_item();
 632   LIR_Opr reg = rlock_result(x);
 633 
 634   shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
 635 }
 636 
 637 // _iand, _land, _ior, _lor, _ixor, _lxor
 638 void LIRGenerator::do_LogicOp(LogicOp* x) {
 639   // IF an operand with use count 1 is the left operand, then it is
 640   // likely that no move for 2-operand-LIR-form is necessary.
 641   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 642     x->swap_operands();
 643   }
 644 
 645   LIRItem left(x->x(), this);
 646   LIRItem right(x->y(), this);
 647 
 648   left.load_item();
 649   right.load_nonconstant(32);
 650   LIR_Opr reg = rlock_result(x);
 651 
 652   logic_op(x->op(), reg, left.result(), right.result());
 653 }
 654 
 655 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
 656 void LIRGenerator::do_CompareOp(CompareOp* x) {
 657   LIRItem left(x->x(), this);
 658   LIRItem right(x->y(), this);
 659   left.load_item();
 660   right.load_item();
 661   LIR_Opr reg = rlock_result(x);
 662   if (x->x()->type()->is_float_kind()) {
 663     Bytecodes::Code code = x->op();
 664     __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
 665   } else if (x->x()->type()->tag() == longTag) {
 666     __ lcmp2int(left.result(), right.result(), reg);
 667   } else {
 668     ShouldNotReachHere();
 669   }
 670 }
 671 
 672 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
 673   assert(x->number_of_arguments() == 4, "wrong type");
 674   LIRItem obj   (x->argument_at(0), this);  // object
 675   LIRItem offset(x->argument_at(1), this);  // offset of field
 676   LIRItem cmp   (x->argument_at(2), this);  // Value to compare with field.
 677   LIRItem val   (x->argument_at(3), this);  // Replace field with val if matches cmp.
 678 
 679   // Get address of field.
 680   obj.load_item();
 681   offset.load_nonconstant(20);
 682   cmp.load_item();
 683   val.load_item();
 684 
 685   LIR_Opr addr = new_pointer_register();
 686   LIR_Address* a;
 687   if (offset.result()->is_constant()) {
 688     assert(Immediate::is_simm20(offset.result()->as_jlong()), "should have been loaded into register");
 689     a = new LIR_Address(obj.result(),
 690                         offset.result()->as_jlong(),
 691                         as_BasicType(type));
 692   } else {
 693     a = new LIR_Address(obj.result(),
 694                         offset.result(),
 695                         0,
 696                         as_BasicType(type));
 697   }
 698   __ leal(LIR_OprFact::address(a), addr);
 699 
 700   if (type == objectType) {  // Write-barrier needed for Object fields.
 701     pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */,
 702                 true /* do_load */, false /* patch */, NULL);
 703   }
 704 
 705   LIR_Opr ill = LIR_OprFact::illegalOpr;  // for convenience
 706   if (type == objectType) {
 707     __ cas_obj(addr, cmp.result(), val.result(), new_register(T_OBJECT), new_register(T_OBJECT));
 708   } else if (type == intType) {
 709     __ cas_int(addr, cmp.result(), val.result(), ill, ill);
 710   } else if (type == longType) {
 711     __ cas_long(addr, cmp.result(), val.result(), ill, ill);
 712   } else {
 713     ShouldNotReachHere();
 714   }
 715   // Generate conditional move of boolean result.
 716   LIR_Opr result = rlock_result(x);
 717   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
 718            result, as_BasicType(type));
 719   if (type == objectType) {  // Write-barrier needed for Object fields.
 720     // Precise card mark since could either be object or array
 721     post_barrier(addr, val.result());
 722   }
 723 }
 724 
 725 
 726 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
 727   switch (x->id()) {
 728     case vmIntrinsics::_dabs:
 729     case vmIntrinsics::_dsqrt: {
 730       assert(x->number_of_arguments() == 1, "wrong type");
 731       LIRItem value(x->argument_at(0), this);
 732       value.load_item();
 733       LIR_Opr dst = rlock_result(x);
 734 
 735       switch (x->id()) {
 736       case vmIntrinsics::_dsqrt: {
 737         __ sqrt(value.result(), dst, LIR_OprFact::illegalOpr);
 738         break;
 739       }
 740       case vmIntrinsics::_dabs: {
 741         __ abs(value.result(), dst, LIR_OprFact::illegalOpr);
 742         break;
 743       }
 744       }
 745       break;
 746     }
 747     case vmIntrinsics::_dlog10: // fall through
 748     case vmIntrinsics::_dlog: // fall through
 749     case vmIntrinsics::_dsin: // fall through
 750     case vmIntrinsics::_dtan: // fall through
 751     case vmIntrinsics::_dcos: // fall through
 752     case vmIntrinsics::_dexp: {
 753       assert(x->number_of_arguments() == 1, "wrong type");
 754 
 755       address runtime_entry = NULL;
 756       switch (x->id()) {
 757       case vmIntrinsics::_dsin:
 758         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsin);
 759         break;
 760       case vmIntrinsics::_dcos:
 761         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dcos);
 762         break;
 763       case vmIntrinsics::_dtan:
 764         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dtan);
 765         break;
 766       case vmIntrinsics::_dlog:
 767         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog);
 768         break;
 769       case vmIntrinsics::_dlog10:
 770         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10);
 771         break;
 772       case vmIntrinsics::_dexp:
 773         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dexp);
 774         break;
 775       default:
 776         ShouldNotReachHere();
 777       }
 778 
 779       LIR_Opr result = call_runtime(x->argument_at(0), runtime_entry, x->type(), NULL);
 780       set_result(x, result);
 781       break;
 782     }
 783     case vmIntrinsics::_dpow: {
 784       assert(x->number_of_arguments() == 2, "wrong type");
 785       address runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dpow);
 786       LIR_Opr result = call_runtime(x->argument_at(0), x->argument_at(1), runtime_entry, x->type(), NULL);
 787       set_result(x, result);
 788       break;
 789     }
 790   }
 791 }
 792 
 793 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
 794   assert(x->number_of_arguments() == 5, "wrong type");
 795 
 796   // Copy stubs possibly call C code, e.g. G1 barriers, so we need to reserve room
 797   // for the C ABI (see frame::z_abi_160).
 798   BasicTypeArray sig; // Empty signature is precise enough.
 799   frame_map()->c_calling_convention(&sig);
 800 
 801   // Make all state_for calls early since they can emit code.
 802   CodeEmitInfo* info = state_for (x, x->state());
 803 
 804   LIRItem src(x->argument_at(0), this);
 805   LIRItem src_pos(x->argument_at(1), this);
 806   LIRItem dst(x->argument_at(2), this);
 807   LIRItem dst_pos(x->argument_at(3), this);
 808   LIRItem length(x->argument_at(4), this);
 809 
 810   // Operands for arraycopy must use fixed registers, otherwise
 811   // LinearScan will fail allocation (because arraycopy always needs a
 812   // call).
 813 
 814   src.load_item_force     (FrameMap::as_oop_opr(Z_ARG1));
 815   src_pos.load_item_force (FrameMap::as_opr(Z_ARG2));
 816   dst.load_item_force     (FrameMap::as_oop_opr(Z_ARG3));
 817   dst_pos.load_item_force (FrameMap::as_opr(Z_ARG4));
 818   length.load_item_force  (FrameMap::as_opr(Z_ARG5));
 819 
 820   LIR_Opr tmp =            FrameMap::as_opr(Z_R7);
 821 
 822   set_no_result(x);
 823 
 824   int flags;
 825   ciArrayKlass* expected_type;
 826   arraycopy_helper(x, &flags, &expected_type);
 827 
 828   __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(),
 829                length.result(), tmp, expected_type, flags, info); // does add_safepoint
 830 }
 831 
 832 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
 833 // _i2b, _i2c, _i2s
 834 void LIRGenerator::do_Convert(Convert* x) {
 835   LIRItem value(x->value(), this);
 836 
 837   value.load_item();
 838   LIR_Opr reg = rlock_result(x);
 839   __ convert(x->op(), value.result(), reg);
 840 }
 841 
 842 void LIRGenerator::do_NewInstance(NewInstance* x) {
 843   print_if_not_loaded(x);
 844 
 845   // This instruction can be deoptimized in the slow path : use
 846   // Z_R2 as result register.
 847   const LIR_Opr reg = result_register_for (x->type());
 848 
 849   CodeEmitInfo* info = state_for (x, x->state());
 850   LIR_Opr tmp1 = FrameMap::Z_R12_oop_opr;
 851   LIR_Opr tmp2 = FrameMap::Z_R13_oop_opr;
 852   LIR_Opr tmp3 = reg;
 853   LIR_Opr tmp4 = LIR_OprFact::illegalOpr;
 854   LIR_Opr klass_reg = FrameMap::Z_R11_metadata_opr;
 855   new_instance(reg, x->klass(), x->is_unresolved(), tmp1, tmp2, tmp3, tmp4, klass_reg, info);
 856   LIR_Opr result = rlock_result(x);
 857   __ move(reg, result);
 858 }
 859 
 860 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
 861   CodeEmitInfo* info = state_for (x, x->state());
 862 
 863   LIRItem length(x->length(), this);
 864   length.load_item();
 865 
 866   LIR_Opr reg = result_register_for (x->type());
 867   LIR_Opr tmp1 = FrameMap::Z_R12_oop_opr;
 868   LIR_Opr tmp2 = FrameMap::Z_R13_oop_opr;
 869   LIR_Opr tmp3 = reg;
 870   LIR_Opr tmp4 = LIR_OprFact::illegalOpr;
 871   LIR_Opr klass_reg = FrameMap::Z_R11_metadata_opr;
 872   LIR_Opr len = length.result();
 873   BasicType elem_type = x->elt_type();
 874 
 875   __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
 876 
 877   CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
 878   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
 879 
 880   LIR_Opr result = rlock_result(x);
 881   __ move(reg, result);
 882 }
 883 
 884 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
 885   // Evaluate state_for early since it may emit code.
 886   CodeEmitInfo* info = state_for (x, x->state());
 887   // In case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
 888   // and therefore provide the state before the parameters have been consumed.
 889   CodeEmitInfo* patching_info = NULL;
 890   if (!x->klass()->is_loaded() || PatchALot) {
 891     patching_info = state_for (x, x->state_before());
 892   }
 893 
 894   LIRItem length(x->length(), this);
 895   length.load_item();
 896 
 897   const LIR_Opr reg = result_register_for (x->type());
 898   LIR_Opr tmp1 = FrameMap::Z_R12_oop_opr;
 899   LIR_Opr tmp2 = FrameMap::Z_R13_oop_opr;
 900   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
 901   LIR_Opr tmp4 = LIR_OprFact::illegalOpr;
 902   LIR_Opr klass_reg = FrameMap::Z_R11_metadata_opr;
 903   LIR_Opr len = length.result();
 904 
 905   CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
 906   ciKlass* obj = ciObjArrayKlass::make(x->klass());
 907   if (obj == ciEnv::unloaded_ciobjarrayklass()) {
 908     BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
 909   }
 910   klass2reg_with_patching(klass_reg, obj, patching_info);
 911   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
 912 
 913   LIR_Opr result = rlock_result(x);
 914   __ move(reg, result);
 915 }
 916 
 917 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
 918   Values* dims = x->dims();
 919   int i = dims->length();
 920   LIRItemList* items = new LIRItemList(i, i, NULL);
 921   while (i-- > 0) {
 922     LIRItem* size = new LIRItem(dims->at(i), this);
 923     items->at_put(i, size);
 924   }
 925 
 926   // Evaluate state_for early since it may emit code.
 927   CodeEmitInfo* patching_info = NULL;
 928   if (!x->klass()->is_loaded() || PatchALot) {
 929     patching_info = state_for (x, x->state_before());
 930 
 931     // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
 932     // clone all handlers (NOTE: Usually this is handled transparently
 933     // by the CodeEmitInfo cloning logic in CodeStub constructors but
 934     // is done explicitly here because a stub isn't being used).
 935     x->set_exception_handlers(new XHandlers(x->exception_handlers()));
 936   }
 937   CodeEmitInfo* info = state_for (x, x->state());
 938 
 939   i = dims->length();
 940   while (--i >= 0) {
 941     LIRItem* size = items->at(i);
 942     size->load_nonconstant(32);
 943     // FrameMap::_reserved_argument_area_size includes the dimensions varargs, because
 944     // it's initialized to hir()->max_stack() when the FrameMap is created.
 945     store_stack_parameter(size->result(), in_ByteSize(i*sizeof(jint) + FrameMap::first_available_sp_in_frame));
 946   }
 947 
 948   LIR_Opr klass_reg = FrameMap::Z_R3_metadata_opr;
 949   klass2reg_with_patching(klass_reg, x->klass(), patching_info);
 950 
 951   LIR_Opr rank = FrameMap::Z_R4_opr;
 952   __ move(LIR_OprFact::intConst(x->rank()), rank);
 953   LIR_Opr varargs = FrameMap::Z_R5_opr;
 954   __ leal(LIR_OprFact::address(new LIR_Address(FrameMap::Z_SP_opr, FrameMap::first_available_sp_in_frame, T_INT)),
 955           varargs);
 956   LIR_OprList* args = new LIR_OprList(3);
 957   args->append(klass_reg);
 958   args->append(rank);
 959   args->append(varargs);
 960   LIR_Opr reg = result_register_for (x->type());
 961   __ call_runtime(Runtime1::entry_for (Runtime1::new_multi_array_id),
 962                   LIR_OprFact::illegalOpr,
 963                   reg, args, info);
 964 
 965   LIR_Opr result = rlock_result(x);
 966   __ move(reg, result);
 967 }
 968 
 969 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
 970   // Nothing to do.
 971 }
 972 
 973 void LIRGenerator::do_CheckCast(CheckCast* x) {
 974   LIRItem obj(x->obj(), this);
 975 
 976   CodeEmitInfo* patching_info = NULL;
 977   if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
 978     // Must do this before locking the destination register as an oop register,
 979     // and before the obj is loaded (the latter is for deoptimization).
 980     patching_info = state_for (x, x->state_before());
 981   }
 982   obj.load_item();
 983 
 984   // info for exceptions
 985   CodeEmitInfo* info_for_exception =
 986       (x->needs_exception_state() ? state_for(x) :
 987                                     state_for(x, x->state_before(), true /*ignore_xhandler*/));
 988 
 989   CodeStub* stub;
 990   if (x->is_incompatible_class_change_check()) {
 991     assert(patching_info == NULL, "can't patch this");
 992     stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
 993   } else if (x->is_invokespecial_receiver_check()) {
 994     assert(patching_info == NULL, "can't patch this");
 995     stub = new DeoptimizeStub(info_for_exception,
 996                               Deoptimization::Reason_class_check,
 997                               Deoptimization::Action_none);
 998   } else {
 999     stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1000   }
1001   LIR_Opr reg = rlock_result(x);
1002   LIR_Opr tmp1 = new_register(objectType);
1003   LIR_Opr tmp2 = new_register(objectType);
1004   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1005   __ checkcast(reg, obj.result(), x->klass(),
1006                tmp1, tmp2, tmp3,
1007                x->direct_compare(), info_for_exception, patching_info, stub,
1008                x->profiled_method(), x->profiled_bci());
1009 }
1010 
1011 
1012 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1013   LIRItem obj(x->obj(), this);
1014   CodeEmitInfo* patching_info = NULL;
1015   if (!x->klass()->is_loaded() || PatchALot) {
1016     patching_info = state_for (x, x->state_before());
1017   }
1018   // Ensure the result register is not the input register because the
1019   // result is initialized before the patching safepoint.
1020   obj.load_item();
1021   LIR_Opr out_reg = rlock_result(x);
1022   LIR_Opr tmp1 = new_register(objectType);
1023   LIR_Opr tmp2 = new_register(objectType);
1024   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1025   __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
1026                 x->direct_compare(), patching_info,
1027                 x->profiled_method(), x->profiled_bci());
1028 }
1029 
1030 
1031 void LIRGenerator::do_If (If* x) {
1032   assert(x->number_of_sux() == 2, "inconsistency");
1033   ValueTag tag = x->x()->type()->tag();
1034   bool is_safepoint = x->is_safepoint();
1035 
1036   If::Condition cond = x->cond();
1037 
1038   LIRItem xitem(x->x(), this);
1039   LIRItem yitem(x->y(), this);
1040   LIRItem* xin = &xitem;
1041   LIRItem* yin = &yitem;
1042 
1043   if (tag == longTag) {
1044     // For longs, only conditions "eql", "neq", "lss", "geq" are valid;
1045     // mirror for other conditions.
1046     if (cond == If::gtr || cond == If::leq) {
1047       cond = Instruction::mirror(cond);
1048       xin = &yitem;
1049       yin = &xitem;
1050     }
1051     xin->set_destroys_register();
1052   }
1053   xin->load_item();
1054   // TODO: don't load long constants != 0L
1055   if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1056     // inline long zero
1057     yin->dont_load_item();
1058   } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
1059     // Longs cannot handle constants at right side.
1060     yin->load_item();
1061   } else {
1062     yin->dont_load_item();
1063   }
1064 
1065   // Add safepoint before generating condition code so it can be recomputed.
1066   if (x->is_safepoint()) {
1067     // Increment backedge counter if needed.
1068     increment_backedge_counter(state_for (x, x->state_before()), x->profiled_bci());
1069     // Use safepoint_poll_register() instead of LIR_OprFact::illegalOpr.
1070     __ safepoint(safepoint_poll_register(), state_for (x, x->state_before()));
1071   }
1072   set_no_result(x);
1073 
1074   LIR_Opr left = xin->result();
1075   LIR_Opr right = yin->result();
1076   __ cmp(lir_cond(cond), left, right);
1077   // Generate branch profiling. Profiling code doesn't kill flags.
1078   profile_branch(x, cond);
1079   move_to_phi(x->state());
1080   if (x->x()->type()->is_float_kind()) {
1081     __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1082   } else {
1083     __ branch(lir_cond(cond), right->type(), x->tsux());
1084   }
1085   assert(x->default_sux() == x->fsux(), "wrong destination above");
1086   __ jump(x->default_sux());
1087 }
1088 
1089 LIR_Opr LIRGenerator::getThreadPointer() {
1090   return FrameMap::as_pointer_opr(Z_thread);
1091 }
1092 
1093 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1094   __ move(LIR_OprFact::intConst(block->block_id()), FrameMap::Z_R2_opr);
1095   LIR_OprList* args = new LIR_OprList(1);
1096   args->append(FrameMap::Z_R2_opr);
1097   address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1098   __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1099 }
1100 
1101 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1102                                         CodeEmitInfo* info) {
1103   __ store(value, address, info);
1104 }
1105 
1106 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1107                                        CodeEmitInfo* info) {
1108   __ load(address, result, info);
1109 }
1110 
1111 
1112 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1113                                      BasicType type, bool is_volatile) {
1114   LIR_Address* addr = new LIR_Address(src, offset, type);
1115   bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1116   if (is_obj) {
1117     // Do the pre-write barrier, if any.
1118     pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1119                 true /* do_load */, false /* patch */, NULL);
1120     __ move(data, addr);
1121     assert(src->is_register(), "must be register");
1122     // Seems to be a precise address.
1123     post_barrier(LIR_OprFact::address(addr), data);
1124   } else {
1125     __ move(data, addr);
1126   }
1127 }
1128 
1129 
1130 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
1131                                      BasicType type, bool is_volatile) {
1132   LIR_Address* addr = new LIR_Address(src, offset, type);
1133   __ load(addr, dst);
1134 }
1135 
1136 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) {
1137   BasicType type = x->basic_type();
1138   assert (x->is_add() && type != T_ARRAY && type != T_OBJECT, "not supported");
1139   LIRItem src(x->object(), this);
1140   LIRItem off(x->offset(), this);
1141   LIRItem value(x->value(), this);
1142 
1143   src.load_item();
1144   value.load_item();
1145   off.load_nonconstant(20);
1146 
1147   LIR_Opr dst = rlock_result(x, type);
1148   LIR_Opr data = value.result();
1149   LIR_Opr offset = off.result();
1150 
1151   LIR_Address* addr;
1152   if (offset->is_constant()) {
1153     assert(Immediate::is_simm20(offset->as_jlong()), "should have been loaded into register");
1154     addr = new LIR_Address(src.result(), offset->as_jlong(), type);
1155   } else {
1156     addr = new LIR_Address(src.result(), offset, type);
1157   }
1158 
1159   __ xadd(LIR_OprFact::address(addr), data, dst, LIR_OprFact::illegalOpr);
1160 }
1161 
1162 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1163   assert(UseCRC32Intrinsics, "or should not be here");
1164   LIR_Opr result = rlock_result(x);
1165 
1166   switch (x->id()) {
1167     case vmIntrinsics::_updateCRC32: {
1168       LIRItem crc(x->argument_at(0), this);
1169       LIRItem val(x->argument_at(1), this);
1170       // Registers destroyed by update_crc32.
1171       crc.set_destroys_register();
1172       val.set_destroys_register();
1173       crc.load_item();
1174       val.load_item();
1175       __ update_crc32(crc.result(), val.result(), result);
1176       break;
1177     }
1178     case vmIntrinsics::_updateBytesCRC32:
1179     case vmIntrinsics::_updateByteBufferCRC32: {
1180       bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1181 
1182       LIRItem crc(x->argument_at(0), this);
1183       LIRItem buf(x->argument_at(1), this);
1184       LIRItem off(x->argument_at(2), this);
1185       LIRItem len(x->argument_at(3), this);
1186       buf.load_item();
1187       off.load_nonconstant();
1188 
1189       LIR_Opr index = off.result();
1190       int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1191       if (off.result()->is_constant()) {
1192         index = LIR_OprFact::illegalOpr;
1193         offset += off.result()->as_jint();
1194       }
1195       LIR_Opr base_op = buf.result();
1196 
1197       if (index->is_valid()) {
1198         LIR_Opr tmp = new_register(T_LONG);
1199         __ convert(Bytecodes::_i2l, index, tmp);
1200         index = tmp;
1201       }
1202 
1203       LIR_Address* a = new LIR_Address(base_op, index, offset, T_BYTE);
1204 
1205       BasicTypeList signature(3);
1206       signature.append(T_INT);
1207       signature.append(T_ADDRESS);
1208       signature.append(T_INT);
1209       CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1210       const LIR_Opr result_reg = result_register_for (x->type());
1211 
1212       LIR_Opr arg1 = cc->at(0);
1213       LIR_Opr arg2 = cc->at(1);
1214       LIR_Opr arg3 = cc->at(2);
1215 
1216       crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32 stub doesn't care about high bits.
1217       __ leal(LIR_OprFact::address(a), arg2);
1218       len.load_item_force(arg3); // We skip int->long conversion here, because CRC32 stub expects int.
1219 
1220       __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1221       __ move(result_reg, result);
1222       break;
1223     }
1224     default: {
1225       ShouldNotReachHere();
1226     }
1227   }
1228 }
1229 
1230 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1231   assert(UseCRC32CIntrinsics, "or should not be here");
1232   LIR_Opr result = rlock_result(x);
1233 
1234   switch (x->id()) {
1235     case vmIntrinsics::_updateBytesCRC32C:
1236     case vmIntrinsics::_updateDirectByteBufferCRC32C: {
1237       bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32C);
1238 
1239       LIRItem crc(x->argument_at(0), this);
1240       LIRItem buf(x->argument_at(1), this);
1241       LIRItem off(x->argument_at(2), this);
1242       LIRItem end(x->argument_at(3), this);
1243       buf.load_item();
1244       off.load_nonconstant();
1245       end.load_nonconstant();
1246 
1247       // len = end - off
1248       LIR_Opr len  = end.result();
1249       LIR_Opr tmpA = new_register(T_INT);
1250       LIR_Opr tmpB = new_register(T_INT);
1251       __ move(end.result(), tmpA);
1252       __ move(off.result(), tmpB);
1253       __ sub(tmpA, tmpB, tmpA);
1254       len = tmpA;
1255 
1256       LIR_Opr index = off.result();
1257       int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1258       if (off.result()->is_constant()) {
1259         index = LIR_OprFact::illegalOpr;
1260         offset += off.result()->as_jint();
1261       }
1262       LIR_Opr base_op = buf.result();
1263 
1264       if (index->is_valid()) {
1265         LIR_Opr tmp = new_register(T_LONG);
1266         __ convert(Bytecodes::_i2l, index, tmp);
1267         index = tmp;
1268       }
1269 
1270       LIR_Address* a = new LIR_Address(base_op, index, offset, T_BYTE);
1271 
1272       BasicTypeList signature(3);
1273       signature.append(T_INT);
1274       signature.append(T_ADDRESS);
1275       signature.append(T_INT);
1276       CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1277       const LIR_Opr result_reg = result_register_for (x->type());
1278 
1279       LIR_Opr arg1 = cc->at(0);
1280       LIR_Opr arg2 = cc->at(1);
1281       LIR_Opr arg3 = cc->at(2);
1282 
1283       crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32C stub doesn't care about high bits.
1284       __ leal(LIR_OprFact::address(a), arg2);
1285       __ move(len, cc->at(2));   // We skip int->long conversion here, because CRC32C stub expects int.
1286 
1287       __ call_runtime_leaf(StubRoutines::updateBytesCRC32C(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1288       __ move(result_reg, result);
1289       break;
1290     }
1291     default: {
1292       ShouldNotReachHere();
1293     }
1294   }
1295 }
1296 
1297 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
1298   assert(x->number_of_arguments() == 3, "wrong type");
1299   assert(UseFMA, "Needs FMA instructions support.");
1300   LIRItem value(x->argument_at(0), this);
1301   LIRItem value1(x->argument_at(1), this);
1302   LIRItem value2(x->argument_at(2), this);
1303 
1304   value2.set_destroys_register();
1305 
1306   value.load_item();
1307   value1.load_item();
1308   value2.load_item();
1309 
1310   LIR_Opr calc_input = value.result();
1311   LIR_Opr calc_input1 = value1.result();
1312   LIR_Opr calc_input2 = value2.result();
1313   LIR_Opr calc_result = rlock_result(x);
1314 
1315   switch (x->id()) {
1316   case vmIntrinsics::_fmaD:   __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
1317   case vmIntrinsics::_fmaF:   __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
1318   default:                    ShouldNotReachHere();
1319   }
1320 }
1321 
1322 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1323   fatal("vectorizedMismatch intrinsic is not implemented on this platform");
1324 }
--- EOF ---