1 /*
   2  * Copyright (c) 2005, 2018, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "c1/c1_Compilation.hpp"
  27 #include "c1/c1_FrameMap.hpp"
  28 #include "c1/c1_Instruction.hpp"
  29 #include "c1/c1_LIRAssembler.hpp"
  30 #include "c1/c1_LIRGenerator.hpp"
  31 #include "c1/c1_Runtime1.hpp"
  32 #include "c1/c1_ValueStack.hpp"
  33 #include "ci/ciArray.hpp"
  34 #include "ci/ciObjArrayKlass.hpp"
  35 #include "ci/ciTypeArrayKlass.hpp"
  36 #include "runtime/sharedRuntime.hpp"
  37 #include "runtime/stubRoutines.hpp"
  38 #include "vmreg_x86.inline.hpp"
  39 
  40 #ifdef ASSERT
  41 #define __ gen()->lir(__FILE__, __LINE__)->
  42 #else
  43 #define __ gen()->lir()->
  44 #endif
  45 
  46 // Item will be loaded into a byte register; Intel only
  47 void LIRItem::load_byte_item() {
  48   load_item();
  49   LIR_Opr res = result();
  50 
  51   if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
  52     // make sure that it is a byte register
  53     assert(!value()->type()->is_float() && !value()->type()->is_double(),
  54            "can't load floats in byte register");
  55     LIR_Opr reg = _gen->rlock_byte(T_BYTE);
  56     __ move(res, reg);
  57 
  58     _result = reg;
  59   }
  60 }
  61 
  62 
  63 void LIRItem::load_nonconstant() {
  64   LIR_Opr r = value()->operand();
  65   if (r->is_constant()) {
  66     _result = r;
  67   } else {
  68     load_item();
  69   }
  70 }
  71 
  72 //--------------------------------------------------------------
  73 //               LIRGenerator
  74 //--------------------------------------------------------------
  75 
  76 
  77 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
  78 LIR_Opr LIRGenerator::exceptionPcOpr()  { return FrameMap::rdx_opr; }
  79 LIR_Opr LIRGenerator::divInOpr()        { return FrameMap::rax_opr; }
  80 LIR_Opr LIRGenerator::divOutOpr()       { return FrameMap::rax_opr; }
  81 LIR_Opr LIRGenerator::remOutOpr()       { return FrameMap::rdx_opr; }
  82 LIR_Opr LIRGenerator::shiftCountOpr()   { return FrameMap::rcx_opr; }
  83 LIR_Opr LIRGenerator::syncLockOpr()     { return new_register(T_INT); }
  84 LIR_Opr LIRGenerator::syncTempOpr()     { return FrameMap::rax_opr; }
  85 LIR_Opr LIRGenerator::getThreadTemp()   { return LIR_OprFact::illegalOpr; }
  86 
  87 
  88 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
  89   LIR_Opr opr;
  90   switch (type->tag()) {
  91     case intTag:     opr = FrameMap::rax_opr;          break;
  92     case objectTag:  opr = FrameMap::rax_oop_opr;      break;
  93     case longTag:    opr = FrameMap::long0_opr;        break;
  94     case floatTag:   opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr  : FrameMap::fpu0_float_opr;  break;
  95     case doubleTag:  opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr;  break;
  96 
  97     case addressTag:
  98     default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
  99   }
 100 
 101   assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
 102   return opr;
 103 }
 104 
 105 
 106 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
 107   LIR_Opr reg = new_register(T_INT);
 108   set_vreg_flag(reg, LIRGenerator::byte_reg);
 109   return reg;
 110 }
 111 
 112 
 113 //--------- loading items into registers --------------------------------
 114 
 115 
 116 // i486 instructions can inline constants
 117 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
 118   if (type == T_SHORT || type == T_CHAR) {
 119     // there is no immediate move of word values in asembler_i486.?pp
 120     return false;
 121   }
 122   Constant* c = v->as_Constant();
 123   if (c && c->state_before() == NULL) {
 124     // constants of any type can be stored directly, except for
 125     // unloaded object constants.
 126     return true;
 127   }
 128   return false;
 129 }
 130 
 131 
 132 bool LIRGenerator::can_inline_as_constant(Value v) const {
 133   if (v->type()->tag() == longTag) return false;
 134   return v->type()->tag() != objectTag ||
 135     (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
 136 }
 137 
 138 
 139 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
 140   if (c->type() == T_LONG) return false;
 141   return c->type() != T_OBJECT || c->as_jobject() == NULL;
 142 }
 143 
 144 
 145 LIR_Opr LIRGenerator::safepoint_poll_register() {
 146   NOT_LP64( if (SafepointMechanism::uses_thread_local_poll()) { return new_register(T_ADDRESS); } )
 147   return LIR_OprFact::illegalOpr;
 148 }
 149 
 150 
 151 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
 152                                             int shift, int disp, BasicType type) {
 153   assert(base->is_register(), "must be");
 154   if (index->is_constant()) {
 155     return new LIR_Address(base,
 156                            ((intx)(index->as_constant_ptr()->as_jint()) << shift) + disp,
 157                            type);
 158   } else {
 159     return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
 160   }
 161 }
 162 
 163 
 164 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
 165                                               BasicType type, bool needs_card_mark) {
 166   int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
 167 
 168   LIR_Address* addr;
 169   if (index_opr->is_constant()) {
 170     int elem_size = type2aelembytes(type);
 171     addr = new LIR_Address(array_opr,
 172                            offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type);
 173   } else {
 174 #ifdef _LP64
 175     if (index_opr->type() == T_INT) {
 176       LIR_Opr tmp = new_register(T_LONG);
 177       __ convert(Bytecodes::_i2l, index_opr, tmp);
 178       index_opr = tmp;
 179     }
 180 #endif // _LP64
 181     addr =  new LIR_Address(array_opr,
 182                             index_opr,
 183                             LIR_Address::scale(type),
 184                             offset_in_bytes, type);
 185   }
 186   if (needs_card_mark) {
 187     // This store will need a precise card mark, so go ahead and
 188     // compute the full adddres instead of computing once for the
 189     // store and again for the card mark.
 190     LIR_Opr tmp = new_pointer_register();
 191     __ leal(LIR_OprFact::address(addr), tmp);
 192     return new LIR_Address(tmp, type);
 193   } else {
 194     return addr;
 195   }
 196 }
 197 
 198 
 199 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
 200   LIR_Opr r = NULL;
 201   if (type == T_LONG) {
 202     r = LIR_OprFact::longConst(x);
 203   } else if (type == T_INT) {
 204     r = LIR_OprFact::intConst(x);
 205   } else {
 206     ShouldNotReachHere();
 207   }
 208   return r;
 209 }
 210 
 211 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
 212   LIR_Opr pointer = new_pointer_register();
 213   __ move(LIR_OprFact::intptrConst(counter), pointer);
 214   LIR_Address* addr = new LIR_Address(pointer, type);
 215   increment_counter(addr, step);
 216 }
 217 
 218 
 219 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
 220   __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
 221 }
 222 
 223 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
 224   __ cmp_mem_int(condition, base, disp, c, info);
 225 }
 226 
 227 
 228 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
 229   __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
 230 }
 231 
 232 
 233 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
 234   __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
 235 }
 236 
 237 
 238 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
 239   if (tmp->is_valid() && c > 0 && c < max_jint) {
 240     if (is_power_of_2(c + 1)) {
 241       __ move(left, tmp);
 242       __ shift_left(left, log2_intptr(c + 1), left);
 243       __ sub(left, tmp, result);
 244       return true;
 245     } else if (is_power_of_2(c - 1)) {
 246       __ move(left, tmp);
 247       __ shift_left(left, log2_intptr(c - 1), left);
 248       __ add(left, tmp, result);
 249       return true;
 250     }
 251   }
 252   return false;
 253 }
 254 
 255 
 256 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
 257   BasicType type = item->type();
 258   __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
 259 }
 260 
 261 //----------------------------------------------------------------------
 262 //             visitor functions
 263 //----------------------------------------------------------------------
 264 
 265 
 266 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
 267   assert(x->is_pinned(),"");
 268   bool needs_range_check = x->compute_needs_range_check();
 269   bool use_length = x->length() != NULL;
 270   bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
 271   bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
 272                                          !get_jobject_constant(x->value())->is_null_object() ||
 273                                          x->should_profile());
 274 
 275   LIRItem array(x->array(), this);
 276   LIRItem index(x->index(), this);
 277   LIRItem value(x->value(), this);
 278   LIRItem length(this);
 279 
 280   array.load_item();
 281   index.load_nonconstant();
 282 
 283   if (use_length && needs_range_check) {
 284     length.set_instruction(x->length());
 285     length.load_item();
 286 
 287   }
 288   if (needs_store_check || x->check_boolean()) {
 289     value.load_item();
 290   } else {
 291     value.load_for_store(x->elt_type());
 292   }
 293 
 294   set_no_result(x);
 295 
 296   // the CodeEmitInfo must be duplicated for each different
 297   // LIR-instruction because spilling can occur anywhere between two
 298   // instructions and so the debug information must be different
 299   CodeEmitInfo* range_check_info = state_for(x);
 300   CodeEmitInfo* null_check_info = NULL;
 301   if (x->needs_null_check()) {
 302     null_check_info = new CodeEmitInfo(range_check_info);
 303   }
 304 
 305   // emit array address setup early so it schedules better
 306   LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
 307 
 308   if (GenerateRangeChecks && needs_range_check) {
 309     if (use_length) {
 310       __ cmp(lir_cond_belowEqual, length.result(), index.result());
 311       __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
 312     } else {
 313       array_range_check(array.result(), index.result(), null_check_info, range_check_info);
 314       // range_check also does the null check
 315       null_check_info = NULL;
 316     }
 317   }
 318 
 319   if (GenerateArrayStoreCheck && needs_store_check) {
 320     LIR_Opr tmp1 = new_register(objectType);
 321     LIR_Opr tmp2 = new_register(objectType);
 322     LIR_Opr tmp3 = new_register(objectType);
 323 
 324     CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
 325     __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci());
 326   }
 327 
 328   if (obj_store) {
 329     // Needs GC write barriers.
 330     pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
 331                 true /* do_load */, false /* patch */, NULL);
 332     __ move(value.result(), array_addr, null_check_info);
 333     // Seems to be a precise
 334     post_barrier(LIR_OprFact::address(array_addr), value.result());
 335   } else {
 336     LIR_Opr result = maybe_mask_boolean(x, array.result(), value.result(), null_check_info);
 337     __ move(result, array_addr, null_check_info);
 338   }
 339 }
 340 
 341 
 342 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
 343   assert(x->is_pinned(),"");
 344   LIRItem obj(x->obj(), this);
 345   obj.load_item();
 346 
 347   set_no_result(x);
 348 
 349   // "lock" stores the address of the monitor stack slot, so this is not an oop
 350   LIR_Opr lock = new_register(T_INT);
 351   // Need a scratch register for biased locking on x86
 352   LIR_Opr scratch = LIR_OprFact::illegalOpr;
 353   if (UseBiasedLocking) {
 354     scratch = new_register(T_INT);
 355   }
 356 
 357   CodeEmitInfo* info_for_exception = NULL;
 358   if (x->needs_null_check()) {
 359     info_for_exception = state_for(x);
 360   }
 361   // this CodeEmitInfo must not have the xhandlers because here the
 362   // object is already locked (xhandlers expect object to be unlocked)
 363   CodeEmitInfo* info = state_for(x, x->state(), true);
 364   monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
 365                         x->monitor_no(), info_for_exception, info);
 366 }
 367 
 368 
 369 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
 370   assert(x->is_pinned(),"");
 371 
 372   LIRItem obj(x->obj(), this);
 373   obj.dont_load_item();
 374 
 375   LIR_Opr lock = new_register(T_INT);
 376   LIR_Opr obj_temp = new_register(T_INT);
 377   set_no_result(x);
 378   monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
 379 }
 380 
 381 
 382 // _ineg, _lneg, _fneg, _dneg
 383 void LIRGenerator::do_NegateOp(NegateOp* x) {
 384   LIRItem value(x->x(), this);
 385   value.set_destroys_register();
 386   value.load_item();
 387   LIR_Opr reg = rlock(x);
 388   __ negate(value.result(), reg);
 389 
 390   set_result(x, round_item(reg));
 391 }
 392 
 393 
 394 // for  _fadd, _fmul, _fsub, _fdiv, _frem
 395 //      _dadd, _dmul, _dsub, _ddiv, _drem
 396 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
 397   LIRItem left(x->x(),  this);
 398   LIRItem right(x->y(), this);
 399   LIRItem* left_arg  = &left;
 400   LIRItem* right_arg = &right;
 401   assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
 402   bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
 403   if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
 404     left.load_item();
 405   } else {
 406     left.dont_load_item();
 407   }
 408 
 409   // do not load right operand if it is a constant.  only 0 and 1 are
 410   // loaded because there are special instructions for loading them
 411   // without memory access (not needed for SSE2 instructions)
 412   bool must_load_right = false;
 413   if (right.is_constant()) {
 414     LIR_Const* c = right.result()->as_constant_ptr();
 415     assert(c != NULL, "invalid constant");
 416     assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
 417 
 418     if (c->type() == T_FLOAT) {
 419       must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
 420     } else {
 421       must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
 422     }
 423   }
 424 
 425   if (must_load_both) {
 426     // frem and drem destroy also right operand, so move it to a new register
 427     right.set_destroys_register();
 428     right.load_item();
 429   } else if (right.is_register() || must_load_right) {
 430     right.load_item();
 431   } else {
 432     right.dont_load_item();
 433   }
 434   LIR_Opr reg = rlock(x);
 435   LIR_Opr tmp = LIR_OprFact::illegalOpr;
 436   if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) {
 437     tmp = new_register(T_DOUBLE);
 438   }
 439 
 440   if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
 441     // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
 442     LIR_Opr fpu0, fpu1;
 443     if (x->op() == Bytecodes::_frem) {
 444       fpu0 = LIR_OprFact::single_fpu(0);
 445       fpu1 = LIR_OprFact::single_fpu(1);
 446     } else {
 447       fpu0 = LIR_OprFact::double_fpu(0);
 448       fpu1 = LIR_OprFact::double_fpu(1);
 449     }
 450     __ move(right.result(), fpu1); // order of left and right operand is important!
 451     __ move(left.result(), fpu0);
 452     __ rem (fpu0, fpu1, fpu0);
 453     __ move(fpu0, reg);
 454 
 455   } else {
 456     arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp);
 457   }
 458 
 459   set_result(x, round_item(reg));
 460 }
 461 
 462 
 463 // for  _ladd, _lmul, _lsub, _ldiv, _lrem
 464 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
 465   if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
 466     // long division is implemented as a direct call into the runtime
 467     LIRItem left(x->x(), this);
 468     LIRItem right(x->y(), this);
 469 
 470     // the check for division by zero destroys the right operand
 471     right.set_destroys_register();
 472 
 473     BasicTypeList signature(2);
 474     signature.append(T_LONG);
 475     signature.append(T_LONG);
 476     CallingConvention* cc = frame_map()->c_calling_convention(&signature);
 477 
 478     // check for division by zero (destroys registers of right operand!)
 479     CodeEmitInfo* info = state_for(x);
 480 
 481     const LIR_Opr result_reg = result_register_for(x->type());
 482     left.load_item_force(cc->at(1));
 483     right.load_item();
 484 
 485     __ move(right.result(), cc->at(0));
 486 
 487     __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
 488     __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
 489 
 490     address entry = NULL;
 491     switch (x->op()) {
 492     case Bytecodes::_lrem:
 493       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
 494       break; // check if dividend is 0 is done elsewhere
 495     case Bytecodes::_ldiv:
 496       entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
 497       break; // check if dividend is 0 is done elsewhere
 498     case Bytecodes::_lmul:
 499       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
 500       break;
 501     default:
 502       ShouldNotReachHere();
 503     }
 504 
 505     LIR_Opr result = rlock_result(x);
 506     __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
 507     __ move(result_reg, result);
 508   } else if (x->op() == Bytecodes::_lmul) {
 509     // missing test if instr is commutative and if we should swap
 510     LIRItem left(x->x(), this);
 511     LIRItem right(x->y(), this);
 512 
 513     // right register is destroyed by the long mul, so it must be
 514     // copied to a new register.
 515     right.set_destroys_register();
 516 
 517     left.load_item();
 518     right.load_item();
 519 
 520     LIR_Opr reg = FrameMap::long0_opr;
 521     arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
 522     LIR_Opr result = rlock_result(x);
 523     __ move(reg, result);
 524   } else {
 525     // missing test if instr is commutative and if we should swap
 526     LIRItem left(x->x(), this);
 527     LIRItem right(x->y(), this);
 528 
 529     left.load_item();
 530     // don't load constants to save register
 531     right.load_nonconstant();
 532     rlock_result(x);
 533     arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
 534   }
 535 }
 536 
 537 
 538 
 539 // for: _iadd, _imul, _isub, _idiv, _irem
 540 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
 541   if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
 542     // The requirements for division and modulo
 543     // input : rax,: dividend                         min_int
 544     //         reg: divisor   (may not be rax,/rdx)   -1
 545     //
 546     // output: rax,: quotient  (= rax, idiv reg)       min_int
 547     //         rdx: remainder (= rax, irem reg)       0
 548 
 549     // rax, and rdx will be destroyed
 550 
 551     // Note: does this invalidate the spec ???
 552     LIRItem right(x->y(), this);
 553     LIRItem left(x->x() , this);   // visit left second, so that the is_register test is valid
 554 
 555     // call state_for before load_item_force because state_for may
 556     // force the evaluation of other instructions that are needed for
 557     // correct debug info.  Otherwise the live range of the fix
 558     // register might be too long.
 559     CodeEmitInfo* info = state_for(x);
 560 
 561     left.load_item_force(divInOpr());
 562 
 563     right.load_item();
 564 
 565     LIR_Opr result = rlock_result(x);
 566     LIR_Opr result_reg;
 567     if (x->op() == Bytecodes::_idiv) {
 568       result_reg = divOutOpr();
 569     } else {
 570       result_reg = remOutOpr();
 571     }
 572 
 573     if (!ImplicitDiv0Checks) {
 574       __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
 575       __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));
 576       // Idiv/irem cannot trap (passing info would generate an assertion).
 577       info = NULL;
 578     }
 579     LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
 580     if (x->op() == Bytecodes::_irem) {
 581       __ irem(left.result(), right.result(), result_reg, tmp, info);
 582     } else if (x->op() == Bytecodes::_idiv) {
 583       __ idiv(left.result(), right.result(), result_reg, tmp, info);
 584     } else {
 585       ShouldNotReachHere();
 586     }
 587 
 588     __ move(result_reg, result);
 589   } else {
 590     // missing test if instr is commutative and if we should swap
 591     LIRItem left(x->x(),  this);
 592     LIRItem right(x->y(), this);
 593     LIRItem* left_arg = &left;
 594     LIRItem* right_arg = &right;
 595     if (x->is_commutative() && left.is_stack() && right.is_register()) {
 596       // swap them if left is real stack (or cached) and right is real register(not cached)
 597       left_arg = &right;
 598       right_arg = &left;
 599     }
 600 
 601     left_arg->load_item();
 602 
 603     // do not need to load right, as we can handle stack and constants
 604     if (x->op() == Bytecodes::_imul ) {
 605       // check if we can use shift instead
 606       bool use_constant = false;
 607       bool use_tmp = false;
 608       if (right_arg->is_constant()) {
 609         jint iconst = right_arg->get_jint_constant();
 610         if (iconst > 0 && iconst < max_jint) {
 611           if (is_power_of_2(iconst)) {
 612             use_constant = true;
 613           } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
 614             use_constant = true;
 615             use_tmp = true;
 616           }
 617         }
 618       }
 619       if (use_constant) {
 620         right_arg->dont_load_item();
 621       } else {
 622         right_arg->load_item();
 623       }
 624       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 625       if (use_tmp) {
 626         tmp = new_register(T_INT);
 627       }
 628       rlock_result(x);
 629 
 630       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 631     } else {
 632       right_arg->dont_load_item();
 633       rlock_result(x);
 634       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 635       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 636     }
 637   }
 638 }
 639 
 640 
 641 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
 642   // when an operand with use count 1 is the left operand, then it is
 643   // likely that no move for 2-operand-LIR-form is necessary
 644   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 645     x->swap_operands();
 646   }
 647 
 648   ValueTag tag = x->type()->tag();
 649   assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
 650   switch (tag) {
 651     case floatTag:
 652     case doubleTag:  do_ArithmeticOp_FPU(x);  return;
 653     case longTag:    do_ArithmeticOp_Long(x); return;
 654     case intTag:     do_ArithmeticOp_Int(x);  return;
 655     default:         ShouldNotReachHere();    return;
 656   }
 657 }
 658 
 659 
 660 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
 661 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
 662   // count must always be in rcx
 663   LIRItem value(x->x(), this);
 664   LIRItem count(x->y(), this);
 665 
 666   ValueTag elemType = x->type()->tag();
 667   bool must_load_count = !count.is_constant() || elemType == longTag;
 668   if (must_load_count) {
 669     // count for long must be in register
 670     count.load_item_force(shiftCountOpr());
 671   } else {
 672     count.dont_load_item();
 673   }
 674   value.load_item();
 675   LIR_Opr reg = rlock_result(x);
 676 
 677   shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
 678 }
 679 
 680 
 681 // _iand, _land, _ior, _lor, _ixor, _lxor
 682 void LIRGenerator::do_LogicOp(LogicOp* x) {
 683   // when an operand with use count 1 is the left operand, then it is
 684   // likely that no move for 2-operand-LIR-form is necessary
 685   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 686     x->swap_operands();
 687   }
 688 
 689   LIRItem left(x->x(), this);
 690   LIRItem right(x->y(), this);
 691 
 692   left.load_item();
 693   right.load_nonconstant();
 694   LIR_Opr reg = rlock_result(x);
 695 
 696   logic_op(x->op(), reg, left.result(), right.result());
 697 }
 698 
 699 
 700 
 701 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
 702 void LIRGenerator::do_CompareOp(CompareOp* x) {
 703   LIRItem left(x->x(), this);
 704   LIRItem right(x->y(), this);
 705   ValueTag tag = x->x()->type()->tag();
 706   if (tag == longTag) {
 707     left.set_destroys_register();
 708   }
 709   left.load_item();
 710   right.load_item();
 711   LIR_Opr reg = rlock_result(x);
 712 
 713   if (x->x()->type()->is_float_kind()) {
 714     Bytecodes::Code code = x->op();
 715     __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
 716   } else if (x->x()->type()->tag() == longTag) {
 717     __ lcmp2int(left.result(), right.result(), reg);
 718   } else {
 719     Unimplemented();
 720   }
 721 }
 722 
 723 
 724 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
 725   assert(x->number_of_arguments() == 4, "wrong type");
 726   LIRItem obj   (x->argument_at(0), this);  // object
 727   LIRItem offset(x->argument_at(1), this);  // offset of field
 728   LIRItem cmp   (x->argument_at(2), this);  // value to compare with field
 729   LIRItem val   (x->argument_at(3), this);  // replace field with val if matches cmp
 730 
 731   assert(obj.type()->tag() == objectTag, "invalid type");
 732 
 733   // In 64bit the type can be long, sparc doesn't have this assert
 734   // assert(offset.type()->tag() == intTag, "invalid type");
 735 
 736   assert(cmp.type()->tag() == type->tag(), "invalid type");
 737   assert(val.type()->tag() == type->tag(), "invalid type");
 738 
 739   // get address of field
 740   obj.load_item();
 741   offset.load_nonconstant();
 742 
 743   LIR_Opr addr = new_pointer_register();
 744   LIR_Address* a;
 745   if(offset.result()->is_constant()) {
 746 #ifdef _LP64
 747     jlong c = offset.result()->as_jlong();
 748     if ((jlong)((jint)c) == c) {
 749       a = new LIR_Address(obj.result(),
 750                           (jint)c,
 751                           as_BasicType(type));
 752     } else {
 753       LIR_Opr tmp = new_register(T_LONG);
 754       __ move(offset.result(), tmp);
 755       a = new LIR_Address(obj.result(),
 756                           tmp,
 757                           as_BasicType(type));
 758     }
 759 #else
 760     a = new LIR_Address(obj.result(),
 761                         offset.result()->as_jint(),
 762                         as_BasicType(type));
 763 #endif
 764   } else {
 765     a = new LIR_Address(obj.result(),
 766                         offset.result(),
 767                         0,
 768                         as_BasicType(type));
 769   }
 770   __ leal(LIR_OprFact::address(a), addr);
 771 
 772   if (type == objectType) {  // Write-barrier needed for Object fields.
 773     // Do the pre-write barrier, if any.
 774     pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */,
 775                 true /* do_load */, false /* patch */, NULL);
 776   }
 777 
 778   if (type == objectType) {
 779     cmp.load_item_force(FrameMap::rax_oop_opr);
 780     val.load_item();
 781   } else if (type == intType) {
 782     cmp.load_item_force(FrameMap::rax_opr);
 783     val.load_item();
 784   } else if (type == longType) {
 785     cmp.load_item_force(FrameMap::long0_opr);
 786     val.load_item_force(FrameMap::long1_opr);
 787   } else {
 788     ShouldNotReachHere();
 789   }
 790 
 791   LIR_Opr ill = LIR_OprFact::illegalOpr;  // for convenience
 792   if (type == objectType)
 793     __ cas_obj(addr, cmp.result(), val.result(), ill, ill);
 794   else if (type == intType)
 795     __ cas_int(addr, cmp.result(), val.result(), ill, ill);
 796   else if (type == longType)
 797     __ cas_long(addr, cmp.result(), val.result(), ill, ill);
 798   else {
 799     ShouldNotReachHere();
 800   }
 801 
 802   // generate conditional move of boolean result
 803   LIR_Opr result = rlock_result(x);
 804   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
 805            result, as_BasicType(type));
 806   if (type == objectType) {   // Write-barrier needed for Object fields.
 807     // Seems to be precise
 808     post_barrier(addr, val.result());
 809   }
 810 }
 811 
 812 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
 813   assert(x->number_of_arguments() == 3, "wrong type");
 814   assert(UseFMA, "Needs FMA instructions support.");
 815   LIRItem value(x->argument_at(0), this);
 816   LIRItem value1(x->argument_at(1), this);
 817   LIRItem value2(x->argument_at(2), this);
 818 
 819   value2.set_destroys_register();
 820 
 821   value.load_item();
 822   value1.load_item();
 823   value2.load_item();
 824 
 825   LIR_Opr calc_input = value.result();
 826   LIR_Opr calc_input1 = value1.result();
 827   LIR_Opr calc_input2 = value2.result();
 828   LIR_Opr calc_result = rlock_result(x);
 829 
 830   switch (x->id()) {
 831   case vmIntrinsics::_fmaD:   __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
 832   case vmIntrinsics::_fmaF:   __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
 833   default:                    ShouldNotReachHere();
 834   }
 835 
 836 }
 837 
 838 
 839 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
 840   assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
 841 
 842   if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog ||
 843       x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos ||
 844       x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan ||
 845       x->id() == vmIntrinsics::_dlog10) {
 846     do_LibmIntrinsic(x);
 847     return;
 848   }
 849 
 850   LIRItem value(x->argument_at(0), this);
 851 
 852   bool use_fpu = false;
 853   if (UseSSE < 2) {
 854     value.set_destroys_register();
 855   }
 856   value.load_item();
 857 
 858   LIR_Opr calc_input = value.result();
 859   LIR_Opr calc_result = rlock_result(x);
 860 
 861   switch(x->id()) {
 862     case vmIntrinsics::_dabs:   __ abs  (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
 863     case vmIntrinsics::_dsqrt:  __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
 864     default:                    ShouldNotReachHere();
 865   }
 866 
 867   if (use_fpu) {
 868     __ move(calc_result, x->operand());
 869   }
 870 }
 871 
 872 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) {
 873   LIRItem value(x->argument_at(0), this);
 874   value.set_destroys_register();
 875 
 876   LIR_Opr calc_result = rlock_result(x);
 877   LIR_Opr result_reg = result_register_for(x->type());
 878 
 879   CallingConvention* cc = NULL;
 880 
 881   if (x->id() == vmIntrinsics::_dpow) {
 882     LIRItem value1(x->argument_at(1), this);
 883 
 884     value1.set_destroys_register();
 885 
 886     BasicTypeList signature(2);
 887     signature.append(T_DOUBLE);
 888     signature.append(T_DOUBLE);
 889     cc = frame_map()->c_calling_convention(&signature);
 890     value.load_item_force(cc->at(0));
 891     value1.load_item_force(cc->at(1));
 892   } else {
 893     BasicTypeList signature(1);
 894     signature.append(T_DOUBLE);
 895     cc = frame_map()->c_calling_convention(&signature);
 896     value.load_item_force(cc->at(0));
 897   }
 898 
 899 #ifndef _LP64
 900   LIR_Opr tmp = FrameMap::fpu0_double_opr;
 901   result_reg = tmp;
 902   switch(x->id()) {
 903     case vmIntrinsics::_dexp:
 904       if (StubRoutines::dexp() != NULL) {
 905         __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
 906       } else {
 907         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
 908       }
 909       break;
 910     case vmIntrinsics::_dlog:
 911       if (StubRoutines::dlog() != NULL) {
 912         __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
 913       } else {
 914         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
 915       }
 916       break;
 917     case vmIntrinsics::_dlog10:
 918       if (StubRoutines::dlog10() != NULL) {
 919        __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
 920       } else {
 921         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
 922       }
 923       break;
 924     case vmIntrinsics::_dpow:
 925       if (StubRoutines::dpow() != NULL) {
 926         __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
 927       } else {
 928         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
 929       }
 930       break;
 931     case vmIntrinsics::_dsin:
 932       if (VM_Version::supports_sse2() && StubRoutines::dsin() != NULL) {
 933         __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
 934       } else {
 935         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
 936       }
 937       break;
 938     case vmIntrinsics::_dcos:
 939       if (VM_Version::supports_sse2() && StubRoutines::dcos() != NULL) {
 940         __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
 941       } else {
 942         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
 943       }
 944       break;
 945     case vmIntrinsics::_dtan:
 946       if (StubRoutines::dtan() != NULL) {
 947         __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
 948       } else {
 949         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
 950       }
 951       break;
 952     default:  ShouldNotReachHere();
 953   }
 954 #else
 955   switch (x->id()) {
 956     case vmIntrinsics::_dexp:
 957       if (StubRoutines::dexp() != NULL) {
 958         __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
 959       } else {
 960         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
 961       }
 962       break;
 963     case vmIntrinsics::_dlog:
 964       if (StubRoutines::dlog() != NULL) {
 965       __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
 966       } else {
 967         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
 968       }
 969       break;
 970     case vmIntrinsics::_dlog10:
 971       if (StubRoutines::dlog10() != NULL) {
 972       __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
 973       } else {
 974         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
 975       }
 976       break;
 977     case vmIntrinsics::_dpow:
 978        if (StubRoutines::dpow() != NULL) {
 979       __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
 980       } else {
 981         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
 982       }
 983       break;
 984     case vmIntrinsics::_dsin:
 985       if (StubRoutines::dsin() != NULL) {
 986         __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
 987       } else {
 988         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
 989       }
 990       break;
 991     case vmIntrinsics::_dcos:
 992       if (StubRoutines::dcos() != NULL) {
 993         __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
 994       } else {
 995         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
 996       }
 997       break;
 998     case vmIntrinsics::_dtan:
 999        if (StubRoutines::dtan() != NULL) {
1000       __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
1001       } else {
1002         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
1003       }
1004       break;
1005     default:  ShouldNotReachHere();
1006   }
1007 #endif // _LP64
1008   __ move(result_reg, calc_result);
1009 }
1010 
1011 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
1012   assert(x->number_of_arguments() == 5, "wrong type");
1013 
1014   // Make all state_for calls early since they can emit code
1015   CodeEmitInfo* info = state_for(x, x->state());
1016 
1017   LIRItem src(x->argument_at(0), this);
1018   LIRItem src_pos(x->argument_at(1), this);
1019   LIRItem dst(x->argument_at(2), this);
1020   LIRItem dst_pos(x->argument_at(3), this);
1021   LIRItem length(x->argument_at(4), this);
1022 
1023   // operands for arraycopy must use fixed registers, otherwise
1024   // LinearScan will fail allocation (because arraycopy always needs a
1025   // call)
1026 
1027 #ifndef _LP64
1028   src.load_item_force     (FrameMap::rcx_oop_opr);
1029   src_pos.load_item_force (FrameMap::rdx_opr);
1030   dst.load_item_force     (FrameMap::rax_oop_opr);
1031   dst_pos.load_item_force (FrameMap::rbx_opr);
1032   length.load_item_force  (FrameMap::rdi_opr);
1033   LIR_Opr tmp =           (FrameMap::rsi_opr);
1034 #else
1035 
1036   // The java calling convention will give us enough registers
1037   // so that on the stub side the args will be perfect already.
1038   // On the other slow/special case side we call C and the arg
1039   // positions are not similar enough to pick one as the best.
1040   // Also because the java calling convention is a "shifted" version
1041   // of the C convention we can process the java args trivially into C
1042   // args without worry of overwriting during the xfer
1043 
1044   src.load_item_force     (FrameMap::as_oop_opr(j_rarg0));
1045   src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
1046   dst.load_item_force     (FrameMap::as_oop_opr(j_rarg2));
1047   dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
1048   length.load_item_force  (FrameMap::as_opr(j_rarg4));
1049 
1050   LIR_Opr tmp =           FrameMap::as_opr(j_rarg5);
1051 #endif // LP64
1052 
1053   set_no_result(x);
1054 
1055   int flags;
1056   ciArrayKlass* expected_type;
1057   arraycopy_helper(x, &flags, &expected_type);
1058 
1059   __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
1060 }
1061 
1062 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1063   assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support");
1064   // Make all state_for calls early since they can emit code
1065   LIR_Opr result = rlock_result(x);
1066   int flags = 0;
1067   switch (x->id()) {
1068     case vmIntrinsics::_updateCRC32: {
1069       LIRItem crc(x->argument_at(0), this);
1070       LIRItem val(x->argument_at(1), this);
1071       // val is destroyed by update_crc32
1072       val.set_destroys_register();
1073       crc.load_item();
1074       val.load_item();
1075       __ update_crc32(crc.result(), val.result(), result);
1076       break;
1077     }
1078     case vmIntrinsics::_updateBytesCRC32:
1079     case vmIntrinsics::_updateByteBufferCRC32: {
1080       bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1081 
1082       LIRItem crc(x->argument_at(0), this);
1083       LIRItem buf(x->argument_at(1), this);
1084       LIRItem off(x->argument_at(2), this);
1085       LIRItem len(x->argument_at(3), this);
1086       buf.load_item();
1087       off.load_nonconstant();
1088 
1089       LIR_Opr index = off.result();
1090       int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1091       if(off.result()->is_constant()) {
1092         index = LIR_OprFact::illegalOpr;
1093        offset += off.result()->as_jint();
1094       }
1095       LIR_Opr base_op = buf.result();
1096 
1097 #ifndef _LP64
1098       if (!is_updateBytes) { // long b raw address
1099          base_op = new_register(T_INT);
1100          __ convert(Bytecodes::_l2i, buf.result(), base_op);
1101       }
1102 #else
1103       if (index->is_valid()) {
1104         LIR_Opr tmp = new_register(T_LONG);
1105         __ convert(Bytecodes::_i2l, index, tmp);
1106         index = tmp;
1107       }
1108 #endif
1109 
1110       LIR_Address* a = new LIR_Address(base_op,
1111                                        index,
1112                                        offset,
1113                                        T_BYTE);
1114       BasicTypeList signature(3);
1115       signature.append(T_INT);
1116       signature.append(T_ADDRESS);
1117       signature.append(T_INT);
1118       CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1119       const LIR_Opr result_reg = result_register_for(x->type());
1120 
1121       LIR_Opr addr = new_pointer_register();
1122       __ leal(LIR_OprFact::address(a), addr);
1123 
1124       crc.load_item_force(cc->at(0));
1125       __ move(addr, cc->at(1));
1126       len.load_item_force(cc->at(2));
1127 
1128       __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
1129       __ move(result_reg, result);
1130 
1131       break;
1132     }
1133     default: {
1134       ShouldNotReachHere();
1135     }
1136   }
1137 }
1138 
1139 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1140   Unimplemented();
1141 }
1142 
1143 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1144   assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support");
1145 
1146   // Make all state_for calls early since they can emit code
1147   LIR_Opr result = rlock_result(x);
1148 
1149   LIRItem a(x->argument_at(0), this); // Object
1150   LIRItem aOffset(x->argument_at(1), this); // long
1151   LIRItem b(x->argument_at(2), this); // Object
1152   LIRItem bOffset(x->argument_at(3), this); // long
1153   LIRItem length(x->argument_at(4), this); // int
1154   LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int
1155 
1156   a.load_item();
1157   aOffset.load_nonconstant();
1158   b.load_item();
1159   bOffset.load_nonconstant();
1160 
1161   long constant_aOffset = 0;
1162   LIR_Opr result_aOffset = aOffset.result();
1163   if (result_aOffset->is_constant()) {
1164     constant_aOffset = result_aOffset->as_jlong();
1165     result_aOffset = LIR_OprFact::illegalOpr;
1166   }
1167   LIR_Opr result_a = a.result();
1168 
1169   long constant_bOffset = 0;
1170   LIR_Opr result_bOffset = bOffset.result();
1171   if (result_bOffset->is_constant()) {
1172     constant_bOffset = result_bOffset->as_jlong();
1173     result_bOffset = LIR_OprFact::illegalOpr;
1174   }
1175   LIR_Opr result_b = b.result();
1176 
1177 #ifndef _LP64
1178   result_a = new_register(T_INT);
1179   __ convert(Bytecodes::_l2i, a.result(), result_a);
1180   result_b = new_register(T_INT);
1181   __ convert(Bytecodes::_l2i, b.result(), result_b);
1182 #endif
1183 
1184 
1185   LIR_Address* addr_a = new LIR_Address(result_a,
1186                                         result_aOffset,
1187                                         constant_aOffset,
1188                                         T_BYTE);
1189 
1190   LIR_Address* addr_b = new LIR_Address(result_b,
1191                                         result_bOffset,
1192                                         constant_bOffset,
1193                                         T_BYTE);
1194 
1195   BasicTypeList signature(4);
1196   signature.append(T_ADDRESS);
1197   signature.append(T_ADDRESS);
1198   signature.append(T_INT);
1199   signature.append(T_INT);
1200   CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1201   const LIR_Opr result_reg = result_register_for(x->type());
1202 
1203   LIR_Opr ptr_addr_a = new_pointer_register();
1204   __ leal(LIR_OprFact::address(addr_a), ptr_addr_a);
1205 
1206   LIR_Opr ptr_addr_b = new_pointer_register();
1207   __ leal(LIR_OprFact::address(addr_b), ptr_addr_b);
1208 
1209   __ move(ptr_addr_a, cc->at(0));
1210   __ move(ptr_addr_b, cc->at(1));
1211   length.load_item_force(cc->at(2));
1212   log2ArrayIndexScale.load_item_force(cc->at(3));
1213 
1214   __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args());
1215   __ move(result_reg, result);
1216 }
1217 
1218 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
1219 // _i2b, _i2c, _i2s
1220 LIR_Opr fixed_register_for(BasicType type) {
1221   switch (type) {
1222     case T_FLOAT:  return FrameMap::fpu0_float_opr;
1223     case T_DOUBLE: return FrameMap::fpu0_double_opr;
1224     case T_INT:    return FrameMap::rax_opr;
1225     case T_LONG:   return FrameMap::long0_opr;
1226     default:       ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
1227   }
1228 }
1229 
1230 void LIRGenerator::do_Convert(Convert* x) {
1231   // flags that vary for the different operations and different SSE-settings
1232   bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false;
1233 
1234   switch (x->op()) {
1235     case Bytecodes::_i2l: // fall through
1236     case Bytecodes::_l2i: // fall through
1237     case Bytecodes::_i2b: // fall through
1238     case Bytecodes::_i2c: // fall through
1239     case Bytecodes::_i2s: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
1240 
1241     case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false;       round_result = false;      needs_stub = false; break;
1242     case Bytecodes::_d2f: fixed_input = false;       fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
1243     case Bytecodes::_i2f: fixed_input = false;       fixed_result = false;       round_result = UseSSE < 1; needs_stub = false; break;
1244     case Bytecodes::_i2d: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
1245     case Bytecodes::_f2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
1246     case Bytecodes::_d2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
1247     case Bytecodes::_l2f: fixed_input = false;       fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
1248     case Bytecodes::_l2d: fixed_input = false;       fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
1249     case Bytecodes::_f2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
1250     case Bytecodes::_d2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
1251     default: ShouldNotReachHere();
1252   }
1253 
1254   LIRItem value(x->value(), this);
1255   value.load_item();
1256   LIR_Opr input = value.result();
1257   LIR_Opr result = rlock(x);
1258 
1259   // arguments of lir_convert
1260   LIR_Opr conv_input = input;
1261   LIR_Opr conv_result = result;
1262   ConversionStub* stub = NULL;
1263 
1264   if (fixed_input) {
1265     conv_input = fixed_register_for(input->type());
1266     __ move(input, conv_input);
1267   }
1268 
1269   assert(fixed_result == false || round_result == false, "cannot set both");
1270   if (fixed_result) {
1271     conv_result = fixed_register_for(result->type());
1272   } else if (round_result) {
1273     result = new_register(result->type());
1274     set_vreg_flag(result, must_start_in_memory);
1275   }
1276 
1277   if (needs_stub) {
1278     stub = new ConversionStub(x->op(), conv_input, conv_result);
1279   }
1280 
1281   __ convert(x->op(), conv_input, conv_result, stub);
1282 
1283   if (result != conv_result) {
1284     __ move(conv_result, result);
1285   }
1286 
1287   assert(result->is_virtual(), "result must be virtual register");
1288   set_result(x, result);
1289 }
1290 
1291 
1292 void LIRGenerator::do_NewInstance(NewInstance* x) {
1293   print_if_not_loaded(x);
1294 
1295   CodeEmitInfo* info = state_for(x, x->state());
1296   LIR_Opr reg = result_register_for(x->type());
1297   new_instance(reg, x->klass(), x->is_unresolved(),
1298                        FrameMap::rcx_oop_opr,
1299                        FrameMap::rdi_oop_opr,
1300                        FrameMap::rsi_oop_opr,
1301                        LIR_OprFact::illegalOpr,
1302                        FrameMap::rdx_metadata_opr, info);
1303   LIR_Opr result = rlock_result(x);
1304   __ move(reg, result);
1305 }
1306 
1307 
1308 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1309   CodeEmitInfo* info = state_for(x, x->state());
1310 
1311   LIRItem length(x->length(), this);
1312   length.load_item_force(FrameMap::rbx_opr);
1313 
1314   LIR_Opr reg = result_register_for(x->type());
1315   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1316   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1317   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1318   LIR_Opr tmp4 = reg;
1319   LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1320   LIR_Opr len = length.result();
1321   BasicType elem_type = x->elt_type();
1322 
1323   __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1324 
1325   CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1326   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1327 
1328   LIR_Opr result = rlock_result(x);
1329   __ move(reg, result);
1330 }
1331 
1332 
1333 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1334   LIRItem length(x->length(), this);
1335   // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1336   // and therefore provide the state before the parameters have been consumed
1337   CodeEmitInfo* patching_info = NULL;
1338   if (!x->klass()->is_loaded() || PatchALot) {
1339     patching_info =  state_for(x, x->state_before());
1340   }
1341 
1342   CodeEmitInfo* info = state_for(x, x->state());
1343 
1344   const LIR_Opr reg = result_register_for(x->type());
1345   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1346   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1347   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1348   LIR_Opr tmp4 = reg;
1349   LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1350 
1351   length.load_item_force(FrameMap::rbx_opr);
1352   LIR_Opr len = length.result();
1353 
1354   CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1355   ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass());
1356   if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1357     BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1358   }
1359   klass2reg_with_patching(klass_reg, obj, patching_info);
1360   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1361 
1362   LIR_Opr result = rlock_result(x);
1363   __ move(reg, result);
1364 }
1365 
1366 
1367 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1368   Values* dims = x->dims();
1369   int i = dims->length();
1370   LIRItemList* items = new LIRItemList(i, i, NULL);
1371   while (i-- > 0) {
1372     LIRItem* size = new LIRItem(dims->at(i), this);
1373     items->at_put(i, size);
1374   }
1375 
1376   // Evaluate state_for early since it may emit code.
1377   CodeEmitInfo* patching_info = NULL;
1378   if (!x->klass()->is_loaded() || PatchALot) {
1379     patching_info = state_for(x, x->state_before());
1380 
1381     // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1382     // clone all handlers (NOTE: Usually this is handled transparently
1383     // by the CodeEmitInfo cloning logic in CodeStub constructors but
1384     // is done explicitly here because a stub isn't being used).
1385     x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1386   }
1387   CodeEmitInfo* info = state_for(x, x->state());
1388 
1389   i = dims->length();
1390   while (i-- > 0) {
1391     LIRItem* size = items->at(i);
1392     size->load_nonconstant();
1393 
1394     store_stack_parameter(size->result(), in_ByteSize(i*4));
1395   }
1396 
1397   LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
1398   klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1399 
1400   LIR_Opr rank = FrameMap::rbx_opr;
1401   __ move(LIR_OprFact::intConst(x->rank()), rank);
1402   LIR_Opr varargs = FrameMap::rcx_opr;
1403   __ move(FrameMap::rsp_opr, varargs);
1404   LIR_OprList* args = new LIR_OprList(3);
1405   args->append(klass_reg);
1406   args->append(rank);
1407   args->append(varargs);
1408   LIR_Opr reg = result_register_for(x->type());
1409   __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1410                   LIR_OprFact::illegalOpr,
1411                   reg, args, info);
1412 
1413   LIR_Opr result = rlock_result(x);
1414   __ move(reg, result);
1415 }
1416 
1417 
1418 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1419   // nothing to do for now
1420 }
1421 
1422 
1423 void LIRGenerator::do_CheckCast(CheckCast* x) {
1424   LIRItem obj(x->obj(), this);
1425 
1426   CodeEmitInfo* patching_info = NULL;
1427   if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
1428     // must do this before locking the destination register as an oop register,
1429     // and before the obj is loaded (the latter is for deoptimization)
1430     patching_info = state_for(x, x->state_before());
1431   }
1432   obj.load_item();
1433 
1434   // info for exceptions
1435   CodeEmitInfo* info_for_exception =
1436       (x->needs_exception_state() ? state_for(x) :
1437                                     state_for(x, x->state_before(), true /*ignore_xhandler*/));
1438 
1439   CodeStub* stub;
1440   if (x->is_incompatible_class_change_check()) {
1441     assert(patching_info == NULL, "can't patch this");
1442     stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1443   } else if (x->is_invokespecial_receiver_check()) {
1444     assert(patching_info == NULL, "can't patch this");
1445     stub = new DeoptimizeStub(info_for_exception, Deoptimization::Reason_class_check, Deoptimization::Action_none);
1446   } else {
1447     stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1448   }
1449   LIR_Opr reg = rlock_result(x);
1450   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1451   if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1452     tmp3 = new_register(objectType);
1453   }
1454   __ checkcast(reg, obj.result(), x->klass(),
1455                new_register(objectType), new_register(objectType), tmp3,
1456                x->direct_compare(), info_for_exception, patching_info, stub,
1457                x->profiled_method(), x->profiled_bci());
1458 }
1459 
1460 
1461 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1462   LIRItem obj(x->obj(), this);
1463 
1464   // result and test object may not be in same register
1465   LIR_Opr reg = rlock_result(x);
1466   CodeEmitInfo* patching_info = NULL;
1467   if ((!x->klass()->is_loaded() || PatchALot)) {
1468     // must do this before locking the destination register as an oop register
1469     patching_info = state_for(x, x->state_before());
1470   }
1471   obj.load_item();
1472   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1473   if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1474     tmp3 = new_register(objectType);
1475   }
1476   __ instanceof(reg, obj.result(), x->klass(),
1477                 new_register(objectType), new_register(objectType), tmp3,
1478                 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1479 }
1480 
1481 
1482 void LIRGenerator::do_If(If* x) {
1483   assert(x->number_of_sux() == 2, "inconsistency");
1484   ValueTag tag = x->x()->type()->tag();
1485   bool is_safepoint = x->is_safepoint();
1486 
1487   If::Condition cond = x->cond();
1488 
1489   LIRItem xitem(x->x(), this);
1490   LIRItem yitem(x->y(), this);
1491   LIRItem* xin = &xitem;
1492   LIRItem* yin = &yitem;
1493 
1494   if (tag == longTag) {
1495     // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1496     // mirror for other conditions
1497     if (cond == If::gtr || cond == If::leq) {
1498       cond = Instruction::mirror(cond);
1499       xin = &yitem;
1500       yin = &xitem;
1501     }
1502     xin->set_destroys_register();
1503   }
1504   xin->load_item();
1505   if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1506     // inline long zero
1507     yin->dont_load_item();
1508   } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
1509     // longs cannot handle constants at right side
1510     yin->load_item();
1511   } else {
1512     yin->dont_load_item();
1513   }
1514 
1515   // add safepoint before generating condition code so it can be recomputed
1516   if (x->is_safepoint()) {
1517     // increment backedge counter if needed
1518     increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
1519     __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1520   }
1521   set_no_result(x);
1522 
1523   LIR_Opr left = xin->result();
1524   LIR_Opr right = yin->result();
1525   __ cmp(lir_cond(cond), left, right);
1526   // Generate branch profiling. Profiling code doesn't kill flags.
1527   profile_branch(x, cond);
1528   move_to_phi(x->state());
1529   if (x->x()->type()->is_float_kind()) {
1530     __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1531   } else {
1532     __ branch(lir_cond(cond), right->type(), x->tsux());
1533   }
1534   assert(x->default_sux() == x->fsux(), "wrong destination above");
1535   __ jump(x->default_sux());
1536 }
1537 
1538 
1539 LIR_Opr LIRGenerator::getThreadPointer() {
1540 #ifdef _LP64
1541   return FrameMap::as_pointer_opr(r15_thread);
1542 #else
1543   LIR_Opr result = new_register(T_INT);
1544   __ get_thread(result);
1545   return result;
1546 #endif //
1547 }
1548 
1549 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1550   store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1551   LIR_OprList* args = new LIR_OprList();
1552   address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1553   __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1554 }
1555 
1556 
1557 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1558                                         CodeEmitInfo* info) {
1559   if (address->type() == T_LONG) {
1560     address = new LIR_Address(address->base(),
1561                               address->index(), address->scale(),
1562                               address->disp(), T_DOUBLE);
1563     // Transfer the value atomically by using FP moves.  This means
1564     // the value has to be moved between CPU and FPU registers.  It
1565     // always has to be moved through spill slot since there's no
1566     // quick way to pack the value into an SSE register.
1567     LIR_Opr temp_double = new_register(T_DOUBLE);
1568     LIR_Opr spill = new_register(T_LONG);
1569     set_vreg_flag(spill, must_start_in_memory);
1570     __ move(value, spill);
1571     __ volatile_move(spill, temp_double, T_LONG);
1572     __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1573   } else {
1574     __ store(value, address, info);
1575   }
1576 }
1577 
1578 
1579 
1580 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1581                                        CodeEmitInfo* info) {
1582   if (address->type() == T_LONG) {
1583     address = new LIR_Address(address->base(),
1584                               address->index(), address->scale(),
1585                               address->disp(), T_DOUBLE);
1586     // Transfer the value atomically by using FP moves.  This means
1587     // the value has to be moved between CPU and FPU registers.  In
1588     // SSE0 and SSE1 mode it has to be moved through spill slot but in
1589     // SSE2+ mode it can be moved directly.
1590     LIR_Opr temp_double = new_register(T_DOUBLE);
1591     __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1592     __ volatile_move(temp_double, result, T_LONG);
1593     if (UseSSE < 2) {
1594       // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1595       set_vreg_flag(result, must_start_in_memory);
1596     }
1597   } else {
1598     __ load(address, result, info);
1599   }
1600 }
1601 
1602 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
1603                                      BasicType type, bool is_volatile) {
1604   if (is_volatile && type == T_LONG) {
1605     LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1606     LIR_Opr tmp = new_register(T_DOUBLE);
1607     __ load(addr, tmp);
1608     LIR_Opr spill = new_register(T_LONG);
1609     set_vreg_flag(spill, must_start_in_memory);
1610     __ move(tmp, spill);
1611     __ move(spill, dst);
1612   } else {
1613     LIR_Address* addr = new LIR_Address(src, offset, type);
1614     __ load(addr, dst);
1615   }
1616 }
1617 
1618 
1619 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1620                                      BasicType type, bool is_volatile) {
1621   if (is_volatile && type == T_LONG) {
1622     LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1623     LIR_Opr tmp = new_register(T_DOUBLE);
1624     LIR_Opr spill = new_register(T_DOUBLE);
1625     set_vreg_flag(spill, must_start_in_memory);
1626     __ move(data, spill);
1627     __ move(spill, tmp);
1628     __ move(tmp, addr);
1629   } else {
1630     LIR_Address* addr = new LIR_Address(src, offset, type);
1631     bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1632     if (is_obj) {
1633       // Do the pre-write barrier, if any.
1634       pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1635                   true /* do_load */, false /* patch */, NULL);
1636       __ move(data, addr);
1637       assert(src->is_register(), "must be register");
1638       // Seems to be a precise address
1639       post_barrier(LIR_OprFact::address(addr), data);
1640     } else {
1641       __ move(data, addr);
1642     }
1643   }
1644 }
1645 
1646 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) {
1647   BasicType type = x->basic_type();
1648   LIRItem src(x->object(), this);
1649   LIRItem off(x->offset(), this);
1650   LIRItem value(x->value(), this);
1651 
1652   src.load_item();
1653   value.load_item();
1654   off.load_nonconstant();
1655 
1656   LIR_Opr dst = rlock_result(x, type);
1657   LIR_Opr data = value.result();
1658   bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1659   LIR_Opr offset = off.result();
1660 
1661   assert (type == T_INT || (!x->is_add() && is_obj) LP64_ONLY( || type == T_LONG ), "unexpected type");
1662   LIR_Address* addr;
1663   if (offset->is_constant()) {
1664 #ifdef _LP64
1665     jlong c = offset->as_jlong();
1666     if ((jlong)((jint)c) == c) {
1667       addr = new LIR_Address(src.result(), (jint)c, type);
1668     } else {
1669       LIR_Opr tmp = new_register(T_LONG);
1670       __ move(offset, tmp);
1671       addr = new LIR_Address(src.result(), tmp, type);
1672     }
1673 #else
1674     addr = new LIR_Address(src.result(), offset->as_jint(), type);
1675 #endif
1676   } else {
1677     addr = new LIR_Address(src.result(), offset, type);
1678   }
1679 
1680   // Because we want a 2-arg form of xchg and xadd
1681   __ move(data, dst);
1682 
1683   if (x->is_add()) {
1684     __ xadd(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr);
1685   } else {
1686     if (is_obj) {
1687       // Do the pre-write barrier, if any.
1688       pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1689                   true /* do_load */, false /* patch */, NULL);
1690     }
1691     __ xchg(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr);
1692     if (is_obj) {
1693       // Seems to be a precise address
1694       post_barrier(LIR_OprFact::address(addr), data);
1695     }
1696   }
1697 }