1 /*
   2  * Copyright (c) 2005, 2018, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "c1/c1_Compilation.hpp"
  27 #include "c1/c1_FrameMap.hpp"
  28 #include "c1/c1_Instruction.hpp"
  29 #include "c1/c1_LIRAssembler.hpp"
  30 #include "c1/c1_LIRGenerator.hpp"
  31 #include "c1/c1_Runtime1.hpp"
  32 #include "c1/c1_ValueStack.hpp"
  33 #include "ci/ciArray.hpp"
  34 #include "ci/ciObjArrayKlass.hpp"
  35 #include "ci/ciTypeArrayKlass.hpp"
  36 #include "runtime/sharedRuntime.hpp"
  37 #include "runtime/stubRoutines.hpp"
  38 #include "vmreg_x86.inline.hpp"
  39 
  40 #ifdef ASSERT
  41 #define __ gen()->lir(__FILE__, __LINE__)->
  42 #else
  43 #define __ gen()->lir()->
  44 #endif
  45 
  46 // Item will be loaded into a byte register; Intel only
  47 void LIRItem::load_byte_item() {
  48   load_item();
  49   LIR_Opr res = result();
  50 
  51   if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
  52     // make sure that it is a byte register
  53     assert(!value()->type()->is_float() && !value()->type()->is_double(),
  54            "can't load floats in byte register");
  55     LIR_Opr reg = _gen->rlock_byte(T_BYTE);
  56     __ move(res, reg);
  57 
  58     _result = reg;
  59   }
  60 }
  61 
  62 
  63 void LIRItem::load_nonconstant() {
  64   LIR_Opr r = value()->operand();
  65   if (r->is_constant()) {
  66     _result = r;
  67   } else {
  68     load_item();
  69   }
  70 }
  71 
  72 //--------------------------------------------------------------
  73 //               LIRGenerator
  74 //--------------------------------------------------------------
  75 
  76 
  77 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
  78 LIR_Opr LIRGenerator::exceptionPcOpr()  { return FrameMap::rdx_opr; }
  79 LIR_Opr LIRGenerator::divInOpr()        { return FrameMap::rax_opr; }
  80 LIR_Opr LIRGenerator::divOutOpr()       { return FrameMap::rax_opr; }
  81 LIR_Opr LIRGenerator::remOutOpr()       { return FrameMap::rdx_opr; }
  82 LIR_Opr LIRGenerator::shiftCountOpr()   { return FrameMap::rcx_opr; }
  83 LIR_Opr LIRGenerator::syncLockOpr()     { return new_register(T_INT); }
  84 LIR_Opr LIRGenerator::syncTempOpr()     { return FrameMap::rax_opr; }
  85 LIR_Opr LIRGenerator::getThreadTemp()   { return LIR_OprFact::illegalOpr; }
  86 
  87 
  88 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
  89   LIR_Opr opr;
  90   switch (type->tag()) {
  91     case intTag:     opr = FrameMap::rax_opr;          break;
  92     case objectTag:  opr = FrameMap::rax_oop_opr;      break;
  93     case longTag:    opr = FrameMap::long0_opr;        break;
  94     case floatTag:   opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr  : FrameMap::fpu0_float_opr;  break;
  95     case doubleTag:  opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr;  break;
  96 
  97     case addressTag:
  98     default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
  99   }
 100 
 101   assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
 102   return opr;
 103 }
 104 
 105 
 106 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
 107   LIR_Opr reg = new_register(T_INT);
 108   set_vreg_flag(reg, LIRGenerator::byte_reg);
 109   return reg;
 110 }
 111 
 112 
 113 //--------- loading items into registers --------------------------------
 114 
 115 
 116 // i486 instructions can inline constants
 117 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
 118   if (type == T_SHORT || type == T_CHAR) {
 119     // there is no immediate move of word values in asembler_i486.?pp
 120     return false;
 121   }
 122   Constant* c = v->as_Constant();
 123   if (c && c->state_before() == NULL) {
 124     // constants of any type can be stored directly, except for
 125     // unloaded object constants.
 126     return true;
 127   }
 128   return false;
 129 }
 130 
 131 
 132 bool LIRGenerator::can_inline_as_constant(Value v) const {
 133   if (v->type()->tag() == longTag) return false;
 134   return v->type()->tag() != objectTag ||
 135     (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
 136 }
 137 
 138 
 139 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
 140   if (c->type() == T_LONG) return false;
 141   return c->type() != T_OBJECT || c->as_jobject() == NULL;
 142 }
 143 
 144 
 145 LIR_Opr LIRGenerator::safepoint_poll_register() {
 146   NOT_LP64( if (SafepointMechanism::uses_thread_local_poll()) { return new_register(T_ADDRESS); } )
 147   return LIR_OprFact::illegalOpr;
 148 }
 149 
 150 
 151 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
 152                                             int shift, int disp, BasicType type) {
 153   assert(base->is_register(), "must be");
 154   if (index->is_constant()) {
 155     return new LIR_Address(base,
 156                            ((intx)(index->as_constant_ptr()->as_jint()) << shift) + disp,
 157                            type);
 158   } else {
 159     return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
 160   }
 161 }
 162 
 163 
 164 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
 165                                               BasicType type, bool needs_card_mark) {
 166   int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
 167 
 168   LIR_Address* addr;
 169   if (index_opr->is_constant()) {
 170     int elem_size = type2aelembytes(type);
 171     addr = new LIR_Address(array_opr,
 172                            offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type);
 173   } else {
 174 #ifdef _LP64
 175     if (index_opr->type() == T_INT) {
 176       LIR_Opr tmp = new_register(T_LONG);
 177       __ convert(Bytecodes::_i2l, index_opr, tmp);
 178       index_opr = tmp;
 179     }
 180 #endif // _LP64
 181     addr =  new LIR_Address(array_opr,
 182                             index_opr,
 183                             LIR_Address::scale(type),
 184                             offset_in_bytes, type);
 185   }
 186   if (needs_card_mark) {
 187     // This store will need a precise card mark, so go ahead and
 188     // compute the full adddres instead of computing once for the
 189     // store and again for the card mark.
 190     LIR_Opr tmp = new_pointer_register();
 191     __ leal(LIR_OprFact::address(addr), tmp);
 192     return new LIR_Address(tmp, type);
 193   } else {
 194     return addr;
 195   }
 196 }
 197 
 198 
 199 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
 200   LIR_Opr r = NULL;
 201   if (type == T_LONG) {
 202     r = LIR_OprFact::longConst(x);
 203   } else if (type == T_INT) {
 204     r = LIR_OprFact::intConst(x);
 205   } else {
 206     ShouldNotReachHere();
 207   }
 208   return r;
 209 }
 210 
 211 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
 212   LIR_Opr pointer = new_pointer_register();
 213   __ move(LIR_OprFact::intptrConst(counter), pointer);
 214   LIR_Address* addr = new LIR_Address(pointer, type);
 215   increment_counter(addr, step);
 216 }
 217 
 218 
 219 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
 220   __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
 221 }
 222 
 223 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
 224   __ cmp_mem_int(condition, base, disp, c, info);
 225 }
 226 
 227 
 228 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
 229   __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
 230 }
 231 
 232 
 233 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
 234   if (tmp->is_valid() && c > 0 && c < max_jint) {
 235     if (is_power_of_2(c + 1)) {
 236       __ move(left, tmp);
 237       __ shift_left(left, log2_intptr(c + 1), left);
 238       __ sub(left, tmp, result);
 239       return true;
 240     } else if (is_power_of_2(c - 1)) {
 241       __ move(left, tmp);
 242       __ shift_left(left, log2_intptr(c - 1), left);
 243       __ add(left, tmp, result);
 244       return true;
 245     }
 246   }
 247   return false;
 248 }
 249 
 250 
 251 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
 252   BasicType type = item->type();
 253   __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
 254 }
 255 
 256 //----------------------------------------------------------------------
 257 //             visitor functions
 258 //----------------------------------------------------------------------
 259 
 260 
 261 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
 262   assert(x->is_pinned(),"");
 263   bool needs_range_check = x->compute_needs_range_check();
 264   bool use_length = x->length() != NULL;
 265   bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
 266   bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
 267                                          !get_jobject_constant(x->value())->is_null_object() ||
 268                                          x->should_profile());
 269 
 270   LIRItem array(x->array(), this);
 271   LIRItem index(x->index(), this);
 272   LIRItem value(x->value(), this);
 273   LIRItem length(this);
 274 
 275   array.load_item();
 276   index.load_nonconstant();
 277 
 278   if (use_length && needs_range_check) {
 279     length.set_instruction(x->length());
 280     length.load_item();
 281 
 282   }
 283   if (needs_store_check || x->check_boolean()) {
 284     value.load_item();
 285   } else {
 286     value.load_for_store(x->elt_type());
 287   }
 288 
 289   set_no_result(x);
 290 
 291   // the CodeEmitInfo must be duplicated for each different
 292   // LIR-instruction because spilling can occur anywhere between two
 293   // instructions and so the debug information must be different
 294   CodeEmitInfo* range_check_info = state_for(x);
 295   CodeEmitInfo* null_check_info = NULL;
 296   if (x->needs_null_check()) {
 297     null_check_info = new CodeEmitInfo(range_check_info);
 298   }
 299 
 300   // emit array address setup early so it schedules better
 301   LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
 302 
 303   if (GenerateRangeChecks && needs_range_check) {
 304     if (use_length) {
 305       __ cmp(lir_cond_belowEqual, length.result(), index.result());
 306       __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
 307     } else {
 308       array_range_check(array.result(), index.result(), null_check_info, range_check_info);
 309       // range_check also does the null check
 310       null_check_info = NULL;
 311     }
 312   }
 313 
 314   if (GenerateArrayStoreCheck && needs_store_check) {
 315     LIR_Opr tmp1 = new_register(objectType);
 316     LIR_Opr tmp2 = new_register(objectType);
 317     LIR_Opr tmp3 = new_register(objectType);
 318 
 319     CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
 320     __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci());
 321   }
 322 
 323   if (obj_store) {
 324     // Needs GC write barriers.
 325     pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
 326                 true /* do_load */, false /* patch */, NULL);
 327     __ move(value.result(), array_addr, null_check_info);
 328     // Seems to be a precise
 329     post_barrier(LIR_OprFact::address(array_addr), value.result());
 330   } else {
 331     LIR_Opr result = maybe_mask_boolean(x, array.result(), value.result(), null_check_info);
 332     __ move(result, array_addr, null_check_info);
 333   }
 334 }
 335 
 336 
 337 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
 338   assert(x->is_pinned(),"");
 339   LIRItem obj(x->obj(), this);
 340   obj.load_item();
 341 
 342   set_no_result(x);
 343 
 344   // "lock" stores the address of the monitor stack slot, so this is not an oop
 345   LIR_Opr lock = new_register(T_INT);
 346   // Need a scratch register for biased locking on x86
 347   LIR_Opr scratch = LIR_OprFact::illegalOpr;
 348   if (UseBiasedLocking) {
 349     scratch = new_register(T_INT);
 350   }
 351 
 352   CodeEmitInfo* info_for_exception = NULL;
 353   if (x->needs_null_check()) {
 354     info_for_exception = state_for(x);
 355   }
 356   // this CodeEmitInfo must not have the xhandlers because here the
 357   // object is already locked (xhandlers expect object to be unlocked)
 358   CodeEmitInfo* info = state_for(x, x->state(), true);
 359   monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
 360                         x->monitor_no(), info_for_exception, info);
 361 }
 362 
 363 
 364 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
 365   assert(x->is_pinned(),"");
 366 
 367   LIRItem obj(x->obj(), this);
 368   obj.dont_load_item();
 369 
 370   LIR_Opr lock = new_register(T_INT);
 371   LIR_Opr obj_temp = new_register(T_INT);
 372   set_no_result(x);
 373   monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
 374 }
 375 
 376 
 377 // _ineg, _lneg, _fneg, _dneg
 378 void LIRGenerator::do_NegateOp(NegateOp* x) {
 379   LIRItem value(x->x(), this);
 380   value.set_destroys_register();
 381   value.load_item();
 382   LIR_Opr reg = rlock(x);
 383   __ negate(value.result(), reg);
 384 
 385   set_result(x, round_item(reg));
 386 }
 387 
 388 
 389 // for  _fadd, _fmul, _fsub, _fdiv, _frem
 390 //      _dadd, _dmul, _dsub, _ddiv, _drem
 391 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
 392   LIRItem left(x->x(),  this);
 393   LIRItem right(x->y(), this);
 394   LIRItem* left_arg  = &left;
 395   LIRItem* right_arg = &right;
 396   assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
 397   bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
 398   if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
 399     left.load_item();
 400   } else {
 401     left.dont_load_item();
 402   }
 403 
 404   // do not load right operand if it is a constant.  only 0 and 1 are
 405   // loaded because there are special instructions for loading them
 406   // without memory access (not needed for SSE2 instructions)
 407   bool must_load_right = false;
 408   if (right.is_constant()) {
 409     LIR_Const* c = right.result()->as_constant_ptr();
 410     assert(c != NULL, "invalid constant");
 411     assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
 412 
 413     if (c->type() == T_FLOAT) {
 414       must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
 415     } else {
 416       must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
 417     }
 418   }
 419 
 420   if (must_load_both) {
 421     // frem and drem destroy also right operand, so move it to a new register
 422     right.set_destroys_register();
 423     right.load_item();
 424   } else if (right.is_register() || must_load_right) {
 425     right.load_item();
 426   } else {
 427     right.dont_load_item();
 428   }
 429   LIR_Opr reg = rlock(x);
 430   LIR_Opr tmp = LIR_OprFact::illegalOpr;
 431   if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) {
 432     tmp = new_register(T_DOUBLE);
 433   }
 434 
 435   if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
 436     // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
 437     LIR_Opr fpu0, fpu1;
 438     if (x->op() == Bytecodes::_frem) {
 439       fpu0 = LIR_OprFact::single_fpu(0);
 440       fpu1 = LIR_OprFact::single_fpu(1);
 441     } else {
 442       fpu0 = LIR_OprFact::double_fpu(0);
 443       fpu1 = LIR_OprFact::double_fpu(1);
 444     }
 445     __ move(right.result(), fpu1); // order of left and right operand is important!
 446     __ move(left.result(), fpu0);
 447     __ rem (fpu0, fpu1, fpu0);
 448     __ move(fpu0, reg);
 449 
 450   } else {
 451     arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp);
 452   }
 453 
 454   set_result(x, round_item(reg));
 455 }
 456 
 457 
 458 // for  _ladd, _lmul, _lsub, _ldiv, _lrem
 459 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
 460   if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
 461     // long division is implemented as a direct call into the runtime
 462     LIRItem left(x->x(), this);
 463     LIRItem right(x->y(), this);
 464 
 465     // the check for division by zero destroys the right operand
 466     right.set_destroys_register();
 467 
 468     BasicTypeList signature(2);
 469     signature.append(T_LONG);
 470     signature.append(T_LONG);
 471     CallingConvention* cc = frame_map()->c_calling_convention(&signature);
 472 
 473     // check for division by zero (destroys registers of right operand!)
 474     CodeEmitInfo* info = state_for(x);
 475 
 476     const LIR_Opr result_reg = result_register_for(x->type());
 477     left.load_item_force(cc->at(1));
 478     right.load_item();
 479 
 480     __ move(right.result(), cc->at(0));
 481 
 482     __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
 483     __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
 484 
 485     address entry = NULL;
 486     switch (x->op()) {
 487     case Bytecodes::_lrem:
 488       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
 489       break; // check if dividend is 0 is done elsewhere
 490     case Bytecodes::_ldiv:
 491       entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
 492       break; // check if dividend is 0 is done elsewhere
 493     case Bytecodes::_lmul:
 494       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
 495       break;
 496     default:
 497       ShouldNotReachHere();
 498     }
 499 
 500     LIR_Opr result = rlock_result(x);
 501     __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
 502     __ move(result_reg, result);
 503   } else if (x->op() == Bytecodes::_lmul) {
 504     // missing test if instr is commutative and if we should swap
 505     LIRItem left(x->x(), this);
 506     LIRItem right(x->y(), this);
 507 
 508     // right register is destroyed by the long mul, so it must be
 509     // copied to a new register.
 510     right.set_destroys_register();
 511 
 512     left.load_item();
 513     right.load_item();
 514 
 515     LIR_Opr reg = FrameMap::long0_opr;
 516     arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
 517     LIR_Opr result = rlock_result(x);
 518     __ move(reg, result);
 519   } else {
 520     // missing test if instr is commutative and if we should swap
 521     LIRItem left(x->x(), this);
 522     LIRItem right(x->y(), this);
 523 
 524     left.load_item();
 525     // don't load constants to save register
 526     right.load_nonconstant();
 527     rlock_result(x);
 528     arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
 529   }
 530 }
 531 
 532 
 533 
 534 // for: _iadd, _imul, _isub, _idiv, _irem
 535 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
 536   if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
 537     // The requirements for division and modulo
 538     // input : rax,: dividend                         min_int
 539     //         reg: divisor   (may not be rax,/rdx)   -1
 540     //
 541     // output: rax,: quotient  (= rax, idiv reg)       min_int
 542     //         rdx: remainder (= rax, irem reg)       0
 543 
 544     // rax, and rdx will be destroyed
 545 
 546     // Note: does this invalidate the spec ???
 547     LIRItem right(x->y(), this);
 548     LIRItem left(x->x() , this);   // visit left second, so that the is_register test is valid
 549 
 550     // call state_for before load_item_force because state_for may
 551     // force the evaluation of other instructions that are needed for
 552     // correct debug info.  Otherwise the live range of the fix
 553     // register might be too long.
 554     CodeEmitInfo* info = state_for(x);
 555 
 556     left.load_item_force(divInOpr());
 557 
 558     right.load_item();
 559 
 560     LIR_Opr result = rlock_result(x);
 561     LIR_Opr result_reg;
 562     if (x->op() == Bytecodes::_idiv) {
 563       result_reg = divOutOpr();
 564     } else {
 565       result_reg = remOutOpr();
 566     }
 567 
 568     if (!ImplicitDiv0Checks) {
 569       __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
 570       __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));
 571       // Idiv/irem cannot trap (passing info would generate an assertion).
 572       info = NULL;
 573     }
 574     LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
 575     if (x->op() == Bytecodes::_irem) {
 576       __ irem(left.result(), right.result(), result_reg, tmp, info);
 577     } else if (x->op() == Bytecodes::_idiv) {
 578       __ idiv(left.result(), right.result(), result_reg, tmp, info);
 579     } else {
 580       ShouldNotReachHere();
 581     }
 582 
 583     __ move(result_reg, result);
 584   } else {
 585     // missing test if instr is commutative and if we should swap
 586     LIRItem left(x->x(),  this);
 587     LIRItem right(x->y(), this);
 588     LIRItem* left_arg = &left;
 589     LIRItem* right_arg = &right;
 590     if (x->is_commutative() && left.is_stack() && right.is_register()) {
 591       // swap them if left is real stack (or cached) and right is real register(not cached)
 592       left_arg = &right;
 593       right_arg = &left;
 594     }
 595 
 596     left_arg->load_item();
 597 
 598     // do not need to load right, as we can handle stack and constants
 599     if (x->op() == Bytecodes::_imul ) {
 600       // check if we can use shift instead
 601       bool use_constant = false;
 602       bool use_tmp = false;
 603       if (right_arg->is_constant()) {
 604         jint iconst = right_arg->get_jint_constant();
 605         if (iconst > 0 && iconst < max_jint) {
 606           if (is_power_of_2(iconst)) {
 607             use_constant = true;
 608           } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
 609             use_constant = true;
 610             use_tmp = true;
 611           }
 612         }
 613       }
 614       if (use_constant) {
 615         right_arg->dont_load_item();
 616       } else {
 617         right_arg->load_item();
 618       }
 619       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 620       if (use_tmp) {
 621         tmp = new_register(T_INT);
 622       }
 623       rlock_result(x);
 624 
 625       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 626     } else {
 627       right_arg->dont_load_item();
 628       rlock_result(x);
 629       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 630       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 631     }
 632   }
 633 }
 634 
 635 
 636 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
 637   // when an operand with use count 1 is the left operand, then it is
 638   // likely that no move for 2-operand-LIR-form is necessary
 639   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 640     x->swap_operands();
 641   }
 642 
 643   ValueTag tag = x->type()->tag();
 644   assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
 645   switch (tag) {
 646     case floatTag:
 647     case doubleTag:  do_ArithmeticOp_FPU(x);  return;
 648     case longTag:    do_ArithmeticOp_Long(x); return;
 649     case intTag:     do_ArithmeticOp_Int(x);  return;
 650     default:         ShouldNotReachHere();    return;
 651   }
 652 }
 653 
 654 
 655 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
 656 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
 657   // count must always be in rcx
 658   LIRItem value(x->x(), this);
 659   LIRItem count(x->y(), this);
 660 
 661   ValueTag elemType = x->type()->tag();
 662   bool must_load_count = !count.is_constant() || elemType == longTag;
 663   if (must_load_count) {
 664     // count for long must be in register
 665     count.load_item_force(shiftCountOpr());
 666   } else {
 667     count.dont_load_item();
 668   }
 669   value.load_item();
 670   LIR_Opr reg = rlock_result(x);
 671 
 672   shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
 673 }
 674 
 675 
 676 // _iand, _land, _ior, _lor, _ixor, _lxor
 677 void LIRGenerator::do_LogicOp(LogicOp* x) {
 678   // when an operand with use count 1 is the left operand, then it is
 679   // likely that no move for 2-operand-LIR-form is necessary
 680   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 681     x->swap_operands();
 682   }
 683 
 684   LIRItem left(x->x(), this);
 685   LIRItem right(x->y(), this);
 686 
 687   left.load_item();
 688   right.load_nonconstant();
 689   LIR_Opr reg = rlock_result(x);
 690 
 691   logic_op(x->op(), reg, left.result(), right.result());
 692 }
 693 
 694 
 695 
 696 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
 697 void LIRGenerator::do_CompareOp(CompareOp* x) {
 698   LIRItem left(x->x(), this);
 699   LIRItem right(x->y(), this);
 700   ValueTag tag = x->x()->type()->tag();
 701   if (tag == longTag) {
 702     left.set_destroys_register();
 703   }
 704   left.load_item();
 705   right.load_item();
 706   LIR_Opr reg = rlock_result(x);
 707 
 708   if (x->x()->type()->is_float_kind()) {
 709     Bytecodes::Code code = x->op();
 710     __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
 711   } else if (x->x()->type()->tag() == longTag) {
 712     __ lcmp2int(left.result(), right.result(), reg);
 713   } else {
 714     Unimplemented();
 715   }
 716 }
 717 
 718 
 719 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
 720   assert(x->number_of_arguments() == 4, "wrong type");
 721   LIRItem obj   (x->argument_at(0), this);  // object
 722   LIRItem offset(x->argument_at(1), this);  // offset of field
 723   LIRItem cmp   (x->argument_at(2), this);  // value to compare with field
 724   LIRItem val   (x->argument_at(3), this);  // replace field with val if matches cmp
 725 
 726   assert(obj.type()->tag() == objectTag, "invalid type");
 727 
 728   // In 64bit the type can be long, sparc doesn't have this assert
 729   // assert(offset.type()->tag() == intTag, "invalid type");
 730 
 731   assert(cmp.type()->tag() == type->tag(), "invalid type");
 732   assert(val.type()->tag() == type->tag(), "invalid type");
 733 
 734   // get address of field
 735   obj.load_item();
 736   offset.load_nonconstant();
 737 
 738   LIR_Opr addr = new_pointer_register();
 739   LIR_Address* a;
 740   if(offset.result()->is_constant()) {
 741 #ifdef _LP64
 742     jlong c = offset.result()->as_jlong();
 743     if ((jlong)((jint)c) == c) {
 744       a = new LIR_Address(obj.result(),
 745                           (jint)c,
 746                           as_BasicType(type));
 747     } else {
 748       LIR_Opr tmp = new_register(T_LONG);
 749       __ move(offset.result(), tmp);
 750       a = new LIR_Address(obj.result(),
 751                           tmp,
 752                           as_BasicType(type));
 753     }
 754 #else
 755     a = new LIR_Address(obj.result(),
 756                         offset.result()->as_jint(),
 757                         as_BasicType(type));
 758 #endif
 759   } else {
 760     a = new LIR_Address(obj.result(),
 761                         offset.result(),
 762                         0,
 763                         as_BasicType(type));
 764   }
 765   __ leal(LIR_OprFact::address(a), addr);
 766 
 767   if (type == objectType) {  // Write-barrier needed for Object fields.
 768     // Do the pre-write barrier, if any.
 769     pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */,
 770                 true /* do_load */, false /* patch */, NULL);
 771   }
 772 
 773   if (type == objectType) {
 774     cmp.load_item_force(FrameMap::rax_oop_opr);
 775     val.load_item();
 776   } else if (type == intType) {
 777     cmp.load_item_force(FrameMap::rax_opr);
 778     val.load_item();
 779   } else if (type == longType) {
 780     cmp.load_item_force(FrameMap::long0_opr);
 781     val.load_item_force(FrameMap::long1_opr);
 782   } else {
 783     ShouldNotReachHere();
 784   }
 785 
 786   LIR_Opr ill = LIR_OprFact::illegalOpr;  // for convenience
 787   if (type == objectType)
 788     __ cas_obj(addr, cmp.result(), val.result(), ill, ill);
 789   else if (type == intType)
 790     __ cas_int(addr, cmp.result(), val.result(), ill, ill);
 791   else if (type == longType)
 792     __ cas_long(addr, cmp.result(), val.result(), ill, ill);
 793   else {
 794     ShouldNotReachHere();
 795   }
 796 
 797   // generate conditional move of boolean result
 798   LIR_Opr result = rlock_result(x);
 799   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
 800            result, as_BasicType(type));
 801   if (type == objectType) {   // Write-barrier needed for Object fields.
 802     // Seems to be precise
 803     post_barrier(addr, val.result());
 804   }
 805 }
 806 
 807 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
 808   assert(x->number_of_arguments() == 3, "wrong type");
 809   assert(UseFMA, "Needs FMA instructions support.");
 810   LIRItem value(x->argument_at(0), this);
 811   LIRItem value1(x->argument_at(1), this);
 812   LIRItem value2(x->argument_at(2), this);
 813 
 814   value2.set_destroys_register();
 815 
 816   value.load_item();
 817   value1.load_item();
 818   value2.load_item();
 819 
 820   LIR_Opr calc_input = value.result();
 821   LIR_Opr calc_input1 = value1.result();
 822   LIR_Opr calc_input2 = value2.result();
 823   LIR_Opr calc_result = rlock_result(x);
 824 
 825   switch (x->id()) {
 826   case vmIntrinsics::_fmaD:   __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
 827   case vmIntrinsics::_fmaF:   __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
 828   default:                    ShouldNotReachHere();
 829   }
 830 
 831 }
 832 
 833 
 834 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
 835   assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
 836 
 837   if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog ||
 838       x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos ||
 839       x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan ||
 840       x->id() == vmIntrinsics::_dlog10) {
 841     do_LibmIntrinsic(x);
 842     return;
 843   }
 844 
 845   LIRItem value(x->argument_at(0), this);
 846 
 847   bool use_fpu = false;
 848   if (UseSSE < 2) {
 849     value.set_destroys_register();
 850   }
 851   value.load_item();
 852 
 853   LIR_Opr calc_input = value.result();
 854   LIR_Opr calc_result = rlock_result(x);
 855 
 856   switch(x->id()) {
 857     case vmIntrinsics::_dabs:   __ abs  (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
 858     case vmIntrinsics::_dsqrt:  __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
 859     default:                    ShouldNotReachHere();
 860   }
 861 
 862   if (use_fpu) {
 863     __ move(calc_result, x->operand());
 864   }
 865 }
 866 
 867 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) {
 868   LIRItem value(x->argument_at(0), this);
 869   value.set_destroys_register();
 870 
 871   LIR_Opr calc_result = rlock_result(x);
 872   LIR_Opr result_reg = result_register_for(x->type());
 873 
 874   CallingConvention* cc = NULL;
 875 
 876   if (x->id() == vmIntrinsics::_dpow) {
 877     LIRItem value1(x->argument_at(1), this);
 878 
 879     value1.set_destroys_register();
 880 
 881     BasicTypeList signature(2);
 882     signature.append(T_DOUBLE);
 883     signature.append(T_DOUBLE);
 884     cc = frame_map()->c_calling_convention(&signature);
 885     value.load_item_force(cc->at(0));
 886     value1.load_item_force(cc->at(1));
 887   } else {
 888     BasicTypeList signature(1);
 889     signature.append(T_DOUBLE);
 890     cc = frame_map()->c_calling_convention(&signature);
 891     value.load_item_force(cc->at(0));
 892   }
 893 
 894 #ifndef _LP64
 895   LIR_Opr tmp = FrameMap::fpu0_double_opr;
 896   result_reg = tmp;
 897   switch(x->id()) {
 898     case vmIntrinsics::_dexp:
 899       if (StubRoutines::dexp() != NULL) {
 900         __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
 901       } else {
 902         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
 903       }
 904       break;
 905     case vmIntrinsics::_dlog:
 906       if (StubRoutines::dlog() != NULL) {
 907         __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
 908       } else {
 909         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
 910       }
 911       break;
 912     case vmIntrinsics::_dlog10:
 913       if (StubRoutines::dlog10() != NULL) {
 914        __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
 915       } else {
 916         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
 917       }
 918       break;
 919     case vmIntrinsics::_dpow:
 920       if (StubRoutines::dpow() != NULL) {
 921         __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
 922       } else {
 923         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
 924       }
 925       break;
 926     case vmIntrinsics::_dsin:
 927       if (VM_Version::supports_sse2() && StubRoutines::dsin() != NULL) {
 928         __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
 929       } else {
 930         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
 931       }
 932       break;
 933     case vmIntrinsics::_dcos:
 934       if (VM_Version::supports_sse2() && StubRoutines::dcos() != NULL) {
 935         __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
 936       } else {
 937         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
 938       }
 939       break;
 940     case vmIntrinsics::_dtan:
 941       if (StubRoutines::dtan() != NULL) {
 942         __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
 943       } else {
 944         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
 945       }
 946       break;
 947     default:  ShouldNotReachHere();
 948   }
 949 #else
 950   switch (x->id()) {
 951     case vmIntrinsics::_dexp:
 952       if (StubRoutines::dexp() != NULL) {
 953         __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
 954       } else {
 955         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
 956       }
 957       break;
 958     case vmIntrinsics::_dlog:
 959       if (StubRoutines::dlog() != NULL) {
 960       __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
 961       } else {
 962         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
 963       }
 964       break;
 965     case vmIntrinsics::_dlog10:
 966       if (StubRoutines::dlog10() != NULL) {
 967       __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
 968       } else {
 969         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
 970       }
 971       break;
 972     case vmIntrinsics::_dpow:
 973        if (StubRoutines::dpow() != NULL) {
 974       __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
 975       } else {
 976         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
 977       }
 978       break;
 979     case vmIntrinsics::_dsin:
 980       if (StubRoutines::dsin() != NULL) {
 981         __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
 982       } else {
 983         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
 984       }
 985       break;
 986     case vmIntrinsics::_dcos:
 987       if (StubRoutines::dcos() != NULL) {
 988         __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
 989       } else {
 990         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
 991       }
 992       break;
 993     case vmIntrinsics::_dtan:
 994        if (StubRoutines::dtan() != NULL) {
 995       __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
 996       } else {
 997         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
 998       }
 999       break;
1000     default:  ShouldNotReachHere();
1001   }
1002 #endif // _LP64
1003   __ move(result_reg, calc_result);
1004 }
1005 
1006 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
1007   assert(x->number_of_arguments() == 5, "wrong type");
1008 
1009   // Make all state_for calls early since they can emit code
1010   CodeEmitInfo* info = state_for(x, x->state());
1011 
1012   LIRItem src(x->argument_at(0), this);
1013   LIRItem src_pos(x->argument_at(1), this);
1014   LIRItem dst(x->argument_at(2), this);
1015   LIRItem dst_pos(x->argument_at(3), this);
1016   LIRItem length(x->argument_at(4), this);
1017 
1018   // operands for arraycopy must use fixed registers, otherwise
1019   // LinearScan will fail allocation (because arraycopy always needs a
1020   // call)
1021 
1022 #ifndef _LP64
1023   src.load_item_force     (FrameMap::rcx_oop_opr);
1024   src_pos.load_item_force (FrameMap::rdx_opr);
1025   dst.load_item_force     (FrameMap::rax_oop_opr);
1026   dst_pos.load_item_force (FrameMap::rbx_opr);
1027   length.load_item_force  (FrameMap::rdi_opr);
1028   LIR_Opr tmp =           (FrameMap::rsi_opr);
1029 #else
1030 
1031   // The java calling convention will give us enough registers
1032   // so that on the stub side the args will be perfect already.
1033   // On the other slow/special case side we call C and the arg
1034   // positions are not similar enough to pick one as the best.
1035   // Also because the java calling convention is a "shifted" version
1036   // of the C convention we can process the java args trivially into C
1037   // args without worry of overwriting during the xfer
1038 
1039   src.load_item_force     (FrameMap::as_oop_opr(j_rarg0));
1040   src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
1041   dst.load_item_force     (FrameMap::as_oop_opr(j_rarg2));
1042   dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
1043   length.load_item_force  (FrameMap::as_opr(j_rarg4));
1044 
1045   LIR_Opr tmp =           FrameMap::as_opr(j_rarg5);
1046 #endif // LP64
1047 
1048   set_no_result(x);
1049 
1050   int flags;
1051   ciArrayKlass* expected_type;
1052   arraycopy_helper(x, &flags, &expected_type);
1053 
1054   __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
1055 }
1056 
1057 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1058   assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support");
1059   // Make all state_for calls early since they can emit code
1060   LIR_Opr result = rlock_result(x);
1061   int flags = 0;
1062   switch (x->id()) {
1063     case vmIntrinsics::_updateCRC32: {
1064       LIRItem crc(x->argument_at(0), this);
1065       LIRItem val(x->argument_at(1), this);
1066       // val is destroyed by update_crc32
1067       val.set_destroys_register();
1068       crc.load_item();
1069       val.load_item();
1070       __ update_crc32(crc.result(), val.result(), result);
1071       break;
1072     }
1073     case vmIntrinsics::_updateBytesCRC32:
1074     case vmIntrinsics::_updateByteBufferCRC32: {
1075       bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1076 
1077       LIRItem crc(x->argument_at(0), this);
1078       LIRItem buf(x->argument_at(1), this);
1079       LIRItem off(x->argument_at(2), this);
1080       LIRItem len(x->argument_at(3), this);
1081       buf.load_item();
1082       off.load_nonconstant();
1083 
1084       LIR_Opr index = off.result();
1085       int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1086       if(off.result()->is_constant()) {
1087         index = LIR_OprFact::illegalOpr;
1088        offset += off.result()->as_jint();
1089       }
1090       LIR_Opr base_op = buf.result();
1091 
1092 #ifndef _LP64
1093       if (!is_updateBytes) { // long b raw address
1094          base_op = new_register(T_INT);
1095          __ convert(Bytecodes::_l2i, buf.result(), base_op);
1096       }
1097 #else
1098       if (index->is_valid()) {
1099         LIR_Opr tmp = new_register(T_LONG);
1100         __ convert(Bytecodes::_i2l, index, tmp);
1101         index = tmp;
1102       }
1103 #endif
1104 
1105       LIR_Address* a = new LIR_Address(base_op,
1106                                        index,
1107                                        offset,
1108                                        T_BYTE);
1109       BasicTypeList signature(3);
1110       signature.append(T_INT);
1111       signature.append(T_ADDRESS);
1112       signature.append(T_INT);
1113       CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1114       const LIR_Opr result_reg = result_register_for(x->type());
1115 
1116       LIR_Opr addr = new_pointer_register();
1117       __ leal(LIR_OprFact::address(a), addr);
1118 
1119       crc.load_item_force(cc->at(0));
1120       __ move(addr, cc->at(1));
1121       len.load_item_force(cc->at(2));
1122 
1123       __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
1124       __ move(result_reg, result);
1125 
1126       break;
1127     }
1128     default: {
1129       ShouldNotReachHere();
1130     }
1131   }
1132 }
1133 
1134 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1135   Unimplemented();
1136 }
1137 
1138 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1139   assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support");
1140 
1141   // Make all state_for calls early since they can emit code
1142   LIR_Opr result = rlock_result(x);
1143 
1144   LIRItem a(x->argument_at(0), this); // Object
1145   LIRItem aOffset(x->argument_at(1), this); // long
1146   LIRItem b(x->argument_at(2), this); // Object
1147   LIRItem bOffset(x->argument_at(3), this); // long
1148   LIRItem length(x->argument_at(4), this); // int
1149   LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int
1150 
1151   a.load_item();
1152   aOffset.load_nonconstant();
1153   b.load_item();
1154   bOffset.load_nonconstant();
1155 
1156   long constant_aOffset = 0;
1157   LIR_Opr result_aOffset = aOffset.result();
1158   if (result_aOffset->is_constant()) {
1159     constant_aOffset = result_aOffset->as_jlong();
1160     result_aOffset = LIR_OprFact::illegalOpr;
1161   }
1162   LIR_Opr result_a = a.result();
1163 
1164   long constant_bOffset = 0;
1165   LIR_Opr result_bOffset = bOffset.result();
1166   if (result_bOffset->is_constant()) {
1167     constant_bOffset = result_bOffset->as_jlong();
1168     result_bOffset = LIR_OprFact::illegalOpr;
1169   }
1170   LIR_Opr result_b = b.result();
1171 
1172 #ifndef _LP64
1173   result_a = new_register(T_INT);
1174   __ convert(Bytecodes::_l2i, a.result(), result_a);
1175   result_b = new_register(T_INT);
1176   __ convert(Bytecodes::_l2i, b.result(), result_b);
1177 #endif
1178 
1179 
1180   LIR_Address* addr_a = new LIR_Address(result_a,
1181                                         result_aOffset,
1182                                         constant_aOffset,
1183                                         T_BYTE);
1184 
1185   LIR_Address* addr_b = new LIR_Address(result_b,
1186                                         result_bOffset,
1187                                         constant_bOffset,
1188                                         T_BYTE);
1189 
1190   BasicTypeList signature(4);
1191   signature.append(T_ADDRESS);
1192   signature.append(T_ADDRESS);
1193   signature.append(T_INT);
1194   signature.append(T_INT);
1195   CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1196   const LIR_Opr result_reg = result_register_for(x->type());
1197 
1198   LIR_Opr ptr_addr_a = new_pointer_register();
1199   __ leal(LIR_OprFact::address(addr_a), ptr_addr_a);
1200 
1201   LIR_Opr ptr_addr_b = new_pointer_register();
1202   __ leal(LIR_OprFact::address(addr_b), ptr_addr_b);
1203 
1204   __ move(ptr_addr_a, cc->at(0));
1205   __ move(ptr_addr_b, cc->at(1));
1206   length.load_item_force(cc->at(2));
1207   log2ArrayIndexScale.load_item_force(cc->at(3));
1208 
1209   __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args());
1210   __ move(result_reg, result);
1211 }
1212 
1213 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
1214 // _i2b, _i2c, _i2s
1215 LIR_Opr fixed_register_for(BasicType type) {
1216   switch (type) {
1217     case T_FLOAT:  return FrameMap::fpu0_float_opr;
1218     case T_DOUBLE: return FrameMap::fpu0_double_opr;
1219     case T_INT:    return FrameMap::rax_opr;
1220     case T_LONG:   return FrameMap::long0_opr;
1221     default:       ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
1222   }
1223 }
1224 
1225 void LIRGenerator::do_Convert(Convert* x) {
1226   // flags that vary for the different operations and different SSE-settings
1227   bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false;
1228 
1229   switch (x->op()) {
1230     case Bytecodes::_i2l: // fall through
1231     case Bytecodes::_l2i: // fall through
1232     case Bytecodes::_i2b: // fall through
1233     case Bytecodes::_i2c: // fall through
1234     case Bytecodes::_i2s: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
1235 
1236     case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false;       round_result = false;      needs_stub = false; break;
1237     case Bytecodes::_d2f: fixed_input = false;       fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
1238     case Bytecodes::_i2f: fixed_input = false;       fixed_result = false;       round_result = UseSSE < 1; needs_stub = false; break;
1239     case Bytecodes::_i2d: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
1240     case Bytecodes::_f2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
1241     case Bytecodes::_d2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
1242     case Bytecodes::_l2f: fixed_input = false;       fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
1243     case Bytecodes::_l2d: fixed_input = false;       fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
1244     case Bytecodes::_f2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
1245     case Bytecodes::_d2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
1246     default: ShouldNotReachHere();
1247   }
1248 
1249   LIRItem value(x->value(), this);
1250   value.load_item();
1251   LIR_Opr input = value.result();
1252   LIR_Opr result = rlock(x);
1253 
1254   // arguments of lir_convert
1255   LIR_Opr conv_input = input;
1256   LIR_Opr conv_result = result;
1257   ConversionStub* stub = NULL;
1258 
1259   if (fixed_input) {
1260     conv_input = fixed_register_for(input->type());
1261     __ move(input, conv_input);
1262   }
1263 
1264   assert(fixed_result == false || round_result == false, "cannot set both");
1265   if (fixed_result) {
1266     conv_result = fixed_register_for(result->type());
1267   } else if (round_result) {
1268     result = new_register(result->type());
1269     set_vreg_flag(result, must_start_in_memory);
1270   }
1271 
1272   if (needs_stub) {
1273     stub = new ConversionStub(x->op(), conv_input, conv_result);
1274   }
1275 
1276   __ convert(x->op(), conv_input, conv_result, stub);
1277 
1278   if (result != conv_result) {
1279     __ move(conv_result, result);
1280   }
1281 
1282   assert(result->is_virtual(), "result must be virtual register");
1283   set_result(x, result);
1284 }
1285 
1286 
1287 void LIRGenerator::do_NewInstance(NewInstance* x) {
1288   print_if_not_loaded(x);
1289 
1290   CodeEmitInfo* info = state_for(x, x->state());
1291   LIR_Opr reg = result_register_for(x->type());
1292   new_instance(reg, x->klass(), x->is_unresolved(),
1293                        FrameMap::rcx_oop_opr,
1294                        FrameMap::rdi_oop_opr,
1295                        FrameMap::rsi_oop_opr,
1296                        LIR_OprFact::illegalOpr,
1297                        FrameMap::rdx_metadata_opr, info);
1298   LIR_Opr result = rlock_result(x);
1299   __ move(reg, result);
1300 }
1301 
1302 
1303 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1304   CodeEmitInfo* info = state_for(x, x->state());
1305 
1306   LIRItem length(x->length(), this);
1307   length.load_item_force(FrameMap::rbx_opr);
1308 
1309   LIR_Opr reg = result_register_for(x->type());
1310   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1311   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1312   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1313   LIR_Opr tmp4 = reg;
1314   LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1315   LIR_Opr len = length.result();
1316   BasicType elem_type = x->elt_type();
1317 
1318   __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1319 
1320   CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1321   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1322 
1323   LIR_Opr result = rlock_result(x);
1324   __ move(reg, result);
1325 }
1326 
1327 
1328 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1329   LIRItem length(x->length(), this);
1330   // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1331   // and therefore provide the state before the parameters have been consumed
1332   CodeEmitInfo* patching_info = NULL;
1333   if (!x->klass()->is_loaded() || PatchALot) {
1334     patching_info =  state_for(x, x->state_before());
1335   }
1336 
1337   CodeEmitInfo* info = state_for(x, x->state());
1338 
1339   const LIR_Opr reg = result_register_for(x->type());
1340   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1341   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1342   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1343   LIR_Opr tmp4 = reg;
1344   LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1345 
1346   length.load_item_force(FrameMap::rbx_opr);
1347   LIR_Opr len = length.result();
1348 
1349   CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1350   ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass());
1351   if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1352     BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1353   }
1354   klass2reg_with_patching(klass_reg, obj, patching_info);
1355   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1356 
1357   LIR_Opr result = rlock_result(x);
1358   __ move(reg, result);
1359 }
1360 
1361 
1362 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1363   Values* dims = x->dims();
1364   int i = dims->length();
1365   LIRItemList* items = new LIRItemList(i, i, NULL);
1366   while (i-- > 0) {
1367     LIRItem* size = new LIRItem(dims->at(i), this);
1368     items->at_put(i, size);
1369   }
1370 
1371   // Evaluate state_for early since it may emit code.
1372   CodeEmitInfo* patching_info = NULL;
1373   if (!x->klass()->is_loaded() || PatchALot) {
1374     patching_info = state_for(x, x->state_before());
1375 
1376     // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1377     // clone all handlers (NOTE: Usually this is handled transparently
1378     // by the CodeEmitInfo cloning logic in CodeStub constructors but
1379     // is done explicitly here because a stub isn't being used).
1380     x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1381   }
1382   CodeEmitInfo* info = state_for(x, x->state());
1383 
1384   i = dims->length();
1385   while (i-- > 0) {
1386     LIRItem* size = items->at(i);
1387     size->load_nonconstant();
1388 
1389     store_stack_parameter(size->result(), in_ByteSize(i*4));
1390   }
1391 
1392   LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
1393   klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1394 
1395   LIR_Opr rank = FrameMap::rbx_opr;
1396   __ move(LIR_OprFact::intConst(x->rank()), rank);
1397   LIR_Opr varargs = FrameMap::rcx_opr;
1398   __ move(FrameMap::rsp_opr, varargs);
1399   LIR_OprList* args = new LIR_OprList(3);
1400   args->append(klass_reg);
1401   args->append(rank);
1402   args->append(varargs);
1403   LIR_Opr reg = result_register_for(x->type());
1404   __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1405                   LIR_OprFact::illegalOpr,
1406                   reg, args, info);
1407 
1408   LIR_Opr result = rlock_result(x);
1409   __ move(reg, result);
1410 }
1411 
1412 
1413 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1414   // nothing to do for now
1415 }
1416 
1417 
1418 void LIRGenerator::do_CheckCast(CheckCast* x) {
1419   LIRItem obj(x->obj(), this);
1420 
1421   CodeEmitInfo* patching_info = NULL;
1422   if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
1423     // must do this before locking the destination register as an oop register,
1424     // and before the obj is loaded (the latter is for deoptimization)
1425     patching_info = state_for(x, x->state_before());
1426   }
1427   obj.load_item();
1428 
1429   // info for exceptions
1430   CodeEmitInfo* info_for_exception =
1431       (x->needs_exception_state() ? state_for(x) :
1432                                     state_for(x, x->state_before(), true /*ignore_xhandler*/));
1433 
1434   CodeStub* stub;
1435   if (x->is_incompatible_class_change_check()) {
1436     assert(patching_info == NULL, "can't patch this");
1437     stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1438   } else if (x->is_invokespecial_receiver_check()) {
1439     assert(patching_info == NULL, "can't patch this");
1440     stub = new DeoptimizeStub(info_for_exception, Deoptimization::Reason_class_check, Deoptimization::Action_none);
1441   } else {
1442     stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1443   }
1444   LIR_Opr reg = rlock_result(x);
1445   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1446   if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1447     tmp3 = new_register(objectType);
1448   }
1449   __ checkcast(reg, obj.result(), x->klass(),
1450                new_register(objectType), new_register(objectType), tmp3,
1451                x->direct_compare(), info_for_exception, patching_info, stub,
1452                x->profiled_method(), x->profiled_bci());
1453 }
1454 
1455 
1456 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1457   LIRItem obj(x->obj(), this);
1458 
1459   // result and test object may not be in same register
1460   LIR_Opr reg = rlock_result(x);
1461   CodeEmitInfo* patching_info = NULL;
1462   if ((!x->klass()->is_loaded() || PatchALot)) {
1463     // must do this before locking the destination register as an oop register
1464     patching_info = state_for(x, x->state_before());
1465   }
1466   obj.load_item();
1467   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1468   if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1469     tmp3 = new_register(objectType);
1470   }
1471   __ instanceof(reg, obj.result(), x->klass(),
1472                 new_register(objectType), new_register(objectType), tmp3,
1473                 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1474 }
1475 
1476 
1477 void LIRGenerator::do_If(If* x) {
1478   assert(x->number_of_sux() == 2, "inconsistency");
1479   ValueTag tag = x->x()->type()->tag();
1480   bool is_safepoint = x->is_safepoint();
1481 
1482   If::Condition cond = x->cond();
1483 
1484   LIRItem xitem(x->x(), this);
1485   LIRItem yitem(x->y(), this);
1486   LIRItem* xin = &xitem;
1487   LIRItem* yin = &yitem;
1488 
1489   if (tag == longTag) {
1490     // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1491     // mirror for other conditions
1492     if (cond == If::gtr || cond == If::leq) {
1493       cond = Instruction::mirror(cond);
1494       xin = &yitem;
1495       yin = &xitem;
1496     }
1497     xin->set_destroys_register();
1498   }
1499   xin->load_item();
1500   if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1501     // inline long zero
1502     yin->dont_load_item();
1503   } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
1504     // longs cannot handle constants at right side
1505     yin->load_item();
1506   } else {
1507     yin->dont_load_item();
1508   }
1509 
1510   // add safepoint before generating condition code so it can be recomputed
1511   if (x->is_safepoint()) {
1512     // increment backedge counter if needed
1513     increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
1514     __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1515   }
1516   set_no_result(x);
1517 
1518   LIR_Opr left = xin->result();
1519   LIR_Opr right = yin->result();
1520   __ cmp(lir_cond(cond), left, right);
1521   // Generate branch profiling. Profiling code doesn't kill flags.
1522   profile_branch(x, cond);
1523   move_to_phi(x->state());
1524   if (x->x()->type()->is_float_kind()) {
1525     __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1526   } else {
1527     __ branch(lir_cond(cond), right->type(), x->tsux());
1528   }
1529   assert(x->default_sux() == x->fsux(), "wrong destination above");
1530   __ jump(x->default_sux());
1531 }
1532 
1533 
1534 LIR_Opr LIRGenerator::getThreadPointer() {
1535 #ifdef _LP64
1536   return FrameMap::as_pointer_opr(r15_thread);
1537 #else
1538   LIR_Opr result = new_register(T_INT);
1539   __ get_thread(result);
1540   return result;
1541 #endif //
1542 }
1543 
1544 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1545   store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1546   LIR_OprList* args = new LIR_OprList();
1547   address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1548   __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1549 }
1550 
1551 
1552 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1553                                         CodeEmitInfo* info) {
1554   if (address->type() == T_LONG) {
1555     address = new LIR_Address(address->base(),
1556                               address->index(), address->scale(),
1557                               address->disp(), T_DOUBLE);
1558     // Transfer the value atomically by using FP moves.  This means
1559     // the value has to be moved between CPU and FPU registers.  It
1560     // always has to be moved through spill slot since there's no
1561     // quick way to pack the value into an SSE register.
1562     LIR_Opr temp_double = new_register(T_DOUBLE);
1563     LIR_Opr spill = new_register(T_LONG);
1564     set_vreg_flag(spill, must_start_in_memory);
1565     __ move(value, spill);
1566     __ volatile_move(spill, temp_double, T_LONG);
1567     __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1568   } else {
1569     __ store(value, address, info);
1570   }
1571 }
1572 
1573 
1574 
1575 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1576                                        CodeEmitInfo* info) {
1577   if (address->type() == T_LONG) {
1578     address = new LIR_Address(address->base(),
1579                               address->index(), address->scale(),
1580                               address->disp(), T_DOUBLE);
1581     // Transfer the value atomically by using FP moves.  This means
1582     // the value has to be moved between CPU and FPU registers.  In
1583     // SSE0 and SSE1 mode it has to be moved through spill slot but in
1584     // SSE2+ mode it can be moved directly.
1585     LIR_Opr temp_double = new_register(T_DOUBLE);
1586     __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1587     __ volatile_move(temp_double, result, T_LONG);
1588     if (UseSSE < 2) {
1589       // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1590       set_vreg_flag(result, must_start_in_memory);
1591     }
1592   } else {
1593     __ load(address, result, info);
1594   }
1595 }
1596 
1597 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
1598                                      BasicType type, bool is_volatile) {
1599   if (is_volatile && type == T_LONG) {
1600     LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1601     LIR_Opr tmp = new_register(T_DOUBLE);
1602     __ load(addr, tmp);
1603     LIR_Opr spill = new_register(T_LONG);
1604     set_vreg_flag(spill, must_start_in_memory);
1605     __ move(tmp, spill);
1606     __ move(spill, dst);
1607   } else {
1608     LIR_Address* addr = new LIR_Address(src, offset, type);
1609     __ load(addr, dst);
1610   }
1611 }
1612 
1613 
1614 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1615                                      BasicType type, bool is_volatile) {
1616   if (is_volatile && type == T_LONG) {
1617     LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1618     LIR_Opr tmp = new_register(T_DOUBLE);
1619     LIR_Opr spill = new_register(T_DOUBLE);
1620     set_vreg_flag(spill, must_start_in_memory);
1621     __ move(data, spill);
1622     __ move(spill, tmp);
1623     __ move(tmp, addr);
1624   } else {
1625     LIR_Address* addr = new LIR_Address(src, offset, type);
1626     bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1627     if (is_obj) {
1628       // Do the pre-write barrier, if any.
1629       pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1630                   true /* do_load */, false /* patch */, NULL);
1631       __ move(data, addr);
1632       assert(src->is_register(), "must be register");
1633       // Seems to be a precise address
1634       post_barrier(LIR_OprFact::address(addr), data);
1635     } else {
1636       __ move(data, addr);
1637     }
1638   }
1639 }
1640 
1641 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) {
1642   BasicType type = x->basic_type();
1643   LIRItem src(x->object(), this);
1644   LIRItem off(x->offset(), this);
1645   LIRItem value(x->value(), this);
1646 
1647   src.load_item();
1648   value.load_item();
1649   off.load_nonconstant();
1650 
1651   LIR_Opr dst = rlock_result(x, type);
1652   LIR_Opr data = value.result();
1653   bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1654   LIR_Opr offset = off.result();
1655 
1656   assert (type == T_INT || (!x->is_add() && is_obj) LP64_ONLY( || type == T_LONG ), "unexpected type");
1657   LIR_Address* addr;
1658   if (offset->is_constant()) {
1659 #ifdef _LP64
1660     jlong c = offset->as_jlong();
1661     if ((jlong)((jint)c) == c) {
1662       addr = new LIR_Address(src.result(), (jint)c, type);
1663     } else {
1664       LIR_Opr tmp = new_register(T_LONG);
1665       __ move(offset, tmp);
1666       addr = new LIR_Address(src.result(), tmp, type);
1667     }
1668 #else
1669     addr = new LIR_Address(src.result(), offset->as_jint(), type);
1670 #endif
1671   } else {
1672     addr = new LIR_Address(src.result(), offset, type);
1673   }
1674 
1675   // Because we want a 2-arg form of xchg and xadd
1676   __ move(data, dst);
1677 
1678   if (x->is_add()) {
1679     __ xadd(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr);
1680   } else {
1681     if (is_obj) {
1682       // Do the pre-write barrier, if any.
1683       pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1684                   true /* do_load */, false /* patch */, NULL);
1685     }
1686     __ xchg(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr);
1687     if (is_obj) {
1688       // Seems to be a precise address
1689       post_barrier(LIR_OprFact::address(addr), data);
1690     }
1691   }
1692 }