1 /* 2 * Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #ifndef SHARE_OPTO_MACHNODE_HPP 26 #define SHARE_OPTO_MACHNODE_HPP 27 28 #include "opto/callnode.hpp" 29 #include "opto/matcher.hpp" 30 #include "opto/multnode.hpp" 31 #include "opto/node.hpp" 32 #include "opto/regmask.hpp" 33 34 class BiasedLockingCounters; 35 class BufferBlob; 36 class CodeBuffer; 37 class JVMState; 38 class MachCallDynamicJavaNode; 39 class MachCallJavaNode; 40 class MachCallLeafNode; 41 class MachCallNode; 42 class MachCallRuntimeNode; 43 class MachCallStaticJavaNode; 44 class MachEpilogNode; 45 class MachIfNode; 46 class MachNullCheckNode; 47 class MachOper; 48 class MachProjNode; 49 class MachPrologNode; 50 class MachReturnNode; 51 class MachSafePointNode; 52 class MachSpillCopyNode; 53 class Matcher; 54 class PhaseRegAlloc; 55 class RegMask; 56 class RTMLockingCounters; 57 class State; 58 59 //---------------------------MachOper------------------------------------------ 60 class MachOper : public ResourceObj { 61 public: 62 // Allocate right next to the MachNodes in the same arena 63 void *operator new(size_t x) throw() { 64 Compile* C = Compile::current(); 65 return C->node_arena()->Amalloc_D(x); 66 } 67 68 // Opcode 69 virtual uint opcode() const = 0; 70 71 // Number of input edges. 72 // Generally at least 1 73 virtual uint num_edges() const { return 1; } 74 // Array of Register masks 75 virtual const RegMask *in_RegMask(int index) const; 76 77 // Methods to output the encoding of the operand 78 79 // Negate conditional branches. Error for non-branch Nodes 80 virtual void negate(); 81 82 // Return the value requested 83 // result register lookup, corresponding to int_format 84 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const; 85 // input register lookup, corresponding to ext_format 86 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const; 87 88 // helpers for MacroAssembler generation from ADLC 89 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const { 90 return ::as_Register(reg(ra_, node)); 91 } 92 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const { 93 return ::as_Register(reg(ra_, node, idx)); 94 } 95 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const { 96 return ::as_FloatRegister(reg(ra_, node)); 97 } 98 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { 99 return ::as_FloatRegister(reg(ra_, node, idx)); 100 } 101 102 #if defined(IA32) || defined(AMD64) 103 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const { 104 return ::as_XMMRegister(reg(ra_, node)); 105 } 106 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { 107 return ::as_XMMRegister(reg(ra_, node, idx)); 108 } 109 #endif 110 // CondRegister reg converter 111 #if defined(PPC64) 112 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node) const { 113 return ::as_ConditionRegister(reg(ra_, node)); 114 } 115 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { 116 return ::as_ConditionRegister(reg(ra_, node, idx)); 117 } 118 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node) const { 119 return ::as_VectorRegister(reg(ra_, node)); 120 } 121 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { 122 return ::as_VectorRegister(reg(ra_, node, idx)); 123 } 124 VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node) const { 125 return ::as_VectorSRegister(reg(ra_, node)); 126 } 127 VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { 128 return ::as_VectorSRegister(reg(ra_, node, idx)); 129 } 130 #endif 131 132 virtual intptr_t constant() const; 133 virtual relocInfo::relocType constant_reloc() const; 134 virtual jdouble constantD() const; 135 virtual jfloat constantF() const; 136 virtual jlong constantL() const; 137 virtual TypeOopPtr *oop() const; 138 virtual int ccode() const; 139 // A zero, default, indicates this value is not needed. 140 // May need to lookup the base register, as done in int_ and ext_format 141 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const; 142 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const; 143 virtual int scale() const; 144 // Parameters needed to support MEMORY_INTERFACE access to stackSlot 145 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const; 146 // Check for PC-Relative displacement 147 virtual relocInfo::relocType disp_reloc() const; 148 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot 149 virtual int base_position() const; // base edge position, or -1 150 virtual int index_position() const; // index edge position, or -1 151 152 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP 153 // Only returns non-null value for i486.ad's indOffset32X 154 virtual const TypePtr *disp_as_type() const { return NULL; } 155 156 // Return the label 157 virtual Label *label() const; 158 159 // Return the method's address 160 virtual intptr_t method() const; 161 162 // Hash and compare over operands are currently identical 163 virtual uint hash() const; 164 virtual bool cmp( const MachOper &oper ) const; 165 166 // Virtual clone, since I do not know how big the MachOper is. 167 virtual MachOper *clone() const = 0; 168 169 // Return ideal Type from simple operands. Fail for complex operands. 170 virtual const Type *type() const; 171 172 // Set an integer offset if we have one, or error otherwise 173 virtual void set_con( jint c0 ) { ShouldNotReachHere(); } 174 175 #ifndef PRODUCT 176 // Return name of operand 177 virtual const char *Name() const { return "???";} 178 179 // Methods to output the text version of the operand 180 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0; 181 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0; 182 183 virtual void dump_spec(outputStream *st) const; // Print per-operand info 184 185 // Check whether o is a valid oper. 186 static bool notAnOper(const MachOper *o) { 187 if (o == NULL) return true; 188 if (((intptr_t)o & 1) != 0) return true; 189 if (*(address*)o == badAddress) return true; // kill by Node::destruct 190 return false; 191 } 192 #endif // !PRODUCT 193 }; 194 195 //------------------------------MachNode--------------------------------------- 196 // Base type for all machine specific nodes. All node classes generated by the 197 // ADLC inherit from this class. 198 class MachNode : public Node { 199 public: 200 MachNode() : Node((uint)0), _num_opnds(0), _opnds(NULL) { 201 init_class_id(Class_Mach); 202 } 203 // Required boilerplate 204 virtual uint size_of() const { return sizeof(MachNode); } 205 virtual int Opcode() const; // Always equal to MachNode 206 virtual uint rule() const = 0; // Machine-specific opcode 207 // Number of inputs which come before the first operand. 208 // Generally at least 1, to skip the Control input 209 virtual uint oper_input_base() const { return 1; } 210 // Position of constant base node in node's inputs. -1 if 211 // no constant base node input. 212 virtual uint mach_constant_base_node_input() const { return (uint)-1; } 213 214 // Copy inputs and operands to new node of instruction. 215 // Called from cisc_version() and short_branch_version(). 216 // !!!! The method's body is defined in ad_<arch>.cpp file. 217 void fill_new_machnode(MachNode *n) const; 218 219 // Return an equivalent instruction using memory for cisc_operand position 220 virtual MachNode *cisc_version(int offset); 221 // Modify this instruction's register mask to use stack version for cisc_operand 222 virtual void use_cisc_RegMask(); 223 224 // Support for short branches 225 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; } 226 227 // Avoid back to back some instructions on some CPUs. 228 enum AvoidBackToBackFlag { AVOID_NONE = 0, 229 AVOID_BEFORE = Flag_avoid_back_to_back_before, 230 AVOID_AFTER = Flag_avoid_back_to_back_after, 231 AVOID_BEFORE_AND_AFTER = AVOID_BEFORE | AVOID_AFTER }; 232 233 bool avoid_back_to_back(AvoidBackToBackFlag flag_value) const { 234 return (flags() & flag_value) == flag_value; 235 } 236 237 // instruction implemented with a call 238 bool has_call() const { return (flags() & Flag_has_call) != 0; } 239 240 // First index in _in[] corresponding to operand, or -1 if there is none 241 int operand_index(uint operand) const; 242 int operand_index(const MachOper *oper) const; 243 244 // Register class input is expected in 245 virtual const RegMask &in_RegMask(uint) const; 246 247 // cisc-spillable instructions redefine for use by in_RegMask 248 virtual const RegMask *cisc_RegMask() const { return NULL; } 249 250 // If this instruction is a 2-address instruction, then return the 251 // index of the input which must match the output. Not nessecary 252 // for instructions which bind the input and output register to the 253 // same singleton regiser (e.g., Intel IDIV which binds AX to be 254 // both an input and an output). It is nessecary when the input and 255 // output have choices - but they must use the same choice. 256 virtual uint two_adr( ) const { return 0; } 257 258 // Array of complex operand pointers. Each corresponds to zero or 259 // more leafs. Must be set by MachNode constructor to point to an 260 // internal array of MachOpers. The MachOper array is sized by 261 // specific MachNodes described in the ADL. 262 uint _num_opnds; 263 MachOper **_opnds; 264 uint num_opnds() const { return _num_opnds; } 265 266 // Emit bytes into cbuf 267 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 268 // Expand node after register allocation. 269 // Node is replaced by several nodes in the postalloc expand phase. 270 // Corresponding methods are generated for nodes if they specify 271 // postalloc_expand. See block.cpp for more documentation. 272 virtual bool requires_postalloc_expand() const { return false; } 273 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_); 274 // Size of instruction in bytes 275 virtual uint size(PhaseRegAlloc *ra_) const; 276 // Helper function that computes size by emitting code 277 virtual uint emit_size(PhaseRegAlloc *ra_) const; 278 279 // Return the alignment required (in units of relocInfo::addr_unit()) 280 // for this instruction (must be a power of 2) 281 virtual int alignment_required() const { return 1; } 282 283 // Return the padding (in bytes) to be emitted before this 284 // instruction to properly align it. 285 virtual int compute_padding(int current_offset) const { return 0; } 286 287 // Return number of relocatable values contained in this instruction 288 virtual int reloc() const { return 0; } 289 290 // Return number of words used for double constants in this instruction 291 virtual int ins_num_consts() const { return 0; } 292 293 // Hash and compare over operands. Used to do GVN on machine Nodes. 294 virtual uint hash() const; 295 virtual bool cmp( const Node &n ) const; 296 297 // Expand method for MachNode, replaces nodes representing pseudo 298 // instructions with a set of nodes which represent real machine 299 // instructions and compute the same value. 300 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; } 301 302 // Bottom_type call; value comes from operand0 303 virtual const class Type *bottom_type() const { return _opnds[0]->type(); } 304 virtual uint ideal_reg() const { 305 const Type *t = _opnds[0]->type(); 306 if (t == TypeInt::CC) { 307 return Op_RegFlags; 308 } else { 309 return t->ideal_reg(); 310 } 311 } 312 313 // If this is a memory op, return the base pointer and fixed offset. 314 // If there are no such, return NULL. If there are multiple addresses 315 // or the address is indeterminate (rare cases) then return (Node*)-1, 316 // which serves as node bottom. 317 // If the offset is not statically determined, set it to Type::OffsetBot. 318 // This method is free to ignore stack slots if that helps. 319 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1) 320 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible 321 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const; 322 323 // Helper for get_base_and_disp: find the base and index input nodes. 324 // Returns the MachOper as determined by memory_operand(), for use, if 325 // needed by the caller. If (MachOper *)-1 is returned, base and index 326 // are set to NodeSentinel. If (MachOper *) NULL is returned, base and 327 // index are set to NULL. 328 const MachOper* memory_inputs(Node* &base, Node* &index) const; 329 330 // Helper for memory_inputs: Which operand carries the necessary info? 331 // By default, returns NULL, which means there is no such operand. 332 // If it returns (MachOper*)-1, this means there are multiple memories. 333 virtual const MachOper* memory_operand() const { return NULL; } 334 335 // Call "get_base_and_disp" to decide which category of memory is used here. 336 virtual const class TypePtr *adr_type() const; 337 338 // Apply peephole rule(s) to this instruction 339 virtual MachNode *peephole(Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted); 340 341 // Top-level ideal Opcode matched 342 virtual int ideal_Opcode() const { return Op_Node; } 343 344 // Adds the label for the case 345 virtual void add_case_label( int switch_val, Label* blockLabel); 346 347 // Set the absolute address for methods 348 virtual void method_set( intptr_t addr ); 349 350 // Should we clone rather than spill this instruction? 351 bool rematerialize() const; 352 353 // Get the pipeline info 354 static const Pipeline *pipeline_class(); 355 virtual const Pipeline *pipeline() const; 356 357 // Returns true if this node is a check that can be implemented with a trap. 358 virtual bool is_TrapBasedCheckNode() const { return false; } 359 360 #ifndef PRODUCT 361 virtual const char *Name() const = 0; // Machine-specific name 362 virtual void dump_spec(outputStream *st) const; // Print per-node info 363 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual 364 #endif 365 }; 366 367 //------------------------------MachIdealNode---------------------------- 368 // Machine specific versions of nodes that must be defined by user. 369 // These are not converted by matcher from ideal nodes to machine nodes 370 // but are inserted into the code by the compiler. 371 class MachIdealNode : public MachNode { 372 public: 373 MachIdealNode( ) {} 374 375 // Define the following defaults for non-matched machine nodes 376 virtual uint oper_input_base() const { return 0; } 377 virtual uint rule() const { return 9999999; } 378 virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); } 379 }; 380 381 //------------------------------MachTypeNode---------------------------- 382 // Machine Nodes that need to retain a known Type. 383 class MachTypeNode : public MachNode { 384 virtual uint size_of() const { return sizeof(*this); } // Size is bigger 385 public: 386 MachTypeNode( ) {} 387 const Type *_bottom_type; 388 389 virtual const class Type *bottom_type() const { return _bottom_type; } 390 #ifndef PRODUCT 391 virtual void dump_spec(outputStream *st) const; 392 #endif 393 }; 394 395 //------------------------------MachBreakpointNode---------------------------- 396 // Machine breakpoint or interrupt Node 397 class MachBreakpointNode : public MachIdealNode { 398 public: 399 MachBreakpointNode( ) {} 400 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 401 virtual uint size(PhaseRegAlloc *ra_) const; 402 403 #ifndef PRODUCT 404 virtual const char *Name() const { return "Breakpoint"; } 405 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 406 #endif 407 }; 408 409 //------------------------------MachConstantBaseNode-------------------------- 410 // Machine node that represents the base address of the constant table. 411 class MachConstantBaseNode : public MachIdealNode { 412 public: 413 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask(). 414 415 public: 416 MachConstantBaseNode() : MachIdealNode() { 417 init_class_id(Class_MachConstantBase); 418 } 419 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; } 420 virtual uint ideal_reg() const { return Op_RegP; } 421 virtual uint oper_input_base() const { return 1; } 422 423 virtual bool requires_postalloc_expand() const; 424 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_); 425 426 virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const; 427 virtual uint size(PhaseRegAlloc* ra_) const; 428 virtual bool pinned() const { return UseRDPCForConstantTableBase; } 429 430 static const RegMask& static_out_RegMask() { return _out_RegMask; } 431 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); } 432 433 #ifndef PRODUCT 434 virtual const char* Name() const { return "MachConstantBaseNode"; } 435 virtual void format(PhaseRegAlloc*, outputStream* st) const; 436 #endif 437 }; 438 439 //------------------------------MachConstantNode------------------------------- 440 // Machine node that holds a constant which is stored in the constant table. 441 class MachConstantNode : public MachTypeNode { 442 protected: 443 Compile::Constant _constant; // This node's constant. 444 445 public: 446 MachConstantNode() : MachTypeNode() { 447 init_class_id(Class_MachConstant); 448 } 449 450 virtual void eval_constant(Compile* C) { 451 #ifdef ASSERT 452 tty->print("missing MachConstantNode eval_constant function: "); 453 dump(); 454 #endif 455 ShouldNotCallThis(); 456 } 457 458 virtual const RegMask &in_RegMask(uint idx) const { 459 if (idx == mach_constant_base_node_input()) 460 return MachConstantBaseNode::static_out_RegMask(); 461 return MachNode::in_RegMask(idx); 462 } 463 464 // Input edge of MachConstantBaseNode. 465 virtual uint mach_constant_base_node_input() const { return req() - 1; } 466 467 int constant_offset(); 468 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); } 469 // Unchecked version to avoid assertions in debug output. 470 int constant_offset_unchecked() const; 471 }; 472 473 //------------------------------MachUEPNode----------------------------------- 474 // Machine Unvalidated Entry Point Node 475 class MachUEPNode : public MachIdealNode { 476 public: 477 MachUEPNode( ) {} 478 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 479 virtual uint size(PhaseRegAlloc *ra_) const; 480 481 #ifndef PRODUCT 482 virtual const char *Name() const { return "Unvalidated-Entry-Point"; } 483 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 484 #endif 485 }; 486 487 //------------------------------MachPrologNode-------------------------------- 488 // Machine function Prolog Node 489 class MachPrologNode : public MachIdealNode { 490 public: 491 MachPrologNode( ) {} 492 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 493 virtual uint size(PhaseRegAlloc *ra_) const; 494 virtual int reloc() const; 495 496 #ifndef PRODUCT 497 virtual const char *Name() const { return "Prolog"; } 498 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 499 #endif 500 }; 501 502 //------------------------------MachEpilogNode-------------------------------- 503 // Machine function Epilog Node 504 class MachEpilogNode : public MachIdealNode { 505 public: 506 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {} 507 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 508 virtual uint size(PhaseRegAlloc *ra_) const; 509 virtual int reloc() const; 510 virtual const Pipeline *pipeline() const; 511 512 private: 513 bool _do_polling; 514 515 public: 516 bool do_polling() const { return _do_polling; } 517 518 // Offset of safepoint from the beginning of the node 519 int safepoint_offset() const; 520 521 #ifndef PRODUCT 522 virtual const char *Name() const { return "Epilog"; } 523 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 524 #endif 525 }; 526 527 //------------------------------MachNopNode----------------------------------- 528 // Machine function Nop Node 529 class MachNopNode : public MachIdealNode { 530 private: 531 int _count; 532 public: 533 MachNopNode( ) : _count(1) {} 534 MachNopNode( int count ) : _count(count) {} 535 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 536 virtual uint size(PhaseRegAlloc *ra_) const; 537 538 virtual const class Type *bottom_type() const { return Type::CONTROL; } 539 540 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp 541 virtual const Pipeline *pipeline() const; 542 #ifndef PRODUCT 543 virtual const char *Name() const { return "Nop"; } 544 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 545 virtual void dump_spec(outputStream *st) const { } // No per-operand info 546 #endif 547 }; 548 549 //------------------------------MachSpillCopyNode------------------------------ 550 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any 551 // location (stack or register). 552 class MachSpillCopyNode : public MachIdealNode { 553 public: 554 enum SpillType { 555 TwoAddress, // Inserted when coalescing of a two-address-instruction node and its input fails 556 PhiInput, // Inserted when coalescing of a phi node and its input fails 557 DebugUse, // Inserted as debug info spills to safepoints in non-frequent blocks 558 LoopPhiInput, // Pre-split compares of loop-phis 559 Definition, // An lrg marked as spilled will be spilled to memory right after its definition, 560 // if in high pressure region or the lrg is bound 561 RegToReg, // A register to register move 562 RegToMem, // A register to memory move 563 MemToReg, // A memory to register move 564 PhiLocationDifferToInputLocation, // When coalescing phi nodes in PhaseChaitin::Split(), a move spill is inserted if 565 // the phi and its input resides at different locations (i.e. reg or mem) 566 BasePointerToMem, // Spill base pointer to memory at safepoint 567 InputToRematerialization, // When rematerializing a node we stretch the inputs live ranges, and they might be 568 // stretched beyond a new definition point, therefore we split out new copies instead 569 CallUse, // Spill use at a call 570 Bound // An lrg marked as spill that is bound and needs to be spilled at a use 571 }; 572 private: 573 const RegMask *_in; // RegMask for input 574 const RegMask *_out; // RegMask for output 575 const Type *_type; 576 const SpillType _spill_type; 577 public: 578 MachSpillCopyNode(SpillType spill_type, Node *n, const RegMask &in, const RegMask &out ) : 579 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()), _spill_type(spill_type) { 580 init_class_id(Class_MachSpillCopy); 581 init_flags(Flag_is_Copy); 582 add_req(NULL); 583 add_req(n); 584 } 585 virtual uint size_of() const { return sizeof(*this); } 586 void set_out_RegMask(const RegMask &out) { _out = &out; } 587 void set_in_RegMask(const RegMask &in) { _in = ∈ } 588 virtual const RegMask &out_RegMask() const { return *_out; } 589 virtual const RegMask &in_RegMask(uint) const { return *_in; } 590 virtual const class Type *bottom_type() const { return _type; } 591 virtual uint ideal_reg() const { return _type->ideal_reg(); } 592 virtual uint oper_input_base() const { return 1; } 593 uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const; 594 595 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 596 virtual uint size(PhaseRegAlloc *ra_) const; 597 598 599 #ifndef PRODUCT 600 static const char *spill_type(SpillType st) { 601 switch (st) { 602 case TwoAddress: 603 return "TwoAddressSpillCopy"; 604 case PhiInput: 605 return "PhiInputSpillCopy"; 606 case DebugUse: 607 return "DebugUseSpillCopy"; 608 case LoopPhiInput: 609 return "LoopPhiInputSpillCopy"; 610 case Definition: 611 return "DefinitionSpillCopy"; 612 case RegToReg: 613 return "RegToRegSpillCopy"; 614 case RegToMem: 615 return "RegToMemSpillCopy"; 616 case MemToReg: 617 return "MemToRegSpillCopy"; 618 case PhiLocationDifferToInputLocation: 619 return "PhiLocationDifferToInputLocationSpillCopy"; 620 case BasePointerToMem: 621 return "BasePointerToMemSpillCopy"; 622 case InputToRematerialization: 623 return "InputToRematerializationSpillCopy"; 624 case CallUse: 625 return "CallUseSpillCopy"; 626 case Bound: 627 return "BoundSpillCopy"; 628 default: 629 assert(false, "Must have valid spill type"); 630 return "MachSpillCopy"; 631 } 632 } 633 634 virtual const char *Name() const { 635 return spill_type(_spill_type); 636 } 637 638 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 639 #endif 640 }; 641 642 // MachMergeNode is similar to a PhiNode in a sense it merges multiple values, 643 // however it doesn't have a control input and is more like a MergeMem. 644 // It is inserted after the register allocation is done to ensure that nodes use single 645 // definition of a multidef lrg in a block. 646 class MachMergeNode : public MachIdealNode { 647 public: 648 MachMergeNode(Node *n1) { 649 init_class_id(Class_MachMerge); 650 add_req(NULL); 651 add_req(n1); 652 } 653 virtual const RegMask &out_RegMask() const { return in(1)->out_RegMask(); } 654 virtual const RegMask &in_RegMask(uint idx) const { return in(1)->in_RegMask(idx); } 655 virtual const class Type *bottom_type() const { return in(1)->bottom_type(); } 656 virtual uint ideal_reg() const { return bottom_type()->ideal_reg(); } 657 virtual uint oper_input_base() const { return 1; } 658 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const { } 659 virtual uint size(PhaseRegAlloc *ra_) const { return 0; } 660 #ifndef PRODUCT 661 virtual const char *Name() const { return "MachMerge"; } 662 #endif 663 }; 664 665 //------------------------------MachBranchNode-------------------------------- 666 // Abstract machine branch Node 667 class MachBranchNode : public MachIdealNode { 668 public: 669 MachBranchNode() : MachIdealNode() { 670 init_class_id(Class_MachBranch); 671 } 672 virtual void label_set(Label* label, uint block_num) = 0; 673 virtual void save_label(Label** label, uint* block_num) = 0; 674 675 // Support for short branches 676 virtual MachNode *short_branch_version() { return NULL; } 677 678 virtual bool pinned() const { return true; }; 679 }; 680 681 //------------------------------MachNullChkNode-------------------------------- 682 // Machine-dependent null-pointer-check Node. Points a real MachNode that is 683 // also some kind of memory op. Turns the indicated MachNode into a 684 // conditional branch with good latency on the ptr-not-null path and awful 685 // latency on the pointer-is-null path. 686 687 class MachNullCheckNode : public MachBranchNode { 688 public: 689 const uint _vidx; // Index of memop being tested 690 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) { 691 init_class_id(Class_MachNullCheck); 692 add_req(ctrl); 693 add_req(memop); 694 } 695 virtual uint size_of() const { return sizeof(*this); } 696 697 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 698 virtual void label_set(Label* label, uint block_num); 699 virtual void save_label(Label** label, uint* block_num); 700 virtual void negate() { } 701 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; } 702 virtual uint ideal_reg() const { return NotAMachineReg; } 703 virtual const RegMask &in_RegMask(uint) const; 704 virtual const RegMask &out_RegMask() const { return RegMask::Empty; } 705 #ifndef PRODUCT 706 virtual const char *Name() const { return "NullCheck"; } 707 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 708 #endif 709 }; 710 711 //------------------------------MachProjNode---------------------------------- 712 // Machine-dependent Ideal projections (how is that for an oxymoron). Really 713 // just MachNodes made by the Ideal world that replicate simple projections 714 // but with machine-dependent input & output register masks. Generally 715 // produced as part of calling conventions. Normally I make MachNodes as part 716 // of the Matcher process, but the Matcher is ill suited to issues involving 717 // frame handling, so frame handling is all done in the Ideal world with 718 // occasional callbacks to the machine model for important info. 719 class MachProjNode : public ProjNode { 720 public: 721 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) { 722 init_class_id(Class_MachProj); 723 } 724 RegMask _rout; 725 const uint _ideal_reg; 726 enum projType { 727 unmatched_proj = 0, // Projs for Control, I/O, memory not matched 728 fat_proj = 999 // Projs killing many regs, defined by _rout 729 }; 730 virtual int Opcode() const; 731 virtual const Type *bottom_type() const; 732 virtual const TypePtr *adr_type() const; 733 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; } 734 virtual const RegMask &out_RegMask() const { return _rout; } 735 virtual uint ideal_reg() const { return _ideal_reg; } 736 // Need size_of() for virtual ProjNode::clone() 737 virtual uint size_of() const { return sizeof(MachProjNode); } 738 #ifndef PRODUCT 739 virtual void dump_spec(outputStream *st) const; 740 #endif 741 }; 742 743 //------------------------------MachIfNode------------------------------------- 744 // Machine-specific versions of IfNodes 745 class MachIfNode : public MachBranchNode { 746 virtual uint size_of() const { return sizeof(*this); } // Size is bigger 747 public: 748 float _prob; // Probability branch goes either way 749 float _fcnt; // Frequency counter 750 MachIfNode() : MachBranchNode() { 751 init_class_id(Class_MachIf); 752 } 753 // Negate conditional branches. 754 virtual void negate() = 0; 755 #ifndef PRODUCT 756 virtual void dump_spec(outputStream *st) const; 757 #endif 758 }; 759 760 //------------------------------MachJumpNode----------------------------------- 761 // Machine-specific versions of JumpNodes 762 class MachJumpNode : public MachConstantNode { 763 public: 764 float* _probs; 765 MachJumpNode() : MachConstantNode() { 766 init_class_id(Class_MachJump); 767 } 768 }; 769 770 //------------------------------MachGotoNode----------------------------------- 771 // Machine-specific versions of GotoNodes 772 class MachGotoNode : public MachBranchNode { 773 public: 774 MachGotoNode() : MachBranchNode() { 775 init_class_id(Class_MachGoto); 776 } 777 }; 778 779 //------------------------------MachFastLockNode------------------------------------- 780 // Machine-specific versions of FastLockNodes 781 class MachFastLockNode : public MachNode { 782 virtual uint size_of() const { return sizeof(*this); } // Size is bigger 783 public: 784 BiasedLockingCounters* _counters; 785 RTMLockingCounters* _rtm_counters; // RTM lock counters for inflated locks 786 RTMLockingCounters* _stack_rtm_counters; // RTM lock counters for stack locks 787 MachFastLockNode() : MachNode() {} 788 }; 789 790 //------------------------------MachReturnNode-------------------------------- 791 // Machine-specific versions of subroutine returns 792 class MachReturnNode : public MachNode { 793 virtual uint size_of() const; // Size is bigger 794 public: 795 RegMask *_in_rms; // Input register masks, set during allocation 796 ReallocMark _nesting; // assertion check for reallocations 797 const TypePtr* _adr_type; // memory effects of call or return 798 MachReturnNode() : MachNode() { 799 init_class_id(Class_MachReturn); 800 _adr_type = TypePtr::BOTTOM; // the default: all of memory 801 } 802 803 void set_adr_type(const TypePtr* atp) { _adr_type = atp; } 804 805 virtual const RegMask &in_RegMask(uint) const; 806 virtual bool pinned() const { return true; }; 807 virtual const TypePtr *adr_type() const; 808 }; 809 810 //------------------------------MachSafePointNode----------------------------- 811 // Machine-specific versions of safepoints 812 class MachSafePointNode : public MachReturnNode { 813 public: 814 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC 815 JVMState* _jvms; // Pointer to list of JVM State Objects 816 uint _jvmadj; // Extra delta to jvms indexes (mach. args) 817 OopMap* oop_map() const { return _oop_map; } 818 void set_oop_map(OopMap* om) { _oop_map = om; } 819 820 MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0) { 821 init_class_id(Class_MachSafePoint); 822 } 823 824 virtual JVMState* jvms() const { return _jvms; } 825 void set_jvms(JVMState* s) { 826 _jvms = s; 827 } 828 virtual const Type *bottom_type() const; 829 830 virtual const RegMask &in_RegMask(uint) const; 831 832 // Functionality from old debug nodes 833 Node *returnadr() const { return in(TypeFunc::ReturnAdr); } 834 Node *frameptr () const { return in(TypeFunc::FramePtr); } 835 836 Node *local(const JVMState* jvms, uint idx) const { 837 assert(verify_jvms(jvms), "jvms must match"); 838 return in(_jvmadj + jvms->locoff() + idx); 839 } 840 Node *stack(const JVMState* jvms, uint idx) const { 841 assert(verify_jvms(jvms), "jvms must match"); 842 return in(_jvmadj + jvms->stkoff() + idx); 843 } 844 Node *monitor_obj(const JVMState* jvms, uint idx) const { 845 assert(verify_jvms(jvms), "jvms must match"); 846 return in(_jvmadj + jvms->monitor_obj_offset(idx)); 847 } 848 Node *monitor_box(const JVMState* jvms, uint idx) const { 849 assert(verify_jvms(jvms), "jvms must match"); 850 return in(_jvmadj + jvms->monitor_box_offset(idx)); 851 } 852 void set_local(const JVMState* jvms, uint idx, Node *c) { 853 assert(verify_jvms(jvms), "jvms must match"); 854 set_req(_jvmadj + jvms->locoff() + idx, c); 855 } 856 void set_stack(const JVMState* jvms, uint idx, Node *c) { 857 assert(verify_jvms(jvms), "jvms must match"); 858 set_req(_jvmadj + jvms->stkoff() + idx, c); 859 } 860 void set_monitor(const JVMState* jvms, uint idx, Node *c) { 861 assert(verify_jvms(jvms), "jvms must match"); 862 set_req(_jvmadj + jvms->monoff() + idx, c); 863 } 864 }; 865 866 //------------------------------MachCallNode---------------------------------- 867 // Machine-specific versions of subroutine calls 868 class MachCallNode : public MachSafePointNode { 869 protected: 870 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash 871 virtual bool cmp( const Node &n ) const; 872 virtual uint size_of() const = 0; // Size is bigger 873 public: 874 const TypeFunc *_tf; // Function type 875 address _entry_point; // Address of the method being called 876 float _cnt; // Estimate of number of times called 877 uint _argsize; // Size of argument block on stack 878 879 const TypeFunc* tf() const { return _tf; } 880 const address entry_point() const { return _entry_point; } 881 const float cnt() const { return _cnt; } 882 uint argsize() const { return _argsize; } 883 884 void set_tf(const TypeFunc* tf) { _tf = tf; } 885 void set_entry_point(address p) { _entry_point = p; } 886 void set_cnt(float c) { _cnt = c; } 887 void set_argsize(int s) { _argsize = s; } 888 889 MachCallNode() : MachSafePointNode() { 890 init_class_id(Class_MachCall); 891 } 892 893 virtual const Type *bottom_type() const; 894 virtual bool pinned() const { return false; } 895 virtual const Type* Value(PhaseGVN* phase) const; 896 virtual const RegMask &in_RegMask(uint) const; 897 virtual int ret_addr_offset() { return 0; } 898 899 bool returns_long() const { return tf()->return_type() == T_LONG; } 900 bool return_value_is_used() const; 901 902 // Similar to cousin class CallNode::returns_pointer 903 bool returns_pointer() const; 904 905 #ifndef PRODUCT 906 virtual void dump_spec(outputStream *st) const; 907 #endif 908 }; 909 910 //------------------------------MachCallJavaNode------------------------------ 911 // "Base" class for machine-specific versions of subroutine calls 912 class MachCallJavaNode : public MachCallNode { 913 protected: 914 virtual bool cmp( const Node &n ) const; 915 virtual uint size_of() const; // Size is bigger 916 public: 917 ciMethod* _method; // Method being direct called 918 bool _override_symbolic_info; // Override symbolic call site info from bytecode 919 int _bci; // Byte Code index of call byte code 920 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual 921 bool _method_handle_invoke; // Tells if the call has to preserve SP 922 MachCallJavaNode() : MachCallNode(), _override_symbolic_info(false) { 923 init_class_id(Class_MachCallJava); 924 } 925 926 virtual const RegMask &in_RegMask(uint) const; 927 928 int resolved_method_index(CodeBuffer &cbuf) const { 929 if (_override_symbolic_info) { 930 // Attach corresponding Method* to the call site, so VM can use it during resolution 931 // instead of querying symbolic info from bytecode. 932 assert(_method != NULL, "method should be set"); 933 assert(_method->constant_encoding()->is_method(), "should point to a Method"); 934 return cbuf.oop_recorder()->find_index(_method->constant_encoding()); 935 } 936 return 0; // Use symbolic info from bytecode (resolved_method == NULL). 937 } 938 939 #ifndef PRODUCT 940 virtual void dump_spec(outputStream *st) const; 941 #endif 942 }; 943 944 //------------------------------MachCallStaticJavaNode------------------------ 945 // Machine-specific versions of monomorphic subroutine calls 946 class MachCallStaticJavaNode : public MachCallJavaNode { 947 virtual bool cmp( const Node &n ) const; 948 virtual uint size_of() const; // Size is bigger 949 public: 950 const char *_name; // Runtime wrapper name 951 MachCallStaticJavaNode() : MachCallJavaNode() { 952 init_class_id(Class_MachCallStaticJava); 953 } 954 955 // If this is an uncommon trap, return the request code, else zero. 956 int uncommon_trap_request() const; 957 958 virtual int ret_addr_offset(); 959 #ifndef PRODUCT 960 virtual void dump_spec(outputStream *st) const; 961 void dump_trap_args(outputStream *st) const; 962 #endif 963 }; 964 965 //------------------------------MachCallDynamicJavaNode------------------------ 966 // Machine-specific versions of possibly megamorphic subroutine calls 967 class MachCallDynamicJavaNode : public MachCallJavaNode { 968 public: 969 int _vtable_index; 970 MachCallDynamicJavaNode() : MachCallJavaNode() { 971 init_class_id(Class_MachCallDynamicJava); 972 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized 973 } 974 virtual int ret_addr_offset(); 975 #ifndef PRODUCT 976 virtual void dump_spec(outputStream *st) const; 977 #endif 978 }; 979 980 //------------------------------MachCallRuntimeNode---------------------------- 981 // Machine-specific versions of subroutine calls 982 class MachCallRuntimeNode : public MachCallNode { 983 virtual bool cmp( const Node &n ) const; 984 virtual uint size_of() const; // Size is bigger 985 public: 986 const char *_name; // Printable name, if _method is NULL 987 MachCallRuntimeNode() : MachCallNode() { 988 init_class_id(Class_MachCallRuntime); 989 } 990 virtual int ret_addr_offset(); 991 #ifndef PRODUCT 992 virtual void dump_spec(outputStream *st) const; 993 #endif 994 }; 995 996 class MachCallLeafNode: public MachCallRuntimeNode { 997 public: 998 MachCallLeafNode() : MachCallRuntimeNode() { 999 init_class_id(Class_MachCallLeaf); 1000 } 1001 }; 1002 1003 //------------------------------MachHaltNode----------------------------------- 1004 // Machine-specific versions of halt nodes 1005 class MachHaltNode : public MachReturnNode { 1006 public: 1007 virtual JVMState* jvms() const; 1008 }; 1009 1010 class MachMemBarNode : public MachNode { 1011 virtual uint size_of() const; // Size is bigger 1012 public: 1013 const TypePtr* _adr_type; // memory effects 1014 MachMemBarNode() : MachNode() { 1015 init_class_id(Class_MachMemBar); 1016 _adr_type = TypePtr::BOTTOM; // the default: all of memory 1017 } 1018 1019 void set_adr_type(const TypePtr* atp) { _adr_type = atp; } 1020 virtual const TypePtr *adr_type() const; 1021 }; 1022 1023 1024 //------------------------------MachTempNode----------------------------------- 1025 // Node used by the adlc to construct inputs to represent temporary registers 1026 class MachTempNode : public MachNode { 1027 private: 1028 MachOper *_opnd_array[1]; 1029 1030 public: 1031 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); } 1032 virtual uint rule() const { return 9999999; } 1033 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {} 1034 1035 MachTempNode(MachOper* oper) { 1036 init_class_id(Class_MachTemp); 1037 _num_opnds = 1; 1038 _opnds = _opnd_array; 1039 add_req(NULL); 1040 _opnds[0] = oper; 1041 } 1042 virtual uint size_of() const { return sizeof(MachTempNode); } 1043 1044 #ifndef PRODUCT 1045 virtual void format(PhaseRegAlloc *, outputStream *st ) const {} 1046 virtual const char *Name() const { return "MachTemp";} 1047 #endif 1048 }; 1049 1050 1051 1052 //------------------------------labelOper-------------------------------------- 1053 // Machine-independent version of label operand 1054 class labelOper : public MachOper { 1055 private: 1056 virtual uint num_edges() const { return 0; } 1057 public: 1058 // Supported for fixed size branches 1059 Label* _label; // Label for branch(es) 1060 1061 uint _block_num; 1062 1063 labelOper() : _label(0), _block_num(0) {} 1064 1065 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {} 1066 1067 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {} 1068 1069 virtual MachOper *clone() const; 1070 1071 virtual Label *label() const { assert(_label != NULL, "need Label"); return _label; } 1072 1073 virtual uint opcode() const; 1074 1075 virtual uint hash() const; 1076 virtual bool cmp( const MachOper &oper ) const; 1077 #ifndef PRODUCT 1078 virtual const char *Name() const { return "Label";} 1079 1080 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const; 1081 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); } 1082 #endif 1083 }; 1084 1085 1086 //------------------------------methodOper-------------------------------------- 1087 // Machine-independent version of method operand 1088 class methodOper : public MachOper { 1089 private: 1090 virtual uint num_edges() const { return 0; } 1091 public: 1092 intptr_t _method; // Address of method 1093 methodOper() : _method(0) {} 1094 methodOper(intptr_t method) : _method(method) {} 1095 1096 virtual MachOper *clone() const; 1097 1098 virtual intptr_t method() const { return _method; } 1099 1100 virtual uint opcode() const; 1101 1102 virtual uint hash() const; 1103 virtual bool cmp( const MachOper &oper ) const; 1104 #ifndef PRODUCT 1105 virtual const char *Name() const { return "Method";} 1106 1107 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const; 1108 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); } 1109 #endif 1110 }; 1111 1112 #endif // SHARE_OPTO_MACHNODE_HPP