src/os_cpu/bsd_zero/vm/atomic_bsd_zero.inline.hpp

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@  rev 7557 : 8067331: Zero: Atomic::xchg and Atomic::xchg_ptr need full memory barrier
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*** 235,245 **** #else // __sync_lock_test_and_set is a bizarrely named atomic exchange // operation. Note that some platforms only support this with the // limitation that the only valid value to store is the immediate // constant 1. There is a test for this in JNI_CreateJavaVM(). ! return __sync_lock_test_and_set (dest, exchange_value); #endif // M68K #endif // ARM } inline intptr_t Atomic::xchg_ptr(intptr_t exchange_value, --- 235,251 ---- #else // __sync_lock_test_and_set is a bizarrely named atomic exchange // operation. Note that some platforms only support this with the // limitation that the only valid value to store is the immediate // constant 1. There is a test for this in JNI_CreateJavaVM(). ! jint result = __sync_lock_test_and_set (dest, exchange_value); ! // All atomic operations are expected to be full memory barriers ! // (see atomic.hpp). However, __sync_lock_test_and_set is not ! // a full memory barrier, but an acquire barrier. Hence, this added ! // barrier. ! __sync_synchronize(); ! return result; #endif // M68K #endif // ARM } inline intptr_t Atomic::xchg_ptr(intptr_t exchange_value,
*** 248,258 **** return arm_lock_test_and_set(dest, exchange_value); #else #ifdef M68K return m68k_lock_test_and_set(dest, exchange_value); #else ! return __sync_lock_test_and_set (dest, exchange_value); #endif // M68K #endif // ARM } inline void* Atomic::xchg_ptr(void* exchange_value, volatile void* dest) { --- 254,266 ---- return arm_lock_test_and_set(dest, exchange_value); #else #ifdef M68K return m68k_lock_test_and_set(dest, exchange_value); #else ! intptr_t result = __sync_lock_test_and_set (dest, exchange_value); ! __sync_synchronize(); ! return result; #endif // M68K #endif // ARM } inline void* Atomic::xchg_ptr(void* exchange_value, volatile void* dest) {