src/share/vm/opto/compile.hpp
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@@ -481,12 +481,10 @@
Matcher* _matcher; // Engine to map ideal to machine instructions
PhaseRegAlloc* _regalloc; // Results of register allocation.
int _frame_slots; // Size of total frame in stack slots
CodeOffsets _code_offsets; // Offsets into the code for various interesting entries
RegMask _FIRST_STACK_mask; // All stack slots usable for spills (depends on frame layout)
- Arena* _indexSet_arena; // control IndexSet allocation within PhaseChaitin
- void* _indexSet_free_block_list; // free list of IndexSet bit blocks
int _interpreter_frame_size;
uint _node_bundling_limit;
Bundle* _node_bundling_base; // Information for instruction bundling
@@ -966,12 +964,10 @@
PhaseRegAlloc* regalloc() { return _regalloc; }
int frame_slots() const { return _frame_slots; }
int frame_size_in_words() const; // frame_slots in units of the polymorphic 'words'
int frame_size_in_bytes() const { return _frame_slots << LogBytesPerInt; }
RegMask& FIRST_STACK_mask() { return _FIRST_STACK_mask; }
- Arena* indexSet_arena() { return _indexSet_arena; }
- void* indexSet_free_block_list() { return _indexSet_free_block_list; }
uint node_bundling_limit() { return _node_bundling_limit; }
Bundle* node_bundling_base() { return _node_bundling_base; }
void set_node_bundling_limit(uint n) { _node_bundling_limit = n; }
void set_node_bundling_base(Bundle* b) { _node_bundling_base = b; }
bool starts_bundle(const Node *n) const;
@@ -985,12 +981,10 @@
}
int bang_size_in_bytes() const;
void set_matcher(Matcher* m) { _matcher = m; }
//void set_regalloc(PhaseRegAlloc* ra) { _regalloc = ra; }
- void set_indexSet_arena(Arena* a) { _indexSet_arena = a; }
- void set_indexSet_free_block_list(void* p) { _indexSet_free_block_list = p; }
// Remember if this compilation changes hardware mode to 24-bit precision
void set_24_bit_selection_and_mode(bool selection, bool mode) {
_select_24_bit_instr = selection;
_in_24_bit_fp_mode = mode;