1 /* 2 * Copyright (c) 2000, 2016, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #ifndef CPU_X86_VM_GLOBALS_X86_HPP 26 #define CPU_X86_VM_GLOBALS_X86_HPP 27 28 #include "utilities/globalDefinitions.hpp" 29 #include "utilities/macros.hpp" 30 31 // Sets the default values for platform dependent flags used by the runtime system. 32 // (see globals.hpp) 33 34 define_pd_global(bool, ShareVtableStubs, true); 35 define_pd_global(bool, NeedsDeoptSuspend, false); // only register window machines need this 36 37 define_pd_global(bool, ImplicitNullChecks, true); // Generate code for implicit null checks 38 define_pd_global(bool, TrapBasedNullChecks, false); // Not needed on x86. 39 define_pd_global(bool, UncommonNullCast, true); // Uncommon-trap NULLs passed to check cast 40 41 // See 4827828 for this change. There is no globals_core_i486.hpp. I can't 42 // assign a different value for C2 without touching a number of files. Use 43 // #ifdef to minimize the change as it's late in Mantis. -- FIXME. 44 // c1 doesn't have this problem because the fix to 4858033 assures us 45 // the the vep is aligned at CodeEntryAlignment whereas c2 only aligns 46 // the uep and the vep doesn't get real alignment but just slops on by 47 // only assured that the entry instruction meets the 5 byte size requirement. 48 #if defined(COMPILER2) || INCLUDE_JVMCI 49 define_pd_global(intx, CodeEntryAlignment, 32); 50 #else 51 define_pd_global(intx, CodeEntryAlignment, 16); 52 #endif // COMPILER2 53 define_pd_global(intx, OptoLoopAlignment, 16); 54 define_pd_global(intx, InlineFrequencyCount, 100); 55 define_pd_global(intx, InlineSmallCode, 1000); 56 57 #define DEFAULT_STACK_YELLOW_PAGES (NOT_WINDOWS(2) WINDOWS_ONLY(3)) 58 #define DEFAULT_STACK_RED_PAGES (1) 59 #define DEFAULT_STACK_RESERVED_PAGES (NOT_WINDOWS(1) WINDOWS_ONLY(0)) 60 61 #define MIN_STACK_YELLOW_PAGES DEFAULT_STACK_YELLOW_PAGES 62 #define MIN_STACK_RED_PAGES DEFAULT_STACK_RED_PAGES 63 #define MIN_STACK_RESERVED_PAGES (0) 64 65 #ifdef AMD64 66 // Very large C++ stack frames using solaris-amd64 optimized builds 67 // due to lack of optimization caused by C++ compiler bugs 68 #define DEFAULT_STACK_SHADOW_PAGES (NOT_WIN64(20) WIN64_ONLY(6) DEBUG_ONLY(+2)) 69 // For those clients that do not use write socket, we allow 70 // the min range value to be below that of the default 71 #define MIN_STACK_SHADOW_PAGES (NOT_WIN64(10) WIN64_ONLY(6) DEBUG_ONLY(+2)) 72 #else 73 #define DEFAULT_STACK_SHADOW_PAGES (4 DEBUG_ONLY(+5)) 74 #define MIN_STACK_SHADOW_PAGES DEFAULT_STACK_SHADOW_PAGES 75 #endif // AMD64 76 77 define_pd_global(intx, StackYellowPages, DEFAULT_STACK_YELLOW_PAGES); 78 define_pd_global(intx, StackRedPages, DEFAULT_STACK_RED_PAGES); 79 define_pd_global(intx, StackShadowPages, DEFAULT_STACK_SHADOW_PAGES); 80 define_pd_global(intx, StackReservedPages, DEFAULT_STACK_RESERVED_PAGES); 81 82 define_pd_global(bool, RewriteBytecodes, true); 83 define_pd_global(bool, RewriteFrequentPairs, true); 84 85 #ifdef _ALLBSD_SOURCE 86 define_pd_global(bool, UseMembar, true); 87 #else 88 define_pd_global(bool, UseMembar, false); 89 #endif 90 91 // GC Ergo Flags 92 define_pd_global(size_t, CMSYoungGenPerWorker, 64*M); // default max size of CMS young gen, per GC worker thread 93 94 define_pd_global(uintx, TypeProfileLevel, 111); 95 96 define_pd_global(bool, CompactStrings, true); 97 98 define_pd_global(bool, PreserveFramePointer, false); 99 100 #define ARCH_FLAGS(develop, product, diagnostic, experimental, notproduct, range, constraint) \ 101 \ 102 develop(bool, IEEEPrecision, true, \ 103 "Enables IEEE precision (for INTEL only)") \ 104 \ 105 product(bool, UseStoreImmI16, true, \ 106 "Use store immediate 16-bits value instruction on x86") \ 107 \ 108 product(intx, UseAVX, 99, \ 109 "Highest supported AVX instructions set on x86/x64") \ 110 range(0, 99) \ 111 \ 112 product(bool, UseCLMUL, false, \ 113 "Control whether CLMUL instructions can be used on x86/x64") \ 114 \ 115 diagnostic(bool, UseIncDec, true, \ 116 "Use INC, DEC instructions on x86") \ 117 \ 118 product(bool, UseNewLongLShift, false, \ 119 "Use optimized bitwise shift left") \ 120 \ 121 product(bool, UseAddressNop, false, \ 122 "Use '0F 1F [addr]' NOP instructions on x86 cpus") \ 123 \ 124 product(bool, UseXmmLoadAndClearUpper, true, \ 125 "Load low part of XMM register and clear upper part") \ 126 \ 127 product(bool, UseXmmRegToRegMoveAll, false, \ 128 "Copy all XMM register bits when moving value between registers") \ 129 \ 130 product(bool, UseXmmI2D, false, \ 131 "Use SSE2 CVTDQ2PD instruction to convert Integer to Double") \ 132 \ 133 product(bool, UseXmmI2F, false, \ 134 "Use SSE2 CVTDQ2PS instruction to convert Integer to Float") \ 135 \ 136 product(bool, UseUnalignedLoadStores, false, \ 137 "Use SSE2 MOVDQU instruction for Arraycopy") \ 138 \ 139 product(bool, UseFastStosb, false, \ 140 "Use fast-string operation for zeroing: rep stosb") \ 141 \ 142 /* Use Restricted Transactional Memory for lock eliding */ \ 143 product(bool, UseRTMLocking, false, \ 144 "Enable RTM lock eliding for inflated locks in compiled code") \ 145 \ 146 experimental(bool, UseRTMForStackLocks, false, \ 147 "Enable RTM lock eliding for stack locks in compiled code") \ 148 \ 149 product(bool, UseRTMDeopt, false, \ 150 "Perform deopt and recompilation based on RTM abort ratio") \ 151 \ 152 product(uintx, RTMRetryCount, 5, \ 153 "Number of RTM retries on lock abort or busy") \ 154 range(0, max_uintx) \ 155 \ 156 experimental(intx, RTMSpinLoopCount, 100, \ 157 "Spin count for lock to become free before RTM retry") \ 158 \ 159 experimental(intx, RTMAbortThreshold, 1000, \ 160 "Calculate abort ratio after this number of aborts") \ 161 \ 162 experimental(intx, RTMLockingThreshold, 10000, \ 163 "Lock count at which to do RTM lock eliding without " \ 164 "abort ratio calculation") \ 165 \ 166 experimental(intx, RTMAbortRatio, 50, \ 167 "Lock abort ratio at which to stop use RTM lock eliding") \ 168 \ 169 experimental(intx, RTMTotalCountIncrRate, 64, \ 170 "Increment total RTM attempted lock count once every n times") \ 171 \ 172 experimental(intx, RTMLockingCalculationDelay, 0, \ 173 "Number of milliseconds to wait before start calculating aborts " \ 174 "for RTM locking") \ 175 \ 176 experimental(bool, UseRTMXendForLockBusy, true, \ 177 "Use RTM Xend instead of Xabort when lock busy") \ 178 \ 179 /* assembler */ \ 180 product(bool, UseCountLeadingZerosInstruction, false, \ 181 "Use count leading zeros instruction") \ 182 \ 183 product(bool, UseCountTrailingZerosInstruction, false, \ 184 "Use count trailing zeros instruction") \ 185 \ 186 product(bool, UseSSE42Intrinsics, false, \ 187 "SSE4.2 versions of intrinsics") \ 188 \ 189 product(bool, UseBMI1Instructions, false, \ 190 "Use BMI1 instructions") \ 191 \ 192 product(bool, UseBMI2Instructions, false, \ 193 "Use BMI2 instructions") \ 194 \ 195 diagnostic(bool, UseLibmSinIntrinsic, true, \ 196 "Use Libm Sin Intrinsic") \ 197 \ 198 diagnostic(bool, UseLibmCosIntrinsic, true, \ 199 "Use Libm Cos Intrinsic") 200 #endif // CPU_X86_VM_GLOBALS_X86_HPP