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src/share/vm/opto/matcher.hpp

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 382   // (what you use when intercalling between Java and C++ code)
 383 
 384   // Array mapping arguments to registers.  Argument 0 is usually the 'this'
 385   // pointer.  Registers can include stack-slots and regular registers.
 386   static void c_calling_convention( BasicType*, VMRegPair *, uint );
 387   // Frame pointer. The frame pointer is kept at the base of the stack
 388   // and so is probably the stack pointer for most machines.  On Intel
 389   // it is ESP.  On the PowerPC it is R1.  On Sparc it is SP.
 390   OptoReg::Name  c_frame_pointer() const;
 391   static RegMask c_frame_ptr_mask;
 392 
 393   // !!!!! Special stuff for building ScopeDescs
 394   virtual int      regnum_to_fpu_offset(int regnum);
 395 
 396   // Is this branch offset small enough to be addressed by a short branch?
 397   bool is_short_branch_offset(int rule, int br_size, int offset);
 398 
 399   // Optional scaling for the parameter to the ClearArray/CopyArray node.
 400   static const bool init_array_count_is_in_bytes;
 401 
 402   // Threshold small size (in bytes) for a ClearArray/CopyArray node.
 403   // Anything this size or smaller may get converted to discrete scalar stores.
 404   static const int init_array_short_size;
 405 
 406   // Some hardware needs 2 CMOV's for longs.
 407   static const int long_cmove_cost();
 408 
 409   // Some hardware have expensive CMOV for float and double.
 410   static const int float_cmove_cost();
 411 
 412   // Should the Matcher clone shifts on addressing modes, expecting them to
 413   // be subsumed into complex addressing expressions or compute them into
 414   // registers?  True for Intel but false for most RISCs
 415   static const bool clone_shift_expressions;
 416 
 417   static bool narrow_oop_use_complex_address();
 418   static bool narrow_klass_use_complex_address();
 419 
 420   // Generate implicit null check for narrow oops if it can fold
 421   // into address expression (x64).
 422   //
 423   // [R12 + narrow_oop_reg<<3 + offset] // fold into address expression
 424   // NullCheck narrow_oop_reg
 425   //




 382   // (what you use when intercalling between Java and C++ code)
 383 
 384   // Array mapping arguments to registers.  Argument 0 is usually the 'this'
 385   // pointer.  Registers can include stack-slots and regular registers.
 386   static void c_calling_convention( BasicType*, VMRegPair *, uint );
 387   // Frame pointer. The frame pointer is kept at the base of the stack
 388   // and so is probably the stack pointer for most machines.  On Intel
 389   // it is ESP.  On the PowerPC it is R1.  On Sparc it is SP.
 390   OptoReg::Name  c_frame_pointer() const;
 391   static RegMask c_frame_ptr_mask;
 392 
 393   // !!!!! Special stuff for building ScopeDescs
 394   virtual int      regnum_to_fpu_offset(int regnum);
 395 
 396   // Is this branch offset small enough to be addressed by a short branch?
 397   bool is_short_branch_offset(int rule, int br_size, int offset);
 398 
 399   // Optional scaling for the parameter to the ClearArray/CopyArray node.
 400   static const bool init_array_count_is_in_bytes;
 401 




 402   // Some hardware needs 2 CMOV's for longs.
 403   static const int long_cmove_cost();
 404 
 405   // Some hardware have expensive CMOV for float and double.
 406   static const int float_cmove_cost();
 407 
 408   // Should the Matcher clone shifts on addressing modes, expecting them to
 409   // be subsumed into complex addressing expressions or compute them into
 410   // registers?  True for Intel but false for most RISCs
 411   static const bool clone_shift_expressions;
 412 
 413   static bool narrow_oop_use_complex_address();
 414   static bool narrow_klass_use_complex_address();
 415 
 416   // Generate implicit null check for narrow oops if it can fold
 417   // into address expression (x64).
 418   //
 419   // [R12 + narrow_oop_reg<<3 + offset] // fold into address expression
 420   // NullCheck narrow_oop_reg
 421   //


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