src/hotspot/cpu/x86/assembler_x86.cpp

rev 48409 : imported patch arraycopy-base

*** 2154,2163 ****
--- 2154,2171 ----
    emit_int8(0x0F);
    emit_int8((unsigned char)0xAE);
    emit_int8((unsigned char)0xF0);
  }
  
+ // Emit sfence instruction
+ void Assembler::sfence() {
+   NOT_LP64(assert(VM_Version::supports_sse2(), "unsupported");)
+   emit_int8(0x0F);
+   emit_int8((unsigned char)0xAE);
+   emit_int8((unsigned char)0xF8);
+ }
+ 
  void Assembler::mov(Register dst, Register src) {
    LP64_ONLY(movq(dst, src)) NOT_LP64(movl(dst, src));
  }
  
  void Assembler::movapd(XMMRegister dst, XMMRegister src) {
*** 2505,2514 ****
--- 2513,2546 ----
    vex_prefix(dst, 0, src->encoding(), VEX_SIMD_F3, VEX_OPCODE_0F, &attributes);
    emit_int8(0x7F);
    emit_operand(src, dst);
  }
  
+ void Assembler::vmovdqa(Address dst, XMMRegister src) {
+   assert(UseAVX > 0, "");
+   InstructionMark im(this);
+   InstructionAttr attributes(AVX_256bit, /* vex_w */ false, /* legacy_mode */ false, /* no_mask_reg */ false, /* uses_vl */ true);
+   attributes.set_address_attributes(/* tuple_type */ EVEX_FVM, /* input_size_in_bits */ EVEX_NObit);
+   // swap src<->dst for encoding
+   assert(src != xnoreg, "sanity");
+   vex_prefix(dst, 0, src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F, &attributes);
+   emit_int8(0x7F);
+   emit_operand(src, dst);
+ }
+ 
+ void Assembler::vmovntpd(Address dst, XMMRegister src) {
+   assert(UseAVX > 0, "");
+   InstructionMark im(this);
+   InstructionAttr attributes(AVX_256bit, /* vex_w */ false, /* legacy_mode */ false, /* no_mask_reg */ false, /* uses_vl */ true);
+   attributes.set_address_attributes(/* tuple_type */ EVEX_FVM, /* input_size_in_bits */ EVEX_NObit);
+   // swap src<->dst for encoding
+   assert(src != xnoreg, "sanity");
+   vex_prefix(dst, 0, src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F, &attributes);
+   emit_int8(0x2B);
+   emit_operand(src, dst);
+ }
+ 
  // Move Unaligned EVEX enabled Vector (programmable : 8,16,32,64)
  void Assembler::evmovdqub(XMMRegister dst, XMMRegister src, int vector_len) {
    assert(VM_Version::supports_evex(), "");
    InstructionAttr attributes(vector_len, /* vex_w */ false, /* legacy_mode */ _legacy_mode_bw, /* no_mask_reg */ true, /* uses_vl */ true);
    attributes.set_is_evex_instruction();