1 /*
2 * Copyright (c) 2003, 2017, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/macroAssembler.hpp"
27 #include "asm/macroAssembler.inline.hpp"
28 #include "interpreter/interpreter.hpp"
29 #include "nativeInst_x86.hpp"
30 #include "oops/instanceOop.hpp"
31 #include "oops/method.hpp"
32 #include "oops/objArrayKlass.hpp"
33 #include "oops/oop.inline.hpp"
34 #include "prims/methodHandles.hpp"
35 #include "runtime/frame.inline.hpp"
36 #include "runtime/handles.inline.hpp"
37 #include "runtime/sharedRuntime.hpp"
38 #include "runtime/stubCodeGenerator.hpp"
39 #include "runtime/stubRoutines.hpp"
40 #include "runtime/thread.inline.hpp"
41 #ifdef COMPILER2
42 #include "opto/runtime.hpp"
43 #endif
44
45 // Declaration and definition of StubGenerator (no .hpp file).
46 // For a more detailed description of the stub routine structure
47 // see the comment in stubRoutines.hpp
48
49 #define __ _masm->
50 #define TIMES_OOP (UseCompressedOops ? Address::times_4 : Address::times_8)
51 #define a__ ((Assembler*)_masm)->
52
53 #ifdef PRODUCT
54 #define BLOCK_COMMENT(str) /* nothing */
55 #else
56 #define BLOCK_COMMENT(str) __ block_comment(str)
57 #endif
58
59 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
60 const int MXCSR_MASK = 0xFFC0; // Mask out any pending exceptions
61
62 // Stub Code definitions
63
64 class StubGenerator: public StubCodeGenerator {
65 private:
66
67 #ifdef PRODUCT
68 #define inc_counter_np(counter) ((void)0)
69 #else
70 void inc_counter_np_(int& counter) {
71 // This can destroy rscratch1 if counter is far from the code cache
72 __ incrementl(ExternalAddress((address)&counter));
73 }
74 #define inc_counter_np(counter) \
75 BLOCK_COMMENT("inc_counter " #counter); \
76 inc_counter_np_(counter);
77 #endif
78
79 // Call stubs are used to call Java from C
80 //
81 // Linux Arguments:
82 // c_rarg0: call wrapper address address
83 // c_rarg1: result address
84 // c_rarg2: result type BasicType
85 // c_rarg3: method Method*
86 // c_rarg4: (interpreter) entry point address
87 // c_rarg5: parameters intptr_t*
88 // 16(rbp): parameter size (in words) int
89 // 24(rbp): thread Thread*
90 //
91 // [ return_from_Java ] <--- rsp
92 // [ argument word n ]
93 // ...
94 // -12 [ argument word 1 ]
95 // -11 [ saved r15 ] <--- rsp_after_call
96 // -10 [ saved r14 ]
97 // -9 [ saved r13 ]
98 // -8 [ saved r12 ]
99 // -7 [ saved rbx ]
100 // -6 [ call wrapper ]
101 // -5 [ result ]
102 // -4 [ result type ]
103 // -3 [ method ]
104 // -2 [ entry point ]
105 // -1 [ parameters ]
106 // 0 [ saved rbp ] <--- rbp
107 // 1 [ return address ]
108 // 2 [ parameter size ]
109 // 3 [ thread ]
110 //
111 // Windows Arguments:
112 // c_rarg0: call wrapper address address
113 // c_rarg1: result address
114 // c_rarg2: result type BasicType
115 // c_rarg3: method Method*
116 // 48(rbp): (interpreter) entry point address
117 // 56(rbp): parameters intptr_t*
118 // 64(rbp): parameter size (in words) int
119 // 72(rbp): thread Thread*
120 //
121 // [ return_from_Java ] <--- rsp
122 // [ argument word n ]
123 // ...
124 // -60 [ argument word 1 ]
125 // -59 [ saved xmm31 ] <--- rsp after_call
126 // [ saved xmm16-xmm30 ] (EVEX enabled, else the space is blank)
127 // -27 [ saved xmm15 ]
128 // [ saved xmm7-xmm14 ]
129 // -9 [ saved xmm6 ] (each xmm register takes 2 slots)
130 // -7 [ saved r15 ]
131 // -6 [ saved r14 ]
132 // -5 [ saved r13 ]
133 // -4 [ saved r12 ]
134 // -3 [ saved rdi ]
135 // -2 [ saved rsi ]
136 // -1 [ saved rbx ]
137 // 0 [ saved rbp ] <--- rbp
138 // 1 [ return address ]
139 // 2 [ call wrapper ]
140 // 3 [ result ]
141 // 4 [ result type ]
142 // 5 [ method ]
143 // 6 [ entry point ]
144 // 7 [ parameters ]
145 // 8 [ parameter size ]
146 // 9 [ thread ]
147 //
148 // Windows reserves the callers stack space for arguments 1-4.
149 // We spill c_rarg0-c_rarg3 to this space.
150
151 // Call stub stack layout word offsets from rbp
152 enum call_stub_layout {
153 #ifdef _WIN64
154 xmm_save_first = 6, // save from xmm6
155 xmm_save_last = 31, // to xmm31
156 xmm_save_base = -9,
157 rsp_after_call_off = xmm_save_base - 2 * (xmm_save_last - xmm_save_first), // -27
158 r15_off = -7,
159 r14_off = -6,
160 r13_off = -5,
161 r12_off = -4,
162 rdi_off = -3,
163 rsi_off = -2,
164 rbx_off = -1,
165 rbp_off = 0,
166 retaddr_off = 1,
167 call_wrapper_off = 2,
168 result_off = 3,
169 result_type_off = 4,
170 method_off = 5,
171 entry_point_off = 6,
172 parameters_off = 7,
173 parameter_size_off = 8,
174 thread_off = 9
175 #else
176 rsp_after_call_off = -12,
177 mxcsr_off = rsp_after_call_off,
178 r15_off = -11,
179 r14_off = -10,
180 r13_off = -9,
181 r12_off = -8,
182 rbx_off = -7,
183 call_wrapper_off = -6,
184 result_off = -5,
185 result_type_off = -4,
186 method_off = -3,
187 entry_point_off = -2,
188 parameters_off = -1,
189 rbp_off = 0,
190 retaddr_off = 1,
191 parameter_size_off = 2,
192 thread_off = 3
193 #endif
194 };
195
196 #ifdef _WIN64
197 Address xmm_save(int reg) {
198 assert(reg >= xmm_save_first && reg <= xmm_save_last, "XMM register number out of range");
199 return Address(rbp, (xmm_save_base - (reg - xmm_save_first) * 2) * wordSize);
200 }
201 #endif
202
203 address generate_call_stub(address& return_address) {
204 assert((int)frame::entry_frame_after_call_words == -(int)rsp_after_call_off + 1 &&
205 (int)frame::entry_frame_call_wrapper_offset == (int)call_wrapper_off,
206 "adjust this code");
207 StubCodeMark mark(this, "StubRoutines", "call_stub");
208 address start = __ pc();
209
210 // same as in generate_catch_exception()!
211 const Address rsp_after_call(rbp, rsp_after_call_off * wordSize);
212
213 const Address call_wrapper (rbp, call_wrapper_off * wordSize);
214 const Address result (rbp, result_off * wordSize);
215 const Address result_type (rbp, result_type_off * wordSize);
216 const Address method (rbp, method_off * wordSize);
217 const Address entry_point (rbp, entry_point_off * wordSize);
218 const Address parameters (rbp, parameters_off * wordSize);
219 const Address parameter_size(rbp, parameter_size_off * wordSize);
220
221 // same as in generate_catch_exception()!
222 const Address thread (rbp, thread_off * wordSize);
223
224 const Address r15_save(rbp, r15_off * wordSize);
225 const Address r14_save(rbp, r14_off * wordSize);
226 const Address r13_save(rbp, r13_off * wordSize);
227 const Address r12_save(rbp, r12_off * wordSize);
228 const Address rbx_save(rbp, rbx_off * wordSize);
229
230 // stub code
231 __ enter();
232 __ subptr(rsp, -rsp_after_call_off * wordSize);
233
234 // save register parameters
235 #ifndef _WIN64
236 __ movptr(parameters, c_rarg5); // parameters
237 __ movptr(entry_point, c_rarg4); // entry_point
238 #endif
239
240 __ movptr(method, c_rarg3); // method
241 __ movl(result_type, c_rarg2); // result type
242 __ movptr(result, c_rarg1); // result
243 __ movptr(call_wrapper, c_rarg0); // call wrapper
244
245 // save regs belonging to calling function
246 __ movptr(rbx_save, rbx);
247 __ movptr(r12_save, r12);
248 __ movptr(r13_save, r13);
249 __ movptr(r14_save, r14);
250 __ movptr(r15_save, r15);
251 if (UseAVX > 2) {
252 __ movl(rbx, 0xffff);
253 __ kmovwl(k1, rbx);
254 }
255 #ifdef _WIN64
256 int last_reg = 15;
257 if (UseAVX > 2) {
258 last_reg = 31;
259 }
260 if (VM_Version::supports_evex()) {
261 for (int i = xmm_save_first; i <= last_reg; i++) {
262 __ vextractf32x4(xmm_save(i), as_XMMRegister(i), 0);
263 }
264 } else {
265 for (int i = xmm_save_first; i <= last_reg; i++) {
266 __ movdqu(xmm_save(i), as_XMMRegister(i));
267 }
268 }
269
270 const Address rdi_save(rbp, rdi_off * wordSize);
271 const Address rsi_save(rbp, rsi_off * wordSize);
272
273 __ movptr(rsi_save, rsi);
274 __ movptr(rdi_save, rdi);
275 #else
276 const Address mxcsr_save(rbp, mxcsr_off * wordSize);
277 {
278 Label skip_ldmx;
279 __ stmxcsr(mxcsr_save);
280 __ movl(rax, mxcsr_save);
281 __ andl(rax, MXCSR_MASK); // Only check control and mask bits
282 ExternalAddress mxcsr_std(StubRoutines::addr_mxcsr_std());
283 __ cmp32(rax, mxcsr_std);
284 __ jcc(Assembler::equal, skip_ldmx);
285 __ ldmxcsr(mxcsr_std);
286 __ bind(skip_ldmx);
287 }
288 #endif
289
290 // Load up thread register
291 __ movptr(r15_thread, thread);
292 __ reinit_heapbase();
293
294 #ifdef ASSERT
295 // make sure we have no pending exceptions
296 {
297 Label L;
298 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
299 __ jcc(Assembler::equal, L);
300 __ stop("StubRoutines::call_stub: entered with pending exception");
301 __ bind(L);
302 }
303 #endif
304
305 // pass parameters if any
306 BLOCK_COMMENT("pass parameters if any");
307 Label parameters_done;
308 __ movl(c_rarg3, parameter_size);
309 __ testl(c_rarg3, c_rarg3);
310 __ jcc(Assembler::zero, parameters_done);
311
312 Label loop;
313 __ movptr(c_rarg2, parameters); // parameter pointer
314 __ movl(c_rarg1, c_rarg3); // parameter counter is in c_rarg1
315 __ BIND(loop);
316 __ movptr(rax, Address(c_rarg2, 0));// get parameter
317 __ addptr(c_rarg2, wordSize); // advance to next parameter
318 __ decrementl(c_rarg1); // decrement counter
319 __ push(rax); // pass parameter
320 __ jcc(Assembler::notZero, loop);
321
322 // call Java function
323 __ BIND(parameters_done);
324 __ movptr(rbx, method); // get Method*
325 __ movptr(c_rarg1, entry_point); // get entry_point
326 __ mov(r13, rsp); // set sender sp
327 BLOCK_COMMENT("call Java function");
328 __ call(c_rarg1);
329
330 BLOCK_COMMENT("call_stub_return_address:");
331 return_address = __ pc();
332
333 // store result depending on type (everything that is not
334 // T_OBJECT, T_LONG, T_FLOAT or T_DOUBLE is treated as T_INT)
335 __ movptr(c_rarg0, result);
336 Label is_long, is_float, is_double, exit;
337 __ movl(c_rarg1, result_type);
338 __ cmpl(c_rarg1, T_OBJECT);
339 __ jcc(Assembler::equal, is_long);
340 __ cmpl(c_rarg1, T_LONG);
341 __ jcc(Assembler::equal, is_long);
342 __ cmpl(c_rarg1, T_FLOAT);
343 __ jcc(Assembler::equal, is_float);
344 __ cmpl(c_rarg1, T_DOUBLE);
345 __ jcc(Assembler::equal, is_double);
346
347 // handle T_INT case
348 __ movl(Address(c_rarg0, 0), rax);
349
350 __ BIND(exit);
351
352 // pop parameters
353 __ lea(rsp, rsp_after_call);
354
355 #ifdef ASSERT
356 // verify that threads correspond
357 {
358 Label L1, L2, L3;
359 __ cmpptr(r15_thread, thread);
360 __ jcc(Assembler::equal, L1);
361 __ stop("StubRoutines::call_stub: r15_thread is corrupted");
362 __ bind(L1);
363 __ get_thread(rbx);
364 __ cmpptr(r15_thread, thread);
365 __ jcc(Assembler::equal, L2);
366 __ stop("StubRoutines::call_stub: r15_thread is modified by call");
367 __ bind(L2);
368 __ cmpptr(r15_thread, rbx);
369 __ jcc(Assembler::equal, L3);
370 __ stop("StubRoutines::call_stub: threads must correspond");
371 __ bind(L3);
372 }
373 #endif
374
375 // restore regs belonging to calling function
376 #ifdef _WIN64
377 // emit the restores for xmm regs
378 if (VM_Version::supports_evex()) {
379 for (int i = xmm_save_first; i <= last_reg; i++) {
380 __ vinsertf32x4(as_XMMRegister(i), as_XMMRegister(i), xmm_save(i), 0);
381 }
382 } else {
383 for (int i = xmm_save_first; i <= last_reg; i++) {
384 __ movdqu(as_XMMRegister(i), xmm_save(i));
385 }
386 }
387 #endif
388 __ movptr(r15, r15_save);
389 __ movptr(r14, r14_save);
390 __ movptr(r13, r13_save);
391 __ movptr(r12, r12_save);
392 __ movptr(rbx, rbx_save);
393
394 #ifdef _WIN64
395 __ movptr(rdi, rdi_save);
396 __ movptr(rsi, rsi_save);
397 #else
398 __ ldmxcsr(mxcsr_save);
399 #endif
400
401 // restore rsp
402 __ addptr(rsp, -rsp_after_call_off * wordSize);
403
404 // return
405 __ vzeroupper();
406 __ pop(rbp);
407 __ ret(0);
408
409 // handle return types different from T_INT
410 __ BIND(is_long);
411 __ movq(Address(c_rarg0, 0), rax);
412 __ jmp(exit);
413
414 __ BIND(is_float);
415 __ movflt(Address(c_rarg0, 0), xmm0);
416 __ jmp(exit);
417
418 __ BIND(is_double);
419 __ movdbl(Address(c_rarg0, 0), xmm0);
420 __ jmp(exit);
421
422 return start;
423 }
424
425 // Return point for a Java call if there's an exception thrown in
426 // Java code. The exception is caught and transformed into a
427 // pending exception stored in JavaThread that can be tested from
428 // within the VM.
429 //
430 // Note: Usually the parameters are removed by the callee. In case
431 // of an exception crossing an activation frame boundary, that is
432 // not the case if the callee is compiled code => need to setup the
433 // rsp.
434 //
435 // rax: exception oop
436
437 address generate_catch_exception() {
438 StubCodeMark mark(this, "StubRoutines", "catch_exception");
439 address start = __ pc();
440
441 // same as in generate_call_stub():
442 const Address rsp_after_call(rbp, rsp_after_call_off * wordSize);
443 const Address thread (rbp, thread_off * wordSize);
444
445 #ifdef ASSERT
446 // verify that threads correspond
447 {
448 Label L1, L2, L3;
449 __ cmpptr(r15_thread, thread);
450 __ jcc(Assembler::equal, L1);
451 __ stop("StubRoutines::catch_exception: r15_thread is corrupted");
452 __ bind(L1);
453 __ get_thread(rbx);
454 __ cmpptr(r15_thread, thread);
455 __ jcc(Assembler::equal, L2);
456 __ stop("StubRoutines::catch_exception: r15_thread is modified by call");
457 __ bind(L2);
458 __ cmpptr(r15_thread, rbx);
459 __ jcc(Assembler::equal, L3);
460 __ stop("StubRoutines::catch_exception: threads must correspond");
461 __ bind(L3);
462 }
463 #endif
464
465 // set pending exception
466 __ verify_oop(rax);
467
468 __ movptr(Address(r15_thread, Thread::pending_exception_offset()), rax);
469 __ lea(rscratch1, ExternalAddress((address)__FILE__));
470 __ movptr(Address(r15_thread, Thread::exception_file_offset()), rscratch1);
471 __ movl(Address(r15_thread, Thread::exception_line_offset()), (int) __LINE__);
472
473 // complete return to VM
474 assert(StubRoutines::_call_stub_return_address != NULL,
475 "_call_stub_return_address must have been generated before");
476 __ jump(RuntimeAddress(StubRoutines::_call_stub_return_address));
477
478 return start;
479 }
480
481 // Continuation point for runtime calls returning with a pending
482 // exception. The pending exception check happened in the runtime
483 // or native call stub. The pending exception in Thread is
484 // converted into a Java-level exception.
485 //
486 // Contract with Java-level exception handlers:
487 // rax: exception
488 // rdx: throwing pc
489 //
490 // NOTE: At entry of this stub, exception-pc must be on stack !!
491
492 address generate_forward_exception() {
493 StubCodeMark mark(this, "StubRoutines", "forward exception");
494 address start = __ pc();
495
496 // Upon entry, the sp points to the return address returning into
497 // Java (interpreted or compiled) code; i.e., the return address
498 // becomes the throwing pc.
499 //
500 // Arguments pushed before the runtime call are still on the stack
501 // but the exception handler will reset the stack pointer ->
502 // ignore them. A potential result in registers can be ignored as
503 // well.
504
505 #ifdef ASSERT
506 // make sure this code is only executed if there is a pending exception
507 {
508 Label L;
509 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t) NULL);
510 __ jcc(Assembler::notEqual, L);
511 __ stop("StubRoutines::forward exception: no pending exception (1)");
512 __ bind(L);
513 }
514 #endif
515
516 // compute exception handler into rbx
517 __ movptr(c_rarg0, Address(rsp, 0));
518 BLOCK_COMMENT("call exception_handler_for_return_address");
519 __ call_VM_leaf(CAST_FROM_FN_PTR(address,
520 SharedRuntime::exception_handler_for_return_address),
521 r15_thread, c_rarg0);
522 __ mov(rbx, rax);
523
524 // setup rax & rdx, remove return address & clear pending exception
525 __ pop(rdx);
526 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
527 __ movptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
528
529 #ifdef ASSERT
530 // make sure exception is set
531 {
532 Label L;
533 __ testptr(rax, rax);
534 __ jcc(Assembler::notEqual, L);
535 __ stop("StubRoutines::forward exception: no pending exception (2)");
536 __ bind(L);
537 }
538 #endif
539
540 // continue at exception handler (return address removed)
541 // rax: exception
542 // rbx: exception handler
543 // rdx: throwing pc
544 __ verify_oop(rax);
545 __ jmp(rbx);
546
547 return start;
548 }
549
550 // Support for jint atomic::xchg(jint exchange_value, volatile jint* dest)
551 //
552 // Arguments :
553 // c_rarg0: exchange_value
554 // c_rarg0: dest
555 //
556 // Result:
557 // *dest <- ex, return (orig *dest)
558 address generate_atomic_xchg() {
559 StubCodeMark mark(this, "StubRoutines", "atomic_xchg");
560 address start = __ pc();
561
562 __ movl(rax, c_rarg0); // Copy to eax we need a return value anyhow
563 __ xchgl(rax, Address(c_rarg1, 0)); // automatic LOCK
564 __ ret(0);
565
566 return start;
567 }
568
569 // Support for intptr_t atomic::xchg_long(jlong exchange_value, volatile jlong* dest)
570 //
571 // Arguments :
572 // c_rarg0: exchange_value
573 // c_rarg1: dest
574 //
575 // Result:
576 // *dest <- ex, return (orig *dest)
577 address generate_atomic_xchg_long() {
578 StubCodeMark mark(this, "StubRoutines", "atomic_xchg_long");
579 address start = __ pc();
580
581 __ movptr(rax, c_rarg0); // Copy to eax we need a return value anyhow
582 __ xchgptr(rax, Address(c_rarg1, 0)); // automatic LOCK
583 __ ret(0);
584
585 return start;
586 }
587
588 // Support for jint atomic::atomic_cmpxchg(jint exchange_value, volatile jint* dest,
589 // jint compare_value)
590 //
591 // Arguments :
592 // c_rarg0: exchange_value
593 // c_rarg1: dest
594 // c_rarg2: compare_value
595 //
596 // Result:
597 // if ( compare_value == *dest ) {
598 // *dest = exchange_value
599 // return compare_value;
600 // else
601 // return *dest;
602 address generate_atomic_cmpxchg() {
603 StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg");
604 address start = __ pc();
605
606 __ movl(rax, c_rarg2);
607 if ( os::is_MP() ) __ lock();
608 __ cmpxchgl(c_rarg0, Address(c_rarg1, 0));
609 __ ret(0);
610
611 return start;
612 }
613
614 // Support for int8_t atomic::atomic_cmpxchg(int8_t exchange_value, volatile int8_t* dest,
615 // int8_t compare_value)
616 //
617 // Arguments :
618 // c_rarg0: exchange_value
619 // c_rarg1: dest
620 // c_rarg2: compare_value
621 //
622 // Result:
623 // if ( compare_value == *dest ) {
624 // *dest = exchange_value
625 // return compare_value;
626 // else
627 // return *dest;
628 address generate_atomic_cmpxchg_byte() {
629 StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg_byte");
630 address start = __ pc();
631
632 __ movsbq(rax, c_rarg2);
633 if ( os::is_MP() ) __ lock();
634 __ cmpxchgb(c_rarg0, Address(c_rarg1, 0));
635 __ ret(0);
636
637 return start;
638 }
639
640 // Support for int64_t atomic::atomic_cmpxchg(int64_t exchange_value,
641 // volatile int64_t* dest,
642 // int64_t compare_value)
643 // Arguments :
644 // c_rarg0: exchange_value
645 // c_rarg1: dest
646 // c_rarg2: compare_value
647 //
648 // Result:
649 // if ( compare_value == *dest ) {
650 // *dest = exchange_value
651 // return compare_value;
652 // else
653 // return *dest;
654 address generate_atomic_cmpxchg_long() {
655 StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg_long");
656 address start = __ pc();
657
658 __ movq(rax, c_rarg2);
659 if ( os::is_MP() ) __ lock();
660 __ cmpxchgq(c_rarg0, Address(c_rarg1, 0));
661 __ ret(0);
662
663 return start;
664 }
665
666 // Support for jint atomic::add(jint add_value, volatile jint* dest)
667 //
668 // Arguments :
669 // c_rarg0: add_value
670 // c_rarg1: dest
671 //
672 // Result:
673 // *dest += add_value
674 // return *dest;
675 address generate_atomic_add() {
676 StubCodeMark mark(this, "StubRoutines", "atomic_add");
677 address start = __ pc();
678
679 __ movl(rax, c_rarg0);
680 if ( os::is_MP() ) __ lock();
681 __ xaddl(Address(c_rarg1, 0), c_rarg0);
682 __ addl(rax, c_rarg0);
683 __ ret(0);
684
685 return start;
686 }
687
688 // Support for intptr_t atomic::add_ptr(intptr_t add_value, volatile intptr_t* dest)
689 //
690 // Arguments :
691 // c_rarg0: add_value
692 // c_rarg1: dest
693 //
694 // Result:
695 // *dest += add_value
696 // return *dest;
697 address generate_atomic_add_long() {
698 StubCodeMark mark(this, "StubRoutines", "atomic_add_long");
699 address start = __ pc();
700
701 __ movptr(rax, c_rarg0); // Copy to eax we need a return value anyhow
702 if ( os::is_MP() ) __ lock();
703 __ xaddptr(Address(c_rarg1, 0), c_rarg0);
704 __ addptr(rax, c_rarg0);
705 __ ret(0);
706
707 return start;
708 }
709
710 // Support for intptr_t OrderAccess::fence()
711 //
712 // Arguments :
713 //
714 // Result:
715 address generate_orderaccess_fence() {
716 StubCodeMark mark(this, "StubRoutines", "orderaccess_fence");
717 address start = __ pc();
718 __ membar(Assembler::StoreLoad);
719 __ ret(0);
720
721 return start;
722 }
723
724 // Support for intptr_t get_previous_fp()
725 //
726 // This routine is used to find the previous frame pointer for the
727 // caller (current_frame_guess). This is used as part of debugging
728 // ps() is seemingly lost trying to find frames.
729 // This code assumes that caller current_frame_guess) has a frame.
730 address generate_get_previous_fp() {
731 StubCodeMark mark(this, "StubRoutines", "get_previous_fp");
732 const Address old_fp(rbp, 0);
733 const Address older_fp(rax, 0);
734 address start = __ pc();
735
736 __ enter();
737 __ movptr(rax, old_fp); // callers fp
738 __ movptr(rax, older_fp); // the frame for ps()
739 __ pop(rbp);
740 __ ret(0);
741
742 return start;
743 }
744
745 // Support for intptr_t get_previous_sp()
746 //
747 // This routine is used to find the previous stack pointer for the
748 // caller.
749 address generate_get_previous_sp() {
750 StubCodeMark mark(this, "StubRoutines", "get_previous_sp");
751 address start = __ pc();
752
753 __ movptr(rax, rsp);
754 __ addptr(rax, 8); // return address is at the top of the stack.
755 __ ret(0);
756
757 return start;
758 }
759
760 //----------------------------------------------------------------------------------------------------
761 // Support for void verify_mxcsr()
762 //
763 // This routine is used with -Xcheck:jni to verify that native
764 // JNI code does not return to Java code without restoring the
765 // MXCSR register to our expected state.
766
767 address generate_verify_mxcsr() {
768 StubCodeMark mark(this, "StubRoutines", "verify_mxcsr");
769 address start = __ pc();
770
771 const Address mxcsr_save(rsp, 0);
772
773 if (CheckJNICalls) {
774 Label ok_ret;
775 ExternalAddress mxcsr_std(StubRoutines::addr_mxcsr_std());
776 __ push(rax);
777 __ subptr(rsp, wordSize); // allocate a temp location
778 __ stmxcsr(mxcsr_save);
779 __ movl(rax, mxcsr_save);
780 __ andl(rax, MXCSR_MASK); // Only check control and mask bits
781 __ cmp32(rax, mxcsr_std);
782 __ jcc(Assembler::equal, ok_ret);
783
784 __ warn("MXCSR changed by native JNI code, use -XX:+RestoreMXCSROnJNICall");
785
786 __ ldmxcsr(mxcsr_std);
787
788 __ bind(ok_ret);
789 __ addptr(rsp, wordSize);
790 __ pop(rax);
791 }
792
793 __ ret(0);
794
795 return start;
796 }
797
798 address generate_f2i_fixup() {
799 StubCodeMark mark(this, "StubRoutines", "f2i_fixup");
800 Address inout(rsp, 5 * wordSize); // return address + 4 saves
801
802 address start = __ pc();
803
804 Label L;
805
806 __ push(rax);
807 __ push(c_rarg3);
808 __ push(c_rarg2);
809 __ push(c_rarg1);
810
811 __ movl(rax, 0x7f800000);
812 __ xorl(c_rarg3, c_rarg3);
813 __ movl(c_rarg2, inout);
814 __ movl(c_rarg1, c_rarg2);
815 __ andl(c_rarg1, 0x7fffffff);
816 __ cmpl(rax, c_rarg1); // NaN? -> 0
817 __ jcc(Assembler::negative, L);
818 __ testl(c_rarg2, c_rarg2); // signed ? min_jint : max_jint
819 __ movl(c_rarg3, 0x80000000);
820 __ movl(rax, 0x7fffffff);
821 __ cmovl(Assembler::positive, c_rarg3, rax);
822
823 __ bind(L);
824 __ movptr(inout, c_rarg3);
825
826 __ pop(c_rarg1);
827 __ pop(c_rarg2);
828 __ pop(c_rarg3);
829 __ pop(rax);
830
831 __ ret(0);
832
833 return start;
834 }
835
836 address generate_f2l_fixup() {
837 StubCodeMark mark(this, "StubRoutines", "f2l_fixup");
838 Address inout(rsp, 5 * wordSize); // return address + 4 saves
839 address start = __ pc();
840
841 Label L;
842
843 __ push(rax);
844 __ push(c_rarg3);
845 __ push(c_rarg2);
846 __ push(c_rarg1);
847
848 __ movl(rax, 0x7f800000);
849 __ xorl(c_rarg3, c_rarg3);
850 __ movl(c_rarg2, inout);
851 __ movl(c_rarg1, c_rarg2);
852 __ andl(c_rarg1, 0x7fffffff);
853 __ cmpl(rax, c_rarg1); // NaN? -> 0
854 __ jcc(Assembler::negative, L);
855 __ testl(c_rarg2, c_rarg2); // signed ? min_jlong : max_jlong
856 __ mov64(c_rarg3, 0x8000000000000000);
857 __ mov64(rax, 0x7fffffffffffffff);
858 __ cmov(Assembler::positive, c_rarg3, rax);
859
860 __ bind(L);
861 __ movptr(inout, c_rarg3);
862
863 __ pop(c_rarg1);
864 __ pop(c_rarg2);
865 __ pop(c_rarg3);
866 __ pop(rax);
867
868 __ ret(0);
869
870 return start;
871 }
872
873 address generate_d2i_fixup() {
874 StubCodeMark mark(this, "StubRoutines", "d2i_fixup");
875 Address inout(rsp, 6 * wordSize); // return address + 5 saves
876
877 address start = __ pc();
878
879 Label L;
880
881 __ push(rax);
882 __ push(c_rarg3);
883 __ push(c_rarg2);
884 __ push(c_rarg1);
885 __ push(c_rarg0);
886
887 __ movl(rax, 0x7ff00000);
888 __ movq(c_rarg2, inout);
889 __ movl(c_rarg3, c_rarg2);
890 __ mov(c_rarg1, c_rarg2);
891 __ mov(c_rarg0, c_rarg2);
892 __ negl(c_rarg3);
893 __ shrptr(c_rarg1, 0x20);
894 __ orl(c_rarg3, c_rarg2);
895 __ andl(c_rarg1, 0x7fffffff);
896 __ xorl(c_rarg2, c_rarg2);
897 __ shrl(c_rarg3, 0x1f);
898 __ orl(c_rarg1, c_rarg3);
899 __ cmpl(rax, c_rarg1);
900 __ jcc(Assembler::negative, L); // NaN -> 0
901 __ testptr(c_rarg0, c_rarg0); // signed ? min_jint : max_jint
902 __ movl(c_rarg2, 0x80000000);
903 __ movl(rax, 0x7fffffff);
904 __ cmov(Assembler::positive, c_rarg2, rax);
905
906 __ bind(L);
907 __ movptr(inout, c_rarg2);
908
909 __ pop(c_rarg0);
910 __ pop(c_rarg1);
911 __ pop(c_rarg2);
912 __ pop(c_rarg3);
913 __ pop(rax);
914
915 __ ret(0);
916
917 return start;
918 }
919
920 address generate_d2l_fixup() {
921 StubCodeMark mark(this, "StubRoutines", "d2l_fixup");
922 Address inout(rsp, 6 * wordSize); // return address + 5 saves
923
924 address start = __ pc();
925
926 Label L;
927
928 __ push(rax);
929 __ push(c_rarg3);
930 __ push(c_rarg2);
931 __ push(c_rarg1);
932 __ push(c_rarg0);
933
934 __ movl(rax, 0x7ff00000);
935 __ movq(c_rarg2, inout);
936 __ movl(c_rarg3, c_rarg2);
937 __ mov(c_rarg1, c_rarg2);
938 __ mov(c_rarg0, c_rarg2);
939 __ negl(c_rarg3);
940 __ shrptr(c_rarg1, 0x20);
941 __ orl(c_rarg3, c_rarg2);
942 __ andl(c_rarg1, 0x7fffffff);
943 __ xorl(c_rarg2, c_rarg2);
944 __ shrl(c_rarg3, 0x1f);
945 __ orl(c_rarg1, c_rarg3);
946 __ cmpl(rax, c_rarg1);
947 __ jcc(Assembler::negative, L); // NaN -> 0
948 __ testq(c_rarg0, c_rarg0); // signed ? min_jlong : max_jlong
949 __ mov64(c_rarg2, 0x8000000000000000);
950 __ mov64(rax, 0x7fffffffffffffff);
951 __ cmovq(Assembler::positive, c_rarg2, rax);
952
953 __ bind(L);
954 __ movq(inout, c_rarg2);
955
956 __ pop(c_rarg0);
957 __ pop(c_rarg1);
958 __ pop(c_rarg2);
959 __ pop(c_rarg3);
960 __ pop(rax);
961
962 __ ret(0);
963
964 return start;
965 }
966
967 address generate_fp_mask(const char *stub_name, int64_t mask) {
968 __ align(CodeEntryAlignment);
969 StubCodeMark mark(this, "StubRoutines", stub_name);
970 address start = __ pc();
971
972 __ emit_data64( mask, relocInfo::none );
973 __ emit_data64( mask, relocInfo::none );
974
975 return start;
976 }
977
978 // Non-destructive plausibility checks for oops
979 //
980 // Arguments:
981 // all args on stack!
982 //
983 // Stack after saving c_rarg3:
984 // [tos + 0]: saved c_rarg3
985 // [tos + 1]: saved c_rarg2
986 // [tos + 2]: saved r12 (several TemplateTable methods use it)
987 // [tos + 3]: saved flags
988 // [tos + 4]: return address
989 // * [tos + 5]: error message (char*)
990 // * [tos + 6]: object to verify (oop)
991 // * [tos + 7]: saved rax - saved by caller and bashed
992 // * [tos + 8]: saved r10 (rscratch1) - saved by caller
993 // * = popped on exit
994 address generate_verify_oop() {
995 StubCodeMark mark(this, "StubRoutines", "verify_oop");
996 address start = __ pc();
997
998 Label exit, error;
999
1000 __ pushf();
1001 __ incrementl(ExternalAddress((address) StubRoutines::verify_oop_count_addr()));
1002
1003 __ push(r12);
1004
1005 // save c_rarg2 and c_rarg3
1006 __ push(c_rarg2);
1007 __ push(c_rarg3);
1008
1009 enum {
1010 // After previous pushes.
1011 oop_to_verify = 6 * wordSize,
1012 saved_rax = 7 * wordSize,
1013 saved_r10 = 8 * wordSize,
1014
1015 // Before the call to MacroAssembler::debug(), see below.
1016 return_addr = 16 * wordSize,
1017 error_msg = 17 * wordSize
1018 };
1019
1020 // get object
1021 __ movptr(rax, Address(rsp, oop_to_verify));
1022
1023 // make sure object is 'reasonable'
1024 __ testptr(rax, rax);
1025 __ jcc(Assembler::zero, exit); // if obj is NULL it is OK
1026 // Check if the oop is in the right area of memory
1027 __ movptr(c_rarg2, rax);
1028 __ movptr(c_rarg3, (intptr_t) Universe::verify_oop_mask());
1029 __ andptr(c_rarg2, c_rarg3);
1030 __ movptr(c_rarg3, (intptr_t) Universe::verify_oop_bits());
1031 __ cmpptr(c_rarg2, c_rarg3);
1032 __ jcc(Assembler::notZero, error);
1033
1034 // set r12 to heapbase for load_klass()
1035 __ reinit_heapbase();
1036
1037 // make sure klass is 'reasonable', which is not zero.
1038 __ load_klass(rax, rax); // get klass
1039 __ testptr(rax, rax);
1040 __ jcc(Assembler::zero, error); // if klass is NULL it is broken
1041
1042 // return if everything seems ok
1043 __ bind(exit);
1044 __ movptr(rax, Address(rsp, saved_rax)); // get saved rax back
1045 __ movptr(rscratch1, Address(rsp, saved_r10)); // get saved r10 back
1046 __ pop(c_rarg3); // restore c_rarg3
1047 __ pop(c_rarg2); // restore c_rarg2
1048 __ pop(r12); // restore r12
1049 __ popf(); // restore flags
1050 __ ret(4 * wordSize); // pop caller saved stuff
1051
1052 // handle errors
1053 __ bind(error);
1054 __ movptr(rax, Address(rsp, saved_rax)); // get saved rax back
1055 __ movptr(rscratch1, Address(rsp, saved_r10)); // get saved r10 back
1056 __ pop(c_rarg3); // get saved c_rarg3 back
1057 __ pop(c_rarg2); // get saved c_rarg2 back
1058 __ pop(r12); // get saved r12 back
1059 __ popf(); // get saved flags off stack --
1060 // will be ignored
1061
1062 __ pusha(); // push registers
1063 // (rip is already
1064 // already pushed)
1065 // debug(char* msg, int64_t pc, int64_t regs[])
1066 // We've popped the registers we'd saved (c_rarg3, c_rarg2 and flags), and
1067 // pushed all the registers, so now the stack looks like:
1068 // [tos + 0] 16 saved registers
1069 // [tos + 16] return address
1070 // * [tos + 17] error message (char*)
1071 // * [tos + 18] object to verify (oop)
1072 // * [tos + 19] saved rax - saved by caller and bashed
1073 // * [tos + 20] saved r10 (rscratch1) - saved by caller
1074 // * = popped on exit
1075
1076 __ movptr(c_rarg0, Address(rsp, error_msg)); // pass address of error message
1077 __ movptr(c_rarg1, Address(rsp, return_addr)); // pass return address
1078 __ movq(c_rarg2, rsp); // pass address of regs on stack
1079 __ mov(r12, rsp); // remember rsp
1080 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
1081 __ andptr(rsp, -16); // align stack as required by ABI
1082 BLOCK_COMMENT("call MacroAssembler::debug");
1083 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, MacroAssembler::debug64)));
1084 __ mov(rsp, r12); // restore rsp
1085 __ popa(); // pop registers (includes r12)
1086 __ ret(4 * wordSize); // pop caller saved stuff
1087
1088 return start;
1089 }
1090
1091 //
1092 // Verify that a register contains clean 32-bits positive value
1093 // (high 32-bits are 0) so it could be used in 64-bits shifts.
1094 //
1095 // Input:
1096 // Rint - 32-bits value
1097 // Rtmp - scratch
1098 //
1099 void assert_clean_int(Register Rint, Register Rtmp) {
1100 #ifdef ASSERT
1101 Label L;
1102 assert_different_registers(Rtmp, Rint);
1103 __ movslq(Rtmp, Rint);
1104 __ cmpq(Rtmp, Rint);
1105 __ jcc(Assembler::equal, L);
1106 __ stop("high 32-bits of int value are not 0");
1107 __ bind(L);
1108 #endif
1109 }
1110
1111 // Generate overlap test for array copy stubs
1112 //
1113 // Input:
1114 // c_rarg0 - from
1115 // c_rarg1 - to
1116 // c_rarg2 - element count
1117 //
1118 // Output:
1119 // rax - &from[element count - 1]
1120 //
1121 void array_overlap_test(address no_overlap_target, Address::ScaleFactor sf) {
1122 assert(no_overlap_target != NULL, "must be generated");
1123 array_overlap_test(no_overlap_target, NULL, sf);
1124 }
1125 void array_overlap_test(Label& L_no_overlap, Address::ScaleFactor sf) {
1126 array_overlap_test(NULL, &L_no_overlap, sf);
1127 }
1128 void array_overlap_test(address no_overlap_target, Label* NOLp, Address::ScaleFactor sf) {
1129 const Register from = c_rarg0;
1130 const Register to = c_rarg1;
1131 const Register count = c_rarg2;
1132 const Register end_from = rax;
1133
1134 __ cmpptr(to, from);
1135 __ lea(end_from, Address(from, count, sf, 0));
1136 if (NOLp == NULL) {
1137 ExternalAddress no_overlap(no_overlap_target);
1138 __ jump_cc(Assembler::belowEqual, no_overlap);
1139 __ cmpptr(to, end_from);
1140 __ jump_cc(Assembler::aboveEqual, no_overlap);
1141 } else {
1142 __ jcc(Assembler::belowEqual, (*NOLp));
1143 __ cmpptr(to, end_from);
1144 __ jcc(Assembler::aboveEqual, (*NOLp));
1145 }
1146 }
1147
1148 // Shuffle first three arg regs on Windows into Linux/Solaris locations.
1149 //
1150 // Outputs:
1151 // rdi - rcx
1152 // rsi - rdx
1153 // rdx - r8
1154 // rcx - r9
1155 //
1156 // Registers r9 and r10 are used to save rdi and rsi on Windows, which latter
1157 // are non-volatile. r9 and r10 should not be used by the caller.
1158 //
1159 void setup_arg_regs(int nargs = 3) {
1160 const Register saved_rdi = r9;
1161 const Register saved_rsi = r10;
1162 assert(nargs == 3 || nargs == 4, "else fix");
1163 #ifdef _WIN64
1164 assert(c_rarg0 == rcx && c_rarg1 == rdx && c_rarg2 == r8 && c_rarg3 == r9,
1165 "unexpected argument registers");
1166 if (nargs >= 4)
1167 __ mov(rax, r9); // r9 is also saved_rdi
1168 __ movptr(saved_rdi, rdi);
1169 __ movptr(saved_rsi, rsi);
1170 __ mov(rdi, rcx); // c_rarg0
1171 __ mov(rsi, rdx); // c_rarg1
1172 __ mov(rdx, r8); // c_rarg2
1173 if (nargs >= 4)
1174 __ mov(rcx, rax); // c_rarg3 (via rax)
1175 #else
1176 assert(c_rarg0 == rdi && c_rarg1 == rsi && c_rarg2 == rdx && c_rarg3 == rcx,
1177 "unexpected argument registers");
1178 #endif
1179 }
1180
1181 void restore_arg_regs() {
1182 const Register saved_rdi = r9;
1183 const Register saved_rsi = r10;
1184 #ifdef _WIN64
1185 __ movptr(rdi, saved_rdi);
1186 __ movptr(rsi, saved_rsi);
1187 #endif
1188 }
1189
1190 // Generate code for an array write pre barrier
1191 //
1192 // addr - starting address
1193 // count - element count
1194 // tmp - scratch register
1195 //
1196 // Destroy no registers!
1197 //
1198 void gen_write_ref_array_pre_barrier(Register addr, Register count, bool dest_uninitialized) {
1199 BarrierSet* bs = Universe::heap()->barrier_set();
1200 switch (bs->kind()) {
1201 case BarrierSet::G1SATBCTLogging:
1202 // With G1, don't generate the call if we statically know that the target in uninitialized
1203 if (!dest_uninitialized) {
1204 __ pusha(); // push registers
1205 if (count == c_rarg0) {
1206 if (addr == c_rarg1) {
1207 // exactly backwards!!
1208 __ xchgptr(c_rarg1, c_rarg0);
1209 } else {
1210 __ movptr(c_rarg1, count);
1211 __ movptr(c_rarg0, addr);
1212 }
1213 } else {
1214 __ movptr(c_rarg0, addr);
1215 __ movptr(c_rarg1, count);
1216 }
1217 __ call_VM_leaf(CAST_FROM_FN_PTR(address, BarrierSet::static_write_ref_array_pre), 2);
1218 __ popa();
1219 }
1220 break;
1221 case BarrierSet::CardTableForRS:
1222 case BarrierSet::CardTableExtension:
1223 case BarrierSet::ModRef:
1224 break;
1225 default:
1226 ShouldNotReachHere();
1227
1228 }
1229 }
1230
1231 //
1232 // Generate code for an array write post barrier
1233 //
1234 // Input:
1235 // start - register containing starting address of destination array
1236 // count - elements count
1237 // scratch - scratch register
1238 //
1239 // The input registers are overwritten.
1240 //
1241 void gen_write_ref_array_post_barrier(Register start, Register count, Register scratch) {
1242 assert_different_registers(start, count, scratch);
1243 BarrierSet* bs = Universe::heap()->barrier_set();
1244 switch (bs->kind()) {
1245 case BarrierSet::G1SATBCTLogging:
1246 {
1247 __ pusha(); // push registers (overkill)
1248 if (c_rarg0 == count) { // On win64 c_rarg0 == rcx
1249 assert_different_registers(c_rarg1, start);
1250 __ mov(c_rarg1, count);
1251 __ mov(c_rarg0, start);
1252 } else {
1253 assert_different_registers(c_rarg0, count);
1254 __ mov(c_rarg0, start);
1255 __ mov(c_rarg1, count);
1256 }
1257 __ call_VM_leaf(CAST_FROM_FN_PTR(address, BarrierSet::static_write_ref_array_post), 2);
1258 __ popa();
1259 }
1260 break;
1261 case BarrierSet::CardTableForRS:
1262 case BarrierSet::CardTableExtension:
1263 {
1264 CardTableModRefBS* ct = barrier_set_cast<CardTableModRefBS>(bs);
1265 assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code");
1266
1267 Label L_loop, L_done;
1268 const Register end = count;
1269
1270 __ testl(count, count);
1271 __ jcc(Assembler::zero, L_done); // zero count - nothing to do
1272
1273 __ leaq(end, Address(start, count, TIMES_OOP, 0)); // end == start+count*oop_size
1274 __ subptr(end, BytesPerHeapOop); // end - 1 to make inclusive
1275 __ shrptr(start, CardTableModRefBS::card_shift);
1276 __ shrptr(end, CardTableModRefBS::card_shift);
1277 __ subptr(end, start); // end --> cards count
1278
1279 int64_t disp = (int64_t) ct->byte_map_base;
1280 __ mov64(scratch, disp);
1281 __ addptr(start, scratch);
1282 __ BIND(L_loop);
1283 __ movb(Address(start, count, Address::times_1), 0);
1284 __ decrement(count);
1285 __ jcc(Assembler::greaterEqual, L_loop);
1286 __ BIND(L_done);
1287 }
1288 break;
1289 default:
1290 ShouldNotReachHere();
1291
1292 }
1293 }
1294
1295
1296 // Copy big chunks forward
1297 //
1298 // Inputs:
1299 // end_from - source arrays end address
1300 // end_to - destination array end address
1301 // qword_count - 64-bits element count, negative
1302 // to - scratch
1303 // L_copy_bytes - entry label
1304 // L_copy_8_bytes - exit label
1305 //
1306 void copy_bytes_forward(Register end_from, Register end_to,
1307 Register qword_count, Register to,
1308 Label& L_copy_bytes, Label& L_copy_8_bytes) {
1309 DEBUG_ONLY(__ stop("enter at entry label, not here"));
1310 Label L_loop;
1311 __ align(OptoLoopAlignment);
1312 if (UseUnalignedLoadStores) {
1313 Label L_end;
1314 if (UseAVX > 2) {
1315 __ movl(to, 0xffff);
1316 __ kmovwl(k1, to);
1317 }
1318 // Copy 64-bytes per iteration
1319 __ BIND(L_loop);
1320 if (UseAVX > 2) {
1321 __ evmovdqul(xmm0, Address(end_from, qword_count, Address::times_8, -56), Assembler::AVX_512bit);
1322 __ evmovdqul(Address(end_to, qword_count, Address::times_8, -56), xmm0, Assembler::AVX_512bit);
1323 } else if (UseAVX == 2) {
1324 __ vmovdqu(xmm0, Address(end_from, qword_count, Address::times_8, -56));
1325 __ vmovdqu(Address(end_to, qword_count, Address::times_8, -56), xmm0);
1326 __ vmovdqu(xmm1, Address(end_from, qword_count, Address::times_8, -24));
1327 __ vmovdqu(Address(end_to, qword_count, Address::times_8, -24), xmm1);
1328 } else {
1329 __ movdqu(xmm0, Address(end_from, qword_count, Address::times_8, -56));
1330 __ movdqu(Address(end_to, qword_count, Address::times_8, -56), xmm0);
1331 __ movdqu(xmm1, Address(end_from, qword_count, Address::times_8, -40));
1332 __ movdqu(Address(end_to, qword_count, Address::times_8, -40), xmm1);
1333 __ movdqu(xmm2, Address(end_from, qword_count, Address::times_8, -24));
1334 __ movdqu(Address(end_to, qword_count, Address::times_8, -24), xmm2);
1335 __ movdqu(xmm3, Address(end_from, qword_count, Address::times_8, - 8));
1336 __ movdqu(Address(end_to, qword_count, Address::times_8, - 8), xmm3);
1337 }
1338 __ BIND(L_copy_bytes);
1339 __ addptr(qword_count, 8);
1340 __ jcc(Assembler::lessEqual, L_loop);
1341 __ subptr(qword_count, 4); // sub(8) and add(4)
1342 __ jccb(Assembler::greater, L_end);
1343 // Copy trailing 32 bytes
1344 if (UseAVX >= 2) {
1345 __ vmovdqu(xmm0, Address(end_from, qword_count, Address::times_8, -24));
1346 __ vmovdqu(Address(end_to, qword_count, Address::times_8, -24), xmm0);
1347 } else {
1348 __ movdqu(xmm0, Address(end_from, qword_count, Address::times_8, -24));
1349 __ movdqu(Address(end_to, qword_count, Address::times_8, -24), xmm0);
1350 __ movdqu(xmm1, Address(end_from, qword_count, Address::times_8, - 8));
1351 __ movdqu(Address(end_to, qword_count, Address::times_8, - 8), xmm1);
1352 }
1353 __ addptr(qword_count, 4);
1354 __ BIND(L_end);
1355 if (UseAVX >= 2) {
1356 // clean upper bits of YMM registers
1357 __ vpxor(xmm0, xmm0);
1358 __ vpxor(xmm1, xmm1);
1359 }
1360 } else {
1361 // Copy 32-bytes per iteration
1362 __ BIND(L_loop);
1363 __ movq(to, Address(end_from, qword_count, Address::times_8, -24));
1364 __ movq(Address(end_to, qword_count, Address::times_8, -24), to);
1365 __ movq(to, Address(end_from, qword_count, Address::times_8, -16));
1366 __ movq(Address(end_to, qword_count, Address::times_8, -16), to);
1367 __ movq(to, Address(end_from, qword_count, Address::times_8, - 8));
1368 __ movq(Address(end_to, qword_count, Address::times_8, - 8), to);
1369 __ movq(to, Address(end_from, qword_count, Address::times_8, - 0));
1370 __ movq(Address(end_to, qword_count, Address::times_8, - 0), to);
1371
1372 __ BIND(L_copy_bytes);
1373 __ addptr(qword_count, 4);
1374 __ jcc(Assembler::lessEqual, L_loop);
1375 }
1376 __ subptr(qword_count, 4);
1377 __ jcc(Assembler::less, L_copy_8_bytes); // Copy trailing qwords
1378 }
1379
1380 // Copy big chunks backward
1381 //
1382 // Inputs:
1383 // from - source arrays address
1384 // dest - destination array address
1385 // qword_count - 64-bits element count
1386 // to - scratch
1387 // L_copy_bytes - entry label
1388 // L_copy_8_bytes - exit label
1389 //
1390 void copy_bytes_backward(Register from, Register dest,
1391 Register qword_count, Register to,
1392 Label& L_copy_bytes, Label& L_copy_8_bytes) {
1393 DEBUG_ONLY(__ stop("enter at entry label, not here"));
1394 Label L_loop;
1395 __ align(OptoLoopAlignment);
1396 if (UseUnalignedLoadStores) {
1397 Label L_end;
1398 if (UseAVX > 2) {
1399 __ movl(to, 0xffff);
1400 __ kmovwl(k1, to);
1401 }
1402 // Copy 64-bytes per iteration
1403 __ BIND(L_loop);
1404 if (UseAVX > 2) {
1405 __ evmovdqul(xmm0, Address(from, qword_count, Address::times_8, 0), Assembler::AVX_512bit);
1406 __ evmovdqul(Address(dest, qword_count, Address::times_8, 0), xmm0, Assembler::AVX_512bit);
1407 } else if (UseAVX == 2) {
1408 __ vmovdqu(xmm0, Address(from, qword_count, Address::times_8, 32));
1409 __ vmovdqu(Address(dest, qword_count, Address::times_8, 32), xmm0);
1410 __ vmovdqu(xmm1, Address(from, qword_count, Address::times_8, 0));
1411 __ vmovdqu(Address(dest, qword_count, Address::times_8, 0), xmm1);
1412 } else {
1413 __ movdqu(xmm0, Address(from, qword_count, Address::times_8, 48));
1414 __ movdqu(Address(dest, qword_count, Address::times_8, 48), xmm0);
1415 __ movdqu(xmm1, Address(from, qword_count, Address::times_8, 32));
1416 __ movdqu(Address(dest, qword_count, Address::times_8, 32), xmm1);
1417 __ movdqu(xmm2, Address(from, qword_count, Address::times_8, 16));
1418 __ movdqu(Address(dest, qword_count, Address::times_8, 16), xmm2);
1419 __ movdqu(xmm3, Address(from, qword_count, Address::times_8, 0));
1420 __ movdqu(Address(dest, qword_count, Address::times_8, 0), xmm3);
1421 }
1422 __ BIND(L_copy_bytes);
1423 __ subptr(qword_count, 8);
1424 __ jcc(Assembler::greaterEqual, L_loop);
1425
1426 __ addptr(qword_count, 4); // add(8) and sub(4)
1427 __ jccb(Assembler::less, L_end);
1428 // Copy trailing 32 bytes
1429 if (UseAVX >= 2) {
1430 __ vmovdqu(xmm0, Address(from, qword_count, Address::times_8, 0));
1431 __ vmovdqu(Address(dest, qword_count, Address::times_8, 0), xmm0);
1432 } else {
1433 __ movdqu(xmm0, Address(from, qword_count, Address::times_8, 16));
1434 __ movdqu(Address(dest, qword_count, Address::times_8, 16), xmm0);
1435 __ movdqu(xmm1, Address(from, qword_count, Address::times_8, 0));
1436 __ movdqu(Address(dest, qword_count, Address::times_8, 0), xmm1);
1437 }
1438 __ subptr(qword_count, 4);
1439 __ BIND(L_end);
1440 if (UseAVX >= 2) {
1441 // clean upper bits of YMM registers
1442 __ vpxor(xmm0, xmm0);
1443 __ vpxor(xmm1, xmm1);
1444 }
1445 } else {
1446 // Copy 32-bytes per iteration
1447 __ BIND(L_loop);
1448 __ movq(to, Address(from, qword_count, Address::times_8, 24));
1449 __ movq(Address(dest, qword_count, Address::times_8, 24), to);
1450 __ movq(to, Address(from, qword_count, Address::times_8, 16));
1451 __ movq(Address(dest, qword_count, Address::times_8, 16), to);
1452 __ movq(to, Address(from, qword_count, Address::times_8, 8));
1453 __ movq(Address(dest, qword_count, Address::times_8, 8), to);
1454 __ movq(to, Address(from, qword_count, Address::times_8, 0));
1455 __ movq(Address(dest, qword_count, Address::times_8, 0), to);
1456
1457 __ BIND(L_copy_bytes);
1458 __ subptr(qword_count, 4);
1459 __ jcc(Assembler::greaterEqual, L_loop);
1460 }
1461 __ addptr(qword_count, 4);
1462 __ jcc(Assembler::greater, L_copy_8_bytes); // Copy trailing qwords
1463 }
1464
1465
1466 // Arguments:
1467 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1468 // ignored
1469 // name - stub name string
1470 //
1471 // Inputs:
1472 // c_rarg0 - source array address
1473 // c_rarg1 - destination array address
1474 // c_rarg2 - element count, treated as ssize_t, can be zero
1475 //
1476 // If 'from' and/or 'to' are aligned on 4-, 2-, or 1-byte boundaries,
1477 // we let the hardware handle it. The one to eight bytes within words,
1478 // dwords or qwords that span cache line boundaries will still be loaded
1479 // and stored atomically.
1480 //
1481 // Side Effects:
1482 // disjoint_byte_copy_entry is set to the no-overlap entry point
1483 // used by generate_conjoint_byte_copy().
1484 //
1485 address generate_disjoint_byte_copy(bool aligned, address* entry, const char *name) {
1486 __ align(CodeEntryAlignment);
1487 StubCodeMark mark(this, "StubRoutines", name);
1488 address start = __ pc();
1489
1490 Label L_copy_bytes, L_copy_8_bytes, L_copy_4_bytes, L_copy_2_bytes;
1491 Label L_copy_byte, L_exit;
1492 const Register from = rdi; // source array address
1493 const Register to = rsi; // destination array address
1494 const Register count = rdx; // elements count
1495 const Register byte_count = rcx;
1496 const Register qword_count = count;
1497 const Register end_from = from; // source array end address
1498 const Register end_to = to; // destination array end address
1499 // End pointers are inclusive, and if count is not zero they point
1500 // to the last unit copied: end_to[0] := end_from[0]
1501
1502 __ enter(); // required for proper stackwalking of RuntimeStub frame
1503 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1504
1505 if (entry != NULL) {
1506 *entry = __ pc();
1507 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1508 BLOCK_COMMENT("Entry:");
1509 }
1510
1511 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1512 // r9 and r10 may be used to save non-volatile registers
1513
1514 // 'from', 'to' and 'count' are now valid
1515 __ movptr(byte_count, count);
1516 __ shrptr(count, 3); // count => qword_count
1517
1518 // Copy from low to high addresses. Use 'to' as scratch.
1519 __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
1520 __ lea(end_to, Address(to, qword_count, Address::times_8, -8));
1521 __ negptr(qword_count); // make the count negative
1522 __ jmp(L_copy_bytes);
1523
1524 // Copy trailing qwords
1525 __ BIND(L_copy_8_bytes);
1526 __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
1527 __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
1528 __ increment(qword_count);
1529 __ jcc(Assembler::notZero, L_copy_8_bytes);
1530
1531 // Check for and copy trailing dword
1532 __ BIND(L_copy_4_bytes);
1533 __ testl(byte_count, 4);
1534 __ jccb(Assembler::zero, L_copy_2_bytes);
1535 __ movl(rax, Address(end_from, 8));
1536 __ movl(Address(end_to, 8), rax);
1537
1538 __ addptr(end_from, 4);
1539 __ addptr(end_to, 4);
1540
1541 // Check for and copy trailing word
1542 __ BIND(L_copy_2_bytes);
1543 __ testl(byte_count, 2);
1544 __ jccb(Assembler::zero, L_copy_byte);
1545 __ movw(rax, Address(end_from, 8));
1546 __ movw(Address(end_to, 8), rax);
1547
1548 __ addptr(end_from, 2);
1549 __ addptr(end_to, 2);
1550
1551 // Check for and copy trailing byte
1552 __ BIND(L_copy_byte);
1553 __ testl(byte_count, 1);
1554 __ jccb(Assembler::zero, L_exit);
1555 __ movb(rax, Address(end_from, 8));
1556 __ movb(Address(end_to, 8), rax);
1557
1558 __ BIND(L_exit);
1559 restore_arg_regs();
1560 inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr); // Update counter after rscratch1 is free
1561 __ xorptr(rax, rax); // return 0
1562 __ vzeroupper();
1563 __ leave(); // required for proper stackwalking of RuntimeStub frame
1564 __ ret(0);
1565
1566 // Copy in multi-bytes chunks
1567 copy_bytes_forward(end_from, end_to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
1568 __ jmp(L_copy_4_bytes);
1569
1570 return start;
1571 }
1572
1573 // Arguments:
1574 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1575 // ignored
1576 // name - stub name string
1577 //
1578 // Inputs:
1579 // c_rarg0 - source array address
1580 // c_rarg1 - destination array address
1581 // c_rarg2 - element count, treated as ssize_t, can be zero
1582 //
1583 // If 'from' and/or 'to' are aligned on 4-, 2-, or 1-byte boundaries,
1584 // we let the hardware handle it. The one to eight bytes within words,
1585 // dwords or qwords that span cache line boundaries will still be loaded
1586 // and stored atomically.
1587 //
1588 address generate_conjoint_byte_copy(bool aligned, address nooverlap_target,
1589 address* entry, const char *name) {
1590 __ align(CodeEntryAlignment);
1591 StubCodeMark mark(this, "StubRoutines", name);
1592 address start = __ pc();
1593
1594 Label L_copy_bytes, L_copy_8_bytes, L_copy_4_bytes, L_copy_2_bytes;
1595 const Register from = rdi; // source array address
1596 const Register to = rsi; // destination array address
1597 const Register count = rdx; // elements count
1598 const Register byte_count = rcx;
1599 const Register qword_count = count;
1600
1601 __ enter(); // required for proper stackwalking of RuntimeStub frame
1602 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1603
1604 if (entry != NULL) {
1605 *entry = __ pc();
1606 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1607 BLOCK_COMMENT("Entry:");
1608 }
1609
1610 array_overlap_test(nooverlap_target, Address::times_1);
1611 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1612 // r9 and r10 may be used to save non-volatile registers
1613
1614 // 'from', 'to' and 'count' are now valid
1615 __ movptr(byte_count, count);
1616 __ shrptr(count, 3); // count => qword_count
1617
1618 // Copy from high to low addresses.
1619
1620 // Check for and copy trailing byte
1621 __ testl(byte_count, 1);
1622 __ jcc(Assembler::zero, L_copy_2_bytes);
1623 __ movb(rax, Address(from, byte_count, Address::times_1, -1));
1624 __ movb(Address(to, byte_count, Address::times_1, -1), rax);
1625 __ decrement(byte_count); // Adjust for possible trailing word
1626
1627 // Check for and copy trailing word
1628 __ BIND(L_copy_2_bytes);
1629 __ testl(byte_count, 2);
1630 __ jcc(Assembler::zero, L_copy_4_bytes);
1631 __ movw(rax, Address(from, byte_count, Address::times_1, -2));
1632 __ movw(Address(to, byte_count, Address::times_1, -2), rax);
1633
1634 // Check for and copy trailing dword
1635 __ BIND(L_copy_4_bytes);
1636 __ testl(byte_count, 4);
1637 __ jcc(Assembler::zero, L_copy_bytes);
1638 __ movl(rax, Address(from, qword_count, Address::times_8));
1639 __ movl(Address(to, qword_count, Address::times_8), rax);
1640 __ jmp(L_copy_bytes);
1641
1642 // Copy trailing qwords
1643 __ BIND(L_copy_8_bytes);
1644 __ movq(rax, Address(from, qword_count, Address::times_8, -8));
1645 __ movq(Address(to, qword_count, Address::times_8, -8), rax);
1646 __ decrement(qword_count);
1647 __ jcc(Assembler::notZero, L_copy_8_bytes);
1648
1649 restore_arg_regs();
1650 inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr); // Update counter after rscratch1 is free
1651 __ xorptr(rax, rax); // return 0
1652 __ vzeroupper();
1653 __ leave(); // required for proper stackwalking of RuntimeStub frame
1654 __ ret(0);
1655
1656 // Copy in multi-bytes chunks
1657 copy_bytes_backward(from, to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
1658
1659 restore_arg_regs();
1660 inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr); // Update counter after rscratch1 is free
1661 __ xorptr(rax, rax); // return 0
1662 __ vzeroupper();
1663 __ leave(); // required for proper stackwalking of RuntimeStub frame
1664 __ ret(0);
1665
1666 return start;
1667 }
1668
1669 // Arguments:
1670 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1671 // ignored
1672 // name - stub name string
1673 //
1674 // Inputs:
1675 // c_rarg0 - source array address
1676 // c_rarg1 - destination array address
1677 // c_rarg2 - element count, treated as ssize_t, can be zero
1678 //
1679 // If 'from' and/or 'to' are aligned on 4- or 2-byte boundaries, we
1680 // let the hardware handle it. The two or four words within dwords
1681 // or qwords that span cache line boundaries will still be loaded
1682 // and stored atomically.
1683 //
1684 // Side Effects:
1685 // disjoint_short_copy_entry is set to the no-overlap entry point
1686 // used by generate_conjoint_short_copy().
1687 //
1688 address generate_disjoint_short_copy(bool aligned, address *entry, const char *name) {
1689 __ align(CodeEntryAlignment);
1690 StubCodeMark mark(this, "StubRoutines", name);
1691 address start = __ pc();
1692
1693 Label L_copy_bytes, L_copy_8_bytes, L_copy_4_bytes,L_copy_2_bytes,L_exit;
1694 const Register from = rdi; // source array address
1695 const Register to = rsi; // destination array address
1696 const Register count = rdx; // elements count
1697 const Register word_count = rcx;
1698 const Register qword_count = count;
1699 const Register end_from = from; // source array end address
1700 const Register end_to = to; // destination array end address
1701 // End pointers are inclusive, and if count is not zero they point
1702 // to the last unit copied: end_to[0] := end_from[0]
1703
1704 __ enter(); // required for proper stackwalking of RuntimeStub frame
1705 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1706
1707 if (entry != NULL) {
1708 *entry = __ pc();
1709 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1710 BLOCK_COMMENT("Entry:");
1711 }
1712
1713 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1714 // r9 and r10 may be used to save non-volatile registers
1715
1716 // 'from', 'to' and 'count' are now valid
1717 __ movptr(word_count, count);
1718 __ shrptr(count, 2); // count => qword_count
1719
1720 // Copy from low to high addresses. Use 'to' as scratch.
1721 __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
1722 __ lea(end_to, Address(to, qword_count, Address::times_8, -8));
1723 __ negptr(qword_count);
1724 __ jmp(L_copy_bytes);
1725
1726 // Copy trailing qwords
1727 __ BIND(L_copy_8_bytes);
1728 __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
1729 __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
1730 __ increment(qword_count);
1731 __ jcc(Assembler::notZero, L_copy_8_bytes);
1732
1733 // Original 'dest' is trashed, so we can't use it as a
1734 // base register for a possible trailing word copy
1735
1736 // Check for and copy trailing dword
1737 __ BIND(L_copy_4_bytes);
1738 __ testl(word_count, 2);
1739 __ jccb(Assembler::zero, L_copy_2_bytes);
1740 __ movl(rax, Address(end_from, 8));
1741 __ movl(Address(end_to, 8), rax);
1742
1743 __ addptr(end_from, 4);
1744 __ addptr(end_to, 4);
1745
1746 // Check for and copy trailing word
1747 __ BIND(L_copy_2_bytes);
1748 __ testl(word_count, 1);
1749 __ jccb(Assembler::zero, L_exit);
1750 __ movw(rax, Address(end_from, 8));
1751 __ movw(Address(end_to, 8), rax);
1752
1753 __ BIND(L_exit);
1754 restore_arg_regs();
1755 inc_counter_np(SharedRuntime::_jshort_array_copy_ctr); // Update counter after rscratch1 is free
1756 __ xorptr(rax, rax); // return 0
1757 __ vzeroupper();
1758 __ leave(); // required for proper stackwalking of RuntimeStub frame
1759 __ ret(0);
1760
1761 // Copy in multi-bytes chunks
1762 copy_bytes_forward(end_from, end_to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
1763 __ jmp(L_copy_4_bytes);
1764
1765 return start;
1766 }
1767
1768 address generate_fill(BasicType t, bool aligned, const char *name) {
1769 __ align(CodeEntryAlignment);
1770 StubCodeMark mark(this, "StubRoutines", name);
1771 address start = __ pc();
1772
1773 BLOCK_COMMENT("Entry:");
1774
1775 const Register to = c_rarg0; // source array address
1776 const Register value = c_rarg1; // value
1777 const Register count = c_rarg2; // elements count
1778
1779 __ enter(); // required for proper stackwalking of RuntimeStub frame
1780
1781 __ generate_fill(t, aligned, to, value, count, rax, xmm0);
1782
1783 __ vzeroupper();
1784 __ leave(); // required for proper stackwalking of RuntimeStub frame
1785 __ ret(0);
1786 return start;
1787 }
1788
1789 // Arguments:
1790 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1791 // ignored
1792 // name - stub name string
1793 //
1794 // Inputs:
1795 // c_rarg0 - source array address
1796 // c_rarg1 - destination array address
1797 // c_rarg2 - element count, treated as ssize_t, can be zero
1798 //
1799 // If 'from' and/or 'to' are aligned on 4- or 2-byte boundaries, we
1800 // let the hardware handle it. The two or four words within dwords
1801 // or qwords that span cache line boundaries will still be loaded
1802 // and stored atomically.
1803 //
1804 address generate_conjoint_short_copy(bool aligned, address nooverlap_target,
1805 address *entry, const char *name) {
1806 __ align(CodeEntryAlignment);
1807 StubCodeMark mark(this, "StubRoutines", name);
1808 address start = __ pc();
1809
1810 Label L_copy_bytes, L_copy_8_bytes, L_copy_4_bytes;
1811 const Register from = rdi; // source array address
1812 const Register to = rsi; // destination array address
1813 const Register count = rdx; // elements count
1814 const Register word_count = rcx;
1815 const Register qword_count = count;
1816
1817 __ enter(); // required for proper stackwalking of RuntimeStub frame
1818 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1819
1820 if (entry != NULL) {
1821 *entry = __ pc();
1822 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1823 BLOCK_COMMENT("Entry:");
1824 }
1825
1826 array_overlap_test(nooverlap_target, Address::times_2);
1827 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1828 // r9 and r10 may be used to save non-volatile registers
1829
1830 // 'from', 'to' and 'count' are now valid
1831 __ movptr(word_count, count);
1832 __ shrptr(count, 2); // count => qword_count
1833
1834 // Copy from high to low addresses. Use 'to' as scratch.
1835
1836 // Check for and copy trailing word
1837 __ testl(word_count, 1);
1838 __ jccb(Assembler::zero, L_copy_4_bytes);
1839 __ movw(rax, Address(from, word_count, Address::times_2, -2));
1840 __ movw(Address(to, word_count, Address::times_2, -2), rax);
1841
1842 // Check for and copy trailing dword
1843 __ BIND(L_copy_4_bytes);
1844 __ testl(word_count, 2);
1845 __ jcc(Assembler::zero, L_copy_bytes);
1846 __ movl(rax, Address(from, qword_count, Address::times_8));
1847 __ movl(Address(to, qword_count, Address::times_8), rax);
1848 __ jmp(L_copy_bytes);
1849
1850 // Copy trailing qwords
1851 __ BIND(L_copy_8_bytes);
1852 __ movq(rax, Address(from, qword_count, Address::times_8, -8));
1853 __ movq(Address(to, qword_count, Address::times_8, -8), rax);
1854 __ decrement(qword_count);
1855 __ jcc(Assembler::notZero, L_copy_8_bytes);
1856
1857 restore_arg_regs();
1858 inc_counter_np(SharedRuntime::_jshort_array_copy_ctr); // Update counter after rscratch1 is free
1859 __ xorptr(rax, rax); // return 0
1860 __ vzeroupper();
1861 __ leave(); // required for proper stackwalking of RuntimeStub frame
1862 __ ret(0);
1863
1864 // Copy in multi-bytes chunks
1865 copy_bytes_backward(from, to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
1866
1867 restore_arg_regs();
1868 inc_counter_np(SharedRuntime::_jshort_array_copy_ctr); // Update counter after rscratch1 is free
1869 __ xorptr(rax, rax); // return 0
1870 __ vzeroupper();
1871 __ leave(); // required for proper stackwalking of RuntimeStub frame
1872 __ ret(0);
1873
1874 return start;
1875 }
1876
1877 // Arguments:
1878 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1879 // ignored
1880 // is_oop - true => oop array, so generate store check code
1881 // name - stub name string
1882 //
1883 // Inputs:
1884 // c_rarg0 - source array address
1885 // c_rarg1 - destination array address
1886 // c_rarg2 - element count, treated as ssize_t, can be zero
1887 //
1888 // If 'from' and/or 'to' are aligned on 4-byte boundaries, we let
1889 // the hardware handle it. The two dwords within qwords that span
1890 // cache line boundaries will still be loaded and stored atomicly.
1891 //
1892 // Side Effects:
1893 // disjoint_int_copy_entry is set to the no-overlap entry point
1894 // used by generate_conjoint_int_oop_copy().
1895 //
1896 address generate_disjoint_int_oop_copy(bool aligned, bool is_oop, address* entry,
1897 const char *name, bool dest_uninitialized = false) {
1898 __ align(CodeEntryAlignment);
1899 StubCodeMark mark(this, "StubRoutines", name);
1900 address start = __ pc();
1901
1902 Label L_copy_bytes, L_copy_8_bytes, L_copy_4_bytes, L_exit;
1903 const Register from = rdi; // source array address
1904 const Register to = rsi; // destination array address
1905 const Register count = rdx; // elements count
1906 const Register dword_count = rcx;
1907 const Register qword_count = count;
1908 const Register end_from = from; // source array end address
1909 const Register end_to = to; // destination array end address
1910 const Register saved_to = r11; // saved destination array address
1911 // End pointers are inclusive, and if count is not zero they point
1912 // to the last unit copied: end_to[0] := end_from[0]
1913
1914 __ enter(); // required for proper stackwalking of RuntimeStub frame
1915 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1916
1917 if (entry != NULL) {
1918 *entry = __ pc();
1919 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1920 BLOCK_COMMENT("Entry:");
1921 }
1922
1923 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1924 // r9 and r10 may be used to save non-volatile registers
1925 if (is_oop) {
1926 __ movq(saved_to, to);
1927 gen_write_ref_array_pre_barrier(to, count, dest_uninitialized);
1928 }
1929
1930 // 'from', 'to' and 'count' are now valid
1931 __ movptr(dword_count, count);
1932 __ shrptr(count, 1); // count => qword_count
1933
1934 // Copy from low to high addresses. Use 'to' as scratch.
1935 __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
1936 __ lea(end_to, Address(to, qword_count, Address::times_8, -8));
1937 __ negptr(qword_count);
1938 __ jmp(L_copy_bytes);
1939
1940 // Copy trailing qwords
1941 __ BIND(L_copy_8_bytes);
1942 __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
1943 __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
1944 __ increment(qword_count);
1945 __ jcc(Assembler::notZero, L_copy_8_bytes);
1946
1947 // Check for and copy trailing dword
1948 __ BIND(L_copy_4_bytes);
1949 __ testl(dword_count, 1); // Only byte test since the value is 0 or 1
1950 __ jccb(Assembler::zero, L_exit);
1951 __ movl(rax, Address(end_from, 8));
1952 __ movl(Address(end_to, 8), rax);
1953
1954 __ BIND(L_exit);
1955 if (is_oop) {
1956 gen_write_ref_array_post_barrier(saved_to, dword_count, rax);
1957 }
1958 restore_arg_regs();
1959 inc_counter_np(SharedRuntime::_jint_array_copy_ctr); // Update counter after rscratch1 is free
1960 __ vzeroupper();
1961 __ xorptr(rax, rax); // return 0
1962 __ leave(); // required for proper stackwalking of RuntimeStub frame
1963 __ ret(0);
1964
1965 // Copy in multi-bytes chunks
1966 copy_bytes_forward(end_from, end_to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
1967 __ jmp(L_copy_4_bytes);
1968
1969 return start;
1970 }
1971
1972 // Arguments:
1973 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1974 // ignored
1975 // is_oop - true => oop array, so generate store check code
1976 // name - stub name string
1977 //
1978 // Inputs:
1979 // c_rarg0 - source array address
1980 // c_rarg1 - destination array address
1981 // c_rarg2 - element count, treated as ssize_t, can be zero
1982 //
1983 // If 'from' and/or 'to' are aligned on 4-byte boundaries, we let
1984 // the hardware handle it. The two dwords within qwords that span
1985 // cache line boundaries will still be loaded and stored atomicly.
1986 //
1987 address generate_conjoint_int_oop_copy(bool aligned, bool is_oop, address nooverlap_target,
1988 address *entry, const char *name,
1989 bool dest_uninitialized = false) {
1990 __ align(CodeEntryAlignment);
1991 StubCodeMark mark(this, "StubRoutines", name);
1992 address start = __ pc();
1993
1994 Label L_copy_bytes, L_copy_8_bytes, L_copy_2_bytes, L_exit;
1995 const Register from = rdi; // source array address
1996 const Register to = rsi; // destination array address
1997 const Register count = rdx; // elements count
1998 const Register dword_count = rcx;
1999 const Register qword_count = count;
2000
2001 __ enter(); // required for proper stackwalking of RuntimeStub frame
2002 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
2003
2004 if (entry != NULL) {
2005 *entry = __ pc();
2006 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
2007 BLOCK_COMMENT("Entry:");
2008 }
2009
2010 array_overlap_test(nooverlap_target, Address::times_4);
2011 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
2012 // r9 and r10 may be used to save non-volatile registers
2013
2014 if (is_oop) {
2015 // no registers are destroyed by this call
2016 gen_write_ref_array_pre_barrier(to, count, dest_uninitialized);
2017 }
2018
2019 assert_clean_int(count, rax); // Make sure 'count' is clean int.
2020 // 'from', 'to' and 'count' are now valid
2021 __ movptr(dword_count, count);
2022 __ shrptr(count, 1); // count => qword_count
2023
2024 // Copy from high to low addresses. Use 'to' as scratch.
2025
2026 // Check for and copy trailing dword
2027 __ testl(dword_count, 1);
2028 __ jcc(Assembler::zero, L_copy_bytes);
2029 __ movl(rax, Address(from, dword_count, Address::times_4, -4));
2030 __ movl(Address(to, dword_count, Address::times_4, -4), rax);
2031 __ jmp(L_copy_bytes);
2032
2033 // Copy trailing qwords
2034 __ BIND(L_copy_8_bytes);
2035 __ movq(rax, Address(from, qword_count, Address::times_8, -8));
2036 __ movq(Address(to, qword_count, Address::times_8, -8), rax);
2037 __ decrement(qword_count);
2038 __ jcc(Assembler::notZero, L_copy_8_bytes);
2039
2040 if (is_oop) {
2041 __ jmp(L_exit);
2042 }
2043 restore_arg_regs();
2044 inc_counter_np(SharedRuntime::_jint_array_copy_ctr); // Update counter after rscratch1 is free
2045 __ xorptr(rax, rax); // return 0
2046 __ vzeroupper();
2047 __ leave(); // required for proper stackwalking of RuntimeStub frame
2048 __ ret(0);
2049
2050 // Copy in multi-bytes chunks
2051 copy_bytes_backward(from, to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
2052
2053 __ BIND(L_exit);
2054 if (is_oop) {
2055 gen_write_ref_array_post_barrier(to, dword_count, rax);
2056 }
2057 restore_arg_regs();
2058 inc_counter_np(SharedRuntime::_jint_array_copy_ctr); // Update counter after rscratch1 is free
2059 __ xorptr(rax, rax); // return 0
2060 __ vzeroupper();
2061 __ leave(); // required for proper stackwalking of RuntimeStub frame
2062 __ ret(0);
2063
2064 return start;
2065 }
2066
2067 // Arguments:
2068 // aligned - true => Input and output aligned on a HeapWord boundary == 8 bytes
2069 // ignored
2070 // is_oop - true => oop array, so generate store check code
2071 // name - stub name string
2072 //
2073 // Inputs:
2074 // c_rarg0 - source array address
2075 // c_rarg1 - destination array address
2076 // c_rarg2 - element count, treated as ssize_t, can be zero
2077 //
2078 // Side Effects:
2079 // disjoint_oop_copy_entry or disjoint_long_copy_entry is set to the
2080 // no-overlap entry point used by generate_conjoint_long_oop_copy().
2081 //
2082 address generate_disjoint_long_oop_copy(bool aligned, bool is_oop, address *entry,
2083 const char *name, bool dest_uninitialized = false) {
2084 __ align(CodeEntryAlignment);
2085 StubCodeMark mark(this, "StubRoutines", name);
2086 address start = __ pc();
2087
2088 Label L_copy_bytes, L_copy_8_bytes, L_exit;
2089 const Register from = rdi; // source array address
2090 const Register to = rsi; // destination array address
2091 const Register qword_count = rdx; // elements count
2092 const Register end_from = from; // source array end address
2093 const Register end_to = rcx; // destination array end address
2094 const Register saved_to = to;
2095 const Register saved_count = r11;
2096 // End pointers are inclusive, and if count is not zero they point
2097 // to the last unit copied: end_to[0] := end_from[0]
2098
2099 __ enter(); // required for proper stackwalking of RuntimeStub frame
2100 // Save no-overlap entry point for generate_conjoint_long_oop_copy()
2101 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
2102
2103 if (entry != NULL) {
2104 *entry = __ pc();
2105 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
2106 BLOCK_COMMENT("Entry:");
2107 }
2108
2109 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
2110 // r9 and r10 may be used to save non-volatile registers
2111 // 'from', 'to' and 'qword_count' are now valid
2112 if (is_oop) {
2113 // Save to and count for store barrier
2114 __ movptr(saved_count, qword_count);
2115 // no registers are destroyed by this call
2116 gen_write_ref_array_pre_barrier(to, qword_count, dest_uninitialized);
2117 }
2118
2119 // Copy from low to high addresses. Use 'to' as scratch.
2120 __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
2121 __ lea(end_to, Address(to, qword_count, Address::times_8, -8));
2122 __ negptr(qword_count);
2123 __ jmp(L_copy_bytes);
2124
2125 // Copy trailing qwords
2126 __ BIND(L_copy_8_bytes);
2127 __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
2128 __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
2129 __ increment(qword_count);
2130 __ jcc(Assembler::notZero, L_copy_8_bytes);
2131
2132 if (is_oop) {
2133 __ jmp(L_exit);
2134 } else {
2135 restore_arg_regs();
2136 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); // Update counter after rscratch1 is free
2137 __ xorptr(rax, rax); // return 0
2138 __ vzeroupper();
2139 __ leave(); // required for proper stackwalking of RuntimeStub frame
2140 __ ret(0);
2141 }
2142
2143 // Copy in multi-bytes chunks
2144 copy_bytes_forward(end_from, end_to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
2145
2146 if (is_oop) {
2147 __ BIND(L_exit);
2148 gen_write_ref_array_post_barrier(saved_to, saved_count, rax);
2149 }
2150 restore_arg_regs();
2151 if (is_oop) {
2152 inc_counter_np(SharedRuntime::_oop_array_copy_ctr); // Update counter after rscratch1 is free
2153 } else {
2154 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); // Update counter after rscratch1 is free
2155 }
2156 __ vzeroupper();
2157 __ xorptr(rax, rax); // return 0
2158 __ leave(); // required for proper stackwalking of RuntimeStub frame
2159 __ ret(0);
2160
2161 return start;
2162 }
2163
2164 // Arguments:
2165 // aligned - true => Input and output aligned on a HeapWord boundary == 8 bytes
2166 // ignored
2167 // is_oop - true => oop array, so generate store check code
2168 // name - stub name string
2169 //
2170 // Inputs:
2171 // c_rarg0 - source array address
2172 // c_rarg1 - destination array address
2173 // c_rarg2 - element count, treated as ssize_t, can be zero
2174 //
2175 address generate_conjoint_long_oop_copy(bool aligned, bool is_oop,
2176 address nooverlap_target, address *entry,
2177 const char *name, bool dest_uninitialized = false) {
2178 __ align(CodeEntryAlignment);
2179 StubCodeMark mark(this, "StubRoutines", name);
2180 address start = __ pc();
2181
2182 Label L_copy_bytes, L_copy_8_bytes, L_exit;
2183 const Register from = rdi; // source array address
2184 const Register to = rsi; // destination array address
2185 const Register qword_count = rdx; // elements count
2186 const Register saved_count = rcx;
2187
2188 __ enter(); // required for proper stackwalking of RuntimeStub frame
2189 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
2190
2191 if (entry != NULL) {
2192 *entry = __ pc();
2193 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
2194 BLOCK_COMMENT("Entry:");
2195 }
2196
2197 array_overlap_test(nooverlap_target, Address::times_8);
2198 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
2199 // r9 and r10 may be used to save non-volatile registers
2200 // 'from', 'to' and 'qword_count' are now valid
2201 if (is_oop) {
2202 // Save to and count for store barrier
2203 __ movptr(saved_count, qword_count);
2204 // No registers are destroyed by this call
2205 gen_write_ref_array_pre_barrier(to, saved_count, dest_uninitialized);
2206 }
2207
2208 __ jmp(L_copy_bytes);
2209
2210 // Copy trailing qwords
2211 __ BIND(L_copy_8_bytes);
2212 __ movq(rax, Address(from, qword_count, Address::times_8, -8));
2213 __ movq(Address(to, qword_count, Address::times_8, -8), rax);
2214 __ decrement(qword_count);
2215 __ jcc(Assembler::notZero, L_copy_8_bytes);
2216
2217 if (is_oop) {
2218 __ jmp(L_exit);
2219 } else {
2220 restore_arg_regs();
2221 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); // Update counter after rscratch1 is free
2222 __ xorptr(rax, rax); // return 0
2223 __ vzeroupper();
2224 __ leave(); // required for proper stackwalking of RuntimeStub frame
2225 __ ret(0);
2226 }
2227
2228 // Copy in multi-bytes chunks
2229 copy_bytes_backward(from, to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
2230
2231 if (is_oop) {
2232 __ BIND(L_exit);
2233 gen_write_ref_array_post_barrier(to, saved_count, rax);
2234 }
2235 restore_arg_regs();
2236 if (is_oop) {
2237 inc_counter_np(SharedRuntime::_oop_array_copy_ctr); // Update counter after rscratch1 is free
2238 } else {
2239 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); // Update counter after rscratch1 is free
2240 }
2241 __ vzeroupper();
2242 __ xorptr(rax, rax); // return 0
2243 __ leave(); // required for proper stackwalking of RuntimeStub frame
2244 __ ret(0);
2245
2246 return start;
2247 }
2248
2249
2250 // Helper for generating a dynamic type check.
2251 // Smashes no registers.
2252 void generate_type_check(Register sub_klass,
2253 Register super_check_offset,
2254 Register super_klass,
2255 Label& L_success) {
2256 assert_different_registers(sub_klass, super_check_offset, super_klass);
2257
2258 BLOCK_COMMENT("type_check:");
2259
2260 Label L_miss;
2261
2262 __ check_klass_subtype_fast_path(sub_klass, super_klass, noreg, &L_success, &L_miss, NULL,
2263 super_check_offset);
2264 __ check_klass_subtype_slow_path(sub_klass, super_klass, noreg, noreg, &L_success, NULL);
2265
2266 // Fall through on failure!
2267 __ BIND(L_miss);
2268 }
2269
2270 //
2271 // Generate checkcasting array copy stub
2272 //
2273 // Input:
2274 // c_rarg0 - source array address
2275 // c_rarg1 - destination array address
2276 // c_rarg2 - element count, treated as ssize_t, can be zero
2277 // c_rarg3 - size_t ckoff (super_check_offset)
2278 // not Win64
2279 // c_rarg4 - oop ckval (super_klass)
2280 // Win64
2281 // rsp+40 - oop ckval (super_klass)
2282 //
2283 // Output:
2284 // rax == 0 - success
2285 // rax == -1^K - failure, where K is partial transfer count
2286 //
2287 address generate_checkcast_copy(const char *name, address *entry,
2288 bool dest_uninitialized = false) {
2289
2290 Label L_load_element, L_store_element, L_do_card_marks, L_done;
2291
2292 // Input registers (after setup_arg_regs)
2293 const Register from = rdi; // source array address
2294 const Register to = rsi; // destination array address
2295 const Register length = rdx; // elements count
2296 const Register ckoff = rcx; // super_check_offset
2297 const Register ckval = r8; // super_klass
2298
2299 // Registers used as temps (r13, r14 are save-on-entry)
2300 const Register end_from = from; // source array end address
2301 const Register end_to = r13; // destination array end address
2302 const Register count = rdx; // -(count_remaining)
2303 const Register r14_length = r14; // saved copy of length
2304 // End pointers are inclusive, and if length is not zero they point
2305 // to the last unit copied: end_to[0] := end_from[0]
2306
2307 const Register rax_oop = rax; // actual oop copied
2308 const Register r11_klass = r11; // oop._klass
2309
2310 //---------------------------------------------------------------
2311 // Assembler stub will be used for this call to arraycopy
2312 // if the two arrays are subtypes of Object[] but the
2313 // destination array type is not equal to or a supertype
2314 // of the source type. Each element must be separately
2315 // checked.
2316
2317 __ align(CodeEntryAlignment);
2318 StubCodeMark mark(this, "StubRoutines", name);
2319 address start = __ pc();
2320
2321 __ enter(); // required for proper stackwalking of RuntimeStub frame
2322
2323 #ifdef ASSERT
2324 // caller guarantees that the arrays really are different
2325 // otherwise, we would have to make conjoint checks
2326 { Label L;
2327 array_overlap_test(L, TIMES_OOP);
2328 __ stop("checkcast_copy within a single array");
2329 __ bind(L);
2330 }
2331 #endif //ASSERT
2332
2333 setup_arg_regs(4); // from => rdi, to => rsi, length => rdx
2334 // ckoff => rcx, ckval => r8
2335 // r9 and r10 may be used to save non-volatile registers
2336 #ifdef _WIN64
2337 // last argument (#4) is on stack on Win64
2338 __ movptr(ckval, Address(rsp, 6 * wordSize));
2339 #endif
2340
2341 // Caller of this entry point must set up the argument registers.
2342 if (entry != NULL) {
2343 *entry = __ pc();
2344 BLOCK_COMMENT("Entry:");
2345 }
2346
2347 // allocate spill slots for r13, r14
2348 enum {
2349 saved_r13_offset,
2350 saved_r14_offset,
2351 saved_rbp_offset
2352 };
2353 __ subptr(rsp, saved_rbp_offset * wordSize);
2354 __ movptr(Address(rsp, saved_r13_offset * wordSize), r13);
2355 __ movptr(Address(rsp, saved_r14_offset * wordSize), r14);
2356
2357 // check that int operands are properly extended to size_t
2358 assert_clean_int(length, rax);
2359 assert_clean_int(ckoff, rax);
2360
2361 #ifdef ASSERT
2362 BLOCK_COMMENT("assert consistent ckoff/ckval");
2363 // The ckoff and ckval must be mutually consistent,
2364 // even though caller generates both.
2365 { Label L;
2366 int sco_offset = in_bytes(Klass::super_check_offset_offset());
2367 __ cmpl(ckoff, Address(ckval, sco_offset));
2368 __ jcc(Assembler::equal, L);
2369 __ stop("super_check_offset inconsistent");
2370 __ bind(L);
2371 }
2372 #endif //ASSERT
2373
2374 // Loop-invariant addresses. They are exclusive end pointers.
2375 Address end_from_addr(from, length, TIMES_OOP, 0);
2376 Address end_to_addr(to, length, TIMES_OOP, 0);
2377 // Loop-variant addresses. They assume post-incremented count < 0.
2378 Address from_element_addr(end_from, count, TIMES_OOP, 0);
2379 Address to_element_addr(end_to, count, TIMES_OOP, 0);
2380
2381 gen_write_ref_array_pre_barrier(to, count, dest_uninitialized);
2382
2383 // Copy from low to high addresses, indexed from the end of each array.
2384 __ lea(end_from, end_from_addr);
2385 __ lea(end_to, end_to_addr);
2386 __ movptr(r14_length, length); // save a copy of the length
2387 assert(length == count, ""); // else fix next line:
2388 __ negptr(count); // negate and test the length
2389 __ jcc(Assembler::notZero, L_load_element);
2390
2391 // Empty array: Nothing to do.
2392 __ xorptr(rax, rax); // return 0 on (trivial) success
2393 __ jmp(L_done);
2394
2395 // ======== begin loop ========
2396 // (Loop is rotated; its entry is L_load_element.)
2397 // Loop control:
2398 // for (count = -count; count != 0; count++)
2399 // Base pointers src, dst are biased by 8*(count-1),to last element.
2400 __ align(OptoLoopAlignment);
2401
2402 __ BIND(L_store_element);
2403 __ store_heap_oop(to_element_addr, rax_oop); // store the oop
2404 __ increment(count); // increment the count toward zero
2405 __ jcc(Assembler::zero, L_do_card_marks);
2406
2407 // ======== loop entry is here ========
2408 __ BIND(L_load_element);
2409 __ load_heap_oop(rax_oop, from_element_addr); // load the oop
2410 __ testptr(rax_oop, rax_oop);
2411 __ jcc(Assembler::zero, L_store_element);
2412
2413 __ load_klass(r11_klass, rax_oop);// query the object klass
2414 generate_type_check(r11_klass, ckoff, ckval, L_store_element);
2415 // ======== end loop ========
2416
2417 // It was a real error; we must depend on the caller to finish the job.
2418 // Register rdx = -1 * number of *remaining* oops, r14 = *total* oops.
2419 // Emit GC store barriers for the oops we have copied (r14 + rdx),
2420 // and report their number to the caller.
2421 assert_different_registers(rax, r14_length, count, to, end_to, rcx, rscratch1);
2422 Label L_post_barrier;
2423 __ addptr(r14_length, count); // K = (original - remaining) oops
2424 __ movptr(rax, r14_length); // save the value
2425 __ notptr(rax); // report (-1^K) to caller (does not affect flags)
2426 __ jccb(Assembler::notZero, L_post_barrier);
2427 __ jmp(L_done); // K == 0, nothing was copied, skip post barrier
2428
2429 // Come here on success only.
2430 __ BIND(L_do_card_marks);
2431 __ xorptr(rax, rax); // return 0 on success
2432
2433 __ BIND(L_post_barrier);
2434 gen_write_ref_array_post_barrier(to, r14_length, rscratch1);
2435
2436 // Common exit point (success or failure).
2437 __ BIND(L_done);
2438 __ movptr(r13, Address(rsp, saved_r13_offset * wordSize));
2439 __ movptr(r14, Address(rsp, saved_r14_offset * wordSize));
2440 restore_arg_regs();
2441 inc_counter_np(SharedRuntime::_checkcast_array_copy_ctr); // Update counter after rscratch1 is free
2442 __ leave(); // required for proper stackwalking of RuntimeStub frame
2443 __ ret(0);
2444
2445 return start;
2446 }
2447
2448 //
2449 // Generate 'unsafe' array copy stub
2450 // Though just as safe as the other stubs, it takes an unscaled
2451 // size_t argument instead of an element count.
2452 //
2453 // Input:
2454 // c_rarg0 - source array address
2455 // c_rarg1 - destination array address
2456 // c_rarg2 - byte count, treated as ssize_t, can be zero
2457 //
2458 // Examines the alignment of the operands and dispatches
2459 // to a long, int, short, or byte copy loop.
2460 //
2461 address generate_unsafe_copy(const char *name,
2462 address byte_copy_entry, address short_copy_entry,
2463 address int_copy_entry, address long_copy_entry) {
2464
2465 Label L_long_aligned, L_int_aligned, L_short_aligned;
2466
2467 // Input registers (before setup_arg_regs)
2468 const Register from = c_rarg0; // source array address
2469 const Register to = c_rarg1; // destination array address
2470 const Register size = c_rarg2; // byte count (size_t)
2471
2472 // Register used as a temp
2473 const Register bits = rax; // test copy of low bits
2474
2475 __ align(CodeEntryAlignment);
2476 StubCodeMark mark(this, "StubRoutines", name);
2477 address start = __ pc();
2478
2479 __ enter(); // required for proper stackwalking of RuntimeStub frame
2480
2481 // bump this on entry, not on exit:
2482 inc_counter_np(SharedRuntime::_unsafe_array_copy_ctr);
2483
2484 __ mov(bits, from);
2485 __ orptr(bits, to);
2486 __ orptr(bits, size);
2487
2488 __ testb(bits, BytesPerLong-1);
2489 __ jccb(Assembler::zero, L_long_aligned);
2490
2491 __ testb(bits, BytesPerInt-1);
2492 __ jccb(Assembler::zero, L_int_aligned);
2493
2494 __ testb(bits, BytesPerShort-1);
2495 __ jump_cc(Assembler::notZero, RuntimeAddress(byte_copy_entry));
2496
2497 __ BIND(L_short_aligned);
2498 __ shrptr(size, LogBytesPerShort); // size => short_count
2499 __ jump(RuntimeAddress(short_copy_entry));
2500
2501 __ BIND(L_int_aligned);
2502 __ shrptr(size, LogBytesPerInt); // size => int_count
2503 __ jump(RuntimeAddress(int_copy_entry));
2504
2505 __ BIND(L_long_aligned);
2506 __ shrptr(size, LogBytesPerLong); // size => qword_count
2507 __ jump(RuntimeAddress(long_copy_entry));
2508
2509 return start;
2510 }
2511
2512 // Perform range checks on the proposed arraycopy.
2513 // Kills temp, but nothing else.
2514 // Also, clean the sign bits of src_pos and dst_pos.
2515 void arraycopy_range_checks(Register src, // source array oop (c_rarg0)
2516 Register src_pos, // source position (c_rarg1)
2517 Register dst, // destination array oo (c_rarg2)
2518 Register dst_pos, // destination position (c_rarg3)
2519 Register length,
2520 Register temp,
2521 Label& L_failed) {
2522 BLOCK_COMMENT("arraycopy_range_checks:");
2523
2524 // if (src_pos + length > arrayOop(src)->length()) FAIL;
2525 __ movl(temp, length);
2526 __ addl(temp, src_pos); // src_pos + length
2527 __ cmpl(temp, Address(src, arrayOopDesc::length_offset_in_bytes()));
2528 __ jcc(Assembler::above, L_failed);
2529
2530 // if (dst_pos + length > arrayOop(dst)->length()) FAIL;
2531 __ movl(temp, length);
2532 __ addl(temp, dst_pos); // dst_pos + length
2533 __ cmpl(temp, Address(dst, arrayOopDesc::length_offset_in_bytes()));
2534 __ jcc(Assembler::above, L_failed);
2535
2536 // Have to clean up high 32-bits of 'src_pos' and 'dst_pos'.
2537 // Move with sign extension can be used since they are positive.
2538 __ movslq(src_pos, src_pos);
2539 __ movslq(dst_pos, dst_pos);
2540
2541 BLOCK_COMMENT("arraycopy_range_checks done");
2542 }
2543
2544 //
2545 // Generate generic array copy stubs
2546 //
2547 // Input:
2548 // c_rarg0 - src oop
2549 // c_rarg1 - src_pos (32-bits)
2550 // c_rarg2 - dst oop
2551 // c_rarg3 - dst_pos (32-bits)
2552 // not Win64
2553 // c_rarg4 - element count (32-bits)
2554 // Win64
2555 // rsp+40 - element count (32-bits)
2556 //
2557 // Output:
2558 // rax == 0 - success
2559 // rax == -1^K - failure, where K is partial transfer count
2560 //
2561 address generate_generic_copy(const char *name,
2562 address byte_copy_entry, address short_copy_entry,
2563 address int_copy_entry, address oop_copy_entry,
2564 address long_copy_entry, address checkcast_copy_entry) {
2565
2566 Label L_failed, L_failed_0, L_objArray;
2567 Label L_copy_bytes, L_copy_shorts, L_copy_ints, L_copy_longs;
2568
2569 // Input registers
2570 const Register src = c_rarg0; // source array oop
2571 const Register src_pos = c_rarg1; // source position
2572 const Register dst = c_rarg2; // destination array oop
2573 const Register dst_pos = c_rarg3; // destination position
2574 #ifndef _WIN64
2575 const Register length = c_rarg4;
2576 #else
2577 const Address length(rsp, 6 * wordSize); // elements count is on stack on Win64
2578 #endif
2579
2580 { int modulus = CodeEntryAlignment;
2581 int target = modulus - 5; // 5 = sizeof jmp(L_failed)
2582 int advance = target - (__ offset() % modulus);
2583 if (advance < 0) advance += modulus;
2584 if (advance > 0) __ nop(advance);
2585 }
2586 StubCodeMark mark(this, "StubRoutines", name);
2587
2588 // Short-hop target to L_failed. Makes for denser prologue code.
2589 __ BIND(L_failed_0);
2590 __ jmp(L_failed);
2591 assert(__ offset() % CodeEntryAlignment == 0, "no further alignment needed");
2592
2593 __ align(CodeEntryAlignment);
2594 address start = __ pc();
2595
2596 __ enter(); // required for proper stackwalking of RuntimeStub frame
2597
2598 // bump this on entry, not on exit:
2599 inc_counter_np(SharedRuntime::_generic_array_copy_ctr);
2600
2601 //-----------------------------------------------------------------------
2602 // Assembler stub will be used for this call to arraycopy
2603 // if the following conditions are met:
2604 //
2605 // (1) src and dst must not be null.
2606 // (2) src_pos must not be negative.
2607 // (3) dst_pos must not be negative.
2608 // (4) length must not be negative.
2609 // (5) src klass and dst klass should be the same and not NULL.
2610 // (6) src and dst should be arrays.
2611 // (7) src_pos + length must not exceed length of src.
2612 // (8) dst_pos + length must not exceed length of dst.
2613 //
2614
2615 // if (src == NULL) return -1;
2616 __ testptr(src, src); // src oop
2617 size_t j1off = __ offset();
2618 __ jccb(Assembler::zero, L_failed_0);
2619
2620 // if (src_pos < 0) return -1;
2621 __ testl(src_pos, src_pos); // src_pos (32-bits)
2622 __ jccb(Assembler::negative, L_failed_0);
2623
2624 // if (dst == NULL) return -1;
2625 __ testptr(dst, dst); // dst oop
2626 __ jccb(Assembler::zero, L_failed_0);
2627
2628 // if (dst_pos < 0) return -1;
2629 __ testl(dst_pos, dst_pos); // dst_pos (32-bits)
2630 size_t j4off = __ offset();
2631 __ jccb(Assembler::negative, L_failed_0);
2632
2633 // The first four tests are very dense code,
2634 // but not quite dense enough to put four
2635 // jumps in a 16-byte instruction fetch buffer.
2636 // That's good, because some branch predicters
2637 // do not like jumps so close together.
2638 // Make sure of this.
2639 guarantee(((j1off ^ j4off) & ~15) != 0, "I$ line of 1st & 4th jumps");
2640
2641 // registers used as temp
2642 const Register r11_length = r11; // elements count to copy
2643 const Register r10_src_klass = r10; // array klass
2644
2645 // if (length < 0) return -1;
2646 __ movl(r11_length, length); // length (elements count, 32-bits value)
2647 __ testl(r11_length, r11_length);
2648 __ jccb(Assembler::negative, L_failed_0);
2649
2650 __ load_klass(r10_src_klass, src);
2651 #ifdef ASSERT
2652 // assert(src->klass() != NULL);
2653 {
2654 BLOCK_COMMENT("assert klasses not null {");
2655 Label L1, L2;
2656 __ testptr(r10_src_klass, r10_src_klass);
2657 __ jcc(Assembler::notZero, L2); // it is broken if klass is NULL
2658 __ bind(L1);
2659 __ stop("broken null klass");
2660 __ bind(L2);
2661 __ load_klass(rax, dst);
2662 __ cmpq(rax, 0);
2663 __ jcc(Assembler::equal, L1); // this would be broken also
2664 BLOCK_COMMENT("} assert klasses not null done");
2665 }
2666 #endif
2667
2668 // Load layout helper (32-bits)
2669 //
2670 // |array_tag| | header_size | element_type | |log2_element_size|
2671 // 32 30 24 16 8 2 0
2672 //
2673 // array_tag: typeArray = 0x3, objArray = 0x2, non-array = 0x0
2674 //
2675
2676 const int lh_offset = in_bytes(Klass::layout_helper_offset());
2677
2678 // Handle objArrays completely differently...
2679 const jint objArray_lh = Klass::array_layout_helper(T_OBJECT);
2680 __ cmpl(Address(r10_src_klass, lh_offset), objArray_lh);
2681 __ jcc(Assembler::equal, L_objArray);
2682
2683 // if (src->klass() != dst->klass()) return -1;
2684 __ load_klass(rax, dst);
2685 __ cmpq(r10_src_klass, rax);
2686 __ jcc(Assembler::notEqual, L_failed);
2687
2688 const Register rax_lh = rax; // layout helper
2689 __ movl(rax_lh, Address(r10_src_klass, lh_offset));
2690
2691 // if (!src->is_Array()) return -1;
2692 __ cmpl(rax_lh, Klass::_lh_neutral_value);
2693 __ jcc(Assembler::greaterEqual, L_failed);
2694
2695 // At this point, it is known to be a typeArray (array_tag 0x3).
2696 #ifdef ASSERT
2697 {
2698 BLOCK_COMMENT("assert primitive array {");
2699 Label L;
2700 __ cmpl(rax_lh, (Klass::_lh_array_tag_type_value << Klass::_lh_array_tag_shift));
2701 __ jcc(Assembler::greaterEqual, L);
2702 __ stop("must be a primitive array");
2703 __ bind(L);
2704 BLOCK_COMMENT("} assert primitive array done");
2705 }
2706 #endif
2707
2708 arraycopy_range_checks(src, src_pos, dst, dst_pos, r11_length,
2709 r10, L_failed);
2710
2711 // TypeArrayKlass
2712 //
2713 // src_addr = (src + array_header_in_bytes()) + (src_pos << log2elemsize);
2714 // dst_addr = (dst + array_header_in_bytes()) + (dst_pos << log2elemsize);
2715 //
2716
2717 const Register r10_offset = r10; // array offset
2718 const Register rax_elsize = rax_lh; // element size
2719
2720 __ movl(r10_offset, rax_lh);
2721 __ shrl(r10_offset, Klass::_lh_header_size_shift);
2722 __ andptr(r10_offset, Klass::_lh_header_size_mask); // array_offset
2723 __ addptr(src, r10_offset); // src array offset
2724 __ addptr(dst, r10_offset); // dst array offset
2725 BLOCK_COMMENT("choose copy loop based on element size");
2726 __ andl(rax_lh, Klass::_lh_log2_element_size_mask); // rax_lh -> rax_elsize
2727
2728 // next registers should be set before the jump to corresponding stub
2729 const Register from = c_rarg0; // source array address
2730 const Register to = c_rarg1; // destination array address
2731 const Register count = c_rarg2; // elements count
2732
2733 // 'from', 'to', 'count' registers should be set in such order
2734 // since they are the same as 'src', 'src_pos', 'dst'.
2735
2736 __ BIND(L_copy_bytes);
2737 __ cmpl(rax_elsize, 0);
2738 __ jccb(Assembler::notEqual, L_copy_shorts);
2739 __ lea(from, Address(src, src_pos, Address::times_1, 0));// src_addr
2740 __ lea(to, Address(dst, dst_pos, Address::times_1, 0));// dst_addr
2741 __ movl2ptr(count, r11_length); // length
2742 __ jump(RuntimeAddress(byte_copy_entry));
2743
2744 __ BIND(L_copy_shorts);
2745 __ cmpl(rax_elsize, LogBytesPerShort);
2746 __ jccb(Assembler::notEqual, L_copy_ints);
2747 __ lea(from, Address(src, src_pos, Address::times_2, 0));// src_addr
2748 __ lea(to, Address(dst, dst_pos, Address::times_2, 0));// dst_addr
2749 __ movl2ptr(count, r11_length); // length
2750 __ jump(RuntimeAddress(short_copy_entry));
2751
2752 __ BIND(L_copy_ints);
2753 __ cmpl(rax_elsize, LogBytesPerInt);
2754 __ jccb(Assembler::notEqual, L_copy_longs);
2755 __ lea(from, Address(src, src_pos, Address::times_4, 0));// src_addr
2756 __ lea(to, Address(dst, dst_pos, Address::times_4, 0));// dst_addr
2757 __ movl2ptr(count, r11_length); // length
2758 __ jump(RuntimeAddress(int_copy_entry));
2759
2760 __ BIND(L_copy_longs);
2761 #ifdef ASSERT
2762 {
2763 BLOCK_COMMENT("assert long copy {");
2764 Label L;
2765 __ cmpl(rax_elsize, LogBytesPerLong);
2766 __ jcc(Assembler::equal, L);
2767 __ stop("must be long copy, but elsize is wrong");
2768 __ bind(L);
2769 BLOCK_COMMENT("} assert long copy done");
2770 }
2771 #endif
2772 __ lea(from, Address(src, src_pos, Address::times_8, 0));// src_addr
2773 __ lea(to, Address(dst, dst_pos, Address::times_8, 0));// dst_addr
2774 __ movl2ptr(count, r11_length); // length
2775 __ jump(RuntimeAddress(long_copy_entry));
2776
2777 // ObjArrayKlass
2778 __ BIND(L_objArray);
2779 // live at this point: r10_src_klass, r11_length, src[_pos], dst[_pos]
2780
2781 Label L_plain_copy, L_checkcast_copy;
2782 // test array classes for subtyping
2783 __ load_klass(rax, dst);
2784 __ cmpq(r10_src_klass, rax); // usual case is exact equality
2785 __ jcc(Assembler::notEqual, L_checkcast_copy);
2786
2787 // Identically typed arrays can be copied without element-wise checks.
2788 arraycopy_range_checks(src, src_pos, dst, dst_pos, r11_length,
2789 r10, L_failed);
2790
2791 __ lea(from, Address(src, src_pos, TIMES_OOP,
2792 arrayOopDesc::base_offset_in_bytes(T_OBJECT))); // src_addr
2793 __ lea(to, Address(dst, dst_pos, TIMES_OOP,
2794 arrayOopDesc::base_offset_in_bytes(T_OBJECT))); // dst_addr
2795 __ movl2ptr(count, r11_length); // length
2796 __ BIND(L_plain_copy);
2797 __ jump(RuntimeAddress(oop_copy_entry));
2798
2799 __ BIND(L_checkcast_copy);
2800 // live at this point: r10_src_klass, r11_length, rax (dst_klass)
2801 {
2802 // Before looking at dst.length, make sure dst is also an objArray.
2803 __ cmpl(Address(rax, lh_offset), objArray_lh);
2804 __ jcc(Assembler::notEqual, L_failed);
2805
2806 // It is safe to examine both src.length and dst.length.
2807 arraycopy_range_checks(src, src_pos, dst, dst_pos, r11_length,
2808 rax, L_failed);
2809
2810 const Register r11_dst_klass = r11;
2811 __ load_klass(r11_dst_klass, dst); // reload
2812
2813 // Marshal the base address arguments now, freeing registers.
2814 __ lea(from, Address(src, src_pos, TIMES_OOP,
2815 arrayOopDesc::base_offset_in_bytes(T_OBJECT)));
2816 __ lea(to, Address(dst, dst_pos, TIMES_OOP,
2817 arrayOopDesc::base_offset_in_bytes(T_OBJECT)));
2818 __ movl(count, length); // length (reloaded)
2819 Register sco_temp = c_rarg3; // this register is free now
2820 assert_different_registers(from, to, count, sco_temp,
2821 r11_dst_klass, r10_src_klass);
2822 assert_clean_int(count, sco_temp);
2823
2824 // Generate the type check.
2825 const int sco_offset = in_bytes(Klass::super_check_offset_offset());
2826 __ movl(sco_temp, Address(r11_dst_klass, sco_offset));
2827 assert_clean_int(sco_temp, rax);
2828 generate_type_check(r10_src_klass, sco_temp, r11_dst_klass, L_plain_copy);
2829
2830 // Fetch destination element klass from the ObjArrayKlass header.
2831 int ek_offset = in_bytes(ObjArrayKlass::element_klass_offset());
2832 __ movptr(r11_dst_klass, Address(r11_dst_klass, ek_offset));
2833 __ movl( sco_temp, Address(r11_dst_klass, sco_offset));
2834 assert_clean_int(sco_temp, rax);
2835
2836 // the checkcast_copy loop needs two extra arguments:
2837 assert(c_rarg3 == sco_temp, "#3 already in place");
2838 // Set up arguments for checkcast_copy_entry.
2839 setup_arg_regs(4);
2840 __ movptr(r8, r11_dst_klass); // dst.klass.element_klass, r8 is c_rarg4 on Linux/Solaris
2841 __ jump(RuntimeAddress(checkcast_copy_entry));
2842 }
2843
2844 __ BIND(L_failed);
2845 __ xorptr(rax, rax);
2846 __ notptr(rax); // return -1
2847 __ leave(); // required for proper stackwalking of RuntimeStub frame
2848 __ ret(0);
2849
2850 return start;
2851 }
2852
2853 void generate_arraycopy_stubs() {
2854 address entry;
2855 address entry_jbyte_arraycopy;
2856 address entry_jshort_arraycopy;
2857 address entry_jint_arraycopy;
2858 address entry_oop_arraycopy;
2859 address entry_jlong_arraycopy;
2860 address entry_checkcast_arraycopy;
2861
2862 StubRoutines::_jbyte_disjoint_arraycopy = generate_disjoint_byte_copy(false, &entry,
2863 "jbyte_disjoint_arraycopy");
2864 StubRoutines::_jbyte_arraycopy = generate_conjoint_byte_copy(false, entry, &entry_jbyte_arraycopy,
2865 "jbyte_arraycopy");
2866
2867 StubRoutines::_jshort_disjoint_arraycopy = generate_disjoint_short_copy(false, &entry,
2868 "jshort_disjoint_arraycopy");
2869 StubRoutines::_jshort_arraycopy = generate_conjoint_short_copy(false, entry, &entry_jshort_arraycopy,
2870 "jshort_arraycopy");
2871
2872 StubRoutines::_jint_disjoint_arraycopy = generate_disjoint_int_oop_copy(false, false, &entry,
2873 "jint_disjoint_arraycopy");
2874 StubRoutines::_jint_arraycopy = generate_conjoint_int_oop_copy(false, false, entry,
2875 &entry_jint_arraycopy, "jint_arraycopy");
2876
2877 StubRoutines::_jlong_disjoint_arraycopy = generate_disjoint_long_oop_copy(false, false, &entry,
2878 "jlong_disjoint_arraycopy");
2879 StubRoutines::_jlong_arraycopy = generate_conjoint_long_oop_copy(false, false, entry,
2880 &entry_jlong_arraycopy, "jlong_arraycopy");
2881
2882
2883 if (UseCompressedOops) {
2884 StubRoutines::_oop_disjoint_arraycopy = generate_disjoint_int_oop_copy(false, true, &entry,
2885 "oop_disjoint_arraycopy");
2886 StubRoutines::_oop_arraycopy = generate_conjoint_int_oop_copy(false, true, entry,
2887 &entry_oop_arraycopy, "oop_arraycopy");
2888 StubRoutines::_oop_disjoint_arraycopy_uninit = generate_disjoint_int_oop_copy(false, true, &entry,
2889 "oop_disjoint_arraycopy_uninit",
2890 /*dest_uninitialized*/true);
2891 StubRoutines::_oop_arraycopy_uninit = generate_conjoint_int_oop_copy(false, true, entry,
2892 NULL, "oop_arraycopy_uninit",
2893 /*dest_uninitialized*/true);
2894 } else {
2895 StubRoutines::_oop_disjoint_arraycopy = generate_disjoint_long_oop_copy(false, true, &entry,
2896 "oop_disjoint_arraycopy");
2897 StubRoutines::_oop_arraycopy = generate_conjoint_long_oop_copy(false, true, entry,
2898 &entry_oop_arraycopy, "oop_arraycopy");
2899 StubRoutines::_oop_disjoint_arraycopy_uninit = generate_disjoint_long_oop_copy(false, true, &entry,
2900 "oop_disjoint_arraycopy_uninit",
2901 /*dest_uninitialized*/true);
2902 StubRoutines::_oop_arraycopy_uninit = generate_conjoint_long_oop_copy(false, true, entry,
2903 NULL, "oop_arraycopy_uninit",
2904 /*dest_uninitialized*/true);
2905 }
2906
2907 StubRoutines::_checkcast_arraycopy = generate_checkcast_copy("checkcast_arraycopy", &entry_checkcast_arraycopy);
2908 StubRoutines::_checkcast_arraycopy_uninit = generate_checkcast_copy("checkcast_arraycopy_uninit", NULL,
2909 /*dest_uninitialized*/true);
2910
2911 StubRoutines::_unsafe_arraycopy = generate_unsafe_copy("unsafe_arraycopy",
2912 entry_jbyte_arraycopy,
2913 entry_jshort_arraycopy,
2914 entry_jint_arraycopy,
2915 entry_jlong_arraycopy);
2916 StubRoutines::_generic_arraycopy = generate_generic_copy("generic_arraycopy",
2917 entry_jbyte_arraycopy,
2918 entry_jshort_arraycopy,
2919 entry_jint_arraycopy,
2920 entry_oop_arraycopy,
2921 entry_jlong_arraycopy,
2922 entry_checkcast_arraycopy);
2923
2924 StubRoutines::_jbyte_fill = generate_fill(T_BYTE, false, "jbyte_fill");
2925 StubRoutines::_jshort_fill = generate_fill(T_SHORT, false, "jshort_fill");
2926 StubRoutines::_jint_fill = generate_fill(T_INT, false, "jint_fill");
2927 StubRoutines::_arrayof_jbyte_fill = generate_fill(T_BYTE, true, "arrayof_jbyte_fill");
2928 StubRoutines::_arrayof_jshort_fill = generate_fill(T_SHORT, true, "arrayof_jshort_fill");
2929 StubRoutines::_arrayof_jint_fill = generate_fill(T_INT, true, "arrayof_jint_fill");
2930
2931 // We don't generate specialized code for HeapWord-aligned source
2932 // arrays, so just use the code we've already generated
2933 StubRoutines::_arrayof_jbyte_disjoint_arraycopy = StubRoutines::_jbyte_disjoint_arraycopy;
2934 StubRoutines::_arrayof_jbyte_arraycopy = StubRoutines::_jbyte_arraycopy;
2935
2936 StubRoutines::_arrayof_jshort_disjoint_arraycopy = StubRoutines::_jshort_disjoint_arraycopy;
2937 StubRoutines::_arrayof_jshort_arraycopy = StubRoutines::_jshort_arraycopy;
2938
2939 StubRoutines::_arrayof_jint_disjoint_arraycopy = StubRoutines::_jint_disjoint_arraycopy;
2940 StubRoutines::_arrayof_jint_arraycopy = StubRoutines::_jint_arraycopy;
2941
2942 StubRoutines::_arrayof_jlong_disjoint_arraycopy = StubRoutines::_jlong_disjoint_arraycopy;
2943 StubRoutines::_arrayof_jlong_arraycopy = StubRoutines::_jlong_arraycopy;
2944
2945 StubRoutines::_arrayof_oop_disjoint_arraycopy = StubRoutines::_oop_disjoint_arraycopy;
2946 StubRoutines::_arrayof_oop_arraycopy = StubRoutines::_oop_arraycopy;
2947
2948 StubRoutines::_arrayof_oop_disjoint_arraycopy_uninit = StubRoutines::_oop_disjoint_arraycopy_uninit;
2949 StubRoutines::_arrayof_oop_arraycopy_uninit = StubRoutines::_oop_arraycopy_uninit;
2950 }
2951
2952 // AES intrinsic stubs
2953 enum {AESBlockSize = 16};
2954
2955 address generate_key_shuffle_mask() {
2956 __ align(16);
2957 StubCodeMark mark(this, "StubRoutines", "key_shuffle_mask");
2958 address start = __ pc();
2959 __ emit_data64( 0x0405060700010203, relocInfo::none );
2960 __ emit_data64( 0x0c0d0e0f08090a0b, relocInfo::none );
2961 return start;
2962 }
2963
2964 address generate_counter_shuffle_mask() {
2965 __ align(16);
2966 StubCodeMark mark(this, "StubRoutines", "counter_shuffle_mask");
2967 address start = __ pc();
2968 __ emit_data64(0x08090a0b0c0d0e0f, relocInfo::none);
2969 __ emit_data64(0x0001020304050607, relocInfo::none);
2970 return start;
2971 }
2972
2973 // Utility routine for loading a 128-bit key word in little endian format
2974 // can optionally specify that the shuffle mask is already in an xmmregister
2975 void load_key(XMMRegister xmmdst, Register key, int offset, XMMRegister xmm_shuf_mask=NULL) {
2976 __ movdqu(xmmdst, Address(key, offset));
2977 if (xmm_shuf_mask != NULL) {
2978 __ pshufb(xmmdst, xmm_shuf_mask);
2979 } else {
2980 __ pshufb(xmmdst, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
2981 }
2982 }
2983
2984 // Utility routine for increase 128bit counter (iv in CTR mode)
2985 void inc_counter(Register reg, XMMRegister xmmdst, int inc_delta, Label& next_block) {
2986 __ pextrq(reg, xmmdst, 0x0);
2987 __ addq(reg, inc_delta);
2988 __ pinsrq(xmmdst, reg, 0x0);
2989 __ jcc(Assembler::carryClear, next_block); // jump if no carry
2990 __ pextrq(reg, xmmdst, 0x01); // Carry
2991 __ addq(reg, 0x01);
2992 __ pinsrq(xmmdst, reg, 0x01); //Carry end
2993 __ BIND(next_block); // next instruction
2994 }
2995
2996 // Arguments:
2997 //
2998 // Inputs:
2999 // c_rarg0 - source byte array address
3000 // c_rarg1 - destination byte array address
3001 // c_rarg2 - K (key) in little endian int array
3002 //
3003 address generate_aescrypt_encryptBlock() {
3004 assert(UseAES, "need AES instructions and misaligned SSE support");
3005 __ align(CodeEntryAlignment);
3006 StubCodeMark mark(this, "StubRoutines", "aescrypt_encryptBlock");
3007 Label L_doLast;
3008 address start = __ pc();
3009
3010 const Register from = c_rarg0; // source array address
3011 const Register to = c_rarg1; // destination array address
3012 const Register key = c_rarg2; // key array address
3013 const Register keylen = rax;
3014
3015 const XMMRegister xmm_result = xmm0;
3016 const XMMRegister xmm_key_shuf_mask = xmm1;
3017 // On win64 xmm6-xmm15 must be preserved so don't use them.
3018 const XMMRegister xmm_temp1 = xmm2;
3019 const XMMRegister xmm_temp2 = xmm3;
3020 const XMMRegister xmm_temp3 = xmm4;
3021 const XMMRegister xmm_temp4 = xmm5;
3022
3023 __ enter(); // required for proper stackwalking of RuntimeStub frame
3024
3025 // For EVEX with VL and BW, provide a standard mask, VL = 128 will guide the merge
3026 // context for the registers used, where all instructions below are using 128-bit mode
3027 // On EVEX without VL and BW, these instructions will all be AVX.
3028 if (VM_Version::supports_avx512vlbw()) {
3029 __ movl(rax, 0xffff);
3030 __ kmovql(k1, rax);
3031 }
3032
3033 // keylen could be only {11, 13, 15} * 4 = {44, 52, 60}
3034 __ movl(keylen, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
3035
3036 __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3037 __ movdqu(xmm_result, Address(from, 0)); // get 16 bytes of input
3038
3039 // For encryption, the java expanded key ordering is just what we need
3040 // we don't know if the key is aligned, hence not using load-execute form
3041
3042 load_key(xmm_temp1, key, 0x00, xmm_key_shuf_mask);
3043 __ pxor(xmm_result, xmm_temp1);
3044
3045 load_key(xmm_temp1, key, 0x10, xmm_key_shuf_mask);
3046 load_key(xmm_temp2, key, 0x20, xmm_key_shuf_mask);
3047 load_key(xmm_temp3, key, 0x30, xmm_key_shuf_mask);
3048 load_key(xmm_temp4, key, 0x40, xmm_key_shuf_mask);
3049
3050 __ aesenc(xmm_result, xmm_temp1);
3051 __ aesenc(xmm_result, xmm_temp2);
3052 __ aesenc(xmm_result, xmm_temp3);
3053 __ aesenc(xmm_result, xmm_temp4);
3054
3055 load_key(xmm_temp1, key, 0x50, xmm_key_shuf_mask);
3056 load_key(xmm_temp2, key, 0x60, xmm_key_shuf_mask);
3057 load_key(xmm_temp3, key, 0x70, xmm_key_shuf_mask);
3058 load_key(xmm_temp4, key, 0x80, xmm_key_shuf_mask);
3059
3060 __ aesenc(xmm_result, xmm_temp1);
3061 __ aesenc(xmm_result, xmm_temp2);
3062 __ aesenc(xmm_result, xmm_temp3);
3063 __ aesenc(xmm_result, xmm_temp4);
3064
3065 load_key(xmm_temp1, key, 0x90, xmm_key_shuf_mask);
3066 load_key(xmm_temp2, key, 0xa0, xmm_key_shuf_mask);
3067
3068 __ cmpl(keylen, 44);
3069 __ jccb(Assembler::equal, L_doLast);
3070
3071 __ aesenc(xmm_result, xmm_temp1);
3072 __ aesenc(xmm_result, xmm_temp2);
3073
3074 load_key(xmm_temp1, key, 0xb0, xmm_key_shuf_mask);
3075 load_key(xmm_temp2, key, 0xc0, xmm_key_shuf_mask);
3076
3077 __ cmpl(keylen, 52);
3078 __ jccb(Assembler::equal, L_doLast);
3079
3080 __ aesenc(xmm_result, xmm_temp1);
3081 __ aesenc(xmm_result, xmm_temp2);
3082
3083 load_key(xmm_temp1, key, 0xd0, xmm_key_shuf_mask);
3084 load_key(xmm_temp2, key, 0xe0, xmm_key_shuf_mask);
3085
3086 __ BIND(L_doLast);
3087 __ aesenc(xmm_result, xmm_temp1);
3088 __ aesenclast(xmm_result, xmm_temp2);
3089 __ movdqu(Address(to, 0), xmm_result); // store the result
3090 __ xorptr(rax, rax); // return 0
3091 __ leave(); // required for proper stackwalking of RuntimeStub frame
3092 __ ret(0);
3093
3094 return start;
3095 }
3096
3097
3098 // Arguments:
3099 //
3100 // Inputs:
3101 // c_rarg0 - source byte array address
3102 // c_rarg1 - destination byte array address
3103 // c_rarg2 - K (key) in little endian int array
3104 //
3105 address generate_aescrypt_decryptBlock() {
3106 assert(UseAES, "need AES instructions and misaligned SSE support");
3107 __ align(CodeEntryAlignment);
3108 StubCodeMark mark(this, "StubRoutines", "aescrypt_decryptBlock");
3109 Label L_doLast;
3110 address start = __ pc();
3111
3112 const Register from = c_rarg0; // source array address
3113 const Register to = c_rarg1; // destination array address
3114 const Register key = c_rarg2; // key array address
3115 const Register keylen = rax;
3116
3117 const XMMRegister xmm_result = xmm0;
3118 const XMMRegister xmm_key_shuf_mask = xmm1;
3119 // On win64 xmm6-xmm15 must be preserved so don't use them.
3120 const XMMRegister xmm_temp1 = xmm2;
3121 const XMMRegister xmm_temp2 = xmm3;
3122 const XMMRegister xmm_temp3 = xmm4;
3123 const XMMRegister xmm_temp4 = xmm5;
3124
3125 __ enter(); // required for proper stackwalking of RuntimeStub frame
3126
3127 // For EVEX with VL and BW, provide a standard mask, VL = 128 will guide the merge
3128 // context for the registers used, where all instructions below are using 128-bit mode
3129 // On EVEX without VL and BW, these instructions will all be AVX.
3130 if (VM_Version::supports_avx512vlbw()) {
3131 __ movl(rax, 0xffff);
3132 __ kmovql(k1, rax);
3133 }
3134
3135 // keylen could be only {11, 13, 15} * 4 = {44, 52, 60}
3136 __ movl(keylen, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
3137
3138 __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3139 __ movdqu(xmm_result, Address(from, 0));
3140
3141 // for decryption java expanded key ordering is rotated one position from what we want
3142 // so we start from 0x10 here and hit 0x00 last
3143 // we don't know if the key is aligned, hence not using load-execute form
3144 load_key(xmm_temp1, key, 0x10, xmm_key_shuf_mask);
3145 load_key(xmm_temp2, key, 0x20, xmm_key_shuf_mask);
3146 load_key(xmm_temp3, key, 0x30, xmm_key_shuf_mask);
3147 load_key(xmm_temp4, key, 0x40, xmm_key_shuf_mask);
3148
3149 __ pxor (xmm_result, xmm_temp1);
3150 __ aesdec(xmm_result, xmm_temp2);
3151 __ aesdec(xmm_result, xmm_temp3);
3152 __ aesdec(xmm_result, xmm_temp4);
3153
3154 load_key(xmm_temp1, key, 0x50, xmm_key_shuf_mask);
3155 load_key(xmm_temp2, key, 0x60, xmm_key_shuf_mask);
3156 load_key(xmm_temp3, key, 0x70, xmm_key_shuf_mask);
3157 load_key(xmm_temp4, key, 0x80, xmm_key_shuf_mask);
3158
3159 __ aesdec(xmm_result, xmm_temp1);
3160 __ aesdec(xmm_result, xmm_temp2);
3161 __ aesdec(xmm_result, xmm_temp3);
3162 __ aesdec(xmm_result, xmm_temp4);
3163
3164 load_key(xmm_temp1, key, 0x90, xmm_key_shuf_mask);
3165 load_key(xmm_temp2, key, 0xa0, xmm_key_shuf_mask);
3166 load_key(xmm_temp3, key, 0x00, xmm_key_shuf_mask);
3167
3168 __ cmpl(keylen, 44);
3169 __ jccb(Assembler::equal, L_doLast);
3170
3171 __ aesdec(xmm_result, xmm_temp1);
3172 __ aesdec(xmm_result, xmm_temp2);
3173
3174 load_key(xmm_temp1, key, 0xb0, xmm_key_shuf_mask);
3175 load_key(xmm_temp2, key, 0xc0, xmm_key_shuf_mask);
3176
3177 __ cmpl(keylen, 52);
3178 __ jccb(Assembler::equal, L_doLast);
3179
3180 __ aesdec(xmm_result, xmm_temp1);
3181 __ aesdec(xmm_result, xmm_temp2);
3182
3183 load_key(xmm_temp1, key, 0xd0, xmm_key_shuf_mask);
3184 load_key(xmm_temp2, key, 0xe0, xmm_key_shuf_mask);
3185
3186 __ BIND(L_doLast);
3187 __ aesdec(xmm_result, xmm_temp1);
3188 __ aesdec(xmm_result, xmm_temp2);
3189
3190 // for decryption the aesdeclast operation is always on key+0x00
3191 __ aesdeclast(xmm_result, xmm_temp3);
3192 __ movdqu(Address(to, 0), xmm_result); // store the result
3193 __ xorptr(rax, rax); // return 0
3194 __ leave(); // required for proper stackwalking of RuntimeStub frame
3195 __ ret(0);
3196
3197 return start;
3198 }
3199
3200
3201 // Arguments:
3202 //
3203 // Inputs:
3204 // c_rarg0 - source byte array address
3205 // c_rarg1 - destination byte array address
3206 // c_rarg2 - K (key) in little endian int array
3207 // c_rarg3 - r vector byte array address
3208 // c_rarg4 - input length
3209 //
3210 // Output:
3211 // rax - input length
3212 //
3213 address generate_cipherBlockChaining_encryptAESCrypt() {
3214 assert(UseAES, "need AES instructions and misaligned SSE support");
3215 __ align(CodeEntryAlignment);
3216 StubCodeMark mark(this, "StubRoutines", "cipherBlockChaining_encryptAESCrypt");
3217 address start = __ pc();
3218
3219 Label L_exit, L_key_192_256, L_key_256, L_loopTop_128, L_loopTop_192, L_loopTop_256;
3220 const Register from = c_rarg0; // source array address
3221 const Register to = c_rarg1; // destination array address
3222 const Register key = c_rarg2; // key array address
3223 const Register rvec = c_rarg3; // r byte array initialized from initvector array address
3224 // and left with the results of the last encryption block
3225 #ifndef _WIN64
3226 const Register len_reg = c_rarg4; // src len (must be multiple of blocksize 16)
3227 #else
3228 const Address len_mem(rbp, 6 * wordSize); // length is on stack on Win64
3229 const Register len_reg = r11; // pick the volatile windows register
3230 #endif
3231 const Register pos = rax;
3232
3233 // xmm register assignments for the loops below
3234 const XMMRegister xmm_result = xmm0;
3235 const XMMRegister xmm_temp = xmm1;
3236 // keys 0-10 preloaded into xmm2-xmm12
3237 const int XMM_REG_NUM_KEY_FIRST = 2;
3238 const int XMM_REG_NUM_KEY_LAST = 15;
3239 const XMMRegister xmm_key0 = as_XMMRegister(XMM_REG_NUM_KEY_FIRST);
3240 const XMMRegister xmm_key10 = as_XMMRegister(XMM_REG_NUM_KEY_FIRST+10);
3241 const XMMRegister xmm_key11 = as_XMMRegister(XMM_REG_NUM_KEY_FIRST+11);
3242 const XMMRegister xmm_key12 = as_XMMRegister(XMM_REG_NUM_KEY_FIRST+12);
3243 const XMMRegister xmm_key13 = as_XMMRegister(XMM_REG_NUM_KEY_FIRST+13);
3244
3245 __ enter(); // required for proper stackwalking of RuntimeStub frame
3246
3247 // For EVEX with VL and BW, provide a standard mask, VL = 128 will guide the merge
3248 // context for the registers used, where all instructions below are using 128-bit mode
3249 // On EVEX without VL and BW, these instructions will all be AVX.
3250 if (VM_Version::supports_avx512vlbw()) {
3251 __ movl(rax, 0xffff);
3252 __ kmovql(k1, rax);
3253 }
3254
3255 #ifdef _WIN64
3256 // on win64, fill len_reg from stack position
3257 __ movl(len_reg, len_mem);
3258 #else
3259 __ push(len_reg); // Save
3260 #endif
3261
3262 const XMMRegister xmm_key_shuf_mask = xmm_temp; // used temporarily to swap key bytes up front
3263 __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3264 // load up xmm regs xmm2 thru xmm12 with key 0x00 - 0xa0
3265 for (int rnum = XMM_REG_NUM_KEY_FIRST, offset = 0x00; rnum <= XMM_REG_NUM_KEY_FIRST+10; rnum++) {
3266 load_key(as_XMMRegister(rnum), key, offset, xmm_key_shuf_mask);
3267 offset += 0x10;
3268 }
3269 __ movdqu(xmm_result, Address(rvec, 0x00)); // initialize xmm_result with r vec
3270
3271 // now split to different paths depending on the keylen (len in ints of AESCrypt.KLE array (52=192, or 60=256))
3272 __ movl(rax, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
3273 __ cmpl(rax, 44);
3274 __ jcc(Assembler::notEqual, L_key_192_256);
3275
3276 // 128 bit code follows here
3277 __ movptr(pos, 0);
3278 __ align(OptoLoopAlignment);
3279
3280 __ BIND(L_loopTop_128);
3281 __ movdqu(xmm_temp, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of input
3282 __ pxor (xmm_result, xmm_temp); // xor with the current r vector
3283 __ pxor (xmm_result, xmm_key0); // do the aes rounds
3284 for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_FIRST + 9; rnum++) {
3285 __ aesenc(xmm_result, as_XMMRegister(rnum));
3286 }
3287 __ aesenclast(xmm_result, xmm_key10);
3288 __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
3289 // no need to store r to memory until we exit
3290 __ addptr(pos, AESBlockSize);
3291 __ subptr(len_reg, AESBlockSize);
3292 __ jcc(Assembler::notEqual, L_loopTop_128);
3293
3294 __ BIND(L_exit);
3295 __ movdqu(Address(rvec, 0), xmm_result); // final value of r stored in rvec of CipherBlockChaining object
3296
3297 #ifdef _WIN64
3298 __ movl(rax, len_mem);
3299 #else
3300 __ pop(rax); // return length
3301 #endif
3302 __ leave(); // required for proper stackwalking of RuntimeStub frame
3303 __ ret(0);
3304
3305 __ BIND(L_key_192_256);
3306 // here rax = len in ints of AESCrypt.KLE array (52=192, or 60=256)
3307 load_key(xmm_key11, key, 0xb0, xmm_key_shuf_mask);
3308 load_key(xmm_key12, key, 0xc0, xmm_key_shuf_mask);
3309 __ cmpl(rax, 52);
3310 __ jcc(Assembler::notEqual, L_key_256);
3311
3312 // 192-bit code follows here (could be changed to use more xmm registers)
3313 __ movptr(pos, 0);
3314 __ align(OptoLoopAlignment);
3315
3316 __ BIND(L_loopTop_192);
3317 __ movdqu(xmm_temp, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of input
3318 __ pxor (xmm_result, xmm_temp); // xor with the current r vector
3319 __ pxor (xmm_result, xmm_key0); // do the aes rounds
3320 for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_FIRST + 11; rnum++) {
3321 __ aesenc(xmm_result, as_XMMRegister(rnum));
3322 }
3323 __ aesenclast(xmm_result, xmm_key12);
3324 __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
3325 // no need to store r to memory until we exit
3326 __ addptr(pos, AESBlockSize);
3327 __ subptr(len_reg, AESBlockSize);
3328 __ jcc(Assembler::notEqual, L_loopTop_192);
3329 __ jmp(L_exit);
3330
3331 __ BIND(L_key_256);
3332 // 256-bit code follows here (could be changed to use more xmm registers)
3333 load_key(xmm_key13, key, 0xd0, xmm_key_shuf_mask);
3334 __ movptr(pos, 0);
3335 __ align(OptoLoopAlignment);
3336
3337 __ BIND(L_loopTop_256);
3338 __ movdqu(xmm_temp, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of input
3339 __ pxor (xmm_result, xmm_temp); // xor with the current r vector
3340 __ pxor (xmm_result, xmm_key0); // do the aes rounds
3341 for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_FIRST + 13; rnum++) {
3342 __ aesenc(xmm_result, as_XMMRegister(rnum));
3343 }
3344 load_key(xmm_temp, key, 0xe0);
3345 __ aesenclast(xmm_result, xmm_temp);
3346 __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
3347 // no need to store r to memory until we exit
3348 __ addptr(pos, AESBlockSize);
3349 __ subptr(len_reg, AESBlockSize);
3350 __ jcc(Assembler::notEqual, L_loopTop_256);
3351 __ jmp(L_exit);
3352
3353 return start;
3354 }
3355
3356 // Safefetch stubs.
3357 void generate_safefetch(const char* name, int size, address* entry,
3358 address* fault_pc, address* continuation_pc) {
3359 // safefetch signatures:
3360 // int SafeFetch32(int* adr, int errValue);
3361 // intptr_t SafeFetchN (intptr_t* adr, intptr_t errValue);
3362 //
3363 // arguments:
3364 // c_rarg0 = adr
3365 // c_rarg1 = errValue
3366 //
3367 // result:
3368 // PPC_RET = *adr or errValue
3369
3370 StubCodeMark mark(this, "StubRoutines", name);
3371
3372 // Entry point, pc or function descriptor.
3373 *entry = __ pc();
3374
3375 // Load *adr into c_rarg1, may fault.
3376 *fault_pc = __ pc();
3377 switch (size) {
3378 case 4:
3379 // int32_t
3380 __ movl(c_rarg1, Address(c_rarg0, 0));
3381 break;
3382 case 8:
3383 // int64_t
3384 __ movq(c_rarg1, Address(c_rarg0, 0));
3385 break;
3386 default:
3387 ShouldNotReachHere();
3388 }
3389
3390 // return errValue or *adr
3391 *continuation_pc = __ pc();
3392 __ movq(rax, c_rarg1);
3393 __ ret(0);
3394 }
3395
3396 // This is a version of CBC/AES Decrypt which does 4 blocks in a loop at a time
3397 // to hide instruction latency
3398 //
3399 // Arguments:
3400 //
3401 // Inputs:
3402 // c_rarg0 - source byte array address
3403 // c_rarg1 - destination byte array address
3404 // c_rarg2 - K (key) in little endian int array
3405 // c_rarg3 - r vector byte array address
3406 // c_rarg4 - input length
3407 //
3408 // Output:
3409 // rax - input length
3410 //
3411 address generate_cipherBlockChaining_decryptAESCrypt_Parallel() {
3412 assert(UseAES, "need AES instructions and misaligned SSE support");
3413 __ align(CodeEntryAlignment);
3414 StubCodeMark mark(this, "StubRoutines", "cipherBlockChaining_decryptAESCrypt");
3415 address start = __ pc();
3416
3417 const Register from = c_rarg0; // source array address
3418 const Register to = c_rarg1; // destination array address
3419 const Register key = c_rarg2; // key array address
3420 const Register rvec = c_rarg3; // r byte array initialized from initvector array address
3421 // and left with the results of the last encryption block
3422 #ifndef _WIN64
3423 const Register len_reg = c_rarg4; // src len (must be multiple of blocksize 16)
3424 #else
3425 const Address len_mem(rbp, 6 * wordSize); // length is on stack on Win64
3426 const Register len_reg = r11; // pick the volatile windows register
3427 #endif
3428 const Register pos = rax;
3429
3430 const int PARALLEL_FACTOR = 4;
3431 const int ROUNDS[3] = { 10, 12, 14 }; // aes rounds for key128, key192, key256
3432
3433 Label L_exit;
3434 Label L_singleBlock_loopTopHead[3]; // 128, 192, 256
3435 Label L_singleBlock_loopTopHead2[3]; // 128, 192, 256
3436 Label L_singleBlock_loopTop[3]; // 128, 192, 256
3437 Label L_multiBlock_loopTopHead[3]; // 128, 192, 256
3438 Label L_multiBlock_loopTop[3]; // 128, 192, 256
3439
3440 // keys 0-10 preloaded into xmm5-xmm15
3441 const int XMM_REG_NUM_KEY_FIRST = 5;
3442 const int XMM_REG_NUM_KEY_LAST = 15;
3443 const XMMRegister xmm_key_first = as_XMMRegister(XMM_REG_NUM_KEY_FIRST);
3444 const XMMRegister xmm_key_last = as_XMMRegister(XMM_REG_NUM_KEY_LAST);
3445
3446 __ enter(); // required for proper stackwalking of RuntimeStub frame
3447
3448 // For EVEX with VL and BW, provide a standard mask, VL = 128 will guide the merge
3449 // context for the registers used, where all instructions below are using 128-bit mode
3450 // On EVEX without VL and BW, these instructions will all be AVX.
3451 if (VM_Version::supports_avx512vlbw()) {
3452 __ movl(rax, 0xffff);
3453 __ kmovql(k1, rax);
3454 }
3455
3456 #ifdef _WIN64
3457 // on win64, fill len_reg from stack position
3458 __ movl(len_reg, len_mem);
3459 #else
3460 __ push(len_reg); // Save
3461 #endif
3462 __ push(rbx);
3463 // the java expanded key ordering is rotated one position from what we want
3464 // so we start from 0x10 here and hit 0x00 last
3465 const XMMRegister xmm_key_shuf_mask = xmm1; // used temporarily to swap key bytes up front
3466 __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3467 // load up xmm regs 5 thru 15 with key 0x10 - 0xa0 - 0x00
3468 for (int rnum = XMM_REG_NUM_KEY_FIRST, offset = 0x10; rnum < XMM_REG_NUM_KEY_LAST; rnum++) {
3469 load_key(as_XMMRegister(rnum), key, offset, xmm_key_shuf_mask);
3470 offset += 0x10;
3471 }
3472 load_key(xmm_key_last, key, 0x00, xmm_key_shuf_mask);
3473
3474 const XMMRegister xmm_prev_block_cipher = xmm1; // holds cipher of previous block
3475
3476 // registers holding the four results in the parallelized loop
3477 const XMMRegister xmm_result0 = xmm0;
3478 const XMMRegister xmm_result1 = xmm2;
3479 const XMMRegister xmm_result2 = xmm3;
3480 const XMMRegister xmm_result3 = xmm4;
3481
3482 __ movdqu(xmm_prev_block_cipher, Address(rvec, 0x00)); // initialize with initial rvec
3483
3484 __ xorptr(pos, pos);
3485
3486 // now split to different paths depending on the keylen (len in ints of AESCrypt.KLE array (52=192, or 60=256))
3487 __ movl(rbx, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
3488 __ cmpl(rbx, 52);
3489 __ jcc(Assembler::equal, L_multiBlock_loopTopHead[1]);
3490 __ cmpl(rbx, 60);
3491 __ jcc(Assembler::equal, L_multiBlock_loopTopHead[2]);
3492
3493 #define DoFour(opc, src_reg) \
3494 __ opc(xmm_result0, src_reg); \
3495 __ opc(xmm_result1, src_reg); \
3496 __ opc(xmm_result2, src_reg); \
3497 __ opc(xmm_result3, src_reg); \
3498
3499 for (int k = 0; k < 3; ++k) {
3500 __ BIND(L_multiBlock_loopTopHead[k]);
3501 if (k != 0) {
3502 __ cmpptr(len_reg, PARALLEL_FACTOR * AESBlockSize); // see if at least 4 blocks left
3503 __ jcc(Assembler::less, L_singleBlock_loopTopHead2[k]);
3504 }
3505 if (k == 1) {
3506 __ subptr(rsp, 6 * wordSize);
3507 __ movdqu(Address(rsp, 0), xmm15); //save last_key from xmm15
3508 load_key(xmm15, key, 0xb0); // 0xb0; 192-bit key goes up to 0xc0
3509 __ movdqu(Address(rsp, 2 * wordSize), xmm15);
3510 load_key(xmm1, key, 0xc0); // 0xc0;
3511 __ movdqu(Address(rsp, 4 * wordSize), xmm1);
3512 } else if (k == 2) {
3513 __ subptr(rsp, 10 * wordSize);
3514 __ movdqu(Address(rsp, 0), xmm15); //save last_key from xmm15
3515 load_key(xmm15, key, 0xd0); // 0xd0; 256-bit key goes upto 0xe0
3516 __ movdqu(Address(rsp, 6 * wordSize), xmm15);
3517 load_key(xmm1, key, 0xe0); // 0xe0;
3518 __ movdqu(Address(rsp, 8 * wordSize), xmm1);
3519 load_key(xmm15, key, 0xb0); // 0xb0;
3520 __ movdqu(Address(rsp, 2 * wordSize), xmm15);
3521 load_key(xmm1, key, 0xc0); // 0xc0;
3522 __ movdqu(Address(rsp, 4 * wordSize), xmm1);
3523 }
3524 __ align(OptoLoopAlignment);
3525 __ BIND(L_multiBlock_loopTop[k]);
3526 __ cmpptr(len_reg, PARALLEL_FACTOR * AESBlockSize); // see if at least 4 blocks left
3527 __ jcc(Assembler::less, L_singleBlock_loopTopHead[k]);
3528
3529 if (k != 0) {
3530 __ movdqu(xmm15, Address(rsp, 2 * wordSize));
3531 __ movdqu(xmm1, Address(rsp, 4 * wordSize));
3532 }
3533
3534 __ movdqu(xmm_result0, Address(from, pos, Address::times_1, 0 * AESBlockSize)); // get next 4 blocks into xmmresult registers
3535 __ movdqu(xmm_result1, Address(from, pos, Address::times_1, 1 * AESBlockSize));
3536 __ movdqu(xmm_result2, Address(from, pos, Address::times_1, 2 * AESBlockSize));
3537 __ movdqu(xmm_result3, Address(from, pos, Address::times_1, 3 * AESBlockSize));
3538
3539 DoFour(pxor, xmm_key_first);
3540 if (k == 0) {
3541 for (int rnum = 1; rnum < ROUNDS[k]; rnum++) {
3542 DoFour(aesdec, as_XMMRegister(rnum + XMM_REG_NUM_KEY_FIRST));
3543 }
3544 DoFour(aesdeclast, xmm_key_last);
3545 } else if (k == 1) {
3546 for (int rnum = 1; rnum <= ROUNDS[k]-2; rnum++) {
3547 DoFour(aesdec, as_XMMRegister(rnum + XMM_REG_NUM_KEY_FIRST));
3548 }
3549 __ movdqu(xmm_key_last, Address(rsp, 0)); // xmm15 needs to be loaded again.
3550 DoFour(aesdec, xmm1); // key : 0xc0
3551 __ movdqu(xmm_prev_block_cipher, Address(rvec, 0x00)); // xmm1 needs to be loaded again
3552 DoFour(aesdeclast, xmm_key_last);
3553 } else if (k == 2) {
3554 for (int rnum = 1; rnum <= ROUNDS[k] - 4; rnum++) {
3555 DoFour(aesdec, as_XMMRegister(rnum + XMM_REG_NUM_KEY_FIRST));
3556 }
3557 DoFour(aesdec, xmm1); // key : 0xc0
3558 __ movdqu(xmm15, Address(rsp, 6 * wordSize));
3559 __ movdqu(xmm1, Address(rsp, 8 * wordSize));
3560 DoFour(aesdec, xmm15); // key : 0xd0
3561 __ movdqu(xmm_key_last, Address(rsp, 0)); // xmm15 needs to be loaded again.
3562 DoFour(aesdec, xmm1); // key : 0xe0
3563 __ movdqu(xmm_prev_block_cipher, Address(rvec, 0x00)); // xmm1 needs to be loaded again
3564 DoFour(aesdeclast, xmm_key_last);
3565 }
3566
3567 // for each result, xor with the r vector of previous cipher block
3568 __ pxor(xmm_result0, xmm_prev_block_cipher);
3569 __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 0 * AESBlockSize));
3570 __ pxor(xmm_result1, xmm_prev_block_cipher);
3571 __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 1 * AESBlockSize));
3572 __ pxor(xmm_result2, xmm_prev_block_cipher);
3573 __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 2 * AESBlockSize));
3574 __ pxor(xmm_result3, xmm_prev_block_cipher);
3575 __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 3 * AESBlockSize)); // this will carry over to next set of blocks
3576 if (k != 0) {
3577 __ movdqu(Address(rvec, 0x00), xmm_prev_block_cipher);
3578 }
3579
3580 __ movdqu(Address(to, pos, Address::times_1, 0 * AESBlockSize), xmm_result0); // store 4 results into the next 64 bytes of output
3581 __ movdqu(Address(to, pos, Address::times_1, 1 * AESBlockSize), xmm_result1);
3582 __ movdqu(Address(to, pos, Address::times_1, 2 * AESBlockSize), xmm_result2);
3583 __ movdqu(Address(to, pos, Address::times_1, 3 * AESBlockSize), xmm_result3);
3584
3585 __ addptr(pos, PARALLEL_FACTOR * AESBlockSize);
3586 __ subptr(len_reg, PARALLEL_FACTOR * AESBlockSize);
3587 __ jmp(L_multiBlock_loopTop[k]);
3588
3589 // registers used in the non-parallelized loops
3590 // xmm register assignments for the loops below
3591 const XMMRegister xmm_result = xmm0;
3592 const XMMRegister xmm_prev_block_cipher_save = xmm2;
3593 const XMMRegister xmm_key11 = xmm3;
3594 const XMMRegister xmm_key12 = xmm4;
3595 const XMMRegister key_tmp = xmm4;
3596
3597 __ BIND(L_singleBlock_loopTopHead[k]);
3598 if (k == 1) {
3599 __ addptr(rsp, 6 * wordSize);
3600 } else if (k == 2) {
3601 __ addptr(rsp, 10 * wordSize);
3602 }
3603 __ cmpptr(len_reg, 0); // any blocks left??
3604 __ jcc(Assembler::equal, L_exit);
3605 __ BIND(L_singleBlock_loopTopHead2[k]);
3606 if (k == 1) {
3607 load_key(xmm_key11, key, 0xb0); // 0xb0; 192-bit key goes upto 0xc0
3608 load_key(xmm_key12, key, 0xc0); // 0xc0; 192-bit key goes upto 0xc0
3609 }
3610 if (k == 2) {
3611 load_key(xmm_key11, key, 0xb0); // 0xb0; 256-bit key goes upto 0xe0
3612 }
3613 __ align(OptoLoopAlignment);
3614 __ BIND(L_singleBlock_loopTop[k]);
3615 __ movdqu(xmm_result, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of cipher input
3616 __ movdqa(xmm_prev_block_cipher_save, xmm_result); // save for next r vector
3617 __ pxor(xmm_result, xmm_key_first); // do the aes dec rounds
3618 for (int rnum = 1; rnum <= 9 ; rnum++) {
3619 __ aesdec(xmm_result, as_XMMRegister(rnum + XMM_REG_NUM_KEY_FIRST));
3620 }
3621 if (k == 1) {
3622 __ aesdec(xmm_result, xmm_key11);
3623 __ aesdec(xmm_result, xmm_key12);
3624 }
3625 if (k == 2) {
3626 __ aesdec(xmm_result, xmm_key11);
3627 load_key(key_tmp, key, 0xc0);
3628 __ aesdec(xmm_result, key_tmp);
3629 load_key(key_tmp, key, 0xd0);
3630 __ aesdec(xmm_result, key_tmp);
3631 load_key(key_tmp, key, 0xe0);
3632 __ aesdec(xmm_result, key_tmp);
3633 }
3634
3635 __ aesdeclast(xmm_result, xmm_key_last); // xmm15 always came from key+0
3636 __ pxor(xmm_result, xmm_prev_block_cipher); // xor with the current r vector
3637 __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
3638 // no need to store r to memory until we exit
3639 __ movdqa(xmm_prev_block_cipher, xmm_prev_block_cipher_save); // set up next r vector with cipher input from this block
3640 __ addptr(pos, AESBlockSize);
3641 __ subptr(len_reg, AESBlockSize);
3642 __ jcc(Assembler::notEqual, L_singleBlock_loopTop[k]);
3643 if (k != 2) {
3644 __ jmp(L_exit);
3645 }
3646 } //for 128/192/256
3647
3648 __ BIND(L_exit);
3649 __ movdqu(Address(rvec, 0), xmm_prev_block_cipher); // final value of r stored in rvec of CipherBlockChaining object
3650 __ pop(rbx);
3651 #ifdef _WIN64
3652 __ movl(rax, len_mem);
3653 #else
3654 __ pop(rax); // return length
3655 #endif
3656 __ leave(); // required for proper stackwalking of RuntimeStub frame
3657 __ ret(0);
3658 return start;
3659 }
3660
3661 address generate_upper_word_mask() {
3662 __ align(64);
3663 StubCodeMark mark(this, "StubRoutines", "upper_word_mask");
3664 address start = __ pc();
3665 __ emit_data64(0x0000000000000000, relocInfo::none);
3666 __ emit_data64(0xFFFFFFFF00000000, relocInfo::none);
3667 return start;
3668 }
3669
3670 address generate_shuffle_byte_flip_mask() {
3671 __ align(64);
3672 StubCodeMark mark(this, "StubRoutines", "shuffle_byte_flip_mask");
3673 address start = __ pc();
3674 __ emit_data64(0x08090a0b0c0d0e0f, relocInfo::none);
3675 __ emit_data64(0x0001020304050607, relocInfo::none);
3676 return start;
3677 }
3678
3679 // ofs and limit are use for multi-block byte array.
3680 // int com.sun.security.provider.DigestBase.implCompressMultiBlock(byte[] b, int ofs, int limit)
3681 address generate_sha1_implCompress(bool multi_block, const char *name) {
3682 __ align(CodeEntryAlignment);
3683 StubCodeMark mark(this, "StubRoutines", name);
3684 address start = __ pc();
3685
3686 Register buf = c_rarg0;
3687 Register state = c_rarg1;
3688 Register ofs = c_rarg2;
3689 Register limit = c_rarg3;
3690
3691 const XMMRegister abcd = xmm0;
3692 const XMMRegister e0 = xmm1;
3693 const XMMRegister e1 = xmm2;
3694 const XMMRegister msg0 = xmm3;
3695
3696 const XMMRegister msg1 = xmm4;
3697 const XMMRegister msg2 = xmm5;
3698 const XMMRegister msg3 = xmm6;
3699 const XMMRegister shuf_mask = xmm7;
3700
3701 __ enter();
3702
3703 __ subptr(rsp, 4 * wordSize);
3704
3705 __ fast_sha1(abcd, e0, e1, msg0, msg1, msg2, msg3, shuf_mask,
3706 buf, state, ofs, limit, rsp, multi_block);
3707
3708 __ addptr(rsp, 4 * wordSize);
3709
3710 __ leave();
3711 __ ret(0);
3712 return start;
3713 }
3714
3715 address generate_pshuffle_byte_flip_mask() {
3716 __ align(64);
3717 StubCodeMark mark(this, "StubRoutines", "pshuffle_byte_flip_mask");
3718 address start = __ pc();
3719 __ emit_data64(0x0405060700010203, relocInfo::none);
3720 __ emit_data64(0x0c0d0e0f08090a0b, relocInfo::none);
3721
3722 if (VM_Version::supports_avx2()) {
3723 __ emit_data64(0x0405060700010203, relocInfo::none); // second copy
3724 __ emit_data64(0x0c0d0e0f08090a0b, relocInfo::none);
3725 // _SHUF_00BA
3726 __ emit_data64(0x0b0a090803020100, relocInfo::none);
3727 __ emit_data64(0xFFFFFFFFFFFFFFFF, relocInfo::none);
3728 __ emit_data64(0x0b0a090803020100, relocInfo::none);
3729 __ emit_data64(0xFFFFFFFFFFFFFFFF, relocInfo::none);
3730 // _SHUF_DC00
3731 __ emit_data64(0xFFFFFFFFFFFFFFFF, relocInfo::none);
3732 __ emit_data64(0x0b0a090803020100, relocInfo::none);
3733 __ emit_data64(0xFFFFFFFFFFFFFFFF, relocInfo::none);
3734 __ emit_data64(0x0b0a090803020100, relocInfo::none);
3735 }
3736
3737 return start;
3738 }
3739
3740 //Mask for byte-swapping a couple of qwords in an XMM register using (v)pshufb.
3741 address generate_pshuffle_byte_flip_mask_sha512() {
3742 __ align(32);
3743 StubCodeMark mark(this, "StubRoutines", "pshuffle_byte_flip_mask_sha512");
3744 address start = __ pc();
3745 if (VM_Version::supports_avx2()) {
3746 __ emit_data64(0x0001020304050607, relocInfo::none); // PSHUFFLE_BYTE_FLIP_MASK
3747 __ emit_data64(0x08090a0b0c0d0e0f, relocInfo::none);
3748 __ emit_data64(0x1011121314151617, relocInfo::none);
3749 __ emit_data64(0x18191a1b1c1d1e1f, relocInfo::none);
3750 __ emit_data64(0x0000000000000000, relocInfo::none); //MASK_YMM_LO
3751 __ emit_data64(0x0000000000000000, relocInfo::none);
3752 __ emit_data64(0xFFFFFFFFFFFFFFFF, relocInfo::none);
3753 __ emit_data64(0xFFFFFFFFFFFFFFFF, relocInfo::none);
3754 }
3755
3756 return start;
3757 }
3758
3759 // ofs and limit are use for multi-block byte array.
3760 // int com.sun.security.provider.DigestBase.implCompressMultiBlock(byte[] b, int ofs, int limit)
3761 address generate_sha256_implCompress(bool multi_block, const char *name) {
3762 assert(VM_Version::supports_sha() || VM_Version::supports_avx2(), "");
3763 __ align(CodeEntryAlignment);
3764 StubCodeMark mark(this, "StubRoutines", name);
3765 address start = __ pc();
3766
3767 Register buf = c_rarg0;
3768 Register state = c_rarg1;
3769 Register ofs = c_rarg2;
3770 Register limit = c_rarg3;
3771
3772 const XMMRegister msg = xmm0;
3773 const XMMRegister state0 = xmm1;
3774 const XMMRegister state1 = xmm2;
3775 const XMMRegister msgtmp0 = xmm3;
3776
3777 const XMMRegister msgtmp1 = xmm4;
3778 const XMMRegister msgtmp2 = xmm5;
3779 const XMMRegister msgtmp3 = xmm6;
3780 const XMMRegister msgtmp4 = xmm7;
3781
3782 const XMMRegister shuf_mask = xmm8;
3783
3784 __ enter();
3785
3786 __ subptr(rsp, 4 * wordSize);
3787
3788 if (VM_Version::supports_sha()) {
3789 __ fast_sha256(msg, state0, state1, msgtmp0, msgtmp1, msgtmp2, msgtmp3, msgtmp4,
3790 buf, state, ofs, limit, rsp, multi_block, shuf_mask);
3791 } else if (VM_Version::supports_avx2()) {
3792 __ sha256_AVX2(msg, state0, state1, msgtmp0, msgtmp1, msgtmp2, msgtmp3, msgtmp4,
3793 buf, state, ofs, limit, rsp, multi_block, shuf_mask);
3794 }
3795 __ addptr(rsp, 4 * wordSize);
3796 __ vzeroupper();
3797 __ leave();
3798 __ ret(0);
3799 return start;
3800 }
3801
3802 address generate_sha512_implCompress(bool multi_block, const char *name) {
3803 assert(VM_Version::supports_avx2(), "");
3804 assert(VM_Version::supports_bmi2(), "");
3805 __ align(CodeEntryAlignment);
3806 StubCodeMark mark(this, "StubRoutines", name);
3807 address start = __ pc();
3808
3809 Register buf = c_rarg0;
3810 Register state = c_rarg1;
3811 Register ofs = c_rarg2;
3812 Register limit = c_rarg3;
3813
3814 const XMMRegister msg = xmm0;
3815 const XMMRegister state0 = xmm1;
3816 const XMMRegister state1 = xmm2;
3817 const XMMRegister msgtmp0 = xmm3;
3818 const XMMRegister msgtmp1 = xmm4;
3819 const XMMRegister msgtmp2 = xmm5;
3820 const XMMRegister msgtmp3 = xmm6;
3821 const XMMRegister msgtmp4 = xmm7;
3822
3823 const XMMRegister shuf_mask = xmm8;
3824
3825 __ enter();
3826
3827 __ sha512_AVX2(msg, state0, state1, msgtmp0, msgtmp1, msgtmp2, msgtmp3, msgtmp4,
3828 buf, state, ofs, limit, rsp, multi_block, shuf_mask);
3829
3830 __ vzeroupper();
3831 __ leave();
3832 __ ret(0);
3833 return start;
3834 }
3835
3836 // This is a version of CTR/AES crypt which does 6 blocks in a loop at a time
3837 // to hide instruction latency
3838 //
3839 // Arguments:
3840 //
3841 // Inputs:
3842 // c_rarg0 - source byte array address
3843 // c_rarg1 - destination byte array address
3844 // c_rarg2 - K (key) in little endian int array
3845 // c_rarg3 - counter vector byte array address
3846 // Linux
3847 // c_rarg4 - input length
3848 // c_rarg5 - saved encryptedCounter start
3849 // rbp + 6 * wordSize - saved used length
3850 // Windows
3851 // rbp + 6 * wordSize - input length
3852 // rbp + 7 * wordSize - saved encryptedCounter start
3853 // rbp + 8 * wordSize - saved used length
3854 //
3855 // Output:
3856 // rax - input length
3857 //
3858 address generate_counterMode_AESCrypt_Parallel() {
3859 assert(UseAES, "need AES instructions and misaligned SSE support");
3860 __ align(CodeEntryAlignment);
3861 StubCodeMark mark(this, "StubRoutines", "counterMode_AESCrypt");
3862 address start = __ pc();
3863 const Register from = c_rarg0; // source array address
3864 const Register to = c_rarg1; // destination array address
3865 const Register key = c_rarg2; // key array address
3866 const Register counter = c_rarg3; // counter byte array initialized from counter array address
3867 // and updated with the incremented counter in the end
3868 #ifndef _WIN64
3869 const Register len_reg = c_rarg4;
3870 const Register saved_encCounter_start = c_rarg5;
3871 const Register used_addr = r10;
3872 const Address used_mem(rbp, 2 * wordSize);
3873 const Register used = r11;
3874 #else
3875 const Address len_mem(rbp, 6 * wordSize); // length is on stack on Win64
3876 const Address saved_encCounter_mem(rbp, 7 * wordSize); // length is on stack on Win64
3877 const Address used_mem(rbp, 8 * wordSize); // length is on stack on Win64
3878 const Register len_reg = r10; // pick the first volatile windows register
3879 const Register saved_encCounter_start = r11;
3880 const Register used_addr = r13;
3881 const Register used = r14;
3882 #endif
3883 const Register pos = rax;
3884
3885 const int PARALLEL_FACTOR = 6;
3886 const XMMRegister xmm_counter_shuf_mask = xmm0;
3887 const XMMRegister xmm_key_shuf_mask = xmm1; // used temporarily to swap key bytes up front
3888 const XMMRegister xmm_curr_counter = xmm2;
3889
3890 const XMMRegister xmm_key_tmp0 = xmm3;
3891 const XMMRegister xmm_key_tmp1 = xmm4;
3892
3893 // registers holding the four results in the parallelized loop
3894 const XMMRegister xmm_result0 = xmm5;
3895 const XMMRegister xmm_result1 = xmm6;
3896 const XMMRegister xmm_result2 = xmm7;
3897 const XMMRegister xmm_result3 = xmm8;
3898 const XMMRegister xmm_result4 = xmm9;
3899 const XMMRegister xmm_result5 = xmm10;
3900
3901 const XMMRegister xmm_from0 = xmm11;
3902 const XMMRegister xmm_from1 = xmm12;
3903 const XMMRegister xmm_from2 = xmm13;
3904 const XMMRegister xmm_from3 = xmm14; //the last one is xmm14. we have to preserve it on WIN64.
3905 const XMMRegister xmm_from4 = xmm3; //reuse xmm3~4. Because xmm_key_tmp0~1 are useless when loading input text
3906 const XMMRegister xmm_from5 = xmm4;
3907
3908 //for key_128, key_192, key_256
3909 const int rounds[3] = {10, 12, 14};
3910 Label L_exit_preLoop, L_preLoop_start;
3911 Label L_multiBlock_loopTop[3];
3912 Label L_singleBlockLoopTop[3];
3913 Label L__incCounter[3][6]; //for 6 blocks
3914 Label L__incCounter_single[3]; //for single block, key128, key192, key256
3915 Label L_processTail_insr[3], L_processTail_4_insr[3], L_processTail_2_insr[3], L_processTail_1_insr[3], L_processTail_exit_insr[3];
3916 Label L_processTail_extr[3], L_processTail_4_extr[3], L_processTail_2_extr[3], L_processTail_1_extr[3], L_processTail_exit_extr[3];
3917
3918 Label L_exit;
3919
3920 __ enter(); // required for proper stackwalking of RuntimeStub frame
3921
3922 // For EVEX with VL and BW, provide a standard mask, VL = 128 will guide the merge
3923 // context for the registers used, where all instructions below are using 128-bit mode
3924 // On EVEX without VL and BW, these instructions will all be AVX.
3925 if (VM_Version::supports_avx512vlbw()) {
3926 __ movl(rax, 0xffff);
3927 __ kmovql(k1, rax);
3928 }
3929
3930 #ifdef _WIN64
3931 // allocate spill slots for r13, r14
3932 enum {
3933 saved_r13_offset,
3934 saved_r14_offset
3935 };
3936 __ subptr(rsp, 2 * wordSize);
3937 __ movptr(Address(rsp, saved_r13_offset * wordSize), r13);
3938 __ movptr(Address(rsp, saved_r14_offset * wordSize), r14);
3939
3940 // on win64, fill len_reg from stack position
3941 __ movl(len_reg, len_mem);
3942 __ movptr(saved_encCounter_start, saved_encCounter_mem);
3943 __ movptr(used_addr, used_mem);
3944 __ movl(used, Address(used_addr, 0));
3945 #else
3946 __ push(len_reg); // Save
3947 __ movptr(used_addr, used_mem);
3948 __ movl(used, Address(used_addr, 0));
3949 #endif
3950
3951 __ push(rbx); // Save RBX
3952 __ movdqu(xmm_curr_counter, Address(counter, 0x00)); // initialize counter with initial counter
3953 __ movdqu(xmm_counter_shuf_mask, ExternalAddress(StubRoutines::x86::counter_shuffle_mask_addr()), pos); // pos as scratch
3954 __ pshufb(xmm_curr_counter, xmm_counter_shuf_mask); //counter is shuffled
3955 __ movptr(pos, 0);
3956
3957 // Use the partially used encrpyted counter from last invocation
3958 __ BIND(L_preLoop_start);
3959 __ cmpptr(used, 16);
3960 __ jcc(Assembler::aboveEqual, L_exit_preLoop);
3961 __ cmpptr(len_reg, 0);
3962 __ jcc(Assembler::lessEqual, L_exit_preLoop);
3963 __ movb(rbx, Address(saved_encCounter_start, used));
3964 __ xorb(rbx, Address(from, pos));
3965 __ movb(Address(to, pos), rbx);
3966 __ addptr(pos, 1);
3967 __ addptr(used, 1);
3968 __ subptr(len_reg, 1);
3969
3970 __ jmp(L_preLoop_start);
3971
3972 __ BIND(L_exit_preLoop);
3973 __ movl(Address(used_addr, 0), used);
3974
3975 // key length could be only {11, 13, 15} * 4 = {44, 52, 60}
3976 __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()), rbx); // rbx as scratch
3977 __ movl(rbx, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
3978 __ cmpl(rbx, 52);
3979 __ jcc(Assembler::equal, L_multiBlock_loopTop[1]);
3980 __ cmpl(rbx, 60);
3981 __ jcc(Assembler::equal, L_multiBlock_loopTop[2]);
3982
3983 #define CTR_DoSix(opc, src_reg) \
3984 __ opc(xmm_result0, src_reg); \
3985 __ opc(xmm_result1, src_reg); \
3986 __ opc(xmm_result2, src_reg); \
3987 __ opc(xmm_result3, src_reg); \
3988 __ opc(xmm_result4, src_reg); \
3989 __ opc(xmm_result5, src_reg);
3990
3991 // k == 0 : generate code for key_128
3992 // k == 1 : generate code for key_192
3993 // k == 2 : generate code for key_256
3994 for (int k = 0; k < 3; ++k) {
3995 //multi blocks starts here
3996 __ align(OptoLoopAlignment);
3997 __ BIND(L_multiBlock_loopTop[k]);
3998 __ cmpptr(len_reg, PARALLEL_FACTOR * AESBlockSize); // see if at least PARALLEL_FACTOR blocks left
3999 __ jcc(Assembler::less, L_singleBlockLoopTop[k]);
4000 load_key(xmm_key_tmp0, key, 0x00, xmm_key_shuf_mask);
4001
4002 //load, then increase counters
4003 CTR_DoSix(movdqa, xmm_curr_counter);
4004 inc_counter(rbx, xmm_result1, 0x01, L__incCounter[k][0]);
4005 inc_counter(rbx, xmm_result2, 0x02, L__incCounter[k][1]);
4006 inc_counter(rbx, xmm_result3, 0x03, L__incCounter[k][2]);
4007 inc_counter(rbx, xmm_result4, 0x04, L__incCounter[k][3]);
4008 inc_counter(rbx, xmm_result5, 0x05, L__incCounter[k][4]);
4009 inc_counter(rbx, xmm_curr_counter, 0x06, L__incCounter[k][5]);
4010 CTR_DoSix(pshufb, xmm_counter_shuf_mask); // after increased, shuffled counters back for PXOR
4011 CTR_DoSix(pxor, xmm_key_tmp0); //PXOR with Round 0 key
4012
4013 //load two ROUND_KEYs at a time
4014 for (int i = 1; i < rounds[k]; ) {
4015 load_key(xmm_key_tmp1, key, (0x10 * i), xmm_key_shuf_mask);
4016 load_key(xmm_key_tmp0, key, (0x10 * (i+1)), xmm_key_shuf_mask);
4017 CTR_DoSix(aesenc, xmm_key_tmp1);
4018 i++;
4019 if (i != rounds[k]) {
4020 CTR_DoSix(aesenc, xmm_key_tmp0);
4021 } else {
4022 CTR_DoSix(aesenclast, xmm_key_tmp0);
4023 }
4024 i++;
4025 }
4026
4027 // get next PARALLEL_FACTOR blocks into xmm_result registers
4028 __ movdqu(xmm_from0, Address(from, pos, Address::times_1, 0 * AESBlockSize));
4029 __ movdqu(xmm_from1, Address(from, pos, Address::times_1, 1 * AESBlockSize));
4030 __ movdqu(xmm_from2, Address(from, pos, Address::times_1, 2 * AESBlockSize));
4031 __ movdqu(xmm_from3, Address(from, pos, Address::times_1, 3 * AESBlockSize));
4032 __ movdqu(xmm_from4, Address(from, pos, Address::times_1, 4 * AESBlockSize));
4033 __ movdqu(xmm_from5, Address(from, pos, Address::times_1, 5 * AESBlockSize));
4034
4035 __ pxor(xmm_result0, xmm_from0);
4036 __ pxor(xmm_result1, xmm_from1);
4037 __ pxor(xmm_result2, xmm_from2);
4038 __ pxor(xmm_result3, xmm_from3);
4039 __ pxor(xmm_result4, xmm_from4);
4040 __ pxor(xmm_result5, xmm_from5);
4041
4042 // store 6 results into the next 64 bytes of output
4043 __ movdqu(Address(to, pos, Address::times_1, 0 * AESBlockSize), xmm_result0);
4044 __ movdqu(Address(to, pos, Address::times_1, 1 * AESBlockSize), xmm_result1);
4045 __ movdqu(Address(to, pos, Address::times_1, 2 * AESBlockSize), xmm_result2);
4046 __ movdqu(Address(to, pos, Address::times_1, 3 * AESBlockSize), xmm_result3);
4047 __ movdqu(Address(to, pos, Address::times_1, 4 * AESBlockSize), xmm_result4);
4048 __ movdqu(Address(to, pos, Address::times_1, 5 * AESBlockSize), xmm_result5);
4049
4050 __ addptr(pos, PARALLEL_FACTOR * AESBlockSize); // increase the length of crypt text
4051 __ subptr(len_reg, PARALLEL_FACTOR * AESBlockSize); // decrease the remaining length
4052 __ jmp(L_multiBlock_loopTop[k]);
4053
4054 // singleBlock starts here
4055 __ align(OptoLoopAlignment);
4056 __ BIND(L_singleBlockLoopTop[k]);
4057 __ cmpptr(len_reg, 0);
4058 __ jcc(Assembler::lessEqual, L_exit);
4059 load_key(xmm_key_tmp0, key, 0x00, xmm_key_shuf_mask);
4060 __ movdqa(xmm_result0, xmm_curr_counter);
4061 inc_counter(rbx, xmm_curr_counter, 0x01, L__incCounter_single[k]);
4062 __ pshufb(xmm_result0, xmm_counter_shuf_mask);
4063 __ pxor(xmm_result0, xmm_key_tmp0);
4064 for (int i = 1; i < rounds[k]; i++) {
4065 load_key(xmm_key_tmp0, key, (0x10 * i), xmm_key_shuf_mask);
4066 __ aesenc(xmm_result0, xmm_key_tmp0);
4067 }
4068 load_key(xmm_key_tmp0, key, (rounds[k] * 0x10), xmm_key_shuf_mask);
4069 __ aesenclast(xmm_result0, xmm_key_tmp0);
4070 __ cmpptr(len_reg, AESBlockSize);
4071 __ jcc(Assembler::less, L_processTail_insr[k]);
4072 __ movdqu(xmm_from0, Address(from, pos, Address::times_1, 0 * AESBlockSize));
4073 __ pxor(xmm_result0, xmm_from0);
4074 __ movdqu(Address(to, pos, Address::times_1, 0 * AESBlockSize), xmm_result0);
4075 __ addptr(pos, AESBlockSize);
4076 __ subptr(len_reg, AESBlockSize);
4077 __ jmp(L_singleBlockLoopTop[k]);
4078 __ BIND(L_processTail_insr[k]); // Process the tail part of the input array
4079 __ addptr(pos, len_reg); // 1. Insert bytes from src array into xmm_from0 register
4080 __ testptr(len_reg, 8);
4081 __ jcc(Assembler::zero, L_processTail_4_insr[k]);
4082 __ subptr(pos,8);
4083 __ pinsrq(xmm_from0, Address(from, pos), 0);
4084 __ BIND(L_processTail_4_insr[k]);
4085 __ testptr(len_reg, 4);
4086 __ jcc(Assembler::zero, L_processTail_2_insr[k]);
4087 __ subptr(pos,4);
4088 __ pslldq(xmm_from0, 4);
4089 __ pinsrd(xmm_from0, Address(from, pos), 0);
4090 __ BIND(L_processTail_2_insr[k]);
4091 __ testptr(len_reg, 2);
4092 __ jcc(Assembler::zero, L_processTail_1_insr[k]);
4093 __ subptr(pos, 2);
4094 __ pslldq(xmm_from0, 2);
4095 __ pinsrw(xmm_from0, Address(from, pos), 0);
4096 __ BIND(L_processTail_1_insr[k]);
4097 __ testptr(len_reg, 1);
4098 __ jcc(Assembler::zero, L_processTail_exit_insr[k]);
4099 __ subptr(pos, 1);
4100 __ pslldq(xmm_from0, 1);
4101 __ pinsrb(xmm_from0, Address(from, pos), 0);
4102 __ BIND(L_processTail_exit_insr[k]);
4103
4104 __ movdqu(Address(saved_encCounter_start, 0), xmm_result0); // 2. Perform pxor of the encrypted counter and plaintext Bytes.
4105 __ pxor(xmm_result0, xmm_from0); // Also the encrypted counter is saved for next invocation.
4106
4107 __ testptr(len_reg, 8);
4108 __ jcc(Assembler::zero, L_processTail_4_extr[k]); // 3. Extract bytes from xmm_result0 into the dest. array
4109 __ pextrq(Address(to, pos), xmm_result0, 0);
4110 __ psrldq(xmm_result0, 8);
4111 __ addptr(pos, 8);
4112 __ BIND(L_processTail_4_extr[k]);
4113 __ testptr(len_reg, 4);
4114 __ jcc(Assembler::zero, L_processTail_2_extr[k]);
4115 __ pextrd(Address(to, pos), xmm_result0, 0);
4116 __ psrldq(xmm_result0, 4);
4117 __ addptr(pos, 4);
4118 __ BIND(L_processTail_2_extr[k]);
4119 __ testptr(len_reg, 2);
4120 __ jcc(Assembler::zero, L_processTail_1_extr[k]);
4121 __ pextrw(Address(to, pos), xmm_result0, 0);
4122 __ psrldq(xmm_result0, 2);
4123 __ addptr(pos, 2);
4124 __ BIND(L_processTail_1_extr[k]);
4125 __ testptr(len_reg, 1);
4126 __ jcc(Assembler::zero, L_processTail_exit_extr[k]);
4127 __ pextrb(Address(to, pos), xmm_result0, 0);
4128
4129 __ BIND(L_processTail_exit_extr[k]);
4130 __ movl(Address(used_addr, 0), len_reg);
4131 __ jmp(L_exit);
4132
4133 }
4134
4135 __ BIND(L_exit);
4136 __ pshufb(xmm_curr_counter, xmm_counter_shuf_mask); //counter is shuffled back.
4137 __ movdqu(Address(counter, 0), xmm_curr_counter); //save counter back
4138 __ pop(rbx); // pop the saved RBX.
4139 #ifdef _WIN64
4140 __ movl(rax, len_mem);
4141 __ movptr(r13, Address(rsp, saved_r13_offset * wordSize));
4142 __ movptr(r14, Address(rsp, saved_r14_offset * wordSize));
4143 __ addptr(rsp, 2 * wordSize);
4144 #else
4145 __ pop(rax); // return 'len'
4146 #endif
4147 __ leave(); // required for proper stackwalking of RuntimeStub frame
4148 __ ret(0);
4149 return start;
4150 }
4151
4152 // byte swap x86 long
4153 address generate_ghash_long_swap_mask() {
4154 __ align(CodeEntryAlignment);
4155 StubCodeMark mark(this, "StubRoutines", "ghash_long_swap_mask");
4156 address start = __ pc();
4157 __ emit_data64(0x0f0e0d0c0b0a0908, relocInfo::none );
4158 __ emit_data64(0x0706050403020100, relocInfo::none );
4159 return start;
4160 }
4161
4162 // byte swap x86 byte array
4163 address generate_ghash_byte_swap_mask() {
4164 __ align(CodeEntryAlignment);
4165 StubCodeMark mark(this, "StubRoutines", "ghash_byte_swap_mask");
4166 address start = __ pc();
4167 __ emit_data64(0x08090a0b0c0d0e0f, relocInfo::none );
4168 __ emit_data64(0x0001020304050607, relocInfo::none );
4169 return start;
4170 }
4171
4172 /* Single and multi-block ghash operations */
4173 address generate_ghash_processBlocks() {
4174 __ align(CodeEntryAlignment);
4175 Label L_ghash_loop, L_exit;
4176 StubCodeMark mark(this, "StubRoutines", "ghash_processBlocks");
4177 address start = __ pc();
4178
4179 const Register state = c_rarg0;
4180 const Register subkeyH = c_rarg1;
4181 const Register data = c_rarg2;
4182 const Register blocks = c_rarg3;
4183
4184 const XMMRegister xmm_temp0 = xmm0;
4185 const XMMRegister xmm_temp1 = xmm1;
4186 const XMMRegister xmm_temp2 = xmm2;
4187 const XMMRegister xmm_temp3 = xmm3;
4188 const XMMRegister xmm_temp4 = xmm4;
4189 const XMMRegister xmm_temp5 = xmm5;
4190 const XMMRegister xmm_temp6 = xmm6;
4191 const XMMRegister xmm_temp7 = xmm7;
4192 const XMMRegister xmm_temp8 = xmm8;
4193 const XMMRegister xmm_temp9 = xmm9;
4194 const XMMRegister xmm_temp10 = xmm10;
4195
4196 __ enter();
4197
4198 // For EVEX with VL and BW, provide a standard mask, VL = 128 will guide the merge
4199 // context for the registers used, where all instructions below are using 128-bit mode
4200 // On EVEX without VL and BW, these instructions will all be AVX.
4201 if (VM_Version::supports_avx512vlbw()) {
4202 __ movl(rax, 0xffff);
4203 __ kmovql(k1, rax);
4204 }
4205
4206 __ movdqu(xmm_temp10, ExternalAddress(StubRoutines::x86::ghash_long_swap_mask_addr()));
4207
4208 __ movdqu(xmm_temp0, Address(state, 0));
4209 __ pshufb(xmm_temp0, xmm_temp10);
4210
4211
4212 __ BIND(L_ghash_loop);
4213 __ movdqu(xmm_temp2, Address(data, 0));
4214 __ pshufb(xmm_temp2, ExternalAddress(StubRoutines::x86::ghash_byte_swap_mask_addr()));
4215
4216 __ movdqu(xmm_temp1, Address(subkeyH, 0));
4217 __ pshufb(xmm_temp1, xmm_temp10);
4218
4219 __ pxor(xmm_temp0, xmm_temp2);
4220
4221 //
4222 // Multiply with the hash key
4223 //
4224 __ movdqu(xmm_temp3, xmm_temp0);
4225 __ pclmulqdq(xmm_temp3, xmm_temp1, 0); // xmm3 holds a0*b0
4226 __ movdqu(xmm_temp4, xmm_temp0);
4227 __ pclmulqdq(xmm_temp4, xmm_temp1, 16); // xmm4 holds a0*b1
4228
4229 __ movdqu(xmm_temp5, xmm_temp0);
4230 __ pclmulqdq(xmm_temp5, xmm_temp1, 1); // xmm5 holds a1*b0
4231 __ movdqu(xmm_temp6, xmm_temp0);
4232 __ pclmulqdq(xmm_temp6, xmm_temp1, 17); // xmm6 holds a1*b1
4233
4234 __ pxor(xmm_temp4, xmm_temp5); // xmm4 holds a0*b1 + a1*b0
4235
4236 __ movdqu(xmm_temp5, xmm_temp4); // move the contents of xmm4 to xmm5
4237 __ psrldq(xmm_temp4, 8); // shift by xmm4 64 bits to the right
4238 __ pslldq(xmm_temp5, 8); // shift by xmm5 64 bits to the left
4239 __ pxor(xmm_temp3, xmm_temp5);
4240 __ pxor(xmm_temp6, xmm_temp4); // Register pair <xmm6:xmm3> holds the result
4241 // of the carry-less multiplication of
4242 // xmm0 by xmm1.
4243
4244 // We shift the result of the multiplication by one bit position
4245 // to the left to cope for the fact that the bits are reversed.
4246 __ movdqu(xmm_temp7, xmm_temp3);
4247 __ movdqu(xmm_temp8, xmm_temp6);
4248 __ pslld(xmm_temp3, 1);
4249 __ pslld(xmm_temp6, 1);
4250 __ psrld(xmm_temp7, 31);
4251 __ psrld(xmm_temp8, 31);
4252 __ movdqu(xmm_temp9, xmm_temp7);
4253 __ pslldq(xmm_temp8, 4);
4254 __ pslldq(xmm_temp7, 4);
4255 __ psrldq(xmm_temp9, 12);
4256 __ por(xmm_temp3, xmm_temp7);
4257 __ por(xmm_temp6, xmm_temp8);
4258 __ por(xmm_temp6, xmm_temp9);
4259
4260 //
4261 // First phase of the reduction
4262 //
4263 // Move xmm3 into xmm7, xmm8, xmm9 in order to perform the shifts
4264 // independently.
4265 __ movdqu(xmm_temp7, xmm_temp3);
4266 __ movdqu(xmm_temp8, xmm_temp3);
4267 __ movdqu(xmm_temp9, xmm_temp3);
4268 __ pslld(xmm_temp7, 31); // packed right shift shifting << 31
4269 __ pslld(xmm_temp8, 30); // packed right shift shifting << 30
4270 __ pslld(xmm_temp9, 25); // packed right shift shifting << 25
4271 __ pxor(xmm_temp7, xmm_temp8); // xor the shifted versions
4272 __ pxor(xmm_temp7, xmm_temp9);
4273 __ movdqu(xmm_temp8, xmm_temp7);
4274 __ pslldq(xmm_temp7, 12);
4275 __ psrldq(xmm_temp8, 4);
4276 __ pxor(xmm_temp3, xmm_temp7); // first phase of the reduction complete
4277
4278 //
4279 // Second phase of the reduction
4280 //
4281 // Make 3 copies of xmm3 in xmm2, xmm4, xmm5 for doing these
4282 // shift operations.
4283 __ movdqu(xmm_temp2, xmm_temp3);
4284 __ movdqu(xmm_temp4, xmm_temp3);
4285 __ movdqu(xmm_temp5, xmm_temp3);
4286 __ psrld(xmm_temp2, 1); // packed left shifting >> 1
4287 __ psrld(xmm_temp4, 2); // packed left shifting >> 2
4288 __ psrld(xmm_temp5, 7); // packed left shifting >> 7
4289 __ pxor(xmm_temp2, xmm_temp4); // xor the shifted versions
4290 __ pxor(xmm_temp2, xmm_temp5);
4291 __ pxor(xmm_temp2, xmm_temp8);
4292 __ pxor(xmm_temp3, xmm_temp2);
4293 __ pxor(xmm_temp6, xmm_temp3); // the result is in xmm6
4294
4295 __ decrement(blocks);
4296 __ jcc(Assembler::zero, L_exit);
4297 __ movdqu(xmm_temp0, xmm_temp6);
4298 __ addptr(data, 16);
4299 __ jmp(L_ghash_loop);
4300
4301 __ BIND(L_exit);
4302 __ pshufb(xmm_temp6, xmm_temp10); // Byte swap 16-byte result
4303 __ movdqu(Address(state, 0), xmm_temp6); // store the result
4304 __ leave();
4305 __ ret(0);
4306 return start;
4307 }
4308
4309 /**
4310 * Arguments:
4311 *
4312 * Inputs:
4313 * c_rarg0 - int crc
4314 * c_rarg1 - byte* buf
4315 * c_rarg2 - int length
4316 *
4317 * Ouput:
4318 * rax - int crc result
4319 */
4320 address generate_updateBytesCRC32() {
4321 assert(UseCRC32Intrinsics, "need AVX and CLMUL instructions");
4322
4323 __ align(CodeEntryAlignment);
4324 StubCodeMark mark(this, "StubRoutines", "updateBytesCRC32");
4325
4326 address start = __ pc();
4327 // Win64: rcx, rdx, r8, r9 (c_rarg0, c_rarg1, ...)
4328 // Unix: rdi, rsi, rdx, rcx, r8, r9 (c_rarg0, c_rarg1, ...)
4329 // rscratch1: r10
4330 const Register crc = c_rarg0; // crc
4331 const Register buf = c_rarg1; // source java byte array address
4332 const Register len = c_rarg2; // length
4333 const Register table = c_rarg3; // crc_table address (reuse register)
4334 const Register tmp = r11;
4335 assert_different_registers(crc, buf, len, table, tmp, rax);
4336
4337 BLOCK_COMMENT("Entry:");
4338 __ enter(); // required for proper stackwalking of RuntimeStub frame
4339
4340 __ kernel_crc32(crc, buf, len, table, tmp);
4341
4342 __ movl(rax, crc);
4343 __ vzeroupper();
4344 __ leave(); // required for proper stackwalking of RuntimeStub frame
4345 __ ret(0);
4346
4347 return start;
4348 }
4349
4350 /**
4351 * Arguments:
4352 *
4353 * Inputs:
4354 * c_rarg0 - int crc
4355 * c_rarg1 - byte* buf
4356 * c_rarg2 - long length
4357 * c_rarg3 - table_start - optional (present only when doing a library_call,
4358 * not used by x86 algorithm)
4359 *
4360 * Ouput:
4361 * rax - int crc result
4362 */
4363 address generate_updateBytesCRC32C(bool is_pclmulqdq_supported) {
4364 assert(UseCRC32CIntrinsics, "need SSE4_2");
4365 __ align(CodeEntryAlignment);
4366 StubCodeMark mark(this, "StubRoutines", "updateBytesCRC32C");
4367 address start = __ pc();
4368 //reg.arg int#0 int#1 int#2 int#3 int#4 int#5 float regs
4369 //Windows RCX RDX R8 R9 none none XMM0..XMM3
4370 //Lin / Sol RDI RSI RDX RCX R8 R9 XMM0..XMM7
4371 const Register crc = c_rarg0; // crc
4372 const Register buf = c_rarg1; // source java byte array address
4373 const Register len = c_rarg2; // length
4374 const Register a = rax;
4375 const Register j = r9;
4376 const Register k = r10;
4377 const Register l = r11;
4378 #ifdef _WIN64
4379 const Register y = rdi;
4380 const Register z = rsi;
4381 #else
4382 const Register y = rcx;
4383 const Register z = r8;
4384 #endif
4385 assert_different_registers(crc, buf, len, a, j, k, l, y, z);
4386
4387 BLOCK_COMMENT("Entry:");
4388 __ enter(); // required for proper stackwalking of RuntimeStub frame
4389 #ifdef _WIN64
4390 __ push(y);
4391 __ push(z);
4392 #endif
4393 __ crc32c_ipl_alg2_alt2(crc, buf, len,
4394 a, j, k,
4395 l, y, z,
4396 c_farg0, c_farg1, c_farg2,
4397 is_pclmulqdq_supported);
4398 __ movl(rax, crc);
4399 #ifdef _WIN64
4400 __ pop(z);
4401 __ pop(y);
4402 #endif
4403 __ vzeroupper();
4404 __ leave(); // required for proper stackwalking of RuntimeStub frame
4405 __ ret(0);
4406
4407 return start;
4408 }
4409
4410 /**
4411 * Arguments:
4412 *
4413 * Input:
4414 * c_rarg0 - x address
4415 * c_rarg1 - x length
4416 * c_rarg2 - y address
4417 * c_rarg3 - y lenth
4418 * not Win64
4419 * c_rarg4 - z address
4420 * c_rarg5 - z length
4421 * Win64
4422 * rsp+40 - z address
4423 * rsp+48 - z length
4424 */
4425 address generate_multiplyToLen() {
4426 __ align(CodeEntryAlignment);
4427 StubCodeMark mark(this, "StubRoutines", "multiplyToLen");
4428
4429 address start = __ pc();
4430 // Win64: rcx, rdx, r8, r9 (c_rarg0, c_rarg1, ...)
4431 // Unix: rdi, rsi, rdx, rcx, r8, r9 (c_rarg0, c_rarg1, ...)
4432 const Register x = rdi;
4433 const Register xlen = rax;
4434 const Register y = rsi;
4435 const Register ylen = rcx;
4436 const Register z = r8;
4437 const Register zlen = r11;
4438
4439 // Next registers will be saved on stack in multiply_to_len().
4440 const Register tmp1 = r12;
4441 const Register tmp2 = r13;
4442 const Register tmp3 = r14;
4443 const Register tmp4 = r15;
4444 const Register tmp5 = rbx;
4445
4446 BLOCK_COMMENT("Entry:");
4447 __ enter(); // required for proper stackwalking of RuntimeStub frame
4448
4449 #ifndef _WIN64
4450 __ movptr(zlen, r9); // Save r9 in r11 - zlen
4451 #endif
4452 setup_arg_regs(4); // x => rdi, xlen => rsi, y => rdx
4453 // ylen => rcx, z => r8, zlen => r11
4454 // r9 and r10 may be used to save non-volatile registers
4455 #ifdef _WIN64
4456 // last 2 arguments (#4, #5) are on stack on Win64
4457 __ movptr(z, Address(rsp, 6 * wordSize));
4458 __ movptr(zlen, Address(rsp, 7 * wordSize));
4459 #endif
4460
4461 __ movptr(xlen, rsi);
4462 __ movptr(y, rdx);
4463 __ multiply_to_len(x, xlen, y, ylen, z, zlen, tmp1, tmp2, tmp3, tmp4, tmp5);
4464
4465 restore_arg_regs();
4466
4467 __ leave(); // required for proper stackwalking of RuntimeStub frame
4468 __ ret(0);
4469
4470 return start;
4471 }
4472
4473 /**
4474 * Arguments:
4475 *
4476 * Input:
4477 * c_rarg0 - obja address
4478 * c_rarg1 - objb address
4479 * c_rarg3 - length length
4480 * c_rarg4 - scale log2_array_indxscale
4481 *
4482 * Output:
4483 * rax - int >= mismatched index, < 0 bitwise complement of tail
4484 */
4485 address generate_vectorizedMismatch() {
4486 __ align(CodeEntryAlignment);
4487 StubCodeMark mark(this, "StubRoutines", "vectorizedMismatch");
4488 address start = __ pc();
4489
4490 BLOCK_COMMENT("Entry:");
4491 __ enter();
4492
4493 #ifdef _WIN64 // Win64: rcx, rdx, r8, r9 (c_rarg0, c_rarg1, ...)
4494 const Register scale = c_rarg0; //rcx, will exchange with r9
4495 const Register objb = c_rarg1; //rdx
4496 const Register length = c_rarg2; //r8
4497 const Register obja = c_rarg3; //r9
4498 __ xchgq(obja, scale); //now obja and scale contains the correct contents
4499
4500 const Register tmp1 = r10;
4501 const Register tmp2 = r11;
4502 #endif
4503 #ifndef _WIN64 // Unix: rdi, rsi, rdx, rcx, r8, r9 (c_rarg0, c_rarg1, ...)
4504 const Register obja = c_rarg0; //U:rdi
4505 const Register objb = c_rarg1; //U:rsi
4506 const Register length = c_rarg2; //U:rdx
4507 const Register scale = c_rarg3; //U:rcx
4508 const Register tmp1 = r8;
4509 const Register tmp2 = r9;
4510 #endif
4511 const Register result = rax; //return value
4512 const XMMRegister vec0 = xmm0;
4513 const XMMRegister vec1 = xmm1;
4514 const XMMRegister vec2 = xmm2;
4515
4516 __ vectorized_mismatch(obja, objb, length, scale, result, tmp1, tmp2, vec0, vec1, vec2);
4517
4518 __ vzeroupper();
4519 __ leave();
4520 __ ret(0);
4521
4522 return start;
4523 }
4524
4525 /**
4526 * Arguments:
4527 *
4528 // Input:
4529 // c_rarg0 - x address
4530 // c_rarg1 - x length
4531 // c_rarg2 - z address
4532 // c_rarg3 - z lenth
4533 *
4534 */
4535 address generate_squareToLen() {
4536
4537 __ align(CodeEntryAlignment);
4538 StubCodeMark mark(this, "StubRoutines", "squareToLen");
4539
4540 address start = __ pc();
4541 // Win64: rcx, rdx, r8, r9 (c_rarg0, c_rarg1, ...)
4542 // Unix: rdi, rsi, rdx, rcx (c_rarg0, c_rarg1, ...)
4543 const Register x = rdi;
4544 const Register len = rsi;
4545 const Register z = r8;
4546 const Register zlen = rcx;
4547
4548 const Register tmp1 = r12;
4549 const Register tmp2 = r13;
4550 const Register tmp3 = r14;
4551 const Register tmp4 = r15;
4552 const Register tmp5 = rbx;
4553
4554 BLOCK_COMMENT("Entry:");
4555 __ enter(); // required for proper stackwalking of RuntimeStub frame
4556
4557 setup_arg_regs(4); // x => rdi, len => rsi, z => rdx
4558 // zlen => rcx
4559 // r9 and r10 may be used to save non-volatile registers
4560 __ movptr(r8, rdx);
4561 __ square_to_len(x, len, z, zlen, tmp1, tmp2, tmp3, tmp4, tmp5, rdx, rax);
4562
4563 restore_arg_regs();
4564
4565 __ leave(); // required for proper stackwalking of RuntimeStub frame
4566 __ ret(0);
4567
4568 return start;
4569 }
4570
4571 /**
4572 * Arguments:
4573 *
4574 * Input:
4575 * c_rarg0 - out address
4576 * c_rarg1 - in address
4577 * c_rarg2 - offset
4578 * c_rarg3 - len
4579 * not Win64
4580 * c_rarg4 - k
4581 * Win64
4582 * rsp+40 - k
4583 */
4584 address generate_mulAdd() {
4585 __ align(CodeEntryAlignment);
4586 StubCodeMark mark(this, "StubRoutines", "mulAdd");
4587
4588 address start = __ pc();
4589 // Win64: rcx, rdx, r8, r9 (c_rarg0, c_rarg1, ...)
4590 // Unix: rdi, rsi, rdx, rcx, r8, r9 (c_rarg0, c_rarg1, ...)
4591 const Register out = rdi;
4592 const Register in = rsi;
4593 const Register offset = r11;
4594 const Register len = rcx;
4595 const Register k = r8;
4596
4597 // Next registers will be saved on stack in mul_add().
4598 const Register tmp1 = r12;
4599 const Register tmp2 = r13;
4600 const Register tmp3 = r14;
4601 const Register tmp4 = r15;
4602 const Register tmp5 = rbx;
4603
4604 BLOCK_COMMENT("Entry:");
4605 __ enter(); // required for proper stackwalking of RuntimeStub frame
4606
4607 setup_arg_regs(4); // out => rdi, in => rsi, offset => rdx
4608 // len => rcx, k => r8
4609 // r9 and r10 may be used to save non-volatile registers
4610 #ifdef _WIN64
4611 // last argument is on stack on Win64
4612 __ movl(k, Address(rsp, 6 * wordSize));
4613 #endif
4614 __ movptr(r11, rdx); // move offset in rdx to offset(r11)
4615 __ mul_add(out, in, offset, len, k, tmp1, tmp2, tmp3, tmp4, tmp5, rdx, rax);
4616
4617 restore_arg_regs();
4618
4619 __ leave(); // required for proper stackwalking of RuntimeStub frame
4620 __ ret(0);
4621
4622 return start;
4623 }
4624
4625 address generate_libmExp() {
4626 StubCodeMark mark(this, "StubRoutines", "libmExp");
4627
4628 address start = __ pc();
4629
4630 const XMMRegister x0 = xmm0;
4631 const XMMRegister x1 = xmm1;
4632 const XMMRegister x2 = xmm2;
4633 const XMMRegister x3 = xmm3;
4634
4635 const XMMRegister x4 = xmm4;
4636 const XMMRegister x5 = xmm5;
4637 const XMMRegister x6 = xmm6;
4638 const XMMRegister x7 = xmm7;
4639
4640 const Register tmp = r11;
4641
4642 BLOCK_COMMENT("Entry:");
4643 __ enter(); // required for proper stackwalking of RuntimeStub frame
4644
4645 __ fast_exp(x0, x1, x2, x3, x4, x5, x6, x7, rax, rcx, rdx, tmp);
4646
4647 __ leave(); // required for proper stackwalking of RuntimeStub frame
4648 __ ret(0);
4649
4650 return start;
4651
4652 }
4653
4654 address generate_libmLog() {
4655 StubCodeMark mark(this, "StubRoutines", "libmLog");
4656
4657 address start = __ pc();
4658
4659 const XMMRegister x0 = xmm0;
4660 const XMMRegister x1 = xmm1;
4661 const XMMRegister x2 = xmm2;
4662 const XMMRegister x3 = xmm3;
4663
4664 const XMMRegister x4 = xmm4;
4665 const XMMRegister x5 = xmm5;
4666 const XMMRegister x6 = xmm6;
4667 const XMMRegister x7 = xmm7;
4668
4669 const Register tmp1 = r11;
4670 const Register tmp2 = r8;
4671
4672 BLOCK_COMMENT("Entry:");
4673 __ enter(); // required for proper stackwalking of RuntimeStub frame
4674
4675 __ fast_log(x0, x1, x2, x3, x4, x5, x6, x7, rax, rcx, rdx, tmp1, tmp2);
4676
4677 __ leave(); // required for proper stackwalking of RuntimeStub frame
4678 __ ret(0);
4679
4680 return start;
4681
4682 }
4683
4684 address generate_libmLog10() {
4685 StubCodeMark mark(this, "StubRoutines", "libmLog10");
4686
4687 address start = __ pc();
4688
4689 const XMMRegister x0 = xmm0;
4690 const XMMRegister x1 = xmm1;
4691 const XMMRegister x2 = xmm2;
4692 const XMMRegister x3 = xmm3;
4693
4694 const XMMRegister x4 = xmm4;
4695 const XMMRegister x5 = xmm5;
4696 const XMMRegister x6 = xmm6;
4697 const XMMRegister x7 = xmm7;
4698
4699 const Register tmp = r11;
4700
4701 BLOCK_COMMENT("Entry:");
4702 __ enter(); // required for proper stackwalking of RuntimeStub frame
4703
4704 __ fast_log10(x0, x1, x2, x3, x4, x5, x6, x7, rax, rcx, rdx, tmp);
4705
4706 __ leave(); // required for proper stackwalking of RuntimeStub frame
4707 __ ret(0);
4708
4709 return start;
4710
4711 }
4712
4713 address generate_libmPow() {
4714 StubCodeMark mark(this, "StubRoutines", "libmPow");
4715
4716 address start = __ pc();
4717
4718 const XMMRegister x0 = xmm0;
4719 const XMMRegister x1 = xmm1;
4720 const XMMRegister x2 = xmm2;
4721 const XMMRegister x3 = xmm3;
4722
4723 const XMMRegister x4 = xmm4;
4724 const XMMRegister x5 = xmm5;
4725 const XMMRegister x6 = xmm6;
4726 const XMMRegister x7 = xmm7;
4727
4728 const Register tmp1 = r8;
4729 const Register tmp2 = r9;
4730 const Register tmp3 = r10;
4731 const Register tmp4 = r11;
4732
4733 BLOCK_COMMENT("Entry:");
4734 __ enter(); // required for proper stackwalking of RuntimeStub frame
4735
4736 __ fast_pow(x0, x1, x2, x3, x4, x5, x6, x7, rax, rcx, rdx, tmp1, tmp2, tmp3, tmp4);
4737
4738 __ leave(); // required for proper stackwalking of RuntimeStub frame
4739 __ ret(0);
4740
4741 return start;
4742
4743 }
4744
4745 address generate_libmSin() {
4746 StubCodeMark mark(this, "StubRoutines", "libmSin");
4747
4748 address start = __ pc();
4749
4750 const XMMRegister x0 = xmm0;
4751 const XMMRegister x1 = xmm1;
4752 const XMMRegister x2 = xmm2;
4753 const XMMRegister x3 = xmm3;
4754
4755 const XMMRegister x4 = xmm4;
4756 const XMMRegister x5 = xmm5;
4757 const XMMRegister x6 = xmm6;
4758 const XMMRegister x7 = xmm7;
4759
4760 const Register tmp1 = r8;
4761 const Register tmp2 = r9;
4762 const Register tmp3 = r10;
4763 const Register tmp4 = r11;
4764
4765 BLOCK_COMMENT("Entry:");
4766 __ enter(); // required for proper stackwalking of RuntimeStub frame
4767
4768 #ifdef _WIN64
4769 __ push(rsi);
4770 __ push(rdi);
4771 #endif
4772 __ fast_sin(x0, x1, x2, x3, x4, x5, x6, x7, rax, rbx, rcx, rdx, tmp1, tmp2, tmp3, tmp4);
4773
4774 #ifdef _WIN64
4775 __ pop(rdi);
4776 __ pop(rsi);
4777 #endif
4778
4779 __ leave(); // required for proper stackwalking of RuntimeStub frame
4780 __ ret(0);
4781
4782 return start;
4783
4784 }
4785
4786 address generate_libmCos() {
4787 StubCodeMark mark(this, "StubRoutines", "libmCos");
4788
4789 address start = __ pc();
4790
4791 const XMMRegister x0 = xmm0;
4792 const XMMRegister x1 = xmm1;
4793 const XMMRegister x2 = xmm2;
4794 const XMMRegister x3 = xmm3;
4795
4796 const XMMRegister x4 = xmm4;
4797 const XMMRegister x5 = xmm5;
4798 const XMMRegister x6 = xmm6;
4799 const XMMRegister x7 = xmm7;
4800
4801 const Register tmp1 = r8;
4802 const Register tmp2 = r9;
4803 const Register tmp3 = r10;
4804 const Register tmp4 = r11;
4805
4806 BLOCK_COMMENT("Entry:");
4807 __ enter(); // required for proper stackwalking of RuntimeStub frame
4808
4809 #ifdef _WIN64
4810 __ push(rsi);
4811 __ push(rdi);
4812 #endif
4813 __ fast_cos(x0, x1, x2, x3, x4, x5, x6, x7, rax, rcx, rdx, tmp1, tmp2, tmp3, tmp4);
4814
4815 #ifdef _WIN64
4816 __ pop(rdi);
4817 __ pop(rsi);
4818 #endif
4819
4820 __ leave(); // required for proper stackwalking of RuntimeStub frame
4821 __ ret(0);
4822
4823 return start;
4824
4825 }
4826
4827 address generate_libmTan() {
4828 StubCodeMark mark(this, "StubRoutines", "libmTan");
4829
4830 address start = __ pc();
4831
4832 const XMMRegister x0 = xmm0;
4833 const XMMRegister x1 = xmm1;
4834 const XMMRegister x2 = xmm2;
4835 const XMMRegister x3 = xmm3;
4836
4837 const XMMRegister x4 = xmm4;
4838 const XMMRegister x5 = xmm5;
4839 const XMMRegister x6 = xmm6;
4840 const XMMRegister x7 = xmm7;
4841
4842 const Register tmp1 = r8;
4843 const Register tmp2 = r9;
4844 const Register tmp3 = r10;
4845 const Register tmp4 = r11;
4846
4847 BLOCK_COMMENT("Entry:");
4848 __ enter(); // required for proper stackwalking of RuntimeStub frame
4849
4850 #ifdef _WIN64
4851 __ push(rsi);
4852 __ push(rdi);
4853 #endif
4854 __ fast_tan(x0, x1, x2, x3, x4, x5, x6, x7, rax, rcx, rdx, tmp1, tmp2, tmp3, tmp4);
4855
4856 #ifdef _WIN64
4857 __ pop(rdi);
4858 __ pop(rsi);
4859 #endif
4860
4861 __ leave(); // required for proper stackwalking of RuntimeStub frame
4862 __ ret(0);
4863
4864 return start;
4865
4866 }
4867
4868 #undef __
4869 #define __ masm->
4870
4871 // Continuation point for throwing of implicit exceptions that are
4872 // not handled in the current activation. Fabricates an exception
4873 // oop and initiates normal exception dispatching in this
4874 // frame. Since we need to preserve callee-saved values (currently
4875 // only for C2, but done for C1 as well) we need a callee-saved oop
4876 // map and therefore have to make these stubs into RuntimeStubs
4877 // rather than BufferBlobs. If the compiler needs all registers to
4878 // be preserved between the fault point and the exception handler
4879 // then it must assume responsibility for that in
4880 // AbstractCompiler::continuation_for_implicit_null_exception or
4881 // continuation_for_implicit_division_by_zero_exception. All other
4882 // implicit exceptions (e.g., NullPointerException or
4883 // AbstractMethodError on entry) are either at call sites or
4884 // otherwise assume that stack unwinding will be initiated, so
4885 // caller saved registers were assumed volatile in the compiler.
4886 address generate_throw_exception(const char* name,
4887 address runtime_entry,
4888 Register arg1 = noreg,
4889 Register arg2 = noreg) {
4890 // Information about frame layout at time of blocking runtime call.
4891 // Note that we only have to preserve callee-saved registers since
4892 // the compilers are responsible for supplying a continuation point
4893 // if they expect all registers to be preserved.
4894 enum layout {
4895 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt,
4896 rbp_off2,
4897 return_off,
4898 return_off2,
4899 framesize // inclusive of return address
4900 };
4901
4902 int insts_size = 512;
4903 int locs_size = 64;
4904
4905 CodeBuffer code(name, insts_size, locs_size);
4906 OopMapSet* oop_maps = new OopMapSet();
4907 MacroAssembler* masm = new MacroAssembler(&code);
4908
4909 address start = __ pc();
4910
4911 // This is an inlined and slightly modified version of call_VM
4912 // which has the ability to fetch the return PC out of
4913 // thread-local storage and also sets up last_Java_sp slightly
4914 // differently than the real call_VM
4915
4916 __ enter(); // required for proper stackwalking of RuntimeStub frame
4917
4918 assert(is_even(framesize/2), "sp not 16-byte aligned");
4919
4920 // return address and rbp are already in place
4921 __ subptr(rsp, (framesize-4) << LogBytesPerInt); // prolog
4922
4923 int frame_complete = __ pc() - start;
4924
4925 // Set up last_Java_sp and last_Java_fp
4926 address the_pc = __ pc();
4927 __ set_last_Java_frame(rsp, rbp, the_pc);
4928 __ andptr(rsp, -(StackAlignmentInBytes)); // Align stack
4929
4930 // Call runtime
4931 if (arg1 != noreg) {
4932 assert(arg2 != c_rarg1, "clobbered");
4933 __ movptr(c_rarg1, arg1);
4934 }
4935 if (arg2 != noreg) {
4936 __ movptr(c_rarg2, arg2);
4937 }
4938 __ movptr(c_rarg0, r15_thread);
4939 BLOCK_COMMENT("call runtime_entry");
4940 __ call(RuntimeAddress(runtime_entry));
4941
4942 // Generate oop map
4943 OopMap* map = new OopMap(framesize, 0);
4944
4945 oop_maps->add_gc_map(the_pc - start, map);
4946
4947 __ reset_last_Java_frame(true);
4948
4949 __ leave(); // required for proper stackwalking of RuntimeStub frame
4950
4951 // check for pending exceptions
4952 #ifdef ASSERT
4953 Label L;
4954 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()),
4955 (int32_t) NULL_WORD);
4956 __ jcc(Assembler::notEqual, L);
4957 __ should_not_reach_here();
4958 __ bind(L);
4959 #endif // ASSERT
4960 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
4961
4962
4963 // codeBlob framesize is in words (not VMRegImpl::slot_size)
4964 RuntimeStub* stub =
4965 RuntimeStub::new_runtime_stub(name,
4966 &code,
4967 frame_complete,
4968 (framesize >> (LogBytesPerWord - LogBytesPerInt)),
4969 oop_maps, false);
4970 return stub->entry_point();
4971 }
4972
4973 void create_control_words() {
4974 // Round to nearest, 53-bit mode, exceptions masked
4975 StubRoutines::_fpu_cntrl_wrd_std = 0x027F;
4976 // Round to zero, 53-bit mode, exception mased
4977 StubRoutines::_fpu_cntrl_wrd_trunc = 0x0D7F;
4978 // Round to nearest, 24-bit mode, exceptions masked
4979 StubRoutines::_fpu_cntrl_wrd_24 = 0x007F;
4980 // Round to nearest, 64-bit mode, exceptions masked
4981 StubRoutines::_fpu_cntrl_wrd_64 = 0x037F;
4982 // Round to nearest, 64-bit mode, exceptions masked
4983 StubRoutines::_mxcsr_std = 0x1F80;
4984 // Note: the following two constants are 80-bit values
4985 // layout is critical for correct loading by FPU.
4986 // Bias for strict fp multiply/divide
4987 StubRoutines::_fpu_subnormal_bias1[0]= 0x00000000; // 2^(-15360) == 0x03ff 8000 0000 0000 0000
4988 StubRoutines::_fpu_subnormal_bias1[1]= 0x80000000;
4989 StubRoutines::_fpu_subnormal_bias1[2]= 0x03ff;
4990 // Un-Bias for strict fp multiply/divide
4991 StubRoutines::_fpu_subnormal_bias2[0]= 0x00000000; // 2^(+15360) == 0x7bff 8000 0000 0000 0000
4992 StubRoutines::_fpu_subnormal_bias2[1]= 0x80000000;
4993 StubRoutines::_fpu_subnormal_bias2[2]= 0x7bff;
4994 }
4995
4996 // Initialization
4997 void generate_initial() {
4998 // Generates all stubs and initializes the entry points
4999
5000 // This platform-specific settings are needed by generate_call_stub()
5001 create_control_words();
5002
5003 // entry points that exist in all platforms Note: This is code
5004 // that could be shared among different platforms - however the
5005 // benefit seems to be smaller than the disadvantage of having a
5006 // much more complicated generator structure. See also comment in
5007 // stubRoutines.hpp.
5008
5009 StubRoutines::_forward_exception_entry = generate_forward_exception();
5010
5011 StubRoutines::_call_stub_entry =
5012 generate_call_stub(StubRoutines::_call_stub_return_address);
5013
5014 // is referenced by megamorphic call
5015 StubRoutines::_catch_exception_entry = generate_catch_exception();
5016
5017 // atomic calls
5018 StubRoutines::_atomic_xchg_entry = generate_atomic_xchg();
5019 StubRoutines::_atomic_xchg_long_entry = generate_atomic_xchg_long();
5020 StubRoutines::_atomic_cmpxchg_entry = generate_atomic_cmpxchg();
5021 StubRoutines::_atomic_cmpxchg_byte_entry = generate_atomic_cmpxchg_byte();
5022 StubRoutines::_atomic_cmpxchg_long_entry = generate_atomic_cmpxchg_long();
5023 StubRoutines::_atomic_add_entry = generate_atomic_add();
5024 StubRoutines::_atomic_add_long_entry = generate_atomic_add_long();
5025 StubRoutines::_fence_entry = generate_orderaccess_fence();
5026
5027 // platform dependent
5028 StubRoutines::x86::_get_previous_fp_entry = generate_get_previous_fp();
5029 StubRoutines::x86::_get_previous_sp_entry = generate_get_previous_sp();
5030
5031 StubRoutines::x86::_verify_mxcsr_entry = generate_verify_mxcsr();
5032
5033 // Build this early so it's available for the interpreter.
5034 StubRoutines::_throw_StackOverflowError_entry =
5035 generate_throw_exception("StackOverflowError throw_exception",
5036 CAST_FROM_FN_PTR(address,
5037 SharedRuntime::
5038 throw_StackOverflowError));
5039 StubRoutines::_throw_delayed_StackOverflowError_entry =
5040 generate_throw_exception("delayed StackOverflowError throw_exception",
5041 CAST_FROM_FN_PTR(address,
5042 SharedRuntime::
5043 throw_delayed_StackOverflowError));
5044 if (UseCRC32Intrinsics) {
5045 // set table address before stub generation which use it
5046 StubRoutines::_crc_table_adr = (address)StubRoutines::x86::_crc_table;
5047 StubRoutines::_updateBytesCRC32 = generate_updateBytesCRC32();
5048 }
5049
5050 if (UseCRC32CIntrinsics) {
5051 bool supports_clmul = VM_Version::supports_clmul();
5052 StubRoutines::x86::generate_CRC32C_table(supports_clmul);
5053 StubRoutines::_crc32c_table_addr = (address)StubRoutines::x86::_crc32c_table;
5054 StubRoutines::_updateBytesCRC32C = generate_updateBytesCRC32C(supports_clmul);
5055 }
5056 if (VM_Version::supports_sse2() && UseLibmIntrinsic && InlineIntrinsics) {
5057 if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dsin) ||
5058 vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dcos) ||
5059 vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dtan)) {
5060 StubRoutines::x86::_ONEHALF_adr = (address)StubRoutines::x86::_ONEHALF;
5061 StubRoutines::x86::_P_2_adr = (address)StubRoutines::x86::_P_2;
5062 StubRoutines::x86::_SC_4_adr = (address)StubRoutines::x86::_SC_4;
5063 StubRoutines::x86::_Ctable_adr = (address)StubRoutines::x86::_Ctable;
5064 StubRoutines::x86::_SC_2_adr = (address)StubRoutines::x86::_SC_2;
5065 StubRoutines::x86::_SC_3_adr = (address)StubRoutines::x86::_SC_3;
5066 StubRoutines::x86::_SC_1_adr = (address)StubRoutines::x86::_SC_1;
5067 StubRoutines::x86::_PI_INV_TABLE_adr = (address)StubRoutines::x86::_PI_INV_TABLE;
5068 StubRoutines::x86::_PI_4_adr = (address)StubRoutines::x86::_PI_4;
5069 StubRoutines::x86::_PI32INV_adr = (address)StubRoutines::x86::_PI32INV;
5070 StubRoutines::x86::_SIGN_MASK_adr = (address)StubRoutines::x86::_SIGN_MASK;
5071 StubRoutines::x86::_P_1_adr = (address)StubRoutines::x86::_P_1;
5072 StubRoutines::x86::_P_3_adr = (address)StubRoutines::x86::_P_3;
5073 StubRoutines::x86::_NEG_ZERO_adr = (address)StubRoutines::x86::_NEG_ZERO;
5074 }
5075 if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dexp)) {
5076 StubRoutines::_dexp = generate_libmExp();
5077 }
5078 if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dlog)) {
5079 StubRoutines::_dlog = generate_libmLog();
5080 }
5081 if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dlog10)) {
5082 StubRoutines::_dlog10 = generate_libmLog10();
5083 }
5084 if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dpow)) {
5085 StubRoutines::_dpow = generate_libmPow();
5086 }
5087 if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dsin)) {
5088 StubRoutines::_dsin = generate_libmSin();
5089 }
5090 if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dcos)) {
5091 StubRoutines::_dcos = generate_libmCos();
5092 }
5093 if (vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dtan)) {
5094 StubRoutines::_dtan = generate_libmTan();
5095 }
5096 }
5097 }
5098
5099 void generate_all() {
5100 // Generates all stubs and initializes the entry points
5101
5102 // These entry points require SharedInfo::stack0 to be set up in
5103 // non-core builds and need to be relocatable, so they each
5104 // fabricate a RuntimeStub internally.
5105 StubRoutines::_throw_AbstractMethodError_entry =
5106 generate_throw_exception("AbstractMethodError throw_exception",
5107 CAST_FROM_FN_PTR(address,
5108 SharedRuntime::
5109 throw_AbstractMethodError));
5110
5111 StubRoutines::_throw_IncompatibleClassChangeError_entry =
5112 generate_throw_exception("IncompatibleClassChangeError throw_exception",
5113 CAST_FROM_FN_PTR(address,
5114 SharedRuntime::
5115 throw_IncompatibleClassChangeError));
5116
5117 StubRoutines::_throw_NullPointerException_at_call_entry =
5118 generate_throw_exception("NullPointerException at call throw_exception",
5119 CAST_FROM_FN_PTR(address,
5120 SharedRuntime::
5121 throw_NullPointerException_at_call));
5122
5123 // entry points that are platform specific
5124 StubRoutines::x86::_f2i_fixup = generate_f2i_fixup();
5125 StubRoutines::x86::_f2l_fixup = generate_f2l_fixup();
5126 StubRoutines::x86::_d2i_fixup = generate_d2i_fixup();
5127 StubRoutines::x86::_d2l_fixup = generate_d2l_fixup();
5128
5129 StubRoutines::x86::_float_sign_mask = generate_fp_mask("float_sign_mask", 0x7FFFFFFF7FFFFFFF);
5130 StubRoutines::x86::_float_sign_flip = generate_fp_mask("float_sign_flip", 0x8000000080000000);
5131 StubRoutines::x86::_double_sign_mask = generate_fp_mask("double_sign_mask", 0x7FFFFFFFFFFFFFFF);
5132 StubRoutines::x86::_double_sign_flip = generate_fp_mask("double_sign_flip", 0x8000000000000000);
5133
5134 // support for verify_oop (must happen after universe_init)
5135 StubRoutines::_verify_oop_subroutine_entry = generate_verify_oop();
5136
5137 // arraycopy stubs used by compilers
5138 generate_arraycopy_stubs();
5139
5140 // don't bother generating these AES intrinsic stubs unless global flag is set
5141 if (UseAESIntrinsics) {
5142 StubRoutines::x86::_key_shuffle_mask_addr = generate_key_shuffle_mask(); // needed by the others
5143 StubRoutines::_aescrypt_encryptBlock = generate_aescrypt_encryptBlock();
5144 StubRoutines::_aescrypt_decryptBlock = generate_aescrypt_decryptBlock();
5145 StubRoutines::_cipherBlockChaining_encryptAESCrypt = generate_cipherBlockChaining_encryptAESCrypt();
5146 StubRoutines::_cipherBlockChaining_decryptAESCrypt = generate_cipherBlockChaining_decryptAESCrypt_Parallel();
5147 }
5148 if (UseAESCTRIntrinsics){
5149 StubRoutines::x86::_counter_shuffle_mask_addr = generate_counter_shuffle_mask();
5150 StubRoutines::_counterMode_AESCrypt = generate_counterMode_AESCrypt_Parallel();
5151 }
5152
5153 if (UseSHA1Intrinsics) {
5154 StubRoutines::x86::_upper_word_mask_addr = generate_upper_word_mask();
5155 StubRoutines::x86::_shuffle_byte_flip_mask_addr = generate_shuffle_byte_flip_mask();
5156 StubRoutines::_sha1_implCompress = generate_sha1_implCompress(false, "sha1_implCompress");
5157 StubRoutines::_sha1_implCompressMB = generate_sha1_implCompress(true, "sha1_implCompressMB");
5158 }
5159 if (UseSHA256Intrinsics) {
5160 StubRoutines::x86::_k256_adr = (address)StubRoutines::x86::_k256;
5161 char* dst = (char*)StubRoutines::x86::_k256_W;
5162 char* src = (char*)StubRoutines::x86::_k256;
5163 for (int ii = 0; ii < 16; ++ii) {
5164 memcpy(dst + 32 * ii, src + 16 * ii, 16);
5165 memcpy(dst + 32 * ii + 16, src + 16 * ii, 16);
5166 }
5167 StubRoutines::x86::_k256_W_adr = (address)StubRoutines::x86::_k256_W;
5168 StubRoutines::x86::_pshuffle_byte_flip_mask_addr = generate_pshuffle_byte_flip_mask();
5169 StubRoutines::_sha256_implCompress = generate_sha256_implCompress(false, "sha256_implCompress");
5170 StubRoutines::_sha256_implCompressMB = generate_sha256_implCompress(true, "sha256_implCompressMB");
5171 }
5172 if (UseSHA512Intrinsics) {
5173 StubRoutines::x86::_k512_W_addr = (address)StubRoutines::x86::_k512_W;
5174 StubRoutines::x86::_pshuffle_byte_flip_mask_addr_sha512 = generate_pshuffle_byte_flip_mask_sha512();
5175 StubRoutines::_sha512_implCompress = generate_sha512_implCompress(false, "sha512_implCompress");
5176 StubRoutines::_sha512_implCompressMB = generate_sha512_implCompress(true, "sha512_implCompressMB");
5177 }
5178
5179 // Generate GHASH intrinsics code
5180 if (UseGHASHIntrinsics) {
5181 StubRoutines::x86::_ghash_long_swap_mask_addr = generate_ghash_long_swap_mask();
5182 StubRoutines::x86::_ghash_byte_swap_mask_addr = generate_ghash_byte_swap_mask();
5183 StubRoutines::_ghash_processBlocks = generate_ghash_processBlocks();
5184 }
5185
5186 // Safefetch stubs.
5187 generate_safefetch("SafeFetch32", sizeof(int), &StubRoutines::_safefetch32_entry,
5188 &StubRoutines::_safefetch32_fault_pc,
5189 &StubRoutines::_safefetch32_continuation_pc);
5190 generate_safefetch("SafeFetchN", sizeof(intptr_t), &StubRoutines::_safefetchN_entry,
5191 &StubRoutines::_safefetchN_fault_pc,
5192 &StubRoutines::_safefetchN_continuation_pc);
5193 #ifdef COMPILER2
5194 if (UseMultiplyToLenIntrinsic) {
5195 StubRoutines::_multiplyToLen = generate_multiplyToLen();
5196 }
5197 if (UseSquareToLenIntrinsic) {
5198 StubRoutines::_squareToLen = generate_squareToLen();
5199 }
5200 if (UseMulAddIntrinsic) {
5201 StubRoutines::_mulAdd = generate_mulAdd();
5202 }
5203 #ifndef _WINDOWS
5204 if (UseMontgomeryMultiplyIntrinsic) {
5205 StubRoutines::_montgomeryMultiply
5206 = CAST_FROM_FN_PTR(address, SharedRuntime::montgomery_multiply);
5207 }
5208 if (UseMontgomerySquareIntrinsic) {
5209 StubRoutines::_montgomerySquare
5210 = CAST_FROM_FN_PTR(address, SharedRuntime::montgomery_square);
5211 }
5212 #endif // WINDOWS
5213 #endif // COMPILER2
5214
5215 if (UseVectorizedMismatchIntrinsic) {
5216 StubRoutines::_vectorizedMismatch = generate_vectorizedMismatch();
5217 }
5218 }
5219
5220 public:
5221 StubGenerator(CodeBuffer* code, bool all) : StubCodeGenerator(code) {
5222 if (all) {
5223 generate_all();
5224 } else {
5225 generate_initial();
5226 }
5227 }
5228 }; // end class declaration
5229
5230 void StubGenerator_generate(CodeBuffer* code, bool all) {
5231 StubGenerator g(code, all);
5232 }