3898
3899 void Assembler::popcntl(Register dst, Address src) {
3900 assert(VM_Version::supports_popcnt(), "must support");
3901 InstructionMark im(this);
3902 emit_int8((unsigned char)0xF3);
3903 prefix(src, dst);
3904 emit_int8(0x0F);
3905 emit_int8((unsigned char)0xB8);
3906 emit_operand(dst, src);
3907 }
3908
3909 void Assembler::popcntl(Register dst, Register src) {
3910 assert(VM_Version::supports_popcnt(), "must support");
3911 emit_int8((unsigned char)0xF3);
3912 int encode = prefix_and_encode(dst->encoding(), src->encoding());
3913 emit_int8(0x0F);
3914 emit_int8((unsigned char)0xB8);
3915 emit_int8((unsigned char)(0xC0 | encode));
3916 }
3917
3918 void Assembler::popf() {
3919 emit_int8((unsigned char)0x9D);
3920 }
3921
3922 #ifndef _LP64 // no 32bit push/pop on amd64
3923 void Assembler::popl(Address dst) {
3924 // NOTE: this will adjust stack by 8byte on 64bits
3925 InstructionMark im(this);
3926 prefix(dst);
3927 emit_int8((unsigned char)0x8F);
3928 emit_operand(rax, dst);
3929 }
3930 #endif
3931
3932 void Assembler::prefetch_prefix(Address src) {
3933 prefix(src);
3934 emit_int8(0x0F);
3935 }
3936
3937 void Assembler::prefetchnta(Address src) {
8689
8690 addq(rsp, 16 * wordSize);
8691 }
8692
8693 void Assembler::popcntq(Register dst, Address src) {
8694 assert(VM_Version::supports_popcnt(), "must support");
8695 InstructionMark im(this);
8696 emit_int8((unsigned char)0xF3);
8697 prefixq(src, dst);
8698 emit_int8((unsigned char)0x0F);
8699 emit_int8((unsigned char)0xB8);
8700 emit_operand(dst, src);
8701 }
8702
8703 void Assembler::popcntq(Register dst, Register src) {
8704 assert(VM_Version::supports_popcnt(), "must support");
8705 emit_int8((unsigned char)0xF3);
8706 int encode = prefixq_and_encode(dst->encoding(), src->encoding());
8707 emit_int8((unsigned char)0x0F);
8708 emit_int8((unsigned char)0xB8);
8709 emit_int8((unsigned char)(0xC0 | encode));
8710 }
8711
8712 void Assembler::vpopcntd(XMMRegister dst, XMMRegister src, int vector_len) {
8713 assert(VM_Version::supports_vpopcntdq(), "must support vpopcntdq feature");
8714 InstructionAttr attributes(vector_len, /* vex_w */ false, /* legacy_mode */ false, /* no_mask_reg */ false, /* uses_vl */ true);
8715 attributes.set_is_evex_instruction();
8716 int encode = vex_prefix_and_encode(dst->encoding(), 0, src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_38, &attributes);
8717 emit_int8(0x55);
8718 emit_int8((unsigned char)(0xC0 | encode));
8719 }
8720
8721 void Assembler::popq(Address dst) {
8722 InstructionMark im(this);
8723 prefixq(dst);
8724 emit_int8((unsigned char)0x8F);
8725 emit_operand(rax, dst);
8726 }
8727
8728 void Assembler::pusha() { // 64bit
8729 // we have to store original rsp. ABI says that 128 bytes
8730 // below rsp are local scratch.
8731 movq(Address(rsp, -5 * wordSize), rsp);
8732
8733 subq(rsp, 16 * wordSize);
8734
8735 movq(Address(rsp, 15 * wordSize), rax);
8736 movq(Address(rsp, 14 * wordSize), rcx);
8737 movq(Address(rsp, 13 * wordSize), rdx);
|
3898
3899 void Assembler::popcntl(Register dst, Address src) {
3900 assert(VM_Version::supports_popcnt(), "must support");
3901 InstructionMark im(this);
3902 emit_int8((unsigned char)0xF3);
3903 prefix(src, dst);
3904 emit_int8(0x0F);
3905 emit_int8((unsigned char)0xB8);
3906 emit_operand(dst, src);
3907 }
3908
3909 void Assembler::popcntl(Register dst, Register src) {
3910 assert(VM_Version::supports_popcnt(), "must support");
3911 emit_int8((unsigned char)0xF3);
3912 int encode = prefix_and_encode(dst->encoding(), src->encoding());
3913 emit_int8(0x0F);
3914 emit_int8((unsigned char)0xB8);
3915 emit_int8((unsigned char)(0xC0 | encode));
3916 }
3917
3918 void Assembler::vpopcntd(XMMRegister dst, XMMRegister src, int vector_len) {
3919 assert(VM_Version::supports_vpopcntdq(), "must support vpopcntdq feature");
3920 InstructionAttr attributes(vector_len, /* vex_w */ false, /* legacy_mode */ false, /* no_mask_reg */ false, /* uses_vl */ true);
3921 attributes.set_is_evex_instruction();
3922 int encode = vex_prefix_and_encode(dst->encoding(), 0, src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_38, &attributes);
3923 emit_int8(0x55);
3924 emit_int8((unsigned char)(0xC0 | encode));
3925 }
3926
3927 void Assembler::popf() {
3928 emit_int8((unsigned char)0x9D);
3929 }
3930
3931 #ifndef _LP64 // no 32bit push/pop on amd64
3932 void Assembler::popl(Address dst) {
3933 // NOTE: this will adjust stack by 8byte on 64bits
3934 InstructionMark im(this);
3935 prefix(dst);
3936 emit_int8((unsigned char)0x8F);
3937 emit_operand(rax, dst);
3938 }
3939 #endif
3940
3941 void Assembler::prefetch_prefix(Address src) {
3942 prefix(src);
3943 emit_int8(0x0F);
3944 }
3945
3946 void Assembler::prefetchnta(Address src) {
8698
8699 addq(rsp, 16 * wordSize);
8700 }
8701
8702 void Assembler::popcntq(Register dst, Address src) {
8703 assert(VM_Version::supports_popcnt(), "must support");
8704 InstructionMark im(this);
8705 emit_int8((unsigned char)0xF3);
8706 prefixq(src, dst);
8707 emit_int8((unsigned char)0x0F);
8708 emit_int8((unsigned char)0xB8);
8709 emit_operand(dst, src);
8710 }
8711
8712 void Assembler::popcntq(Register dst, Register src) {
8713 assert(VM_Version::supports_popcnt(), "must support");
8714 emit_int8((unsigned char)0xF3);
8715 int encode = prefixq_and_encode(dst->encoding(), src->encoding());
8716 emit_int8((unsigned char)0x0F);
8717 emit_int8((unsigned char)0xB8);
8718 emit_int8((unsigned char)(0xC0 | encode));
8719 }
8720
8721 void Assembler::popq(Address dst) {
8722 InstructionMark im(this);
8723 prefixq(dst);
8724 emit_int8((unsigned char)0x8F);
8725 emit_operand(rax, dst);
8726 }
8727
8728 void Assembler::pusha() { // 64bit
8729 // we have to store original rsp. ABI says that 128 bytes
8730 // below rsp are local scratch.
8731 movq(Address(rsp, -5 * wordSize), rsp);
8732
8733 subq(rsp, 16 * wordSize);
8734
8735 movq(Address(rsp, 15 * wordSize), rax);
8736 movq(Address(rsp, 14 * wordSize), rcx);
8737 movq(Address(rsp, 13 * wordSize), rdx);
|