src/cpu/ppc/vm/ppc.ad

rev 7364 : 8080190: PPC64: Fix wrong rotate instructions in the .ad file
Reviewed-by: kvn

*** 2262,2274 ****
  // registers? True for Intel but false for most RISCs.
  const bool Matcher::clone_shift_expressions = false;
  
  // Do we need to mask the count passed to shift instructions or does
  // the cpu only look at the lower 5/6 bits anyway?
! // Off, as masks are generated in expand rules where required.
! // Constant shift counts are handled in Ideal phase.
! const bool Matcher::need_masked_shift_count = false;
  
  // This affects two different things:
  //  - how Decode nodes are matched
  //  - how ImplicitNullCheck opportunities are recognized
  // If true, the matcher will try to remove all Decodes and match them
--- 2262,2273 ----
  // registers? True for Intel but false for most RISCs.
  const bool Matcher::clone_shift_expressions = false;
  
  // Do we need to mask the count passed to shift instructions or does
  // the cpu only look at the lower 5/6 bits anyway?
! // PowerPC requires masked shift counts.
! const bool Matcher::need_masked_shift_count = true;
  
  // This affects two different things:
  //  - how Decode nodes are matched
  //  - how ImplicitNullCheck opportunities are recognized
  // If true, the matcher will try to remove all Decodes and match them