src/cpu/ppc/vm/vm_version_ppc.cpp

rev 10506 : 8152172: PPC64: Support AES intrinsics
Reviewed-by: kvn, mdoerr, simonis
Contributed-by: Hiroshi H Horii <HORII@jp.ibm.com>

*** 120,130 ****
                 (has_popcntb() ? " popcntb" : ""),
                 (has_popcntw() ? " popcntw" : ""),
                 (has_fcfids()  ? " fcfids"  : ""),
                 (has_vand()    ? " vand"    : ""),
                 (has_lqarx()   ? " lqarx"   : ""),
!                (has_vcipher() ? " vcipher" : ""),
                 (has_vpmsumb() ? " vpmsumb" : ""),
                 (has_tcheck()  ? " tcheck"  : ""),
                 (has_mfdscr()  ? " mfdscr"  : "")
                 // Make sure number of %s matches num_features!
                );
--- 120,130 ----
                 (has_popcntb() ? " popcntb" : ""),
                 (has_popcntw() ? " popcntw" : ""),
                 (has_fcfids()  ? " fcfids"  : ""),
                 (has_vand()    ? " vand"    : ""),
                 (has_lqarx()   ? " lqarx"   : ""),
!                (has_vcipher() ? " aes"     : ""),
                 (has_vpmsumb() ? " vpmsumb" : ""),
                 (has_tcheck()  ? " tcheck"  : ""),
                 (has_mfdscr()  ? " mfdscr"  : "")
                 // Make sure number of %s matches num_features!
                );
*** 184,202 ****
--- 184,225 ----
        warning("CRC32C intrinsics are not available on this CPU");
      FLAG_SET_DEFAULT(UseCRC32CIntrinsics, false);
    }
  
    // The AES intrinsic stubs require AES instruction support.
+ #if defined(VM_LITTLE_ENDIAN)
+   if (has_vcipher()) {
+     if (FLAG_IS_DEFAULT(UseAES)) {
+       UseAES = true;
+     }
+   } else if (UseAES) {
+     if (!FLAG_IS_DEFAULT(UseAES))
+       warning("AES instructions are not available on this CPU");
+     FLAG_SET_DEFAULT(UseAES, false);
+   }
+ 
+   if (UseAES && has_vcipher()) {
+     if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
+       UseAESIntrinsics = true;
+     }
+   } else if (UseAESIntrinsics) {
+     if (!FLAG_IS_DEFAULT(UseAESIntrinsics))
+       warning("AES intrinsics are not available on this CPU");
+     FLAG_SET_DEFAULT(UseAESIntrinsics, false);
+   }
+ 
+ #else
    if (UseAES) {
      warning("AES instructions are not available on this CPU");
      FLAG_SET_DEFAULT(UseAES, false);
    }
    if (UseAESIntrinsics) {
      if (!FLAG_IS_DEFAULT(UseAESIntrinsics))
        warning("AES intrinsics are not available on this CPU");
      FLAG_SET_DEFAULT(UseAESIntrinsics, false);
    }
+ #endif
  
    if (UseAESCTRIntrinsics) {
      warning("AES/CTR intrinsics are not available on this CPU");
      FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false);
    }