src/cpu/ppc/vm/vm_version_ppc.cpp

rev 7958 : 8152172: PPC64: Support AES intrinsics
Reviewed-by: kvn, mdoerr, simonis
Contributed-by: horii@jp.ibm.com

*** 100,119 ****
  #endif
  
    // Create and print feature-string.
    char buf[(num_features+1) * 16]; // Max 16 chars per feature.
    jio_snprintf(buf, sizeof(buf),
!                "ppc64%s%s%s%s%s%s%s%s",
                 (has_fsqrt()   ? " fsqrt"   : ""),
                 (has_isel()    ? " isel"    : ""),
                 (has_lxarxeh() ? " lxarxeh" : ""),
                 (has_cmpb()    ? " cmpb"    : ""),
                 //(has_mftgpr()? " mftgpr"  : ""),
                 (has_popcntb() ? " popcntb" : ""),
                 (has_popcntw() ? " popcntw" : ""),
                 (has_fcfids()  ? " fcfids"  : ""),
!                (has_vand()    ? " vand"    : "")
                 // Make sure number of %s matches num_features!
                );
    _features_str = strdup(buf);
    NOT_PRODUCT(if (Verbose) print_features(););
  
--- 100,120 ----
  #endif
  
    // Create and print feature-string.
    char buf[(num_features+1) * 16]; // Max 16 chars per feature.
    jio_snprintf(buf, sizeof(buf),
!                "ppc64%s%s%s%s%s%s%s%s%s",
                 (has_fsqrt()   ? " fsqrt"   : ""),
                 (has_isel()    ? " isel"    : ""),
                 (has_lxarxeh() ? " lxarxeh" : ""),
                 (has_cmpb()    ? " cmpb"    : ""),
                 //(has_mftgpr()? " mftgpr"  : ""),
                 (has_popcntb() ? " popcntb" : ""),
                 (has_popcntw() ? " popcntw" : ""),
                 (has_fcfids()  ? " fcfids"  : ""),
!                (has_vand()    ? " vand"    : ""),
!                (has_vcipher() ? " aes"     : "")
                 // Make sure number of %s matches num_features!
                );
    _features_str = strdup(buf);
    NOT_PRODUCT(if (Verbose) print_features(););
  
*** 154,172 ****
--- 155,196 ----
        warning("CRC32 intrinsics  are not available on this CPU");
      FLAG_SET_DEFAULT(UseCRC32Intrinsics, false);
    }
  
    // The AES intrinsic stubs require AES instruction support.
+ #if defined(VM_LITTLE_ENDIAN)
+   if (has_vcipher()) {
+     if (FLAG_IS_DEFAULT(UseAES)) {
+       UseAES = true;
+     }
+   } else if (UseAES) {
+     if (!FLAG_IS_DEFAULT(UseAES))
+       warning("AES instructions are not available on this CPU");
+     FLAG_SET_DEFAULT(UseAES, false);
+   }
+ 
+   if (UseAES && has_vcipher()) {
+     if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
+       UseAESIntrinsics = true;
+     }
+   } else if (UseAESIntrinsics) {
+     if (!FLAG_IS_DEFAULT(UseAESIntrinsics))
+       warning("AES intrinsics are not available on this CPU");
+     FLAG_SET_DEFAULT(UseAESIntrinsics, false);
+   }
+ 
+ #else
    if (UseAES) {
      warning("AES instructions are not available on this CPU");
      FLAG_SET_DEFAULT(UseAES, false);
    }
    if (UseAESIntrinsics) {
      if (!FLAG_IS_DEFAULT(UseAESIntrinsics))
        warning("AES intrinsics are not available on this CPU");
      FLAG_SET_DEFAULT(UseAESIntrinsics, false);
    }
+ #endif
  
    if (UseSHA) {
      warning("SHA instructions are not available on this CPU");
      FLAG_SET_DEFAULT(UseSHA, false);
    }
*** 450,459 ****
--- 474,484 ----
    //a->mftgpr(R7, F3);                         // code[5] -> mftgpr
    a->popcntb(R7, R5);                          // code[6] -> popcntb
    a->popcntw(R7, R5);                          // code[7] -> popcntw
    a->fcfids(F3, F4);                           // code[8] -> fcfids
    a->vand(VR0, VR0, VR0);                      // code[9] -> vand
+   a->vcipher(VR0, VR1, VR2);                   // code[10] -> vcipher
    a->blr();
  
    // Emit function to set one cache line to zero. Emit function descriptor and get pointer to it.
    void (*zero_cacheline_func_ptr)(char*) = (void(*)(char*))(void *)a->function_entry();
    a->dcbz(R3_ARG1); // R3_ARG1 = addr
*** 493,502 ****
--- 518,528 ----
    //if(code[feature_cntr++])features |= mftgpr_m;
    if (code[feature_cntr++]) features |= popcntb_m;
    if (code[feature_cntr++]) features |= popcntw_m;
    if (code[feature_cntr++]) features |= fcfids_m;
    if (code[feature_cntr++]) features |= vand_m;
+   if (code[feature_cntr++]) features |= vcipher_m;
  
    // Print the detection code.
    if (PrintAssembly) {
      ttyLocker ttyl;
      tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " after execution:", p2i(code));