src/cpu/sparc/vm/vm_version_sparc.cpp
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rev 5706 : 8029190: VM_Version::determine_features() asserts on Fujitsu Sparc64 CPUs
@@ -87,25 +87,40 @@
UseSSE = 0; // Only on x86 and x64
_supports_cx8 = has_v9();
_supports_atomic_getset4 = true; // swap instruction
+ // There are Fujitsu Sparc64 CPUs which support blk_init as well so
+ // we have to take this check out of the 'is_niagara()' block below.
+ if (has_blk_init()) {
+ // When using CMS or G1, we cannot use memset() in BOT updates
+ // because the sun4v/CMT version in libc_psr uses BIS which
+ // exposes "phantom zeros" to concurrent readers. See 6948537.
+ if (FLAG_IS_DEFAULT(UseMemSetInBOT) && (UseConcMarkSweepGC || UseG1GC)) {
+ FLAG_SET_DEFAULT(UseMemSetInBOT, false);
+ }
+ // Issue a stern warning if the user has explicitly set
+ // UseMemSetInBOT (it is known to cause issues), but allow
+ // use for experimentation and debugging.
+ if (UseConcMarkSweepGC || UseG1GC) {
+ if (UseMemSetInBOT) {
+ assert(!FLAG_IS_DEFAULT(UseMemSetInBOT), "Error");
+ warning("Experimental flag -XX:+UseMemSetInBOT is known to cause instability"
+ " on sun4v; please understand that you are using at your own risk!");
+ }
+ }
+ }
+
if (is_niagara()) {
// Indirect branch is the same cost as direct
if (FLAG_IS_DEFAULT(UseInlineCaches)) {
FLAG_SET_DEFAULT(UseInlineCaches, false);
}
// Align loops on a single instruction boundary.
if (FLAG_IS_DEFAULT(OptoLoopAlignment)) {
FLAG_SET_DEFAULT(OptoLoopAlignment, 4);
}
- // When using CMS or G1, we cannot use memset() in BOT updates
- // because the sun4v/CMT version in libc_psr uses BIS which
- // exposes "phantom zeros" to concurrent readers. See 6948537.
- if (FLAG_IS_DEFAULT(UseMemSetInBOT) && (UseConcMarkSweepGC || UseG1GC)) {
- FLAG_SET_DEFAULT(UseMemSetInBOT, false);
- }
#ifdef _LP64
// 32-bit oops don't make sense for the 64-bit VM on sparc
// since the 32-bit VM has the same registers and smaller objects.
Universe::set_narrow_oop_shift(LogMinObjAlignmentInBytes);
Universe::set_narrow_klass_shift(LogKlassAlignmentInBytes);