1 /*
   2  * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright 2012, 2013 SAP AG. All rights reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
  22  * questions.
  23  *
  24  */
  25 
  26 #include "precompiled.hpp"
  27 #include "assembler_ppc.inline.hpp"
  28 #include "runtime/icache.hpp"
  29 
  30 // Use inline assembler to implement icache flush.
  31 int ICache::ppc64_flush_icache(address start, int lines, int magic) {
  32   address end = start + (unsigned int)lines*ICache::line_size;
  33   assert(start <= end, "flush_icache parms");
  34 
  35   // store modified cache lines from data cache
  36   for (address a = start; a < end; a += ICache::line_size) {
  37     __asm__ __volatile__(
  38      "dcbst 0, %0  \n"
  39      :
  40      : "r" (a)
  41      : "memory");
  42   }
  43 
  44   // sync instruction
  45   __asm__ __volatile__(
  46      "sync \n"
  47      :
  48      :
  49      : "memory");
  50 
  51   // invalidate respective cache lines in instruction cache
  52   for (address a = start; a < end; a += ICache::line_size) {
  53     __asm__ __volatile__(
  54      "icbi 0, %0   \n"
  55      :
  56      : "r" (a)
  57      : "memory");
  58   }
  59 
  60   // discard fetched instructions
  61   __asm__ __volatile__(
  62      "isync \n"
  63      :
  64      :
  65      : "memory");
  66 
  67   return magic;
  68 }
  69 
  70 void ICacheStubGenerator::generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub) {
  71   StubCodeMark mark(this, "ICache", "flush_icache_stub");
  72 
  73   *flush_icache_stub = (ICache::flush_icache_stub_t)ICache::ppc64_flush_icache;
  74 
  75   // First call to flush itself
  76   ICache::invalidate_range((address)(*flush_icache_stub), 0);
  77 }