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src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp
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rev 58823 : [mq]: aarch64-jdk-nmethod-barriers-3.patch
*** 3687,3696 ****
--- 3687,3701 ----
void MacroAssembler::cmpoop(Register obj1, Register obj2) {
BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
bs->obj_equals(this, obj1, obj2);
}
+ void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
+ load_method_holder(rresult, rmethod);
+ ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
+ }
+
void MacroAssembler::load_method_holder(Register holder, Register method) {
ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
ldr(holder, Address(holder, ConstantPool::pool_holder_offset_in_bytes())); // InstanceKlass*
}
*** 3708,3717 ****
--- 3713,3738 ----
void MacroAssembler::resolve_oop_handle(Register result, Register tmp) {
// OopHandle::resolve is an indirection.
access_load_at(T_OBJECT, IN_NATIVE, result, Address(result, 0), tmp, noreg);
}
+ // ((WeakHandle)result).resolve();
+ void MacroAssembler::resolve_weak_handle(Register rresult, Register rtmp) {
+ assert_different_registers(rresult, rtmp);
+ Label resolved;
+
+ // A null weak handle resolves to null.
+ cbz(rresult, resolved);
+
+ // Only 64 bit platforms support GCs that require a tmp register
+ // Only IN_HEAP loads require a thread_tmp register
+ // WeakHandle::resolve is an indirection like jweak.
+ access_load_at(T_OBJECT, IN_NATIVE | ON_PHANTOM_OOP_REF,
+ rresult, Address(rresult), rtmp, /*tmp_thread*/noreg);
+ bind(resolved);
+ }
+
void MacroAssembler::load_mirror(Register dst, Register method, Register tmp) {
const int mirror_offset = in_bytes(Klass::java_mirror_offset());
ldr(dst, Address(rmethod, Method::const_offset()));
ldr(dst, Address(dst, ConstMethod::constants_offset()));
ldr(dst, Address(dst, ConstantPool::pool_holder_offset_in_bytes()));
*** 4102,4114 ****
RelocationHolder rspec = metadata_Relocation::spec(index);
return Address((address)obj, rspec);
}
// Move an oop into a register. immediate is true if we want
! // immediate instrcutions, i.e. we are not going to patch this
! // instruction while the code is being executed by another thread. In
! // that case we can use move immediates rather than the constant pool.
void MacroAssembler::movoop(Register dst, jobject obj, bool immediate) {
int oop_index;
if (obj == NULL) {
oop_index = oop_recorder()->allocate_oop_index(obj);
} else {
--- 4123,4135 ----
RelocationHolder rspec = metadata_Relocation::spec(index);
return Address((address)obj, rspec);
}
// Move an oop into a register. immediate is true if we want
! // immediate instructions and nmethod entry barriers are not enabled.
! // i.e. we are not going to patch this instruction while the code is being
! // executed by another thread.
void MacroAssembler::movoop(Register dst, jobject obj, bool immediate) {
int oop_index;
if (obj == NULL) {
oop_index = oop_recorder()->allocate_oop_index(obj);
} else {
*** 4119,4129 ****
}
#endif
oop_index = oop_recorder()->find_index(obj);
}
RelocationHolder rspec = oop_Relocation::spec(oop_index);
! if (! immediate) {
address dummy = address(uintptr_t(pc()) & -wordSize); // A nearby aligned address
ldr_constant(dst, Address(dummy, rspec));
} else
mov(dst, Address((address)obj, rspec));
}
--- 4140,4154 ----
}
#endif
oop_index = oop_recorder()->find_index(obj);
}
RelocationHolder rspec = oop_Relocation::spec(oop_index);
!
! // nmethod entry barrier necessitate using the constant pool. They have to be
! // ordered with respected to oop accesses.
! // Using immediate literals would necessitate ISBs.
! if (BarrierSet::barrier_set()->barrier_set_nmethod() != NULL || !immediate) {
address dummy = address(uintptr_t(pc()) & -wordSize); // A nearby aligned address
ldr_constant(dst, Address(dummy, rspec));
} else
mov(dst, Address((address)obj, rspec));
}
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