5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 private:
26
27 //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
28 //
29 // Sparc load/store emission
30 //
31 // The sparc ld/st instructions cannot accomodate displacements > 13 bits long.
32 // The following "pseudo" sparc instructions (load/store) make it easier to use the indexed addressing mode
33 // by allowing 32 bit displacements:
34 //
35 // When disp <= 13 bits long, a single load or store instruction is emitted with (disp + [d]).
36 // When disp > 13 bits long, code is emitted to set the displacement into the O7 register,
37 // and then a load or store is emitted with ([O7] + [d]).
38 //
39
40 // some load/store variants return the code_offset for proper positioning of debug info for null checks
41
42 // load/store with 32 bit displacement
43 int load(Register s, int disp, Register d, BasicType ld_type, CodeEmitInfo* info = NULL);
44 void store(Register value, Register base, int offset, BasicType type, CodeEmitInfo *info = NULL);
73
74 // Record the type of the receiver in ReceiverTypeData
75 void type_profile_helper(Register mdo, int mdo_offset_bias,
76 ciMethodData *md, ciProfileData *data,
77 Register recv, Register tmp1, Label* update_done);
78 // Setup pointers to MDO, MDO slot, also compute offset bias to access the slot.
79 void setup_md_access(ciMethod* method, int bci,
80 ciMethodData*& md, ciProfileData*& data, int& mdo_offset_bias);
81 public:
82 void pack64(LIR_Opr src, LIR_Opr dst);
83 void unpack64(LIR_Opr src, LIR_Opr dst);
84
85 enum {
86 #ifdef _LP64
87 call_stub_size = 68,
88 #else
89 call_stub_size = 20,
90 #endif // _LP64
91 exception_handler_size = DEBUG_ONLY(1*K) NOT_DEBUG(10*4),
92 deopt_handler_size = DEBUG_ONLY(1*K) NOT_DEBUG(10*4) };
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5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef CPU_SPARC_VM_C1_LIRASSEMBLER_SPARC_HPP
26 #define CPU_SPARC_VM_C1_LIRASSEMBLER_SPARC_HPP
27
28 private:
29
30 //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
31 //
32 // Sparc load/store emission
33 //
34 // The sparc ld/st instructions cannot accomodate displacements > 13 bits long.
35 // The following "pseudo" sparc instructions (load/store) make it easier to use the indexed addressing mode
36 // by allowing 32 bit displacements:
37 //
38 // When disp <= 13 bits long, a single load or store instruction is emitted with (disp + [d]).
39 // When disp > 13 bits long, code is emitted to set the displacement into the O7 register,
40 // and then a load or store is emitted with ([O7] + [d]).
41 //
42
43 // some load/store variants return the code_offset for proper positioning of debug info for null checks
44
45 // load/store with 32 bit displacement
46 int load(Register s, int disp, Register d, BasicType ld_type, CodeEmitInfo* info = NULL);
47 void store(Register value, Register base, int offset, BasicType type, CodeEmitInfo *info = NULL);
76
77 // Record the type of the receiver in ReceiverTypeData
78 void type_profile_helper(Register mdo, int mdo_offset_bias,
79 ciMethodData *md, ciProfileData *data,
80 Register recv, Register tmp1, Label* update_done);
81 // Setup pointers to MDO, MDO slot, also compute offset bias to access the slot.
82 void setup_md_access(ciMethod* method, int bci,
83 ciMethodData*& md, ciProfileData*& data, int& mdo_offset_bias);
84 public:
85 void pack64(LIR_Opr src, LIR_Opr dst);
86 void unpack64(LIR_Opr src, LIR_Opr dst);
87
88 enum {
89 #ifdef _LP64
90 call_stub_size = 68,
91 #else
92 call_stub_size = 20,
93 #endif // _LP64
94 exception_handler_size = DEBUG_ONLY(1*K) NOT_DEBUG(10*4),
95 deopt_handler_size = DEBUG_ONLY(1*K) NOT_DEBUG(10*4) };
96
97 #endif // CPU_SPARC_VM_C1_LIRASSEMBLER_SPARC_HPP
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