5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 // On i486 the frame looks as follows: 26 // 27 // +-----------------------------+---------+----------------------------------------+----------------+----------- 28 // | size_arguments-nof_reg_args | 2 words | size_locals-size_arguments+numreg_args | _size_monitors | spilling . 29 // +-----------------------------+---------+----------------------------------------+----------------+----------- 30 // 31 // The FPU registers are mapped with their offset from TOS; therefore the 32 // status of FPU stack must be updated during code emission. 33 34 public: 35 static const int pd_c_runtime_reserved_arg_size; 36 37 enum { 38 nof_xmm_regs = pd_nof_xmm_regs_frame_map, 39 nof_caller_save_xmm_regs = pd_nof_caller_save_xmm_regs_frame_map, 40 first_available_sp_in_frame = 0, 41 #ifndef _LP64 42 frame_pad_in_bytes = 8, 43 nof_reg_args = 2 44 #else 109 static LIR_Opr as_long_opr(Register r, Register r2) { 110 return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r2)); 111 } 112 static LIR_Opr as_pointer_opr(Register r) { 113 return LIR_OprFact::single_cpu(cpu_reg2rnr(r)); 114 } 115 #endif // _LP64 116 117 // VMReg name for spilled physical FPU stack slot n 118 static VMReg fpu_regname (int n); 119 120 static XMMRegister nr2xmmreg(int rnr); 121 122 static bool is_caller_save_register (LIR_Opr opr) { return true; } 123 static bool is_caller_save_register (Register r) { return true; } 124 125 static LIR_Opr caller_save_xmm_reg_at(int i) { 126 assert(i >= 0 && i < nof_caller_save_xmm_regs, "out of bounds"); 127 return _caller_save_xmm_regs[i]; 128 } | 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #ifndef CPU_X86_VM_C1_FRAMEMAP_X86_HPP 26 #define CPU_X86_VM_C1_FRAMEMAP_X86_HPP 27 28 // On i486 the frame looks as follows: 29 // 30 // +-----------------------------+---------+----------------------------------------+----------------+----------- 31 // | size_arguments-nof_reg_args | 2 words | size_locals-size_arguments+numreg_args | _size_monitors | spilling . 32 // +-----------------------------+---------+----------------------------------------+----------------+----------- 33 // 34 // The FPU registers are mapped with their offset from TOS; therefore the 35 // status of FPU stack must be updated during code emission. 36 37 public: 38 static const int pd_c_runtime_reserved_arg_size; 39 40 enum { 41 nof_xmm_regs = pd_nof_xmm_regs_frame_map, 42 nof_caller_save_xmm_regs = pd_nof_caller_save_xmm_regs_frame_map, 43 first_available_sp_in_frame = 0, 44 #ifndef _LP64 45 frame_pad_in_bytes = 8, 46 nof_reg_args = 2 47 #else 112 static LIR_Opr as_long_opr(Register r, Register r2) { 113 return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r2)); 114 } 115 static LIR_Opr as_pointer_opr(Register r) { 116 return LIR_OprFact::single_cpu(cpu_reg2rnr(r)); 117 } 118 #endif // _LP64 119 120 // VMReg name for spilled physical FPU stack slot n 121 static VMReg fpu_regname (int n); 122 123 static XMMRegister nr2xmmreg(int rnr); 124 125 static bool is_caller_save_register (LIR_Opr opr) { return true; } 126 static bool is_caller_save_register (Register r) { return true; } 127 128 static LIR_Opr caller_save_xmm_reg_at(int i) { 129 assert(i >= 0 && i < nof_caller_save_xmm_regs, "out of bounds"); 130 return _caller_save_xmm_regs[i]; 131 } 132 133 #endif // CPU_X86_VM_C1_FRAMEMAP_X86_HPP |