src/cpu/x86/vm/vmreg_x86.inline.hpp

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   1 /*
   2  * Copyright (c) 2006, 2007, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 



  25 inline VMReg RegisterImpl::as_VMReg() {
  26   if( this==noreg ) return VMRegImpl::Bad();
  27 #ifdef AMD64
  28   return VMRegImpl::as_VMReg(encoding() << 1 );
  29 #else
  30   return VMRegImpl::as_VMReg(encoding() );
  31 #endif // AMD64
  32 }
  33 
  34 inline VMReg FloatRegisterImpl::as_VMReg() {
  35   return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr);
  36 }
  37 
  38 inline VMReg XMMRegisterImpl::as_VMReg() {
  39   return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_fpr);
  40 }
  41 
  42 
  43 inline bool VMRegImpl::is_Register() {
  44   return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr;


  65 
  66 inline FloatRegister VMRegImpl::as_FloatRegister() {
  67   assert( is_FloatRegister() && is_even(value()), "must be" );
  68   // Yuk
  69   return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1);
  70 }
  71 
  72 inline XMMRegister VMRegImpl::as_XMMRegister() {
  73   assert( is_XMMRegister() && is_even(value()), "must be" );
  74   // Yuk
  75   return ::as_XMMRegister((value() - ConcreteRegisterImpl::max_fpr) >> 1);
  76 }
  77 
  78 inline   bool VMRegImpl::is_concrete() {
  79   assert(is_reg(), "must be");
  80 #ifndef AMD64
  81   if (is_Register()) return true;
  82 #endif // AMD64
  83   return is_even(value());
  84 }


   1 /*
   2  * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef CPU_X86_VM_VMREG_X86_INLINE_HPP
  26 #define CPU_X86_VM_VMREG_X86_INLINE_HPP
  27 
  28 inline VMReg RegisterImpl::as_VMReg() {
  29   if( this==noreg ) return VMRegImpl::Bad();
  30 #ifdef AMD64
  31   return VMRegImpl::as_VMReg(encoding() << 1 );
  32 #else
  33   return VMRegImpl::as_VMReg(encoding() );
  34 #endif // AMD64
  35 }
  36 
  37 inline VMReg FloatRegisterImpl::as_VMReg() {
  38   return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr);
  39 }
  40 
  41 inline VMReg XMMRegisterImpl::as_VMReg() {
  42   return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_fpr);
  43 }
  44 
  45 
  46 inline bool VMRegImpl::is_Register() {
  47   return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr;


  68 
  69 inline FloatRegister VMRegImpl::as_FloatRegister() {
  70   assert( is_FloatRegister() && is_even(value()), "must be" );
  71   // Yuk
  72   return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1);
  73 }
  74 
  75 inline XMMRegister VMRegImpl::as_XMMRegister() {
  76   assert( is_XMMRegister() && is_even(value()), "must be" );
  77   // Yuk
  78   return ::as_XMMRegister((value() - ConcreteRegisterImpl::max_fpr) >> 1);
  79 }
  80 
  81 inline   bool VMRegImpl::is_concrete() {
  82   assert(is_reg(), "must be");
  83 #ifndef AMD64
  84   if (is_Register()) return true;
  85 #endif // AMD64
  86   return is_even(value());
  87 }
  88 
  89 #endif // CPU_X86_VM_VMREG_X86_INLINE_HPP