43 Register destreg;
44
45 destreg = inv_rd(*(unsigned int *)instaddr);
46 // Generate a the new sequence
47 _masm->patchable_sethi(x, destreg);
48 ICache::invalidate_range(instaddr, 7 * BytesPerInstWord);
49 }
50
51 void NativeInstruction::verify_data64_sethi(address instaddr, intptr_t x) {
52 ResourceMark rm;
53 unsigned char buffer[10 * BytesPerInstWord];
54 CodeBuffer buf(buffer, 10 * BytesPerInstWord);
55 MacroAssembler masm(&buf);
56
57 Register destreg = inv_rd(*(unsigned int *)instaddr);
58 // Generate the proper sequence into a temporary buffer and compare
59 // it with the original sequence.
60 masm.patchable_sethi(x, destreg);
61 int len = buffer - masm.pc();
62 for (int i = 0; i < len; i++) {
63 assert(instaddr[i] == buffer[i], "instructions must match");
64 }
65 }
66
67 void NativeInstruction::verify() {
68 // make sure code pattern is actually an instruction address
69 address addr = addr_at(0);
70 if (addr == 0 || ((intptr_t)addr & 3) != 0) {
71 fatal("not an instruction address");
72 }
73 }
74
75 void NativeInstruction::print() {
76 tty->print_cr(INTPTR_FORMAT ": 0x%x", p2i(addr_at(0)), long_at(0));
77 }
78
79 void NativeInstruction::set_long_at(int offset, int i) {
80 address addr = addr_at(offset);
81 *(int*)addr = i;
82 ICache::invalidate_word(addr);
83 }
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43 Register destreg;
44
45 destreg = inv_rd(*(unsigned int *)instaddr);
46 // Generate a the new sequence
47 _masm->patchable_sethi(x, destreg);
48 ICache::invalidate_range(instaddr, 7 * BytesPerInstWord);
49 }
50
51 void NativeInstruction::verify_data64_sethi(address instaddr, intptr_t x) {
52 ResourceMark rm;
53 unsigned char buffer[10 * BytesPerInstWord];
54 CodeBuffer buf(buffer, 10 * BytesPerInstWord);
55 MacroAssembler masm(&buf);
56
57 Register destreg = inv_rd(*(unsigned int *)instaddr);
58 // Generate the proper sequence into a temporary buffer and compare
59 // it with the original sequence.
60 masm.patchable_sethi(x, destreg);
61 int len = buffer - masm.pc();
62 for (int i = 0; i < len; i++) {
63 guarantee(instaddr[i] == buffer[i], "instructions must match");
64 }
65 }
66
67 void NativeInstruction::verify() {
68 // make sure code pattern is actually an instruction address
69 address addr = addr_at(0);
70 if (addr == 0 || ((intptr_t)addr & 3) != 0) {
71 fatal("not an instruction address");
72 }
73 }
74
75 void NativeInstruction::print() {
76 tty->print_cr(INTPTR_FORMAT ": 0x%x", p2i(addr_at(0)), long_at(0));
77 }
78
79 void NativeInstruction::set_long_at(int offset, int i) {
80 address addr = addr_at(offset);
81 *(int*)addr = i;
82 ICache::invalidate_word(addr);
83 }
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