1 /*
2 * Copyright (c) 1999, 2017, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_Defs.hpp"
27 #include "c1/c1_MacroAssembler.hpp"
28 #include "c1/c1_Runtime1.hpp"
29 #include "interpreter/interpreter.hpp"
30 #include "nativeInst_sparc.hpp"
31 #include "oops/compiledICHolder.hpp"
32 #include "oops/oop.inline.hpp"
33 #include "prims/jvmtiExport.hpp"
34 #include "runtime/sharedRuntime.hpp"
35 #include "runtime/signature.hpp"
36 #include "runtime/vframeArray.hpp"
37 #include "utilities/macros.hpp"
38 #include "utilities/align.hpp"
39 #include "vmreg_sparc.inline.hpp"
40 #if INCLUDE_ALL_GCS
41 #include "gc/g1/g1SATBCardTableModRefBS.hpp"
42 #endif
43
44 // Implementation of StubAssembler
45
46 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry_point, int number_of_arguments) {
47 // for sparc changing the number of arguments doesn't change
48 // anything about the frame size so we'll always lie and claim that
49 // we are only passing 1 argument.
50 set_num_rt_args(1);
51
52 assert_not_delayed();
53 // bang stack before going to runtime
54 set(-os::vm_page_size() + STACK_BIAS, G3_scratch);
55 st(G0, SP, G3_scratch);
56
57 // debugging support
58 assert(number_of_arguments >= 0 , "cannot have negative number of arguments");
59
60 set_last_Java_frame(SP, noreg);
61 if (VerifyThread) mov(G2_thread, O0); // about to be smashed; pass early
62 save_thread(L7_thread_cache);
63 // do the call
64 call(entry_point, relocInfo::runtime_call_type);
65 if (!VerifyThread) {
66 delayed()->mov(G2_thread, O0); // pass thread as first argument
67 } else {
68 delayed()->nop(); // (thread already passed)
69 }
70 int call_offset = offset(); // offset of return address
71 restore_thread(L7_thread_cache);
72 reset_last_Java_frame();
73
74 // check for pending exceptions
75 { Label L;
76 Address exception_addr(G2_thread, Thread::pending_exception_offset());
77 ld_ptr(exception_addr, Gtemp);
78 br_null_short(Gtemp, pt, L);
79 Address vm_result_addr(G2_thread, JavaThread::vm_result_offset());
80 st_ptr(G0, vm_result_addr);
81 Address vm_result_addr_2(G2_thread, JavaThread::vm_result_2_offset());
82 st_ptr(G0, vm_result_addr_2);
83
84 if (frame_size() == no_frame_size) {
85 // we use O7 linkage so that forward_exception_entry has the issuing PC
86 call(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type);
87 delayed()->restore();
88 } else if (_stub_id == Runtime1::forward_exception_id) {
89 should_not_reach_here();
90 } else {
91 AddressLiteral exc(Runtime1::entry_for(Runtime1::forward_exception_id));
92 jump_to(exc, G4);
93 delayed()->nop();
94 }
95 bind(L);
96 }
97
98 // get oop result if there is one and reset the value in the thread
99 if (oop_result1->is_valid()) { // get oop result if there is one and reset it in the thread
100 get_vm_result (oop_result1);
101 } else {
102 // be a little paranoid and clear the result
103 Address vm_result_addr(G2_thread, JavaThread::vm_result_offset());
104 st_ptr(G0, vm_result_addr);
105 }
106
107 // get second result if there is one and reset the value in the thread
108 if (metadata_result->is_valid()) {
109 get_vm_result_2 (metadata_result);
110 } else {
111 // be a little paranoid and clear the result
112 Address vm_result_addr_2(G2_thread, JavaThread::vm_result_2_offset());
113 st_ptr(G0, vm_result_addr_2);
114 }
115
116 return call_offset;
117 }
118
119
120 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1) {
121 // O0 is reserved for the thread
122 mov(arg1, O1);
123 return call_RT(oop_result1, metadata_result, entry, 1);
124 }
125
126
127 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2) {
128 // O0 is reserved for the thread
129 mov(arg1, O1);
130 mov(arg2, O2); assert(arg2 != O1, "smashed argument");
131 return call_RT(oop_result1, metadata_result, entry, 2);
132 }
133
134
135 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2, Register arg3) {
136 // O0 is reserved for the thread
137 mov(arg1, O1);
138 mov(arg2, O2); assert(arg2 != O1, "smashed argument");
139 mov(arg3, O3); assert(arg3 != O1 && arg3 != O2, "smashed argument");
140 return call_RT(oop_result1, metadata_result, entry, 3);
141 }
142
143
144 // Implementation of Runtime1
145
146 #define __ sasm->
147
148 static int cpu_reg_save_offsets[FrameMap::nof_cpu_regs];
149 static int fpu_reg_save_offsets[FrameMap::nof_fpu_regs];
150 static int reg_save_size_in_words;
151 static int frame_size_in_bytes = -1;
152
153 static OopMap* generate_oop_map(StubAssembler* sasm, bool save_fpu_registers) {
154 assert(frame_size_in_bytes == __ total_frame_size_in_bytes(reg_save_size_in_words),
155 "mismatch in calculation");
156 sasm->set_frame_size(frame_size_in_bytes / BytesPerWord);
157 int frame_size_in_slots = frame_size_in_bytes / sizeof(jint);
158 OopMap* oop_map = new OopMap(frame_size_in_slots, 0);
159
160 int i;
161 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
162 Register r = as_Register(i);
163 if (r == G1 || r == G3 || r == G4 || r == G5) {
164 int sp_offset = cpu_reg_save_offsets[i];
165 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
166 r->as_VMReg());
167 }
168 }
169
170 if (save_fpu_registers) {
171 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
172 FloatRegister r = as_FloatRegister(i);
173 int sp_offset = fpu_reg_save_offsets[i];
174 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
175 r->as_VMReg());
176 }
177 }
178 return oop_map;
179 }
180
181 static OopMap* save_live_registers(StubAssembler* sasm, bool save_fpu_registers = true) {
182 assert(frame_size_in_bytes == __ total_frame_size_in_bytes(reg_save_size_in_words),
183 "mismatch in calculation");
184 __ save_frame_c1(frame_size_in_bytes);
185
186 // Record volatile registers as callee-save values in an OopMap so their save locations will be
187 // propagated to the caller frame's RegisterMap during StackFrameStream construction (needed for
188 // deoptimization; see compiledVFrame::create_stack_value). The caller's I, L and O registers
189 // are saved in register windows - I's and L's in the caller's frame and O's in the stub frame
190 // (as the stub's I's) when the runtime routine called by the stub creates its frame.
191 // OopMap frame sizes are in c2 stack slot sizes (sizeof(jint))
192
193 int i;
194 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
195 Register r = as_Register(i);
196 if (r == G1 || r == G3 || r == G4 || r == G5) {
197 int sp_offset = cpu_reg_save_offsets[i];
198 __ st_ptr(r, SP, (sp_offset * BytesPerWord) + STACK_BIAS);
199 }
200 }
201
202 if (save_fpu_registers) {
203 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
204 FloatRegister r = as_FloatRegister(i);
205 int sp_offset = fpu_reg_save_offsets[i];
206 __ stf(FloatRegisterImpl::S, r, SP, (sp_offset * BytesPerWord) + STACK_BIAS);
207 }
208 }
209
210 return generate_oop_map(sasm, save_fpu_registers);
211 }
212
213 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
214 for (int i = 0; i < FrameMap::nof_cpu_regs; i++) {
215 Register r = as_Register(i);
216 if (r == G1 || r == G3 || r == G4 || r == G5) {
217 __ ld_ptr(SP, (cpu_reg_save_offsets[i] * BytesPerWord) + STACK_BIAS, r);
218 }
219 }
220
221 if (restore_fpu_registers) {
222 for (int i = 0; i < FrameMap::nof_fpu_regs; i++) {
223 FloatRegister r = as_FloatRegister(i);
224 __ ldf(FloatRegisterImpl::S, SP, (fpu_reg_save_offsets[i] * BytesPerWord) + STACK_BIAS, r);
225 }
226 }
227 }
228
229
230 void Runtime1::initialize_pd() {
231 // compute word offsets from SP at which live (non-windowed) registers are captured by stub routines
232 //
233 // A stub routine will have a frame that is at least large enough to hold
234 // a register window save area (obviously) and the volatile g registers
235 // and floating registers. A user of save_live_registers can have a frame
236 // that has more scratch area in it (although typically they will use L-regs).
237 // in that case the frame will look like this (stack growing down)
238 //
239 // FP -> | |
240 // | scratch mem |
241 // | " " |
242 // --------------
243 // | float regs |
244 // | " " |
245 // ---------------
246 // | G regs |
247 // | " " |
248 // ---------------
249 // | abi reg. |
250 // | window save |
251 // | area |
252 // SP -> ---------------
253 //
254 int i;
255 int sp_offset = align_up((int)frame::register_save_words, 2); // start doubleword aligned
256
257 // only G int registers are saved explicitly; others are found in register windows
258 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
259 Register r = as_Register(i);
260 if (r == G1 || r == G3 || r == G4 || r == G5) {
261 cpu_reg_save_offsets[i] = sp_offset;
262 sp_offset++;
263 }
264 }
265
266 // all float registers are saved explicitly
267 assert(FrameMap::nof_fpu_regs == 32, "double registers not handled here");
268 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
269 fpu_reg_save_offsets[i] = sp_offset;
270 sp_offset++;
271 }
272 reg_save_size_in_words = sp_offset - frame::memory_parameter_word_sp_offset;
273 // this should match assembler::total_frame_size_in_bytes, which
274 // isn't callable from this context. It's checked by an assert when
275 // it's used though.
276 frame_size_in_bytes = align_up(sp_offset * wordSize, 8);
277 }
278
279
280 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
281 // make a frame and preserve the caller's caller-save registers
282 OopMap* oop_map = save_live_registers(sasm);
283 int call_offset;
284 if (!has_argument) {
285 call_offset = __ call_RT(noreg, noreg, target);
286 } else {
287 call_offset = __ call_RT(noreg, noreg, target, G4);
288 }
289 OopMapSet* oop_maps = new OopMapSet();
290 oop_maps->add_gc_map(call_offset, oop_map);
291
292 __ should_not_reach_here();
293 return oop_maps;
294 }
295
296
297 OopMapSet* Runtime1::generate_stub_call(StubAssembler* sasm, Register result, address target,
298 Register arg1, Register arg2, Register arg3) {
299 // make a frame and preserve the caller's caller-save registers
300 OopMap* oop_map = save_live_registers(sasm);
301
302 int call_offset;
303 if (arg1 == noreg) {
304 call_offset = __ call_RT(result, noreg, target);
305 } else if (arg2 == noreg) {
306 call_offset = __ call_RT(result, noreg, target, arg1);
307 } else if (arg3 == noreg) {
308 call_offset = __ call_RT(result, noreg, target, arg1, arg2);
309 } else {
310 call_offset = __ call_RT(result, noreg, target, arg1, arg2, arg3);
311 }
312 OopMapSet* oop_maps = NULL;
313
314 oop_maps = new OopMapSet();
315 oop_maps->add_gc_map(call_offset, oop_map);
316 restore_live_registers(sasm);
317
318 __ ret();
319 __ delayed()->restore();
320
321 return oop_maps;
322 }
323
324
325 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
326 // make a frame and preserve the caller's caller-save registers
327 OopMap* oop_map = save_live_registers(sasm);
328
329 // call the runtime patching routine, returns non-zero if nmethod got deopted.
330 int call_offset = __ call_RT(noreg, noreg, target);
331 OopMapSet* oop_maps = new OopMapSet();
332 oop_maps->add_gc_map(call_offset, oop_map);
333
334 // re-execute the patched instruction or, if the nmethod was deoptmized, return to the
335 // deoptimization handler entry that will cause re-execution of the current bytecode
336 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
337 assert(deopt_blob != NULL, "deoptimization blob must have been created");
338
339 Label no_deopt;
340 __ br_null_short(O0, Assembler::pt, no_deopt);
341
342 // return to the deoptimization handler entry for unpacking and rexecute
343 // if we simply returned the we'd deopt as if any call we patched had just
344 // returned.
345
346 restore_live_registers(sasm);
347
348 AddressLiteral dest(deopt_blob->unpack_with_reexecution());
349 __ jump_to(dest, O0);
350 __ delayed()->restore();
351
352 __ bind(no_deopt);
353 restore_live_registers(sasm);
354 __ ret();
355 __ delayed()->restore();
356
357 return oop_maps;
358 }
359
360 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
361
362 OopMapSet* oop_maps = NULL;
363 // for better readability
364 const bool must_gc_arguments = true;
365 const bool dont_gc_arguments = false;
366
367 // stub code & info for the different stubs
368 switch (id) {
369 case forward_exception_id:
370 {
371 oop_maps = generate_handle_exception(id, sasm);
372 }
373 break;
374
375 case new_instance_id:
376 case fast_new_instance_id:
377 case fast_new_instance_init_check_id:
378 {
379 Register G5_klass = G5; // Incoming
380 Register O0_obj = O0; // Outgoing
381
382 if (id == new_instance_id) {
383 __ set_info("new_instance", dont_gc_arguments);
384 } else if (id == fast_new_instance_id) {
385 __ set_info("fast new_instance", dont_gc_arguments);
386 } else {
387 assert(id == fast_new_instance_init_check_id, "bad StubID");
388 __ set_info("fast new_instance init check", dont_gc_arguments);
389 }
390
391 if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) &&
392 UseTLAB && FastTLABRefill) {
393 Label slow_path;
394 Register G1_obj_size = G1;
395 Register G3_t1 = G3;
396 Register G4_t2 = G4;
397 assert_different_registers(G5_klass, G1_obj_size, G3_t1, G4_t2);
398
399 // Push a frame since we may do dtrace notification for the
400 // allocation which requires calling out and we don't want
401 // to stomp the real return address.
402 __ save_frame(0);
403
404 if (id == fast_new_instance_init_check_id) {
405 // make sure the klass is initialized
406 __ ldub(G5_klass, in_bytes(InstanceKlass::init_state_offset()), G3_t1);
407 __ cmp(G3_t1, InstanceKlass::fully_initialized);
408 __ br(Assembler::notEqual, false, Assembler::pn, slow_path);
409 __ delayed()->nop();
410 }
411 #ifdef ASSERT
412 // assert object can be fast path allocated
413 {
414 Label ok, not_ok;
415 __ ld(G5_klass, in_bytes(Klass::layout_helper_offset()), G1_obj_size);
416 // make sure it's an instance (LH > 0)
417 __ cmp_and_br_short(G1_obj_size, 0, Assembler::lessEqual, Assembler::pn, not_ok);
418 __ btst(Klass::_lh_instance_slow_path_bit, G1_obj_size);
419 __ br(Assembler::zero, false, Assembler::pn, ok);
420 __ delayed()->nop();
421 __ bind(not_ok);
422 __ stop("assert(can be fast path allocated)");
423 __ should_not_reach_here();
424 __ bind(ok);
425 }
426 #endif // ASSERT
427 // if we got here then the TLAB allocation failed, so try
428 // refilling the TLAB or allocating directly from eden.
429 Label retry_tlab, try_eden;
430 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves G5_klass
431
432 __ bind(retry_tlab);
433
434 // get the instance size
435 __ ld(G5_klass, in_bytes(Klass::layout_helper_offset()), G1_obj_size);
436
437 __ tlab_allocate(O0_obj, G1_obj_size, 0, G3_t1, slow_path);
438
439 __ initialize_object(O0_obj, G5_klass, G1_obj_size, 0, G3_t1, G4_t2, /* is_tlab_allocated */ true);
440 __ verify_oop(O0_obj);
441 __ mov(O0, I0);
442 __ ret();
443 __ delayed()->restore();
444
445 __ bind(try_eden);
446 // get the instance size
447 __ ld(G5_klass, in_bytes(Klass::layout_helper_offset()), G1_obj_size);
448 __ eden_allocate(O0_obj, G1_obj_size, 0, G3_t1, G4_t2, slow_path);
449 __ incr_allocated_bytes(G1_obj_size, G3_t1, G4_t2);
450
451 __ initialize_object(O0_obj, G5_klass, G1_obj_size, 0, G3_t1, G4_t2, /* is_tlab_allocated */ false);
452 __ verify_oop(O0_obj);
453 __ mov(O0, I0);
454 __ ret();
455 __ delayed()->restore();
456
457 __ bind(slow_path);
458
459 // pop this frame so generate_stub_call can push it's own
460 __ restore();
461 }
462
463 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_instance), G5_klass);
464 // I0->O0: new instance
465 }
466
467 break;
468
469 case counter_overflow_id:
470 // G4 contains bci, G5 contains method
471 oop_maps = generate_stub_call(sasm, noreg, CAST_FROM_FN_PTR(address, counter_overflow), G4, G5);
472 break;
473
474 case new_type_array_id:
475 case new_object_array_id:
476 {
477 Register G5_klass = G5; // Incoming
478 Register G4_length = G4; // Incoming
479 Register O0_obj = O0; // Outgoing
480
481 Address klass_lh(G5_klass, Klass::layout_helper_offset());
482 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
483 assert(Klass::_lh_header_size_mask == 0xFF, "bytewise");
484 // Use this offset to pick out an individual byte of the layout_helper:
485 const int klass_lh_header_size_offset = ((BytesPerInt - 1) // 3 - 2 selects byte {0,1,0,0}
486 - Klass::_lh_header_size_shift / BitsPerByte);
487
488 if (id == new_type_array_id) {
489 __ set_info("new_type_array", dont_gc_arguments);
490 } else {
491 __ set_info("new_object_array", dont_gc_arguments);
492 }
493
494 #ifdef ASSERT
495 // assert object type is really an array of the proper kind
496 {
497 Label ok;
498 Register G3_t1 = G3;
499 __ ld(klass_lh, G3_t1);
500 __ sra(G3_t1, Klass::_lh_array_tag_shift, G3_t1);
501 int tag = ((id == new_type_array_id)
502 ? Klass::_lh_array_tag_type_value
503 : Klass::_lh_array_tag_obj_value);
504 __ cmp_and_brx_short(G3_t1, tag, Assembler::equal, Assembler::pt, ok);
505 __ stop("assert(is an array klass)");
506 __ should_not_reach_here();
507 __ bind(ok);
508 }
509 #endif // ASSERT
510
511 if (UseTLAB && FastTLABRefill) {
512 Label slow_path;
513 Register G1_arr_size = G1;
514 Register G3_t1 = G3;
515 Register O1_t2 = O1;
516 assert_different_registers(G5_klass, G4_length, G1_arr_size, G3_t1, O1_t2);
517
518 // check that array length is small enough for fast path
519 __ set(C1_MacroAssembler::max_array_allocation_length, G3_t1);
520 __ cmp(G4_length, G3_t1);
521 __ br(Assembler::greaterUnsigned, false, Assembler::pn, slow_path);
522 __ delayed()->nop();
523
524 // if we got here then the TLAB allocation failed, so try
525 // refilling the TLAB or allocating directly from eden.
526 Label retry_tlab, try_eden;
527 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves G4_length and G5_klass
528
529 __ bind(retry_tlab);
530
531 // get the allocation size: (length << (layout_helper & 0x1F)) + header_size
532 __ ld(klass_lh, G3_t1);
533 __ sll(G4_length, G3_t1, G1_arr_size);
534 __ srl(G3_t1, Klass::_lh_header_size_shift, G3_t1);
535 __ and3(G3_t1, Klass::_lh_header_size_mask, G3_t1);
536 __ add(G1_arr_size, G3_t1, G1_arr_size);
537 __ add(G1_arr_size, MinObjAlignmentInBytesMask, G1_arr_size); // align up
538 __ and3(G1_arr_size, ~MinObjAlignmentInBytesMask, G1_arr_size);
539
540 __ tlab_allocate(O0_obj, G1_arr_size, 0, G3_t1, slow_path); // preserves G1_arr_size
541
542 __ initialize_header(O0_obj, G5_klass, G4_length, G3_t1, O1_t2);
543 __ ldub(klass_lh, G3_t1, klass_lh_header_size_offset);
544 __ sub(G1_arr_size, G3_t1, O1_t2); // body length
545 __ add(O0_obj, G3_t1, G3_t1); // body start
546 if (!ZeroTLAB) {
547 __ initialize_body(G3_t1, O1_t2);
548 }
549 __ verify_oop(O0_obj);
550 __ retl();
551 __ delayed()->nop();
552
553 __ bind(try_eden);
554 // get the allocation size: (length << (layout_helper & 0x1F)) + header_size
555 __ ld(klass_lh, G3_t1);
556 __ sll(G4_length, G3_t1, G1_arr_size);
557 __ srl(G3_t1, Klass::_lh_header_size_shift, G3_t1);
558 __ and3(G3_t1, Klass::_lh_header_size_mask, G3_t1);
559 __ add(G1_arr_size, G3_t1, G1_arr_size);
560 __ add(G1_arr_size, MinObjAlignmentInBytesMask, G1_arr_size);
561 __ and3(G1_arr_size, ~MinObjAlignmentInBytesMask, G1_arr_size);
562
563 __ eden_allocate(O0_obj, G1_arr_size, 0, G3_t1, O1_t2, slow_path); // preserves G1_arr_size
564 __ incr_allocated_bytes(G1_arr_size, G3_t1, O1_t2);
565
566 __ initialize_header(O0_obj, G5_klass, G4_length, G3_t1, O1_t2);
567 __ ldub(klass_lh, G3_t1, klass_lh_header_size_offset);
568 __ sub(G1_arr_size, G3_t1, O1_t2); // body length
569 __ add(O0_obj, G3_t1, G3_t1); // body start
570 __ initialize_body(G3_t1, O1_t2);
571 __ verify_oop(O0_obj);
572 __ retl();
573 __ delayed()->nop();
574
575 __ bind(slow_path);
576 }
577
578 if (id == new_type_array_id) {
579 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_type_array), G5_klass, G4_length);
580 } else {
581 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_object_array), G5_klass, G4_length);
582 }
583 // I0 -> O0: new array
584 }
585 break;
586
587 case new_multi_array_id:
588 { // O0: klass
589 // O1: rank
590 // O2: address of 1st dimension
591 __ set_info("new_multi_array", dont_gc_arguments);
592 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_multi_array), I0, I1, I2);
593 // I0 -> O0: new multi array
594 }
595 break;
596
597 case register_finalizer_id:
598 {
599 __ set_info("register_finalizer", dont_gc_arguments);
600
601 // load the klass and check the has finalizer flag
602 Label register_finalizer;
603 Register t = O1;
604 __ load_klass(O0, t);
605 __ ld(t, in_bytes(Klass::access_flags_offset()), t);
606 __ set(JVM_ACC_HAS_FINALIZER, G3);
607 __ andcc(G3, t, G0);
608 __ br(Assembler::notZero, false, Assembler::pt, register_finalizer);
609 __ delayed()->nop();
610
611 // do a leaf return
612 __ retl();
613 __ delayed()->nop();
614
615 __ bind(register_finalizer);
616 OopMap* oop_map = save_live_registers(sasm);
617 int call_offset = __ call_RT(noreg, noreg,
618 CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), I0);
619 oop_maps = new OopMapSet();
620 oop_maps->add_gc_map(call_offset, oop_map);
621
622 // Now restore all the live registers
623 restore_live_registers(sasm);
624
625 __ ret();
626 __ delayed()->restore();
627 }
628 break;
629
630 case throw_range_check_failed_id:
631 { __ set_info("range_check_failed", dont_gc_arguments); // arguments will be discarded
632 // G4: index
633 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
634 }
635 break;
636
637 case throw_index_exception_id:
638 { __ set_info("index_range_check_failed", dont_gc_arguments); // arguments will be discarded
639 // G4: index
640 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
641 }
642 break;
643
644 case throw_div0_exception_id:
645 { __ set_info("throw_div0_exception", dont_gc_arguments);
646 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
647 }
648 break;
649
650 case throw_null_pointer_exception_id:
651 { __ set_info("throw_null_pointer_exception", dont_gc_arguments);
652 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
653 }
654 break;
655
656 case handle_exception_id:
657 { __ set_info("handle_exception", dont_gc_arguments);
658 oop_maps = generate_handle_exception(id, sasm);
659 }
660 break;
661
662 case handle_exception_from_callee_id:
663 { __ set_info("handle_exception_from_callee", dont_gc_arguments);
664 oop_maps = generate_handle_exception(id, sasm);
665 }
666 break;
667
668 case unwind_exception_id:
669 {
670 // O0: exception
671 // I7: address of call to this method
672
673 __ set_info("unwind_exception", dont_gc_arguments);
674 __ mov(Oexception, Oexception->after_save());
675 __ add(I7, frame::pc_return_offset, Oissuing_pc->after_save());
676
677 __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address),
678 G2_thread, Oissuing_pc->after_save());
679 __ verify_not_null_oop(Oexception->after_save());
680
681 // Restore SP from L7 if the exception PC is a method handle call site.
682 __ mov(O0, G5); // Save the target address.
683 __ lduw(Address(G2_thread, JavaThread::is_method_handle_return_offset()), L0);
684 __ tst(L0); // Condition codes are preserved over the restore.
685 __ restore();
686
687 __ jmp(G5, 0);
688 __ delayed()->movcc(Assembler::notZero, false, Assembler::icc, L7_mh_SP_save, SP); // Restore SP if required.
689 }
690 break;
691
692 case throw_array_store_exception_id:
693 {
694 __ set_info("throw_array_store_exception", dont_gc_arguments);
695 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true);
696 }
697 break;
698
699 case throw_class_cast_exception_id:
700 {
701 // G4: object
702 __ set_info("throw_class_cast_exception", dont_gc_arguments);
703 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
704 }
705 break;
706
707 case throw_incompatible_class_change_error_id:
708 {
709 __ set_info("throw_incompatible_class_cast_exception", dont_gc_arguments);
710 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
711 }
712 break;
713
714 case slow_subtype_check_id:
715 { // Support for uint StubRoutine::partial_subtype_check( Klass sub, Klass super );
716 // Arguments :
717 //
718 // ret : G3
719 // sub : G3, argument, destroyed
720 // super: G1, argument, not changed
721 // raddr: O7, blown by call
722 Label miss;
723
724 __ save_frame(0); // Blow no registers!
725
726 __ check_klass_subtype_slow_path(G3, G1, L0, L1, L2, L4, NULL, &miss);
727
728 __ mov(1, G3);
729 __ ret(); // Result in G5 is 'true'
730 __ delayed()->restore(); // free copy or add can go here
731
732 __ bind(miss);
733 __ mov(0, G3);
734 __ ret(); // Result in G5 is 'false'
735 __ delayed()->restore(); // free copy or add can go here
736 }
737
738 case monitorenter_nofpu_id:
739 case monitorenter_id:
740 { // G4: object
741 // G5: lock address
742 __ set_info("monitorenter", dont_gc_arguments);
743
744 int save_fpu_registers = (id == monitorenter_id);
745 // make a frame and preserve the caller's caller-save registers
746 OopMap* oop_map = save_live_registers(sasm, save_fpu_registers);
747
748 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), G4, G5);
749
750 oop_maps = new OopMapSet();
751 oop_maps->add_gc_map(call_offset, oop_map);
752 restore_live_registers(sasm, save_fpu_registers);
753
754 __ ret();
755 __ delayed()->restore();
756 }
757 break;
758
759 case monitorexit_nofpu_id:
760 case monitorexit_id:
761 { // G4: lock address
762 // note: really a leaf routine but must setup last java sp
763 // => use call_RT for now (speed can be improved by
764 // doing last java sp setup manually)
765 __ set_info("monitorexit", dont_gc_arguments);
766
767 int save_fpu_registers = (id == monitorexit_id);
768 // make a frame and preserve the caller's caller-save registers
769 OopMap* oop_map = save_live_registers(sasm, save_fpu_registers);
770
771 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), G4);
772
773 oop_maps = new OopMapSet();
774 oop_maps->add_gc_map(call_offset, oop_map);
775 restore_live_registers(sasm, save_fpu_registers);
776
777 __ ret();
778 __ delayed()->restore();
779 }
780 break;
781
782 case deoptimize_id:
783 {
784 __ set_info("deoptimize", dont_gc_arguments);
785 OopMap* oop_map = save_live_registers(sasm);
786 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize), G4);
787 oop_maps = new OopMapSet();
788 oop_maps->add_gc_map(call_offset, oop_map);
789 restore_live_registers(sasm);
790 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
791 assert(deopt_blob != NULL, "deoptimization blob must have been created");
792 AddressLiteral dest(deopt_blob->unpack_with_reexecution());
793 __ jump_to(dest, O0);
794 __ delayed()->restore();
795 }
796 break;
797
798 case access_field_patching_id:
799 { __ set_info("access_field_patching", dont_gc_arguments);
800 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
801 }
802 break;
803
804 case load_klass_patching_id:
805 { __ set_info("load_klass_patching", dont_gc_arguments);
806 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
807 }
808 break;
809
810 case load_mirror_patching_id:
811 { __ set_info("load_mirror_patching", dont_gc_arguments);
812 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_mirror_patching));
813 }
814 break;
815
816 case load_appendix_patching_id:
817 { __ set_info("load_appendix_patching", dont_gc_arguments);
818 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_appendix_patching));
819 }
820 break;
821
822 case dtrace_object_alloc_id:
823 { // O0: object
824 __ set_info("dtrace_object_alloc", dont_gc_arguments);
825 // we can't gc here so skip the oopmap but make sure that all
826 // the live registers get saved.
827 save_live_registers(sasm);
828
829 __ save_thread(L7_thread_cache);
830 __ call(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc),
831 relocInfo::runtime_call_type);
832 __ delayed()->mov(I0, O0);
833 __ restore_thread(L7_thread_cache);
834
835 restore_live_registers(sasm);
836 __ ret();
837 __ delayed()->restore();
838 }
839 break;
840
841 #if INCLUDE_ALL_GCS
842 case g1_pre_barrier_slow_id:
843 { // G4: previous value of memory
844 BarrierSet* bs = Universe::heap()->barrier_set();
845 if (bs->kind() != BarrierSet::G1SATBCTLogging) {
846 __ save_frame(0);
847 __ set((int)id, O1);
848 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), I0);
849 __ should_not_reach_here();
850 break;
851 }
852
853 __ set_info("g1_pre_barrier_slow_id", dont_gc_arguments);
854
855 Register pre_val = G4;
856 Register tmp = G1_scratch;
857 Register tmp2 = G3_scratch;
858
859 Label refill, restart;
860 int satb_q_active_byte_offset =
861 in_bytes(JavaThread::satb_mark_queue_offset() +
862 SATBMarkQueue::byte_offset_of_active());
863 int satb_q_index_byte_offset =
864 in_bytes(JavaThread::satb_mark_queue_offset() +
865 SATBMarkQueue::byte_offset_of_index());
866 int satb_q_buf_byte_offset =
867 in_bytes(JavaThread::satb_mark_queue_offset() +
868 SATBMarkQueue::byte_offset_of_buf());
869
870 // Is marking still active?
871 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
872 __ ld(G2_thread, satb_q_active_byte_offset, tmp);
873 } else {
874 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
875 __ ldsb(G2_thread, satb_q_active_byte_offset, tmp);
876 }
877 __ cmp_and_br_short(tmp, G0, Assembler::notEqual, Assembler::pt, restart);
878 __ retl();
879 __ delayed()->nop();
880
881 __ bind(restart);
882 // Load the index into the SATB buffer. SATBMarkQueue::_index is a
883 // size_t so ld_ptr is appropriate
884 __ ld_ptr(G2_thread, satb_q_index_byte_offset, tmp);
885
886 // index == 0?
887 __ cmp_and_brx_short(tmp, G0, Assembler::equal, Assembler::pn, refill);
888
889 __ ld_ptr(G2_thread, satb_q_buf_byte_offset, tmp2);
890 __ sub(tmp, oopSize, tmp);
891
892 __ st_ptr(pre_val, tmp2, tmp); // [_buf + index] := <address_of_card>
893 // Use return-from-leaf
894 __ retl();
895 __ delayed()->st_ptr(tmp, G2_thread, satb_q_index_byte_offset);
896
897 __ bind(refill);
898
899 save_live_registers(sasm);
900
901 __ call_VM_leaf(L7_thread_cache,
902 CAST_FROM_FN_PTR(address,
903 SATBMarkQueueSet::handle_zero_index_for_thread),
904 G2_thread);
905
906 restore_live_registers(sasm);
907
908 __ br(Assembler::always, /*annul*/false, Assembler::pt, restart);
909 __ delayed()->restore();
910 }
911 break;
912
913 case g1_post_barrier_slow_id:
914 {
915 BarrierSet* bs = Universe::heap()->barrier_set();
916 if (bs->kind() != BarrierSet::G1SATBCTLogging) {
917 __ save_frame(0);
918 __ set((int)id, O1);
919 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), I0);
920 __ should_not_reach_here();
921 break;
922 }
923
924 __ set_info("g1_post_barrier_slow_id", dont_gc_arguments);
925
926 Register addr = G4;
927 Register cardtable = G5;
928 Register tmp = G1_scratch;
929 Register tmp2 = G3_scratch;
930 jbyte* byte_map_base = barrier_set_cast<CardTableModRefBS>(bs)->byte_map_base;
931
932 Label not_already_dirty, restart, refill, young_card;
933
934 __ srlx(addr, CardTableModRefBS::card_shift, addr);
935
936 AddressLiteral rs(byte_map_base);
937 __ set(rs, cardtable); // cardtable := <card table base>
938 __ ldub(addr, cardtable, tmp); // tmp := [addr + cardtable]
939
940 __ cmp_and_br_short(tmp, G1SATBCardTableModRefBS::g1_young_card_val(), Assembler::equal, Assembler::pt, young_card);
941
942 __ membar(Assembler::Membar_mask_bits(Assembler::StoreLoad));
943 __ ldub(addr, cardtable, tmp); // tmp := [addr + cardtable]
944
945 assert(CardTableModRefBS::dirty_card_val() == 0, "otherwise check this code");
946 __ cmp_and_br_short(tmp, G0, Assembler::notEqual, Assembler::pt, not_already_dirty);
947
948 __ bind(young_card);
949 // We didn't take the branch, so we're already dirty: return.
950 // Use return-from-leaf
951 __ retl();
952 __ delayed()->nop();
953
954 // Not dirty.
955 __ bind(not_already_dirty);
956
957 // Get cardtable + tmp into a reg by itself
958 __ add(addr, cardtable, tmp2);
959
960 // First, dirty it.
961 __ stb(G0, tmp2, 0); // [cardPtr] := 0 (i.e., dirty).
962
963 Register tmp3 = cardtable;
964 Register tmp4 = tmp;
965
966 // these registers are now dead
967 addr = cardtable = tmp = noreg;
968
969 int dirty_card_q_index_byte_offset =
970 in_bytes(JavaThread::dirty_card_queue_offset() +
971 DirtyCardQueue::byte_offset_of_index());
972 int dirty_card_q_buf_byte_offset =
973 in_bytes(JavaThread::dirty_card_queue_offset() +
974 DirtyCardQueue::byte_offset_of_buf());
975
976 __ bind(restart);
977
978 // Get the index into the update buffer. DirtyCardQueue::_index is
979 // a size_t so ld_ptr is appropriate here.
980 __ ld_ptr(G2_thread, dirty_card_q_index_byte_offset, tmp3);
981
982 // index == 0?
983 __ cmp_and_brx_short(tmp3, G0, Assembler::equal, Assembler::pn, refill);
984
985 __ ld_ptr(G2_thread, dirty_card_q_buf_byte_offset, tmp4);
986 __ sub(tmp3, oopSize, tmp3);
987
988 __ st_ptr(tmp2, tmp4, tmp3); // [_buf + index] := <address_of_card>
989 // Use return-from-leaf
990 __ retl();
991 __ delayed()->st_ptr(tmp3, G2_thread, dirty_card_q_index_byte_offset);
992
993 __ bind(refill);
994
995 save_live_registers(sasm);
996
997 __ call_VM_leaf(L7_thread_cache,
998 CAST_FROM_FN_PTR(address,
999 DirtyCardQueueSet::handle_zero_index_for_thread),
1000 G2_thread);
1001
1002 restore_live_registers(sasm);
1003
1004 __ br(Assembler::always, /*annul*/false, Assembler::pt, restart);
1005 __ delayed()->restore();
1006 }
1007 break;
1008 #endif // INCLUDE_ALL_GCS
1009
1010 case predicate_failed_trap_id:
1011 {
1012 __ set_info("predicate_failed_trap", dont_gc_arguments);
1013 OopMap* oop_map = save_live_registers(sasm);
1014
1015 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, predicate_failed_trap));
1016
1017 oop_maps = new OopMapSet();
1018 oop_maps->add_gc_map(call_offset, oop_map);
1019
1020 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1021 assert(deopt_blob != NULL, "deoptimization blob must have been created");
1022 restore_live_registers(sasm);
1023
1024 AddressLiteral dest(deopt_blob->unpack_with_reexecution());
1025 __ jump_to(dest, O0);
1026 __ delayed()->restore();
1027 }
1028 break;
1029
1030 default:
1031 { __ set_info("unimplemented entry", dont_gc_arguments);
1032 __ save_frame(0);
1033 __ set((int)id, O1);
1034 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), O1);
1035 __ should_not_reach_here();
1036 }
1037 break;
1038 }
1039 return oop_maps;
1040 }
1041
1042
1043 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler* sasm) {
1044 __ block_comment("generate_handle_exception");
1045
1046 // Save registers, if required.
1047 OopMapSet* oop_maps = new OopMapSet();
1048 OopMap* oop_map = NULL;
1049 switch (id) {
1050 case forward_exception_id:
1051 // We're handling an exception in the context of a compiled frame.
1052 // The registers have been saved in the standard places. Perform
1053 // an exception lookup in the caller and dispatch to the handler
1054 // if found. Otherwise unwind and dispatch to the callers
1055 // exception handler.
1056 oop_map = generate_oop_map(sasm, true);
1057
1058 // transfer the pending exception to the exception_oop
1059 __ ld_ptr(G2_thread, in_bytes(JavaThread::pending_exception_offset()), Oexception);
1060 __ ld_ptr(Oexception, 0, G0);
1061 __ st_ptr(G0, G2_thread, in_bytes(JavaThread::pending_exception_offset()));
1062 __ add(I7, frame::pc_return_offset, Oissuing_pc);
1063 break;
1064 case handle_exception_id:
1065 // At this point all registers MAY be live.
1066 oop_map = save_live_registers(sasm);
1067 __ mov(Oexception->after_save(), Oexception);
1068 __ mov(Oissuing_pc->after_save(), Oissuing_pc);
1069 break;
1070 case handle_exception_from_callee_id:
1071 // At this point all registers except exception oop (Oexception)
1072 // and exception pc (Oissuing_pc) are dead.
1073 oop_map = new OopMap(frame_size_in_bytes / sizeof(jint), 0);
1074 sasm->set_frame_size(frame_size_in_bytes / BytesPerWord);
1075 __ save_frame_c1(frame_size_in_bytes);
1076 __ mov(Oexception->after_save(), Oexception);
1077 __ mov(Oissuing_pc->after_save(), Oissuing_pc);
1078 break;
1079 default: ShouldNotReachHere();
1080 }
1081
1082 __ verify_not_null_oop(Oexception);
1083
1084 #ifdef ASSERT
1085 // check that fields in JavaThread for exception oop and issuing pc are
1086 // empty before writing to them
1087 Label oop_empty;
1088 Register scratch = I7; // We can use I7 here because it's overwritten later anyway.
1089 __ ld_ptr(Address(G2_thread, JavaThread::exception_oop_offset()), scratch);
1090 __ br_null(scratch, false, Assembler::pt, oop_empty);
1091 __ delayed()->nop();
1092 __ stop("exception oop already set");
1093 __ bind(oop_empty);
1094
1095 Label pc_empty;
1096 __ ld_ptr(Address(G2_thread, JavaThread::exception_pc_offset()), scratch);
1097 __ br_null(scratch, false, Assembler::pt, pc_empty);
1098 __ delayed()->nop();
1099 __ stop("exception pc already set");
1100 __ bind(pc_empty);
1101 #endif
1102
1103 // save the exception and issuing pc in the thread
1104 __ st_ptr(Oexception, G2_thread, in_bytes(JavaThread::exception_oop_offset()));
1105 __ st_ptr(Oissuing_pc, G2_thread, in_bytes(JavaThread::exception_pc_offset()));
1106
1107 // use the throwing pc as the return address to lookup (has bci & oop map)
1108 __ mov(Oissuing_pc, I7);
1109 __ sub(I7, frame::pc_return_offset, I7);
1110 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
1111 oop_maps->add_gc_map(call_offset, oop_map);
1112
1113 // Note: if nmethod has been deoptimized then regardless of
1114 // whether it had a handler or not we will deoptimize
1115 // by entering the deopt blob with a pending exception.
1116
1117 // Restore the registers that were saved at the beginning, remove
1118 // the frame and jump to the exception handler.
1119 switch (id) {
1120 case forward_exception_id:
1121 case handle_exception_id:
1122 restore_live_registers(sasm);
1123 __ jmp(O0, 0);
1124 __ delayed()->restore();
1125 break;
1126 case handle_exception_from_callee_id:
1127 // Restore SP from L7 if the exception PC is a method handle call site.
1128 __ mov(O0, G5); // Save the target address.
1129 __ lduw(Address(G2_thread, JavaThread::is_method_handle_return_offset()), L0);
1130 __ tst(L0); // Condition codes are preserved over the restore.
1131 __ restore();
1132
1133 __ jmp(G5, 0); // jump to the exception handler
1134 __ delayed()->movcc(Assembler::notZero, false, Assembler::icc, L7_mh_SP_save, SP); // Restore SP if required.
1135 break;
1136 default: ShouldNotReachHere();
1137 }
1138
1139 return oop_maps;
1140 }
1141
1142
1143 #undef __
1144
1145 const char *Runtime1::pd_name_for_address(address entry) {
1146 return "<unknown function>";
1147 }