9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/assembler.hpp"
27 #include "code/relocInfo.hpp"
28 #include "nativeInst_sparc.hpp"
29 #include "oops/klass.inline.hpp"
30 #include "oops/oop.inline.hpp"
31 #include "runtime/safepoint.hpp"
32
33 void Relocation::pd_set_data_value(address x, intptr_t o, bool verify_only) {
34 NativeInstruction* ip = nativeInstruction_at(addr());
35 jint inst = ip->long_at(0);
36 assert(inst != NativeInstruction::illegal_instruction(), "no breakpoint");
37 switch (Assembler::inv_op(inst)) {
38
39 case Assembler::ldst_op:
40 #ifdef ASSERT
41 switch (Assembler::inv_op3(inst)) {
42 case Assembler::lduw_op3:
43 case Assembler::ldub_op3:
44 case Assembler::lduh_op3:
45 case Assembler::ldd_op3:
46 case Assembler::ldsw_op3:
47 case Assembler::ldsb_op3:
48 case Assembler::ldsh_op3:
49 case Assembler::ldx_op3:
50 case Assembler::ldf_op3:
80 {
81 guarantee(Assembler::inv_immed(inst), "must have a simm13 field");
82 int simm13 = Assembler::low10((intptr_t)x) + o;
83 guarantee(Assembler::is_simm13(simm13), "offset can't overflow simm13");
84 inst &= ~Assembler::simm( -1, 13);
85 inst |= Assembler::simm(simm13, 13);
86 if (verify_only) {
87 guarantee(ip->long_at(0) == inst, "instructions must match");
88 } else {
89 ip->set_long_at(0, inst);
90 }
91 }
92 break;
93
94 case Assembler::branch_op:
95 {
96 jint inst2;
97 guarantee(Assembler::inv_op2(inst)==Assembler::sethi_op2, "must be sethi");
98 if (format() != 0) {
99 assert(type() == relocInfo::oop_type || type() == relocInfo::metadata_type, "only narrow oops or klasses case");
100 jint np = type() == relocInfo::oop_type ? oopDesc::encode_heap_oop((oop)x) : Klass::encode_klass((Klass*)x);
101 inst &= ~Assembler::hi22(-1);
102 inst |= Assembler::hi22((intptr_t)np);
103 if (verify_only) {
104 guarantee(ip->long_at(0) == inst, "instructions must match");
105 } else {
106 ip->set_long_at(0, inst);
107 }
108 inst2 = ip->long_at( NativeInstruction::nop_instruction_size );
109 guarantee(Assembler::inv_op(inst2)==Assembler::arith_op, "arith op");
110 if (verify_only) {
111 guarantee(ip->long_at(NativeInstruction::nop_instruction_size) == NativeInstruction::set_data32_simm13( inst2, (intptr_t)np),
112 "instructions must match");
113 } else {
114 ip->set_long_at(NativeInstruction::nop_instruction_size, NativeInstruction::set_data32_simm13( inst2, (intptr_t)np));
115 }
116 break;
117 }
118 if (verify_only) {
119 ip->verify_data64_sethi( ip->addr_at(0), (intptr_t)x );
120 } else {
|
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/assembler.hpp"
27 #include "code/relocInfo.hpp"
28 #include "nativeInst_sparc.hpp"
29 #include "oops/compressedOops.inline.hpp"
30 #include "oops/klass.inline.hpp"
31 #include "oops/oop.hpp"
32 #include "runtime/safepoint.hpp"
33
34 void Relocation::pd_set_data_value(address x, intptr_t o, bool verify_only) {
35 NativeInstruction* ip = nativeInstruction_at(addr());
36 jint inst = ip->long_at(0);
37 assert(inst != NativeInstruction::illegal_instruction(), "no breakpoint");
38 switch (Assembler::inv_op(inst)) {
39
40 case Assembler::ldst_op:
41 #ifdef ASSERT
42 switch (Assembler::inv_op3(inst)) {
43 case Assembler::lduw_op3:
44 case Assembler::ldub_op3:
45 case Assembler::lduh_op3:
46 case Assembler::ldd_op3:
47 case Assembler::ldsw_op3:
48 case Assembler::ldsb_op3:
49 case Assembler::ldsh_op3:
50 case Assembler::ldx_op3:
51 case Assembler::ldf_op3:
81 {
82 guarantee(Assembler::inv_immed(inst), "must have a simm13 field");
83 int simm13 = Assembler::low10((intptr_t)x) + o;
84 guarantee(Assembler::is_simm13(simm13), "offset can't overflow simm13");
85 inst &= ~Assembler::simm( -1, 13);
86 inst |= Assembler::simm(simm13, 13);
87 if (verify_only) {
88 guarantee(ip->long_at(0) == inst, "instructions must match");
89 } else {
90 ip->set_long_at(0, inst);
91 }
92 }
93 break;
94
95 case Assembler::branch_op:
96 {
97 jint inst2;
98 guarantee(Assembler::inv_op2(inst)==Assembler::sethi_op2, "must be sethi");
99 if (format() != 0) {
100 assert(type() == relocInfo::oop_type || type() == relocInfo::metadata_type, "only narrow oops or klasses case");
101 jint np = type() == relocInfo::oop_type ? CompressedOops::encode((oop)x) : Klass::encode_klass((Klass*)x);
102 inst &= ~Assembler::hi22(-1);
103 inst |= Assembler::hi22((intptr_t)np);
104 if (verify_only) {
105 guarantee(ip->long_at(0) == inst, "instructions must match");
106 } else {
107 ip->set_long_at(0, inst);
108 }
109 inst2 = ip->long_at( NativeInstruction::nop_instruction_size );
110 guarantee(Assembler::inv_op(inst2)==Assembler::arith_op, "arith op");
111 if (verify_only) {
112 guarantee(ip->long_at(NativeInstruction::nop_instruction_size) == NativeInstruction::set_data32_simm13( inst2, (intptr_t)np),
113 "instructions must match");
114 } else {
115 ip->set_long_at(NativeInstruction::nop_instruction_size, NativeInstruction::set_data32_simm13( inst2, (intptr_t)np));
116 }
117 break;
118 }
119 if (verify_only) {
120 ip->verify_data64_sethi( ip->addr_at(0), (intptr_t)x );
121 } else {
|