8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/macroAssembler.inline.hpp"
27 #include "logging/log.hpp"
28 #include "memory/resourceArea.hpp"
29 #include "runtime/java.hpp"
30 #include "runtime/os.hpp"
31 #include "runtime/stubCodeGenerator.hpp"
32 #include "vm_version_sparc.hpp"
33
34 unsigned int VM_Version::_L2_data_cache_line_size = 0;
35
36 void VM_Version::initialize() {
37 assert(_features != 0, "System pre-initialization is not complete.");
38 guarantee(VM_Version::has_v9(), "only SPARC v9 is supported");
39
40 PrefetchCopyIntervalInBytes = prefetch_copy_interval_in_bytes();
41 PrefetchScanIntervalInBytes = prefetch_scan_interval_in_bytes();
42 PrefetchFieldsAhead = prefetch_fields_ahead();
43
44 // Allocation prefetch settings
45 intx cache_line_size = prefetch_data_size();
46 if( cache_line_size > AllocatePrefetchStepSize )
47 AllocatePrefetchStepSize = cache_line_size;
364 }
365
366 if (UseVectorizedMismatchIntrinsic) {
367 warning("UseVectorizedMismatchIntrinsic specified, but not available on this CPU.");
368 FLAG_SET_DEFAULT(UseVectorizedMismatchIntrinsic, false);
369 }
370
371 if (FLAG_IS_DEFAULT(ContendedPaddingWidth) &&
372 (cache_line_size > ContendedPaddingWidth))
373 ContendedPaddingWidth = cache_line_size;
374
375 // This machine does not allow unaligned memory accesses
376 if (UseUnalignedAccesses) {
377 if (!FLAG_IS_DEFAULT(UseUnalignedAccesses))
378 warning("Unaligned memory access is not available on this CPU");
379 FLAG_SET_DEFAULT(UseUnalignedAccesses, false);
380 }
381
382 if (log_is_enabled(Info, os, cpu)) {
383 ResourceMark rm;
384 outputStream* log = Log(os, cpu)::info_stream();
385 log->print_cr("L1 data cache line size: %u", L1_data_cache_line_size());
386 log->print_cr("L2 data cache line size: %u", L2_data_cache_line_size());
387 log->print("Allocation");
388 if (AllocatePrefetchStyle <= 0) {
389 log->print(": no prefetching");
390 } else {
391 log->print(" prefetching: ");
392 if (AllocatePrefetchInstr == 0) {
393 log->print("PREFETCH");
394 } else if (AllocatePrefetchInstr == 1) {
395 log->print("BIS");
396 }
397 if (AllocatePrefetchLines > 1) {
398 log->print_cr(" at distance %d, %d lines of %d bytes", (int) AllocatePrefetchDistance, (int) AllocatePrefetchLines, (int) AllocatePrefetchStepSize);
399 } else {
400 log->print_cr(" at distance %d, one line of %d bytes", (int) AllocatePrefetchDistance, (int) AllocatePrefetchStepSize);
401 }
402 }
403 if (PrefetchCopyIntervalInBytes > 0) {
404 log->print_cr("PrefetchCopyIntervalInBytes %d", (int) PrefetchCopyIntervalInBytes);
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8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/macroAssembler.inline.hpp"
27 #include "logging/log.hpp"
28 #include "logging/logStream.hpp"
29 #include "memory/resourceArea.hpp"
30 #include "runtime/java.hpp"
31 #include "runtime/os.hpp"
32 #include "runtime/stubCodeGenerator.hpp"
33 #include "vm_version_sparc.hpp"
34
35 unsigned int VM_Version::_L2_data_cache_line_size = 0;
36
37 void VM_Version::initialize() {
38 assert(_features != 0, "System pre-initialization is not complete.");
39 guarantee(VM_Version::has_v9(), "only SPARC v9 is supported");
40
41 PrefetchCopyIntervalInBytes = prefetch_copy_interval_in_bytes();
42 PrefetchScanIntervalInBytes = prefetch_scan_interval_in_bytes();
43 PrefetchFieldsAhead = prefetch_fields_ahead();
44
45 // Allocation prefetch settings
46 intx cache_line_size = prefetch_data_size();
47 if( cache_line_size > AllocatePrefetchStepSize )
48 AllocatePrefetchStepSize = cache_line_size;
365 }
366
367 if (UseVectorizedMismatchIntrinsic) {
368 warning("UseVectorizedMismatchIntrinsic specified, but not available on this CPU.");
369 FLAG_SET_DEFAULT(UseVectorizedMismatchIntrinsic, false);
370 }
371
372 if (FLAG_IS_DEFAULT(ContendedPaddingWidth) &&
373 (cache_line_size > ContendedPaddingWidth))
374 ContendedPaddingWidth = cache_line_size;
375
376 // This machine does not allow unaligned memory accesses
377 if (UseUnalignedAccesses) {
378 if (!FLAG_IS_DEFAULT(UseUnalignedAccesses))
379 warning("Unaligned memory access is not available on this CPU");
380 FLAG_SET_DEFAULT(UseUnalignedAccesses, false);
381 }
382
383 if (log_is_enabled(Info, os, cpu)) {
384 ResourceMark rm;
385 LogStream ls(Log(os, cpu)::info());
386 outputStream* log = &ls;
387 log->print_cr("L1 data cache line size: %u", L1_data_cache_line_size());
388 log->print_cr("L2 data cache line size: %u", L2_data_cache_line_size());
389 log->print("Allocation");
390 if (AllocatePrefetchStyle <= 0) {
391 log->print(": no prefetching");
392 } else {
393 log->print(" prefetching: ");
394 if (AllocatePrefetchInstr == 0) {
395 log->print("PREFETCH");
396 } else if (AllocatePrefetchInstr == 1) {
397 log->print("BIS");
398 }
399 if (AllocatePrefetchLines > 1) {
400 log->print_cr(" at distance %d, %d lines of %d bytes", (int) AllocatePrefetchDistance, (int) AllocatePrefetchLines, (int) AllocatePrefetchStepSize);
401 } else {
402 log->print_cr(" at distance %d, one line of %d bytes", (int) AllocatePrefetchDistance, (int) AllocatePrefetchStepSize);
403 }
404 }
405 if (PrefetchCopyIntervalInBytes > 0) {
406 log->print_cr("PrefetchCopyIntervalInBytes %d", (int) PrefetchCopyIntervalInBytes);
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