632 case T_OBJECT: {
633 if (patch_code != lir_patch_none) {
634 jobject2reg_with_patching(dest->as_register(), info);
635 } else {
636 __ movoop(dest->as_register(), c->as_jobject());
637 }
638 break;
639 }
640
641 case T_METADATA: {
642 if (patch_code != lir_patch_none) {
643 klass2reg_with_patching(dest->as_register(), info);
644 } else {
645 __ mov_metadata(dest->as_register(), c->as_metadata());
646 }
647 break;
648 }
649
650 case T_FLOAT: {
651 if (dest->is_single_xmm()) {
652 if (LP64_ONLY(UseAVX < 2 &&) c->is_zero_float()) {
653 __ xorps(dest->as_xmm_float_reg(), dest->as_xmm_float_reg());
654 } else {
655 __ movflt(dest->as_xmm_float_reg(),
656 InternalAddress(float_constant(c->as_jfloat())));
657 }
658 } else {
659 assert(dest->is_single_fpu(), "must be");
660 assert(dest->fpu_regnr() == 0, "dest must be TOS");
661 if (c->is_zero_float()) {
662 __ fldz();
663 } else if (c->is_one_float()) {
664 __ fld1();
665 } else {
666 __ fld_s (InternalAddress(float_constant(c->as_jfloat())));
667 }
668 }
669 break;
670 }
671
672 case T_DOUBLE: {
673 if (dest->is_double_xmm()) {
674 if (LP64_ONLY(UseAVX < 2 &&) c->is_zero_double()) {
675 __ xorpd(dest->as_xmm_double_reg(), dest->as_xmm_double_reg());
676 } else {
677 __ movdbl(dest->as_xmm_double_reg(),
678 InternalAddress(double_constant(c->as_jdouble())));
679 }
680 } else {
681 assert(dest->is_double_fpu(), "must be");
682 assert(dest->fpu_regnrLo() == 0, "dest must be TOS");
683 if (c->is_zero_double()) {
684 __ fldz();
685 } else if (c->is_one_double()) {
686 __ fld1();
687 } else {
688 __ fld_d (InternalAddress(double_constant(c->as_jdouble())));
689 }
690 }
691 break;
692 }
693
694 default:
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632 case T_OBJECT: {
633 if (patch_code != lir_patch_none) {
634 jobject2reg_with_patching(dest->as_register(), info);
635 } else {
636 __ movoop(dest->as_register(), c->as_jobject());
637 }
638 break;
639 }
640
641 case T_METADATA: {
642 if (patch_code != lir_patch_none) {
643 klass2reg_with_patching(dest->as_register(), info);
644 } else {
645 __ mov_metadata(dest->as_register(), c->as_metadata());
646 }
647 break;
648 }
649
650 case T_FLOAT: {
651 if (dest->is_single_xmm()) {
652 if (LP64_ONLY(UseAVX <= 2 &&) c->is_zero_float()) {
653 __ xorps(dest->as_xmm_float_reg(), dest->as_xmm_float_reg());
654 } else {
655 __ movflt(dest->as_xmm_float_reg(),
656 InternalAddress(float_constant(c->as_jfloat())));
657 }
658 } else {
659 assert(dest->is_single_fpu(), "must be");
660 assert(dest->fpu_regnr() == 0, "dest must be TOS");
661 if (c->is_zero_float()) {
662 __ fldz();
663 } else if (c->is_one_float()) {
664 __ fld1();
665 } else {
666 __ fld_s (InternalAddress(float_constant(c->as_jfloat())));
667 }
668 }
669 break;
670 }
671
672 case T_DOUBLE: {
673 if (dest->is_double_xmm()) {
674 if (LP64_ONLY(UseAVX <= 2 &&) c->is_zero_double()) {
675 __ xorpd(dest->as_xmm_double_reg(), dest->as_xmm_double_reg());
676 } else {
677 __ movdbl(dest->as_xmm_double_reg(),
678 InternalAddress(double_constant(c->as_jdouble())));
679 }
680 } else {
681 assert(dest->is_double_fpu(), "must be");
682 assert(dest->fpu_regnrLo() == 0, "dest must be TOS");
683 if (c->is_zero_double()) {
684 __ fldz();
685 } else if (c->is_one_double()) {
686 __ fld1();
687 } else {
688 __ fld_d (InternalAddress(double_constant(c->as_jdouble())));
689 }
690 }
691 break;
692 }
693
694 default:
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