src/hotspot/cpu/x86/x86_32.ad

@@ -4375,10 +4375,28 @@
 %}
 
 opclass load_long_memory(load_long_indirect, load_long_indOffset32);
 
 
+operand legRegF() %{
+  predicate( UseSSE>=1 );
+  constraint(ALLOC_IN_RC(float_reg_legacy));
+  match(RegF);
+  format %{ %}
+  interface(REG_INTER);
+%}
+
+operand legRegD() %{
+  predicate( UseSSE>=2 );
+  constraint(ALLOC_IN_RC(double_reg_legacy));
+  match(RegD);
+  format %{ %}
+  interface(REG_INTER);
+%}
+
+
+
 //----------Special Memory Operands--------------------------------------------
 // Stack Slot Operand - This operand is used for loading and storing temporary
 //                      values on the stack where a match requires a value to
 //                      flow through memory.
 operand stackSlotP(sRegP reg) %{

@@ -5980,10 +5998,36 @@
   %}
   ins_pipe( pipe_slow );
 %}
 
 // Load Float
+instruct MoveF2LEG(legRegF dst, regF src) %{
+  match(Set dst src);
+  format %{ "movss $dst,$src\t! if src != dst load float (4 bytes)" %}
+  ins_encode %{
+    if ($dst$$reg != $src$$reg) {
+    __ movflt($dst$$XMMRegister, $src$$XMMRegister);
+    }
+  %}
+  ins_pipe( fpu_reg_reg );
+%}
+
+// Load Float
+instruct MoveLEG2F(regF dst, legRegF src) %{
+  match(Set dst src);
+  format %{ "movss $dst,$src\t! if src != dst load float (4 bytes)" %}
+  ins_encode %{
+    if ($dst$$reg != $src$$reg) {
+      __ movflt($dst$$XMMRegister, $src$$XMMRegister);
+    }
+  %}
+  ins_pipe( fpu_reg_reg );
+%}
+
+
+
+// Load Float
 instruct loadFPR(regFPR dst, memory mem) %{
   predicate(UseSSE==0);
   match(Set dst (LoadF mem));
 
   ins_cost(150);

@@ -6210,10 +6254,35 @@
     __ movdbl($dst$$XMMRegister, $constantaddress($con));
   %}
   ins_pipe(pipe_slow);
 %}
 
+// Load Double
+instruct MoveD2LEG(legRegD dst, regD src) %{
+  match(Set dst src);
+  format %{ "movsd $dst,$src\t! if src != dst load double (8 bytes)" %}
+  ins_encode %{
+    if ($dst$$reg != $src$$reg) {
+      __ movdbl($dst$$XMMRegister, $src$$XMMRegister);
+    }
+  %}
+  ins_pipe( fpu_reg_reg );
+%}
+
+// Load Double
+instruct MoveLEG2D(regD dst, legRegD src) %{
+  match(Set dst src);
+  format %{ "movsd $dst,$src\t! if src != dst load double (8 bytes)" %}
+  ins_encode %{
+    if ($dst$$reg != $src$$reg) {
+    __ movdbl($dst$$XMMRegister, $src$$XMMRegister);
+    }
+  %}
+  ins_pipe( fpu_reg_reg );
+%}
+
+
 // The instruction usage is guarded by predicate in operand immD0().
 instruct loadConD0(regD dst, immD0 src) %{
   match(Set dst src);
   ins_cost(100);
   format %{ "XORPD  $dst,$dst\t# double 0.0" %}