1603 MachNode *mach = n->as_Mach();
1604 inp = mach->operand_index(inp);
1605 Node *src = n->in(inp); // Value to load or store
1606 LRG &lrg_cisc = lrgs(_lrg_map.find_const(src));
1607 OptoReg::Name src_reg = lrg_cisc.reg();
1608 // Doubles record the HIGH register of an adjacent pair.
1609 src_reg = OptoReg::add(src_reg,1-lrg_cisc.num_regs());
1610 if( OptoReg::is_stack(src_reg) ) { // If input is on stack
1611 // This is a CISC Spill, get stack offset and construct new node
1612 #ifndef PRODUCT
1613 if( TraceCISCSpill ) {
1614 tty->print(" reg-instr: ");
1615 n->dump();
1616 }
1617 #endif
1618 int stk_offset = reg2offset(src_reg);
1619 // Bailout if we might exceed node limit when spilling this instruction
1620 C->check_node_count(0, "out of nodes fixing spills");
1621 if (C->failing()) return;
1622 // Transform node
1623 MachNode *cisc = mach->cisc_version(stk_offset, C)->as_Mach();
1624 cisc->set_req(inp,fp); // Base register is frame pointer
1625 if( cisc->oper_input_base() > 1 && mach->oper_input_base() <= 1 ) {
1626 assert( cisc->oper_input_base() == 2, "Only adding one edge");
1627 cisc->ins_req(1,src); // Requires a memory edge
1628 }
1629 block->map_node(cisc, j); // Insert into basic block
1630 n->subsume_by(cisc, C); // Correct graph
1631 //
1632 ++_used_cisc_instructions;
1633 #ifndef PRODUCT
1634 if( TraceCISCSpill ) {
1635 tty->print(" cisc-instr: ");
1636 cisc->dump();
1637 }
1638 #endif
1639 } else {
1640 #ifndef PRODUCT
1641 if( TraceCISCSpill ) {
1642 tty->print(" using reg-instr: ");
1643 n->dump();
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1603 MachNode *mach = n->as_Mach();
1604 inp = mach->operand_index(inp);
1605 Node *src = n->in(inp); // Value to load or store
1606 LRG &lrg_cisc = lrgs(_lrg_map.find_const(src));
1607 OptoReg::Name src_reg = lrg_cisc.reg();
1608 // Doubles record the HIGH register of an adjacent pair.
1609 src_reg = OptoReg::add(src_reg,1-lrg_cisc.num_regs());
1610 if( OptoReg::is_stack(src_reg) ) { // If input is on stack
1611 // This is a CISC Spill, get stack offset and construct new node
1612 #ifndef PRODUCT
1613 if( TraceCISCSpill ) {
1614 tty->print(" reg-instr: ");
1615 n->dump();
1616 }
1617 #endif
1618 int stk_offset = reg2offset(src_reg);
1619 // Bailout if we might exceed node limit when spilling this instruction
1620 C->check_node_count(0, "out of nodes fixing spills");
1621 if (C->failing()) return;
1622 // Transform node
1623 MachNode *cisc = mach->cisc_version(stk_offset)->as_Mach();
1624 cisc->set_req(inp,fp); // Base register is frame pointer
1625 if( cisc->oper_input_base() > 1 && mach->oper_input_base() <= 1 ) {
1626 assert( cisc->oper_input_base() == 2, "Only adding one edge");
1627 cisc->ins_req(1,src); // Requires a memory edge
1628 }
1629 block->map_node(cisc, j); // Insert into basic block
1630 n->subsume_by(cisc, C); // Correct graph
1631 //
1632 ++_used_cisc_instructions;
1633 #ifndef PRODUCT
1634 if( TraceCISCSpill ) {
1635 tty->print(" cisc-instr: ");
1636 cisc->dump();
1637 }
1638 #endif
1639 } else {
1640 #ifndef PRODUCT
1641 if( TraceCISCSpill ) {
1642 tty->print(" using reg-instr: ");
1643 n->dump();
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