src/cpu/x86/vm/vm_version_x86.cpp

@@ -656,11 +656,11 @@
         if (UseAESCTRIntrinsics && !FLAG_IS_DEFAULT(UseAESCTRIntrinsics)) {
           warning("AES-CTR intrinsics require UseAESIntrinsics flag to be enabled. Intrinsics will be disabled.");
           FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false);
         }
       } else {
-        if(supports_sse4_1() && UseSSE >= 4) {
+        if(supports_sse4_1()) {
           if (FLAG_IS_DEFAULT(UseAESCTRIntrinsics)) {
             FLAG_SET_DEFAULT(UseAESCTRIntrinsics, true);
           }
         } else {
            // The AES-CTR intrinsic stubs require AES instruction support (of course)

@@ -697,17 +697,17 @@
     if (!FLAG_IS_DEFAULT(UseCLMUL))
       warning("CLMUL instructions not available on this CPU (AVX may also be required)");
     FLAG_SET_DEFAULT(UseCLMUL, false);
   }
 
-  if (UseCLMUL && (UseSSE > 2)) {
+  if (UseCLMUL && supports_sse4_1()) {
     if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
       UseCRC32Intrinsics = true;
     }
   } else if (UseCRC32Intrinsics) {
     if (!FLAG_IS_DEFAULT(UseCRC32Intrinsics))
-      warning("CRC32 Intrinsics requires CLMUL instructions (not available on this CPU)");
+      warning("CRC32 intrinsics are not available on this CPU");
     FLAG_SET_DEFAULT(UseCRC32Intrinsics, false);
   }
 
   if (supports_sse4_2()) {
     if (FLAG_IS_DEFAULT(UseCRC32CIntrinsics)) {

@@ -968,11 +968,11 @@
         UseXmmI2D = true;
       } else {
         UseXmmI2D = false;
       }
     }
-    if (supports_sse4_2() && UseSSE >= 4) {
+    if (supports_sse4_2()) {
       if (FLAG_IS_DEFAULT(UseSSE42Intrinsics)) {
         FLAG_SET_DEFAULT(UseSSE42Intrinsics, true);
       }
     } else {
       if (UseSSE42Intrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) {

@@ -1048,11 +1048,11 @@
       if (supports_sse4_2() && supports_ht()) { // Newest Intel cpus
         if (FLAG_IS_DEFAULT(UseUnalignedLoadStores)) {
           UseUnalignedLoadStores = true; // use movdqu on newest Intel cpus
         }
       }
-      if (supports_sse4_2() && UseSSE >= 4) {
+      if (supports_sse4_2()) {
         if (FLAG_IS_DEFAULT(UseSSE42Intrinsics)) {
           FLAG_SET_DEFAULT(UseSSE42Intrinsics, true);
         }
       } else {
         if (UseSSE42Intrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) {