--- old/src/cpu/x86/vm/macroAssembler_x86.cpp	2016-06-01 15:46:38.353494953 +0200
+++ new/src/cpu/x86/vm/macroAssembler_x86.cpp	2016-06-01 15:46:38.281494957 +0200
@@ -10159,7 +10159,13 @@
   movdqa(xmm1, Address(buf, 0));
   movdl(rax, xmm1);
   xorl(crc, rax);
-  pinsrd(xmm1, crc, 0);
+  if (VM_Version::supports_sse4_1()) {
+    pinsrd(xmm1, crc, 0);
+  } else {
+    pinsrw(xmm1, crc, 0);
+    shrl(crc, 16);
+    pinsrw(xmm1, crc, 1);
+  }
   addptr(buf, 16);
   subl(len, 4); // len > 0
   jcc(Assembler::less, L_fold_tail);
--- old/src/cpu/x86/vm/vm_version_x86.cpp	2016-06-01 15:46:38.677494938 +0200
+++ new/src/cpu/x86/vm/vm_version_x86.cpp	2016-06-01 15:46:38.605494942 +0200
@@ -658,7 +658,7 @@
           FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false);
         }
       } else {
-        if(supports_sse4_1() && UseSSE >= 4) {
+        if(supports_sse4_1()) {
           if (FLAG_IS_DEFAULT(UseAESCTRIntrinsics)) {
             FLAG_SET_DEFAULT(UseAESCTRIntrinsics, true);
           }
@@ -970,7 +970,7 @@
         UseXmmI2D = false;
       }
     }
-    if (supports_sse4_2() && UseSSE >= 4) {
+    if (supports_sse4_2()) {
       if (FLAG_IS_DEFAULT(UseSSE42Intrinsics)) {
         FLAG_SET_DEFAULT(UseSSE42Intrinsics, true);
       }
@@ -1050,7 +1050,7 @@
           UseUnalignedLoadStores = true; // use movdqu on newest Intel cpus
         }
       }
-      if (supports_sse4_2() && UseSSE >= 4) {
+      if (supports_sse4_2()) {
         if (FLAG_IS_DEFAULT(UseSSE42Intrinsics)) {
           FLAG_SET_DEFAULT(UseSSE42Intrinsics, true);
         }
--- /dev/null	2016-06-01 07:38:12.800063956 +0200
+++ new/test/compiler/cpuflags/TestSSE4Disabled.java	2016-06-01 15:46:38.925494927 +0200
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2016, Oracle and/or its affiliates. All rights reserved.
+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
+ *
+ * This code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 only, as
+ * published by the Free Software Foundation.
+ *
+ * This code is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * version 2 for more details (a copy is included in the LICENSE file that
+ * accompanied this code).
+ *
+ * You should have received a copy of the GNU General Public License version
+ * 2 along with this work; if not, write to the Free Software Foundation,
+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
+ * or visit www.oracle.com if you need additional information or have any
+ * questions.
+ *
+ */
+
+/*
+ * @test TestSSE4Disabled
+ * @bug 8158214
+ * @requires (os.simpleArch == "x64")
+ * @summary Test correct execution without SSE 4.
+ * @run main/othervm -Xcomp -XX:UseSSE=3 TestSSE4Disabled
+ */
+public class TestSSE4Disabled {
+    public static void main(String args[]) {
+        System.out.println("Passed");
+    }
+}
+