1 /*
2 * Copyright (c) 2000, 2016, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_InstructionPrinter.hpp"
27 #include "c1/c1_LIR.hpp"
28 #include "c1/c1_LIRAssembler.hpp"
29 #include "c1/c1_ValueStack.hpp"
30 #include "ci/ciInstance.hpp"
31 #include "runtime/sharedRuntime.hpp"
32
33 Register LIR_OprDesc::as_register() const {
34 return FrameMap::cpu_rnr2reg(cpu_regnr());
35 }
36
37 Register LIR_OprDesc::as_register_lo() const {
38 return FrameMap::cpu_rnr2reg(cpu_regnrLo());
39 }
40
41 Register LIR_OprDesc::as_register_hi() const {
42 return FrameMap::cpu_rnr2reg(cpu_regnrHi());
43 }
44
45 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
46
47 LIR_Opr LIR_OprFact::value_type(ValueType* type) {
48 ValueTag tag = type->tag();
49 switch (tag) {
50 case metaDataTag : {
51 ClassConstant* c = type->as_ClassConstant();
52 if (c != NULL && !c->value()->is_loaded()) {
53 return LIR_OprFact::metadataConst(NULL);
54 } else if (c != NULL) {
55 return LIR_OprFact::metadataConst(c->value()->constant_encoding());
56 } else {
57 MethodConstant* m = type->as_MethodConstant();
58 assert (m != NULL, "not a class or a method?");
59 return LIR_OprFact::metadataConst(m->value()->constant_encoding());
60 }
61 }
62 case objectTag : {
63 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding());
64 }
65 case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value());
66 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value());
67 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value());
68 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value());
69 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value());
70 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
71 }
72 }
73
74
75 LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) {
76 switch (type->tag()) {
77 case objectTag: return LIR_OprFact::oopConst(NULL);
78 case addressTag:return LIR_OprFact::addressConst(0);
79 case intTag: return LIR_OprFact::intConst(0);
80 case floatTag: return LIR_OprFact::floatConst(0.0);
81 case longTag: return LIR_OprFact::longConst(0);
82 case doubleTag: return LIR_OprFact::doubleConst(0.0);
83 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
84 }
85 return illegalOpr;
86 }
87
88
89
90 //---------------------------------------------------
91
92
93 LIR_Address::Scale LIR_Address::scale(BasicType type) {
94 int elem_size = type2aelembytes(type);
95 switch (elem_size) {
96 case 1: return LIR_Address::times_1;
97 case 2: return LIR_Address::times_2;
98 case 4: return LIR_Address::times_4;
99 case 8: return LIR_Address::times_8;
100 }
101 ShouldNotReachHere();
102 return LIR_Address::times_1;
103 }
104
105 //---------------------------------------------------
106
107 char LIR_OprDesc::type_char(BasicType t) {
108 switch (t) {
109 case T_ARRAY:
110 t = T_OBJECT;
111 case T_BOOLEAN:
112 case T_CHAR:
113 case T_FLOAT:
114 case T_DOUBLE:
115 case T_BYTE:
116 case T_SHORT:
117 case T_INT:
118 case T_LONG:
119 case T_OBJECT:
120 case T_ADDRESS:
121 case T_VOID:
122 return ::type2char(t);
123 case T_METADATA:
124 return 'M';
125 case T_ILLEGAL:
126 return '?';
127
128 default:
129 ShouldNotReachHere();
130 return '?';
131 }
132 }
133
134 #ifndef PRODUCT
135 void LIR_OprDesc::validate_type() const {
136
137 #ifdef ASSERT
138 if (!is_pointer() && !is_illegal()) {
139 OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160
140 switch (as_BasicType(type_field())) {
141 case T_LONG:
142 assert((kindfield == cpu_register || kindfield == stack_value) &&
143 size_field() == double_size, "must match");
144 break;
145 case T_FLOAT:
146 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
147 assert((kindfield == fpu_register || kindfield == stack_value
148 ARM_ONLY(|| kindfield == cpu_register)
149 PPC32_ONLY(|| kindfield == cpu_register) ) &&
150 size_field() == single_size, "must match");
151 break;
152 case T_DOUBLE:
153 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
154 assert((kindfield == fpu_register || kindfield == stack_value
155 ARM_ONLY(|| kindfield == cpu_register)
156 PPC32_ONLY(|| kindfield == cpu_register) ) &&
157 size_field() == double_size, "must match");
158 break;
159 case T_BOOLEAN:
160 case T_CHAR:
161 case T_BYTE:
162 case T_SHORT:
163 case T_INT:
164 case T_ADDRESS:
165 case T_OBJECT:
166 case T_METADATA:
167 case T_ARRAY:
168 assert((kindfield == cpu_register || kindfield == stack_value) &&
169 size_field() == single_size, "must match");
170 break;
171
172 case T_ILLEGAL:
173 // XXX TKR also means unknown right now
174 // assert(is_illegal(), "must match");
175 break;
176
177 default:
178 ShouldNotReachHere();
179 }
180 }
181 #endif
182
183 }
184 #endif // PRODUCT
185
186
187 bool LIR_OprDesc::is_oop() const {
188 if (is_pointer()) {
189 return pointer()->is_oop_pointer();
190 } else {
191 OprType t= type_field();
192 assert(t != unknown_type, "not set");
193 return t == object_type;
194 }
195 }
196
197
198
199 void LIR_Op2::verify() const {
200 #ifdef ASSERT
201 switch (code()) {
202 case lir_cmove:
203 case lir_xchg:
204 break;
205
206 default:
207 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
208 "can't produce oops from arith");
209 }
210
211 if (TwoOperandLIRForm) {
212 switch (code()) {
213 case lir_add:
214 case lir_sub:
215 case lir_mul:
216 case lir_mul_strictfp:
217 case lir_div:
218 case lir_div_strictfp:
219 case lir_rem:
220 case lir_logic_and:
221 case lir_logic_or:
222 case lir_logic_xor:
223 case lir_shl:
224 case lir_shr:
225 assert(in_opr1() == result_opr(), "opr1 and result must match");
226 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
227 break;
228
229 // special handling for lir_ushr because of write barriers
230 case lir_ushr:
231 assert(in_opr1() == result_opr() || in_opr2()->is_constant(), "opr1 and result must match or shift count is constant");
232 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
233 break;
234
235 }
236 }
237 #endif
238 }
239
240
241 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block)
242 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
243 , _cond(cond)
244 , _type(type)
245 , _label(block->label())
246 , _block(block)
247 , _ublock(NULL)
248 , _stub(NULL) {
249 }
250
251 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) :
252 LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
253 , _cond(cond)
254 , _type(type)
255 , _label(stub->entry())
256 , _block(NULL)
257 , _ublock(NULL)
258 , _stub(stub) {
259 }
260
261 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock)
262 : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
263 , _cond(cond)
264 , _type(type)
265 , _label(block->label())
266 , _block(block)
267 , _ublock(ublock)
268 , _stub(NULL)
269 {
270 }
271
272 void LIR_OpBranch::change_block(BlockBegin* b) {
273 assert(_block != NULL, "must have old block");
274 assert(_block->label() == label(), "must be equal");
275
276 _block = b;
277 _label = b->label();
278 }
279
280 void LIR_OpBranch::change_ublock(BlockBegin* b) {
281 assert(_ublock != NULL, "must have old block");
282 _ublock = b;
283 }
284
285 void LIR_OpBranch::negate_cond() {
286 switch (_cond) {
287 case lir_cond_equal: _cond = lir_cond_notEqual; break;
288 case lir_cond_notEqual: _cond = lir_cond_equal; break;
289 case lir_cond_less: _cond = lir_cond_greaterEqual; break;
290 case lir_cond_lessEqual: _cond = lir_cond_greater; break;
291 case lir_cond_greaterEqual: _cond = lir_cond_less; break;
292 case lir_cond_greater: _cond = lir_cond_lessEqual; break;
293 default: ShouldNotReachHere();
294 }
295 }
296
297
298 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
299 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
300 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
301 CodeStub* stub)
302
303 : LIR_Op(code, result, NULL)
304 , _object(object)
305 , _array(LIR_OprFact::illegalOpr)
306 , _klass(klass)
307 , _tmp1(tmp1)
308 , _tmp2(tmp2)
309 , _tmp3(tmp3)
310 , _fast_check(fast_check)
311 , _stub(stub)
312 , _info_for_patch(info_for_patch)
313 , _info_for_exception(info_for_exception)
314 , _profiled_method(NULL)
315 , _profiled_bci(-1)
316 , _should_profile(false)
317 {
318 if (code == lir_checkcast) {
319 assert(info_for_exception != NULL, "checkcast throws exceptions");
320 } else if (code == lir_instanceof) {
321 assert(info_for_exception == NULL, "instanceof throws no exceptions");
322 } else {
323 ShouldNotReachHere();
324 }
325 }
326
327
328
329 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception)
330 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL)
331 , _object(object)
332 , _array(array)
333 , _klass(NULL)
334 , _tmp1(tmp1)
335 , _tmp2(tmp2)
336 , _tmp3(tmp3)
337 , _fast_check(false)
338 , _stub(NULL)
339 , _info_for_patch(NULL)
340 , _info_for_exception(info_for_exception)
341 , _profiled_method(NULL)
342 , _profiled_bci(-1)
343 , _should_profile(false)
344 {
345 if (code == lir_store_check) {
346 _stub = new ArrayStoreExceptionStub(object, info_for_exception);
347 assert(info_for_exception != NULL, "store_check throws exceptions");
348 } else {
349 ShouldNotReachHere();
350 }
351 }
352
353
354 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length,
355 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info)
356 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info)
357 , _tmp(tmp)
358 , _src(src)
359 , _src_pos(src_pos)
360 , _dst(dst)
361 , _dst_pos(dst_pos)
362 , _flags(flags)
363 , _expected_type(expected_type)
364 , _length(length) {
365 _stub = new ArrayCopyStub(this);
366 }
367
368 LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res)
369 : LIR_Op(lir_updatecrc32, res, NULL)
370 , _crc(crc)
371 , _val(val) {
372 }
373
374 //-------------------verify--------------------------
375
376 void LIR_Op1::verify() const {
377 switch(code()) {
378 case lir_move:
379 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be");
380 break;
381 case lir_null_check:
382 assert(in_opr()->is_register(), "must be");
383 break;
384 case lir_return:
385 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be");
386 break;
387 }
388 }
389
390 void LIR_OpRTCall::verify() const {
391 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function");
392 }
393
394 //-------------------visits--------------------------
395
396 // complete rework of LIR instruction visitor.
397 // The virtual call for each instruction type is replaced by a big
398 // switch that adds the operands for each instruction
399
400 void LIR_OpVisitState::visit(LIR_Op* op) {
401 // copy information from the LIR_Op
402 reset();
403 set_op(op);
404
405 switch (op->code()) {
406
407 // LIR_Op0
408 case lir_word_align: // result and info always invalid
409 case lir_backwardbranch_target: // result and info always invalid
410 case lir_build_frame: // result and info always invalid
411 case lir_fpop_raw: // result and info always invalid
412 case lir_24bit_FPU: // result and info always invalid
413 case lir_reset_FPU: // result and info always invalid
414 case lir_breakpoint: // result and info always invalid
415 case lir_membar: // result and info always invalid
416 case lir_membar_acquire: // result and info always invalid
417 case lir_membar_release: // result and info always invalid
418 case lir_membar_loadload: // result and info always invalid
419 case lir_membar_storestore: // result and info always invalid
420 case lir_membar_loadstore: // result and info always invalid
421 case lir_membar_storeload: // result and info always invalid
422 case lir_on_spin_wait:
423 {
424 assert(op->as_Op0() != NULL, "must be");
425 assert(op->_info == NULL, "info not used by this instruction");
426 assert(op->_result->is_illegal(), "not used");
427 break;
428 }
429
430 case lir_nop: // may have info, result always invalid
431 case lir_std_entry: // may have result, info always invalid
432 case lir_osr_entry: // may have result, info always invalid
433 case lir_get_thread: // may have result, info always invalid
434 {
435 assert(op->as_Op0() != NULL, "must be");
436 if (op->_info != NULL) do_info(op->_info);
437 if (op->_result->is_valid()) do_output(op->_result);
438 break;
439 }
440
441
442 // LIR_OpLabel
443 case lir_label: // result and info always invalid
444 {
445 assert(op->as_OpLabel() != NULL, "must be");
446 assert(op->_info == NULL, "info not used by this instruction");
447 assert(op->_result->is_illegal(), "not used");
448 break;
449 }
450
451
452 // LIR_Op1
453 case lir_fxch: // input always valid, result and info always invalid
454 case lir_fld: // input always valid, result and info always invalid
455 case lir_ffree: // input always valid, result and info always invalid
456 case lir_push: // input always valid, result and info always invalid
457 case lir_pop: // input always valid, result and info always invalid
458 case lir_return: // input always valid, result and info always invalid
459 case lir_leal: // input and result always valid, info always invalid
460 case lir_neg: // input and result always valid, info always invalid
461 case lir_monaddr: // input and result always valid, info always invalid
462 case lir_null_check: // input and info always valid, result always invalid
463 case lir_move: // input and result always valid, may have info
464 case lir_pack64: // input and result always valid
465 case lir_unpack64: // input and result always valid
466 {
467 assert(op->as_Op1() != NULL, "must be");
468 LIR_Op1* op1 = (LIR_Op1*)op;
469
470 if (op1->_info) do_info(op1->_info);
471 if (op1->_opr->is_valid()) do_input(op1->_opr);
472 if (op1->_result->is_valid()) do_output(op1->_result);
473
474 break;
475 }
476
477 case lir_safepoint:
478 {
479 assert(op->as_Op1() != NULL, "must be");
480 LIR_Op1* op1 = (LIR_Op1*)op;
481
482 assert(op1->_info != NULL, ""); do_info(op1->_info);
483 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register
484 assert(op1->_result->is_illegal(), "safepoint does not produce value");
485
486 break;
487 }
488
489 // LIR_OpConvert;
490 case lir_convert: // input and result always valid, info always invalid
491 {
492 assert(op->as_OpConvert() != NULL, "must be");
493 LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
494
495 assert(opConvert->_info == NULL, "must be");
496 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr);
497 if (opConvert->_result->is_valid()) do_output(opConvert->_result);
498 #ifdef PPC32
499 if (opConvert->_tmp1->is_valid()) do_temp(opConvert->_tmp1);
500 if (opConvert->_tmp2->is_valid()) do_temp(opConvert->_tmp2);
501 #endif
502 do_stub(opConvert->_stub);
503
504 break;
505 }
506
507 // LIR_OpBranch;
508 case lir_branch: // may have info, input and result register always invalid
509 case lir_cond_float_branch: // may have info, input and result register always invalid
510 {
511 assert(op->as_OpBranch() != NULL, "must be");
512 LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
513
514 if (opBranch->_info != NULL) do_info(opBranch->_info);
515 assert(opBranch->_result->is_illegal(), "not used");
516 if (opBranch->_stub != NULL) opBranch->stub()->visit(this);
517
518 break;
519 }
520
521
522 // LIR_OpAllocObj
523 case lir_alloc_object:
524 {
525 assert(op->as_OpAllocObj() != NULL, "must be");
526 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
527
528 if (opAllocObj->_info) do_info(opAllocObj->_info);
529 if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr);
530 do_temp(opAllocObj->_opr);
531 }
532 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1);
533 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2);
534 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3);
535 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4);
536 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result);
537 do_stub(opAllocObj->_stub);
538 break;
539 }
540
541
542 // LIR_OpRoundFP;
543 case lir_roundfp: {
544 assert(op->as_OpRoundFP() != NULL, "must be");
545 LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op;
546
547 assert(op->_info == NULL, "info not used by this instruction");
548 assert(opRoundFP->_tmp->is_illegal(), "not used");
549 do_input(opRoundFP->_opr);
550 do_output(opRoundFP->_result);
551
552 break;
553 }
554
555
556 // LIR_Op2
557 case lir_cmp:
558 case lir_cmp_l2i:
559 case lir_ucmp_fd2i:
560 case lir_cmp_fd2i:
561 case lir_add:
562 case lir_sub:
563 case lir_mul:
564 case lir_div:
565 case lir_rem:
566 case lir_sqrt:
567 case lir_abs:
568 case lir_logic_and:
569 case lir_logic_or:
570 case lir_logic_xor:
571 case lir_shl:
572 case lir_shr:
573 case lir_ushr:
574 case lir_xadd:
575 case lir_xchg:
576 case lir_assert:
577 {
578 assert(op->as_Op2() != NULL, "must be");
579 LIR_Op2* op2 = (LIR_Op2*)op;
580 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
581 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
582
583 if (op2->_info) do_info(op2->_info);
584 if (op2->_opr1->is_valid()) do_input(op2->_opr1);
585 if (op2->_opr2->is_valid()) do_input(op2->_opr2);
586 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
587 if (op2->_result->is_valid()) do_output(op2->_result);
588 if (op->code() == lir_xchg || op->code() == lir_xadd) {
589 // on ARM and PPC, return value is loaded first so could
590 // destroy inputs. On other platforms that implement those
591 // (x86, sparc), the extra constrainsts are harmless.
592 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
593 if (op2->_opr2->is_valid()) do_temp(op2->_opr2);
594 }
595
596 break;
597 }
598
599 // special handling for cmove: right input operand must not be equal
600 // to the result operand, otherwise the backend fails
601 case lir_cmove:
602 {
603 assert(op->as_Op2() != NULL, "must be");
604 LIR_Op2* op2 = (LIR_Op2*)op;
605
606 assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() &&
607 op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
608 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used");
609
610 do_input(op2->_opr1);
611 do_input(op2->_opr2);
612 do_temp(op2->_opr2);
613 do_output(op2->_result);
614
615 break;
616 }
617
618 // vspecial handling for strict operations: register input operands
619 // as temp to guarantee that they do not overlap with other
620 // registers
621 case lir_mul_strictfp:
622 case lir_div_strictfp:
623 {
624 assert(op->as_Op2() != NULL, "must be");
625 LIR_Op2* op2 = (LIR_Op2*)op;
626
627 assert(op2->_info == NULL, "not used");
628 assert(op2->_opr1->is_valid(), "used");
629 assert(op2->_opr2->is_valid(), "used");
630 assert(op2->_result->is_valid(), "used");
631 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
632 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
633
634 do_input(op2->_opr1); do_temp(op2->_opr1);
635 do_input(op2->_opr2); do_temp(op2->_opr2);
636 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
637 do_output(op2->_result);
638
639 break;
640 }
641
642 case lir_throw: {
643 assert(op->as_Op2() != NULL, "must be");
644 LIR_Op2* op2 = (LIR_Op2*)op;
645
646 if (op2->_info) do_info(op2->_info);
647 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
648 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter
649 assert(op2->_result->is_illegal(), "no result");
650 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
651 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
652
653 break;
654 }
655
656 case lir_unwind: {
657 assert(op->as_Op1() != NULL, "must be");
658 LIR_Op1* op1 = (LIR_Op1*)op;
659
660 assert(op1->_info == NULL, "no info");
661 assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr);
662 assert(op1->_result->is_illegal(), "no result");
663
664 break;
665 }
666
667 // LIR_Op3
668 case lir_idiv:
669 case lir_irem: {
670 assert(op->as_Op3() != NULL, "must be");
671 LIR_Op3* op3= (LIR_Op3*)op;
672
673 if (op3->_info) do_info(op3->_info);
674 if (op3->_opr1->is_valid()) do_input(op3->_opr1);
675
676 // second operand is input and temp, so ensure that second operand
677 // and third operand get not the same register
678 if (op3->_opr2->is_valid()) do_input(op3->_opr2);
679 if (op3->_opr2->is_valid()) do_temp(op3->_opr2);
680 if (op3->_opr3->is_valid()) do_temp(op3->_opr3);
681
682 if (op3->_result->is_valid()) do_output(op3->_result);
683
684 break;
685 }
686
687
688 // LIR_OpJavaCall
689 case lir_static_call:
690 case lir_optvirtual_call:
691 case lir_icvirtual_call:
692 case lir_virtual_call:
693 case lir_dynamic_call: {
694 LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall();
695 assert(opJavaCall != NULL, "must be");
696
697 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver);
698
699 // only visit register parameters
700 int n = opJavaCall->_arguments->length();
701 for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) {
702 if (!opJavaCall->_arguments->at(i)->is_pointer()) {
703 do_input(*opJavaCall->_arguments->adr_at(i));
704 }
705 }
706
707 if (opJavaCall->_info) do_info(opJavaCall->_info);
708 if (FrameMap::method_handle_invoke_SP_save_opr() != LIR_OprFact::illegalOpr &&
709 opJavaCall->is_method_handle_invoke()) {
710 opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr();
711 do_temp(opJavaCall->_method_handle_invoke_SP_save_opr);
712 }
713 do_call();
714 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result);
715
716 break;
717 }
718
719
720 // LIR_OpRTCall
721 case lir_rtcall: {
722 assert(op->as_OpRTCall() != NULL, "must be");
723 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op;
724
725 // only visit register parameters
726 int n = opRTCall->_arguments->length();
727 for (int i = 0; i < n; i++) {
728 if (!opRTCall->_arguments->at(i)->is_pointer()) {
729 do_input(*opRTCall->_arguments->adr_at(i));
730 }
731 }
732 if (opRTCall->_info) do_info(opRTCall->_info);
733 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp);
734 do_call();
735 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result);
736
737 break;
738 }
739
740
741 // LIR_OpArrayCopy
742 case lir_arraycopy: {
743 assert(op->as_OpArrayCopy() != NULL, "must be");
744 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op;
745
746 assert(opArrayCopy->_result->is_illegal(), "unused");
747 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src);
748 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos);
749 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst);
750 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos);
751 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length);
752 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp);
753 if (opArrayCopy->_info) do_info(opArrayCopy->_info);
754
755 // the implementation of arraycopy always has a call into the runtime
756 do_call();
757
758 break;
759 }
760
761
762 // LIR_OpUpdateCRC32
763 case lir_updatecrc32: {
764 assert(op->as_OpUpdateCRC32() != NULL, "must be");
765 LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op;
766
767 assert(opUp->_crc->is_valid(), "used"); do_input(opUp->_crc); do_temp(opUp->_crc);
768 assert(opUp->_val->is_valid(), "used"); do_input(opUp->_val); do_temp(opUp->_val);
769 assert(opUp->_result->is_valid(), "used"); do_output(opUp->_result);
770 assert(opUp->_info == NULL, "no info for LIR_OpUpdateCRC32");
771
772 break;
773 }
774
775
776 // LIR_OpLock
777 case lir_lock:
778 case lir_unlock: {
779 assert(op->as_OpLock() != NULL, "must be");
780 LIR_OpLock* opLock = (LIR_OpLock*)op;
781
782 if (opLock->_info) do_info(opLock->_info);
783
784 // TODO: check if these operands really have to be temp
785 // (or if input is sufficient). This may have influence on the oop map!
786 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock);
787 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr);
788 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj);
789
790 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch);
791 assert(opLock->_result->is_illegal(), "unused");
792
793 do_stub(opLock->_stub);
794
795 break;
796 }
797
798
799 // LIR_OpDelay
800 case lir_delay_slot: {
801 assert(op->as_OpDelay() != NULL, "must be");
802 LIR_OpDelay* opDelay = (LIR_OpDelay*)op;
803
804 visit(opDelay->delay_op());
805 break;
806 }
807
808 // LIR_OpTypeCheck
809 case lir_instanceof:
810 case lir_checkcast:
811 case lir_store_check: {
812 assert(op->as_OpTypeCheck() != NULL, "must be");
813 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op;
814
815 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception);
816 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch);
817 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object);
818 if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) {
819 do_temp(opTypeCheck->_object);
820 }
821 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array);
822 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1);
823 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2);
824 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3);
825 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result);
826 do_stub(opTypeCheck->_stub);
827 break;
828 }
829
830 // LIR_OpCompareAndSwap
831 case lir_cas_long:
832 case lir_cas_obj:
833 case lir_cas_int: {
834 assert(op->as_OpCompareAndSwap() != NULL, "must be");
835 LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op;
836
837 assert(opCompareAndSwap->_addr->is_valid(), "used");
838 assert(opCompareAndSwap->_cmp_value->is_valid(), "used");
839 assert(opCompareAndSwap->_new_value->is_valid(), "used");
840 if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info);
841 do_input(opCompareAndSwap->_addr);
842 do_temp(opCompareAndSwap->_addr);
843 do_input(opCompareAndSwap->_cmp_value);
844 do_temp(opCompareAndSwap->_cmp_value);
845 do_input(opCompareAndSwap->_new_value);
846 do_temp(opCompareAndSwap->_new_value);
847 if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1);
848 if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2);
849 if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result);
850
851 break;
852 }
853
854
855 // LIR_OpAllocArray;
856 case lir_alloc_array: {
857 assert(op->as_OpAllocArray() != NULL, "must be");
858 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op;
859
860 if (opAllocArray->_info) do_info(opAllocArray->_info);
861 if (opAllocArray->_klass->is_valid()) do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass);
862 if (opAllocArray->_len->is_valid()) do_input(opAllocArray->_len); do_temp(opAllocArray->_len);
863 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1);
864 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2);
865 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3);
866 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4);
867 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result);
868 do_stub(opAllocArray->_stub);
869 break;
870 }
871
872 // LIR_OpProfileCall:
873 case lir_profile_call: {
874 assert(op->as_OpProfileCall() != NULL, "must be");
875 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op;
876
877 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv);
878 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo);
879 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1);
880 break;
881 }
882
883 // LIR_OpProfileType:
884 case lir_profile_type: {
885 assert(op->as_OpProfileType() != NULL, "must be");
886 LIR_OpProfileType* opProfileType = (LIR_OpProfileType*)op;
887
888 do_input(opProfileType->_mdp); do_temp(opProfileType->_mdp);
889 do_input(opProfileType->_obj);
890 do_temp(opProfileType->_tmp);
891 break;
892 }
893 default:
894 ShouldNotReachHere();
895 }
896 }
897
898
899 void LIR_OpVisitState::do_stub(CodeStub* stub) {
900 if (stub != NULL) {
901 stub->visit(this);
902 }
903 }
904
905 XHandlers* LIR_OpVisitState::all_xhandler() {
906 XHandlers* result = NULL;
907
908 int i;
909 for (i = 0; i < info_count(); i++) {
910 if (info_at(i)->exception_handlers() != NULL) {
911 result = info_at(i)->exception_handlers();
912 break;
913 }
914 }
915
916 #ifdef ASSERT
917 for (i = 0; i < info_count(); i++) {
918 assert(info_at(i)->exception_handlers() == NULL ||
919 info_at(i)->exception_handlers() == result,
920 "only one xhandler list allowed per LIR-operation");
921 }
922 #endif
923
924 if (result != NULL) {
925 return result;
926 } else {
927 return new XHandlers();
928 }
929
930 return result;
931 }
932
933
934 #ifdef ASSERT
935 bool LIR_OpVisitState::no_operands(LIR_Op* op) {
936 visit(op);
937
938 return opr_count(inputMode) == 0 &&
939 opr_count(outputMode) == 0 &&
940 opr_count(tempMode) == 0 &&
941 info_count() == 0 &&
942 !has_call() &&
943 !has_slow_case();
944 }
945 #endif
946
947 //---------------------------------------------------
948
949
950 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) {
951 masm->emit_call(this);
952 }
953
954 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) {
955 masm->emit_rtcall(this);
956 }
957
958 void LIR_OpLabel::emit_code(LIR_Assembler* masm) {
959 masm->emit_opLabel(this);
960 }
961
962 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) {
963 masm->emit_arraycopy(this);
964 masm->append_code_stub(stub());
965 }
966
967 void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) {
968 masm->emit_updatecrc32(this);
969 }
970
971 void LIR_Op0::emit_code(LIR_Assembler* masm) {
972 masm->emit_op0(this);
973 }
974
975 void LIR_Op1::emit_code(LIR_Assembler* masm) {
976 masm->emit_op1(this);
977 }
978
979 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) {
980 masm->emit_alloc_obj(this);
981 masm->append_code_stub(stub());
982 }
983
984 void LIR_OpBranch::emit_code(LIR_Assembler* masm) {
985 masm->emit_opBranch(this);
986 if (stub()) {
987 masm->append_code_stub(stub());
988 }
989 }
990
991 void LIR_OpConvert::emit_code(LIR_Assembler* masm) {
992 masm->emit_opConvert(this);
993 if (stub() != NULL) {
994 masm->append_code_stub(stub());
995 }
996 }
997
998 void LIR_Op2::emit_code(LIR_Assembler* masm) {
999 masm->emit_op2(this);
1000 }
1001
1002 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
1003 masm->emit_alloc_array(this);
1004 masm->append_code_stub(stub());
1005 }
1006
1007 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
1008 masm->emit_opTypeCheck(this);
1009 if (stub()) {
1010 masm->append_code_stub(stub());
1011 }
1012 }
1013
1014 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
1015 masm->emit_compare_and_swap(this);
1016 }
1017
1018 void LIR_Op3::emit_code(LIR_Assembler* masm) {
1019 masm->emit_op3(this);
1020 }
1021
1022 void LIR_OpLock::emit_code(LIR_Assembler* masm) {
1023 masm->emit_lock(this);
1024 if (stub()) {
1025 masm->append_code_stub(stub());
1026 }
1027 }
1028
1029 #ifdef ASSERT
1030 void LIR_OpAssert::emit_code(LIR_Assembler* masm) {
1031 masm->emit_assert(this);
1032 }
1033 #endif
1034
1035 void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
1036 masm->emit_delay(this);
1037 }
1038
1039 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
1040 masm->emit_profile_call(this);
1041 }
1042
1043 void LIR_OpProfileType::emit_code(LIR_Assembler* masm) {
1044 masm->emit_profile_type(this);
1045 }
1046
1047 // LIR_List
1048 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
1049 : _operations(8)
1050 , _compilation(compilation)
1051 #ifndef PRODUCT
1052 , _block(block)
1053 #endif
1054 #ifdef ASSERT
1055 , _file(NULL)
1056 , _line(0)
1057 #endif
1058 { }
1059
1060
1061 #ifdef ASSERT
1062 void LIR_List::set_file_and_line(const char * file, int line) {
1063 const char * f = strrchr(file, '/');
1064 if (f == NULL) f = strrchr(file, '\\');
1065 if (f == NULL) {
1066 f = file;
1067 } else {
1068 f++;
1069 }
1070 _file = f;
1071 _line = line;
1072 }
1073 #endif
1074
1075
1076 void LIR_List::append(LIR_InsertionBuffer* buffer) {
1077 assert(this == buffer->lir_list(), "wrong lir list");
1078 const int n = _operations.length();
1079
1080 if (buffer->number_of_ops() > 0) {
1081 // increase size of instructions list
1082 _operations.at_grow(n + buffer->number_of_ops() - 1, NULL);
1083 // insert ops from buffer into instructions list
1084 int op_index = buffer->number_of_ops() - 1;
1085 int ip_index = buffer->number_of_insertion_points() - 1;
1086 int from_index = n - 1;
1087 int to_index = _operations.length() - 1;
1088 for (; ip_index >= 0; ip_index --) {
1089 int index = buffer->index_at(ip_index);
1090 // make room after insertion point
1091 while (index < from_index) {
1092 _operations.at_put(to_index --, _operations.at(from_index --));
1093 }
1094 // insert ops from buffer
1095 for (int i = buffer->count_at(ip_index); i > 0; i --) {
1096 _operations.at_put(to_index --, buffer->op_at(op_index --));
1097 }
1098 }
1099 }
1100
1101 buffer->finish();
1102 }
1103
1104
1105 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) {
1106 assert(reg->type() == T_OBJECT, "bad reg");
1107 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info));
1108 }
1109
1110 void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) {
1111 assert(reg->type() == T_METADATA, "bad reg");
1112 append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info));
1113 }
1114
1115 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1116 append(new LIR_Op1(
1117 lir_move,
1118 LIR_OprFact::address(addr),
1119 src,
1120 addr->type(),
1121 patch_code,
1122 info));
1123 }
1124
1125
1126 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1127 append(new LIR_Op1(
1128 lir_move,
1129 LIR_OprFact::address(address),
1130 dst,
1131 address->type(),
1132 patch_code,
1133 info, lir_move_volatile));
1134 }
1135
1136 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1137 append(new LIR_Op1(
1138 lir_move,
1139 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1140 dst,
1141 type,
1142 patch_code,
1143 info, lir_move_volatile));
1144 }
1145
1146
1147 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1148 append(new LIR_Op1(
1149 lir_move,
1150 LIR_OprFact::intConst(v),
1151 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1152 type,
1153 patch_code,
1154 info));
1155 }
1156
1157
1158 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1159 append(new LIR_Op1(
1160 lir_move,
1161 LIR_OprFact::oopConst(o),
1162 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1163 type,
1164 patch_code,
1165 info));
1166 }
1167
1168
1169 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1170 append(new LIR_Op1(
1171 lir_move,
1172 src,
1173 LIR_OprFact::address(addr),
1174 addr->type(),
1175 patch_code,
1176 info));
1177 }
1178
1179
1180 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1181 append(new LIR_Op1(
1182 lir_move,
1183 src,
1184 LIR_OprFact::address(addr),
1185 addr->type(),
1186 patch_code,
1187 info,
1188 lir_move_volatile));
1189 }
1190
1191 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1192 append(new LIR_Op1(
1193 lir_move,
1194 src,
1195 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1196 type,
1197 patch_code,
1198 info, lir_move_volatile));
1199 }
1200
1201
1202 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1203 append(new LIR_Op3(
1204 lir_idiv,
1205 left,
1206 right,
1207 tmp,
1208 res,
1209 info));
1210 }
1211
1212
1213 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1214 append(new LIR_Op3(
1215 lir_idiv,
1216 left,
1217 LIR_OprFact::intConst(right),
1218 tmp,
1219 res,
1220 info));
1221 }
1222
1223
1224 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1225 append(new LIR_Op3(
1226 lir_irem,
1227 left,
1228 right,
1229 tmp,
1230 res,
1231 info));
1232 }
1233
1234
1235 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1236 append(new LIR_Op3(
1237 lir_irem,
1238 left,
1239 LIR_OprFact::intConst(right),
1240 tmp,
1241 res,
1242 info));
1243 }
1244
1245
1246 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
1247 append(new LIR_Op2(
1248 lir_cmp,
1249 condition,
1250 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
1251 LIR_OprFact::intConst(c),
1252 info));
1253 }
1254
1255
1256 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) {
1257 append(new LIR_Op2(
1258 lir_cmp,
1259 condition,
1260 reg,
1261 LIR_OprFact::address(addr),
1262 info));
1263 }
1264
1265 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1266 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) {
1267 append(new LIR_OpAllocObj(
1268 klass,
1269 dst,
1270 t1,
1271 t2,
1272 t3,
1273 t4,
1274 header_size,
1275 object_size,
1276 init_check,
1277 stub));
1278 }
1279
1280 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) {
1281 append(new LIR_OpAllocArray(
1282 klass,
1283 len,
1284 dst,
1285 t1,
1286 t2,
1287 t3,
1288 t4,
1289 type,
1290 stub));
1291 }
1292
1293 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1294 append(new LIR_Op2(
1295 lir_shl,
1296 value,
1297 count,
1298 dst,
1299 tmp));
1300 }
1301
1302 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1303 append(new LIR_Op2(
1304 lir_shr,
1305 value,
1306 count,
1307 dst,
1308 tmp));
1309 }
1310
1311
1312 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1313 append(new LIR_Op2(
1314 lir_ushr,
1315 value,
1316 count,
1317 dst,
1318 tmp));
1319 }
1320
1321 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) {
1322 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i,
1323 left,
1324 right,
1325 dst));
1326 }
1327
1328 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) {
1329 append(new LIR_OpLock(
1330 lir_lock,
1331 hdr,
1332 obj,
1333 lock,
1334 scratch,
1335 stub,
1336 info));
1337 }
1338
1339 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) {
1340 append(new LIR_OpLock(
1341 lir_unlock,
1342 hdr,
1343 obj,
1344 lock,
1345 scratch,
1346 stub,
1347 NULL));
1348 }
1349
1350
1351 void check_LIR() {
1352 // cannot do the proper checking as PRODUCT and other modes return different results
1353 // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table");
1354 }
1355
1356
1357
1358 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
1359 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1360 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
1361 ciMethod* profiled_method, int profiled_bci) {
1362 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass,
1363 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub);
1364 if (profiled_method != NULL) {
1365 c->set_profiled_method(profiled_method);
1366 c->set_profiled_bci(profiled_bci);
1367 c->set_should_profile(true);
1368 }
1369 append(c);
1370 }
1371
1372 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) {
1373 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL);
1374 if (profiled_method != NULL) {
1375 c->set_profiled_method(profiled_method);
1376 c->set_profiled_bci(profiled_bci);
1377 c->set_should_profile(true);
1378 }
1379 append(c);
1380 }
1381
1382
1383 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
1384 CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) {
1385 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception);
1386 if (profiled_method != NULL) {
1387 c->set_profiled_method(profiled_method);
1388 c->set_profiled_bci(profiled_bci);
1389 c->set_should_profile(true);
1390 }
1391 append(c);
1392 }
1393
1394
1395 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1396 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1397 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result));
1398 }
1399
1400 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1401 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1402 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result));
1403 }
1404
1405 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1406 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1407 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result));
1408 }
1409
1410
1411 #ifdef PRODUCT
1412
1413 void print_LIR(BlockList* blocks) {
1414 }
1415
1416 #else
1417 // LIR_OprDesc
1418 void LIR_OprDesc::print() const {
1419 print(tty);
1420 }
1421
1422 void LIR_OprDesc::print(outputStream* out) const {
1423 if (is_illegal()) {
1424 return;
1425 }
1426
1427 out->print("[");
1428 if (is_pointer()) {
1429 pointer()->print_value_on(out);
1430 } else if (is_single_stack()) {
1431 out->print("stack:%d", single_stack_ix());
1432 } else if (is_double_stack()) {
1433 out->print("dbl_stack:%d",double_stack_ix());
1434 } else if (is_virtual()) {
1435 out->print("R%d", vreg_number());
1436 } else if (is_single_cpu()) {
1437 out->print("%s", as_register()->name());
1438 } else if (is_double_cpu()) {
1439 out->print("%s", as_register_hi()->name());
1440 out->print("%s", as_register_lo()->name());
1441 #if defined(X86)
1442 } else if (is_single_xmm()) {
1443 out->print("%s", as_xmm_float_reg()->name());
1444 } else if (is_double_xmm()) {
1445 out->print("%s", as_xmm_double_reg()->name());
1446 } else if (is_single_fpu()) {
1447 out->print("fpu%d", fpu_regnr());
1448 } else if (is_double_fpu()) {
1449 out->print("fpu%d", fpu_regnrLo());
1450 #elif defined(AARCH64)
1451 } else if (is_single_fpu()) {
1452 out->print("fpu%d", fpu_regnr());
1453 } else if (is_double_fpu()) {
1454 out->print("fpu%d", fpu_regnrLo());
1455 #elif defined(ARM)
1456 } else if (is_single_fpu()) {
1457 out->print("s%d", fpu_regnr());
1458 } else if (is_double_fpu()) {
1459 out->print("d%d", fpu_regnrLo() >> 1);
1460 #else
1461 } else if (is_single_fpu()) {
1462 out->print("%s", as_float_reg()->name());
1463 } else if (is_double_fpu()) {
1464 out->print("%s", as_double_reg()->name());
1465 #endif
1466
1467 } else if (is_illegal()) {
1468 out->print("-");
1469 } else {
1470 out->print("Unknown Operand");
1471 }
1472 if (!is_illegal()) {
1473 out->print("|%c", type_char());
1474 }
1475 if (is_register() && is_last_use()) {
1476 out->print("(last_use)");
1477 }
1478 out->print("]");
1479 }
1480
1481
1482 // LIR_Address
1483 void LIR_Const::print_value_on(outputStream* out) const {
1484 switch (type()) {
1485 case T_ADDRESS:out->print("address:%d",as_jint()); break;
1486 case T_INT: out->print("int:%d", as_jint()); break;
1487 case T_LONG: out->print("lng:" JLONG_FORMAT, as_jlong()); break;
1488 case T_FLOAT: out->print("flt:%f", as_jfloat()); break;
1489 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break;
1490 case T_OBJECT: out->print("obj:" INTPTR_FORMAT, p2i(as_jobject())); break;
1491 case T_METADATA: out->print("metadata:" INTPTR_FORMAT, p2i(as_metadata()));break;
1492 default: out->print("%3d:0x" UINT64_FORMAT_X, type(), (uint64_t)as_jlong()); break;
1493 }
1494 }
1495
1496 // LIR_Address
1497 void LIR_Address::print_value_on(outputStream* out) const {
1498 out->print("Base:"); _base->print(out);
1499 if (!_index->is_illegal()) {
1500 out->print(" Index:"); _index->print(out);
1501 switch (scale()) {
1502 case times_1: break;
1503 case times_2: out->print(" * 2"); break;
1504 case times_4: out->print(" * 4"); break;
1505 case times_8: out->print(" * 8"); break;
1506 }
1507 }
1508 out->print(" Disp: " INTX_FORMAT, _disp);
1509 }
1510
1511 // debug output of block header without InstructionPrinter
1512 // (because phi functions are not necessary for LIR)
1513 static void print_block(BlockBegin* x) {
1514 // print block id
1515 BlockEnd* end = x->end();
1516 tty->print("B%d ", x->block_id());
1517
1518 // print flags
1519 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std ");
1520 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr ");
1521 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex ");
1522 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr ");
1523 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb ");
1524 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh ");
1525 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le ");
1526
1527 // print block bci range
1528 tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci()));
1529
1530 // print predecessors and successors
1531 if (x->number_of_preds() > 0) {
1532 tty->print("preds: ");
1533 for (int i = 0; i < x->number_of_preds(); i ++) {
1534 tty->print("B%d ", x->pred_at(i)->block_id());
1535 }
1536 }
1537
1538 if (x->number_of_sux() > 0) {
1539 tty->print("sux: ");
1540 for (int i = 0; i < x->number_of_sux(); i ++) {
1541 tty->print("B%d ", x->sux_at(i)->block_id());
1542 }
1543 }
1544
1545 // print exception handlers
1546 if (x->number_of_exception_handlers() > 0) {
1547 tty->print("xhandler: ");
1548 for (int i = 0; i < x->number_of_exception_handlers(); i++) {
1549 tty->print("B%d ", x->exception_handler_at(i)->block_id());
1550 }
1551 }
1552
1553 tty->cr();
1554 }
1555
1556 void print_LIR(BlockList* blocks) {
1557 tty->print_cr("LIR:");
1558 int i;
1559 for (i = 0; i < blocks->length(); i++) {
1560 BlockBegin* bb = blocks->at(i);
1561 print_block(bb);
1562 tty->print("__id_Instruction___________________________________________"); tty->cr();
1563 bb->lir()->print_instructions();
1564 }
1565 }
1566
1567 void LIR_List::print_instructions() {
1568 for (int i = 0; i < _operations.length(); i++) {
1569 _operations.at(i)->print(); tty->cr();
1570 }
1571 tty->cr();
1572 }
1573
1574 // LIR_Ops printing routines
1575 // LIR_Op
1576 void LIR_Op::print_on(outputStream* out) const {
1577 if (id() != -1 || PrintCFGToFile) {
1578 out->print("%4d ", id());
1579 } else {
1580 out->print(" ");
1581 }
1582 out->print("%s ", name());
1583 print_instr(out);
1584 if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci());
1585 #ifdef ASSERT
1586 if (Verbose && _file != NULL) {
1587 out->print(" (%s:%d)", _file, _line);
1588 }
1589 #endif
1590 }
1591
1592 const char * LIR_Op::name() const {
1593 const char* s = NULL;
1594 switch(code()) {
1595 // LIR_Op0
1596 case lir_membar: s = "membar"; break;
1597 case lir_membar_acquire: s = "membar_acquire"; break;
1598 case lir_membar_release: s = "membar_release"; break;
1599 case lir_membar_loadload: s = "membar_loadload"; break;
1600 case lir_membar_storestore: s = "membar_storestore"; break;
1601 case lir_membar_loadstore: s = "membar_loadstore"; break;
1602 case lir_membar_storeload: s = "membar_storeload"; break;
1603 case lir_word_align: s = "word_align"; break;
1604 case lir_label: s = "label"; break;
1605 case lir_nop: s = "nop"; break;
1606 case lir_on_spin_wait: s = "on_spin_wait"; break;
1607 case lir_backwardbranch_target: s = "backbranch"; break;
1608 case lir_std_entry: s = "std_entry"; break;
1609 case lir_osr_entry: s = "osr_entry"; break;
1610 case lir_build_frame: s = "build_frm"; break;
1611 case lir_fpop_raw: s = "fpop_raw"; break;
1612 case lir_24bit_FPU: s = "24bit_FPU"; break;
1613 case lir_reset_FPU: s = "reset_FPU"; break;
1614 case lir_breakpoint: s = "breakpoint"; break;
1615 case lir_get_thread: s = "get_thread"; break;
1616 // LIR_Op1
1617 case lir_fxch: s = "fxch"; break;
1618 case lir_fld: s = "fld"; break;
1619 case lir_ffree: s = "ffree"; break;
1620 case lir_push: s = "push"; break;
1621 case lir_pop: s = "pop"; break;
1622 case lir_null_check: s = "null_check"; break;
1623 case lir_return: s = "return"; break;
1624 case lir_safepoint: s = "safepoint"; break;
1625 case lir_neg: s = "neg"; break;
1626 case lir_leal: s = "leal"; break;
1627 case lir_branch: s = "branch"; break;
1628 case lir_cond_float_branch: s = "flt_cond_br"; break;
1629 case lir_move: s = "move"; break;
1630 case lir_roundfp: s = "roundfp"; break;
1631 case lir_rtcall: s = "rtcall"; break;
1632 case lir_throw: s = "throw"; break;
1633 case lir_unwind: s = "unwind"; break;
1634 case lir_convert: s = "convert"; break;
1635 case lir_alloc_object: s = "alloc_obj"; break;
1636 case lir_monaddr: s = "mon_addr"; break;
1637 case lir_pack64: s = "pack64"; break;
1638 case lir_unpack64: s = "unpack64"; break;
1639 // LIR_Op2
1640 case lir_cmp: s = "cmp"; break;
1641 case lir_cmp_l2i: s = "cmp_l2i"; break;
1642 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break;
1643 case lir_cmp_fd2i: s = "comp_fd2i"; break;
1644 case lir_cmove: s = "cmove"; break;
1645 case lir_add: s = "add"; break;
1646 case lir_sub: s = "sub"; break;
1647 case lir_mul: s = "mul"; break;
1648 case lir_mul_strictfp: s = "mul_strictfp"; break;
1649 case lir_div: s = "div"; break;
1650 case lir_div_strictfp: s = "div_strictfp"; break;
1651 case lir_rem: s = "rem"; break;
1652 case lir_abs: s = "abs"; break;
1653 case lir_sqrt: s = "sqrt"; break;
1654 case lir_logic_and: s = "logic_and"; break;
1655 case lir_logic_or: s = "logic_or"; break;
1656 case lir_logic_xor: s = "logic_xor"; break;
1657 case lir_shl: s = "shift_left"; break;
1658 case lir_shr: s = "shift_right"; break;
1659 case lir_ushr: s = "ushift_right"; break;
1660 case lir_alloc_array: s = "alloc_array"; break;
1661 case lir_xadd: s = "xadd"; break;
1662 case lir_xchg: s = "xchg"; break;
1663 // LIR_Op3
1664 case lir_idiv: s = "idiv"; break;
1665 case lir_irem: s = "irem"; break;
1666 // LIR_OpJavaCall
1667 case lir_static_call: s = "static"; break;
1668 case lir_optvirtual_call: s = "optvirtual"; break;
1669 case lir_icvirtual_call: s = "icvirtual"; break;
1670 case lir_virtual_call: s = "virtual"; break;
1671 case lir_dynamic_call: s = "dynamic"; break;
1672 // LIR_OpArrayCopy
1673 case lir_arraycopy: s = "arraycopy"; break;
1674 // LIR_OpUpdateCRC32
1675 case lir_updatecrc32: s = "updatecrc32"; break;
1676 // LIR_OpLock
1677 case lir_lock: s = "lock"; break;
1678 case lir_unlock: s = "unlock"; break;
1679 // LIR_OpDelay
1680 case lir_delay_slot: s = "delay"; break;
1681 // LIR_OpTypeCheck
1682 case lir_instanceof: s = "instanceof"; break;
1683 case lir_checkcast: s = "checkcast"; break;
1684 case lir_store_check: s = "store_check"; break;
1685 // LIR_OpCompareAndSwap
1686 case lir_cas_long: s = "cas_long"; break;
1687 case lir_cas_obj: s = "cas_obj"; break;
1688 case lir_cas_int: s = "cas_int"; break;
1689 // LIR_OpProfileCall
1690 case lir_profile_call: s = "profile_call"; break;
1691 // LIR_OpProfileType
1692 case lir_profile_type: s = "profile_type"; break;
1693 // LIR_OpAssert
1694 #ifdef ASSERT
1695 case lir_assert: s = "assert"; break;
1696 #endif
1697 case lir_none: ShouldNotReachHere();break;
1698 default: s = "illegal_op"; break;
1699 }
1700 return s;
1701 }
1702
1703 // LIR_OpJavaCall
1704 void LIR_OpJavaCall::print_instr(outputStream* out) const {
1705 out->print("call: ");
1706 out->print("[addr: " INTPTR_FORMAT "]", p2i(address()));
1707 if (receiver()->is_valid()) {
1708 out->print(" [recv: "); receiver()->print(out); out->print("]");
1709 }
1710 if (result_opr()->is_valid()) {
1711 out->print(" [result: "); result_opr()->print(out); out->print("]");
1712 }
1713 }
1714
1715 // LIR_OpLabel
1716 void LIR_OpLabel::print_instr(outputStream* out) const {
1717 out->print("[label:" INTPTR_FORMAT "]", p2i(_label));
1718 }
1719
1720 // LIR_OpArrayCopy
1721 void LIR_OpArrayCopy::print_instr(outputStream* out) const {
1722 src()->print(out); out->print(" ");
1723 src_pos()->print(out); out->print(" ");
1724 dst()->print(out); out->print(" ");
1725 dst_pos()->print(out); out->print(" ");
1726 length()->print(out); out->print(" ");
1727 tmp()->print(out); out->print(" ");
1728 }
1729
1730 // LIR_OpUpdateCRC32
1731 void LIR_OpUpdateCRC32::print_instr(outputStream* out) const {
1732 crc()->print(out); out->print(" ");
1733 val()->print(out); out->print(" ");
1734 result_opr()->print(out); out->print(" ");
1735 }
1736
1737 // LIR_OpCompareAndSwap
1738 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const {
1739 addr()->print(out); out->print(" ");
1740 cmp_value()->print(out); out->print(" ");
1741 new_value()->print(out); out->print(" ");
1742 tmp1()->print(out); out->print(" ");
1743 tmp2()->print(out); out->print(" ");
1744
1745 }
1746
1747 // LIR_Op0
1748 void LIR_Op0::print_instr(outputStream* out) const {
1749 result_opr()->print(out);
1750 }
1751
1752 // LIR_Op1
1753 const char * LIR_Op1::name() const {
1754 if (code() == lir_move) {
1755 switch (move_kind()) {
1756 case lir_move_normal:
1757 return "move";
1758 case lir_move_unaligned:
1759 return "unaligned move";
1760 case lir_move_volatile:
1761 return "volatile_move";
1762 case lir_move_wide:
1763 return "wide_move";
1764 default:
1765 ShouldNotReachHere();
1766 return "illegal_op";
1767 }
1768 } else {
1769 return LIR_Op::name();
1770 }
1771 }
1772
1773
1774 void LIR_Op1::print_instr(outputStream* out) const {
1775 _opr->print(out); out->print(" ");
1776 result_opr()->print(out); out->print(" ");
1777 print_patch_code(out, patch_code());
1778 }
1779
1780
1781 // LIR_Op1
1782 void LIR_OpRTCall::print_instr(outputStream* out) const {
1783 intx a = (intx)addr();
1784 out->print("%s", Runtime1::name_for_address(addr()));
1785 out->print(" ");
1786 tmp()->print(out);
1787 }
1788
1789 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
1790 switch(code) {
1791 case lir_patch_none: break;
1792 case lir_patch_low: out->print("[patch_low]"); break;
1793 case lir_patch_high: out->print("[patch_high]"); break;
1794 case lir_patch_normal: out->print("[patch_normal]"); break;
1795 default: ShouldNotReachHere();
1796 }
1797 }
1798
1799 // LIR_OpBranch
1800 void LIR_OpBranch::print_instr(outputStream* out) const {
1801 print_condition(out, cond()); out->print(" ");
1802 if (block() != NULL) {
1803 out->print("[B%d] ", block()->block_id());
1804 } else if (stub() != NULL) {
1805 out->print("[");
1806 stub()->print_name(out);
1807 out->print(": " INTPTR_FORMAT "]", p2i(stub()));
1808 if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci());
1809 } else {
1810 out->print("[label:" INTPTR_FORMAT "] ", p2i(label()));
1811 }
1812 if (ublock() != NULL) {
1813 out->print("unordered: [B%d] ", ublock()->block_id());
1814 }
1815 }
1816
1817 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
1818 switch(cond) {
1819 case lir_cond_equal: out->print("[EQ]"); break;
1820 case lir_cond_notEqual: out->print("[NE]"); break;
1821 case lir_cond_less: out->print("[LT]"); break;
1822 case lir_cond_lessEqual: out->print("[LE]"); break;
1823 case lir_cond_greaterEqual: out->print("[GE]"); break;
1824 case lir_cond_greater: out->print("[GT]"); break;
1825 case lir_cond_belowEqual: out->print("[BE]"); break;
1826 case lir_cond_aboveEqual: out->print("[AE]"); break;
1827 case lir_cond_always: out->print("[AL]"); break;
1828 default: out->print("[%d]",cond); break;
1829 }
1830 }
1831
1832 // LIR_OpConvert
1833 void LIR_OpConvert::print_instr(outputStream* out) const {
1834 print_bytecode(out, bytecode());
1835 in_opr()->print(out); out->print(" ");
1836 result_opr()->print(out); out->print(" ");
1837 #ifdef PPC32
1838 if(tmp1()->is_valid()) {
1839 tmp1()->print(out); out->print(" ");
1840 tmp2()->print(out); out->print(" ");
1841 }
1842 #endif
1843 }
1844
1845 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) {
1846 switch(code) {
1847 case Bytecodes::_d2f: out->print("[d2f] "); break;
1848 case Bytecodes::_d2i: out->print("[d2i] "); break;
1849 case Bytecodes::_d2l: out->print("[d2l] "); break;
1850 case Bytecodes::_f2d: out->print("[f2d] "); break;
1851 case Bytecodes::_f2i: out->print("[f2i] "); break;
1852 case Bytecodes::_f2l: out->print("[f2l] "); break;
1853 case Bytecodes::_i2b: out->print("[i2b] "); break;
1854 case Bytecodes::_i2c: out->print("[i2c] "); break;
1855 case Bytecodes::_i2d: out->print("[i2d] "); break;
1856 case Bytecodes::_i2f: out->print("[i2f] "); break;
1857 case Bytecodes::_i2l: out->print("[i2l] "); break;
1858 case Bytecodes::_i2s: out->print("[i2s] "); break;
1859 case Bytecodes::_l2i: out->print("[l2i] "); break;
1860 case Bytecodes::_l2f: out->print("[l2f] "); break;
1861 case Bytecodes::_l2d: out->print("[l2d] "); break;
1862 default:
1863 out->print("[?%d]",code);
1864 break;
1865 }
1866 }
1867
1868 void LIR_OpAllocObj::print_instr(outputStream* out) const {
1869 klass()->print(out); out->print(" ");
1870 obj()->print(out); out->print(" ");
1871 tmp1()->print(out); out->print(" ");
1872 tmp2()->print(out); out->print(" ");
1873 tmp3()->print(out); out->print(" ");
1874 tmp4()->print(out); out->print(" ");
1875 out->print("[hdr:%d]", header_size()); out->print(" ");
1876 out->print("[obj:%d]", object_size()); out->print(" ");
1877 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1878 }
1879
1880 void LIR_OpRoundFP::print_instr(outputStream* out) const {
1881 _opr->print(out); out->print(" ");
1882 tmp()->print(out); out->print(" ");
1883 result_opr()->print(out); out->print(" ");
1884 }
1885
1886 // LIR_Op2
1887 void LIR_Op2::print_instr(outputStream* out) const {
1888 if (code() == lir_cmove || code() == lir_cmp) {
1889 print_condition(out, condition()); out->print(" ");
1890 }
1891 in_opr1()->print(out); out->print(" ");
1892 in_opr2()->print(out); out->print(" ");
1893 if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out); out->print(" "); }
1894 if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out); out->print(" "); }
1895 if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out); out->print(" "); }
1896 if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out); out->print(" "); }
1897 if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out); out->print(" "); }
1898 result_opr()->print(out);
1899 }
1900
1901 void LIR_OpAllocArray::print_instr(outputStream* out) const {
1902 klass()->print(out); out->print(" ");
1903 len()->print(out); out->print(" ");
1904 obj()->print(out); out->print(" ");
1905 tmp1()->print(out); out->print(" ");
1906 tmp2()->print(out); out->print(" ");
1907 tmp3()->print(out); out->print(" ");
1908 tmp4()->print(out); out->print(" ");
1909 out->print("[type:0x%x]", type()); out->print(" ");
1910 out->print("[label:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1911 }
1912
1913
1914 void LIR_OpTypeCheck::print_instr(outputStream* out) const {
1915 object()->print(out); out->print(" ");
1916 if (code() == lir_store_check) {
1917 array()->print(out); out->print(" ");
1918 }
1919 if (code() != lir_store_check) {
1920 klass()->print_name_on(out); out->print(" ");
1921 if (fast_check()) out->print("fast_check ");
1922 }
1923 tmp1()->print(out); out->print(" ");
1924 tmp2()->print(out); out->print(" ");
1925 tmp3()->print(out); out->print(" ");
1926 result_opr()->print(out); out->print(" ");
1927 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci());
1928 }
1929
1930
1931 // LIR_Op3
1932 void LIR_Op3::print_instr(outputStream* out) const {
1933 in_opr1()->print(out); out->print(" ");
1934 in_opr2()->print(out); out->print(" ");
1935 in_opr3()->print(out); out->print(" ");
1936 result_opr()->print(out);
1937 }
1938
1939
1940 void LIR_OpLock::print_instr(outputStream* out) const {
1941 hdr_opr()->print(out); out->print(" ");
1942 obj_opr()->print(out); out->print(" ");
1943 lock_opr()->print(out); out->print(" ");
1944 if (_scratch->is_valid()) {
1945 _scratch->print(out); out->print(" ");
1946 }
1947 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1948 }
1949
1950 #ifdef ASSERT
1951 void LIR_OpAssert::print_instr(outputStream* out) const {
1952 print_condition(out, condition()); out->print(" ");
1953 in_opr1()->print(out); out->print(" ");
1954 in_opr2()->print(out); out->print(", \"");
1955 out->print("%s", msg()); out->print("\"");
1956 }
1957 #endif
1958
1959
1960 void LIR_OpDelay::print_instr(outputStream* out) const {
1961 _op->print_on(out);
1962 }
1963
1964
1965 // LIR_OpProfileCall
1966 void LIR_OpProfileCall::print_instr(outputStream* out) const {
1967 profiled_method()->name()->print_symbol_on(out);
1968 out->print(".");
1969 profiled_method()->holder()->name()->print_symbol_on(out);
1970 out->print(" @ %d ", profiled_bci());
1971 mdo()->print(out); out->print(" ");
1972 recv()->print(out); out->print(" ");
1973 tmp1()->print(out); out->print(" ");
1974 }
1975
1976 // LIR_OpProfileType
1977 void LIR_OpProfileType::print_instr(outputStream* out) const {
1978 out->print("exact = ");
1979 if (exact_klass() == NULL) {
1980 out->print("unknown");
1981 } else {
1982 exact_klass()->print_name_on(out);
1983 }
1984 out->print(" current = "); ciTypeEntries::print_ciklass(out, current_klass());
1985 out->print(" ");
1986 mdp()->print(out); out->print(" ");
1987 obj()->print(out); out->print(" ");
1988 tmp()->print(out); out->print(" ");
1989 }
1990
1991 #endif // PRODUCT
1992
1993 // Implementation of LIR_InsertionBuffer
1994
1995 void LIR_InsertionBuffer::append(int index, LIR_Op* op) {
1996 assert(_index_and_count.length() % 2 == 0, "must have a count for each index");
1997
1998 int i = number_of_insertion_points() - 1;
1999 if (i < 0 || index_at(i) < index) {
2000 append_new(index, 1);
2001 } else {
2002 assert(index_at(i) == index, "can append LIR_Ops in ascending order only");
2003 assert(count_at(i) > 0, "check");
2004 set_count_at(i, count_at(i) + 1);
2005 }
2006 _ops.push(op);
2007
2008 DEBUG_ONLY(verify());
2009 }
2010
2011 #ifdef ASSERT
2012 void LIR_InsertionBuffer::verify() {
2013 int sum = 0;
2014 int prev_idx = -1;
2015
2016 for (int i = 0; i < number_of_insertion_points(); i++) {
2017 assert(prev_idx < index_at(i), "index must be ordered ascending");
2018 sum += count_at(i);
2019 }
2020 assert(sum == number_of_ops(), "wrong total sum");
2021 }
2022 #endif