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src/share/vm/c1/c1_LIR.cpp
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@@ -1,7 +1,7 @@
/*
- * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2000, 2016, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
@@ -40,77 +40,10 @@
Register LIR_OprDesc::as_register_hi() const {
return FrameMap::cpu_rnr2reg(cpu_regnrHi());
}
-#ifdef PPC32
-FloatRegister LIR_OprDesc::as_float_reg() const {
- return FrameMap::nr2floatreg(fpu_regnr());
-}
-
-FloatRegister LIR_OprDesc::as_double_reg() const {
- return FrameMap::nr2floatreg(fpu_regnrHi());
-}
-// Reg2 unused.
-LIR_Opr LIR_OprFact::double_fpu(int reg1, int reg2) {
- assert(reg2 == -1 /*fnoreg*/, "Not used on this platform");
- return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
- (reg << LIR_OprDesc::reg2_shift) |
- LIR_OprDesc::double_type |
- LIR_OprDesc::fpu_register |
- LIR_OprDesc::double_size);
-}
-#ifndef PRODUCT
-#if defined(LIR_ADDRESS_PD_VERIFY)
- void LIR_Address::verify() const { pd_verify(); }
-#else
-void LIR_Address::verify() const {
- assert(scale() == times_1, "Scaled addressing mode not available on SPARC/PPC and should not be used");
- assert(disp() == 0 || index()->is_illegal(), "can't have both");
- assert(base()->is_single_cpu(), "wrong base operand");
- assert(index()->is_illegal() || index()->is_single_cpu(), "wrong index operand");
- assert(base()->type() == T_OBJECT || base()->type() == T_INT || base()->type() == T_METADATA,
- "wrong type for addresses");
-}
-#endif // (LIR_ADDRESS_PD_VERIFY
-#endif // PRODUCT
-#endif // PPC32
-
-#ifdef ARM
-FloatRegister LIR_OprDesc::as_float_reg() const {
- return as_FloatRegister(fpu_regnr());
-}
-FloatRegister LIR_OprDesc::as_double_reg() const {
- return as_FloatRegister(fpu_regnrLo());
-}
-#ifndef PRODUCT
-#if defined(LIR_ADDRESS_PD_VERIFY)
- void verify() const { pd_verify(); }
-#else
-void LIR_Address::verify() const {
- assert(base()->is_single_cpu(), "wrong base operand");
- assert(index()->is_illegal() || index()->is_single_cpu(), "wrong index operand");
- assert(scale() == times_1, "Scaled addressing mode not available on PPC and should not be used");
- assert(disp() == 0 || index()->is_illegal(), "can't have both");
- assert(base()->type() == T_OBJECT || base()->type() == T_INT || base()->type() == T_METADATA,
- "wrong type for addresses");
-}
-#endif // LIR_ADDRESS_PD_VERIFY
-#endif // PRODUCT
-#endif // ARM
-#ifdef ARM32
-LIR_Opr LIR_OprFact::double_fpu(int reg1, int reg2) {
- assert(reg2 != -1 /*fnoreg*/, "Arm32 holds double in two regs.");
- return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
- (reg2 << LIR_OprDesc::reg2_shift) |
- LIR_OprDesc::double_type |
- LIR_OprDesc::fpu_register |
- LIR_OprDesc::double_size);
-}
-#endif // ARM32
-
-
LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
LIR_Opr LIR_OprFact::value_type(ValueType* type) {
ValueTag tag = type->tag();
switch (tag) {
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