src/cpu/x86/vm/x86.ad

@@ -2129,36 +2129,34 @@
   }
   // VEX_2bytes prefix is used if UseAVX > 0, so it takes the same 2 bytes as SIMD prefix.
   return size+offset_size;
 }
 
-static inline jfloat replicate4_imm(int con, int width) {
+static inline jint replicate4_imm(int con, int width) {
   // Load a constant of "width" (in bytes) and replicate it to fill 32bit.
   assert(width == 1 || width == 2, "only byte or short types here");
   int bit_width = width * 8;
   jint val = con;
   val &= (1 << bit_width) - 1;  // mask off sign bits
   while(bit_width < 32) {
     val |= (val << bit_width);
     bit_width <<= 1;
   }
-  jfloat fval = *((jfloat*) &val);  // coerce to float type
-  return fval;
+  return val;
 }
 
-static inline jdouble replicate8_imm(int con, int width) {
+static inline jlong replicate8_imm(int con, int width) {
   // Load a constant of "width" (in bytes) and replicate it to fill 64bit.
   assert(width == 1 || width == 2 || width == 4, "only byte, short or int types here");
   int bit_width = width * 8;
   jlong val = con;
   val &= (((jlong) 1) << bit_width) - 1;  // mask off sign bits
   while(bit_width < 64) {
     val |= (val << bit_width);
     bit_width <<= 1;
   }
-  jdouble dval = *((jdouble*) &val);  // coerce to double type
-  return dval;
+  return val;
 }
 
 #ifndef PRODUCT
   void MachNopNode::format(PhaseRegAlloc*, outputStream* st) const {
     st->print("nop \t# %d bytes pad for loops and calls", _count);