--- old/src/cpu/aarch64/vm/c2_globals_aarch64.hpp 2017-07-03 09:17:21.669087585 +0200 +++ new/src/cpu/aarch64/vm/c2_globals_aarch64.hpp 2017-07-03 09:17:21.529087590 +0200 @@ -55,7 +55,6 @@ define_pd_global(intx, NewSizeThreadIncrease, ScaleForWordSize(4*K)); define_pd_global(intx, LoopUnrollLimit, 60); define_pd_global(intx, LoopPercentProfileLimit, 10); -define_pd_global(intx, PostLoopMultiversioning, false); // InitialCodeCacheSize derived from specjbb2000 run. define_pd_global(intx, InitialCodeCacheSize, 2496*K); // Integral multiple of CodeCacheExpansionSize define_pd_global(intx, CodeCacheExpansionSize, 64*K); --- old/src/cpu/arm/vm/c2_globals_arm.hpp 2017-07-03 09:17:22.049087573 +0200 +++ new/src/cpu/arm/vm/c2_globals_arm.hpp 2017-07-03 09:17:21.961087576 +0200 @@ -70,7 +70,6 @@ define_pd_global(bool, ResizeTLAB, true); define_pd_global(intx, LoopUnrollLimit, 60); // Design center runs on 1.3.1 define_pd_global(intx, LoopPercentProfileLimit, 10); -define_pd_global(intx, PostLoopMultiversioning, false); define_pd_global(intx, MinJumpTableSize, 16); // Peephole and CISC spilling both break the graph, and so makes the --- old/src/cpu/ppc/vm/c2_globals_ppc.hpp 2017-07-03 09:17:22.473087559 +0200 +++ new/src/cpu/ppc/vm/c2_globals_ppc.hpp 2017-07-03 09:17:22.353087563 +0200 @@ -55,7 +55,6 @@ define_pd_global(bool, ResizeTLAB, true); define_pd_global(intx, LoopUnrollLimit, 60); define_pd_global(intx, LoopPercentProfileLimit, 10); -define_pd_global(intx, PostLoopMultiversioning, false); // Peephole and CISC spilling both break the graph, and so make the // scheduler sick. --- old/src/cpu/s390/vm/c2_globals_s390.hpp 2017-07-03 09:17:22.841087547 +0200 +++ new/src/cpu/s390/vm/c2_globals_s390.hpp 2017-07-03 09:17:22.725087551 +0200 @@ -56,7 +56,6 @@ define_pd_global(bool, ResizeTLAB, true); define_pd_global(intx, LoopUnrollLimit, 60); define_pd_global(intx, LoopPercentProfileLimit, 10); -define_pd_global(intx, PostLoopMultiversioning, false); define_pd_global(intx, MinJumpTableSize, 18); // Peephole and CISC spilling both break the graph, and so makes the --- old/src/cpu/sparc/vm/c2_globals_sparc.hpp 2017-07-03 09:17:23.225087535 +0200 +++ new/src/cpu/sparc/vm/c2_globals_sparc.hpp 2017-07-03 09:17:23.129087538 +0200 @@ -53,7 +53,6 @@ define_pd_global(bool, ResizeTLAB, true); define_pd_global(intx, LoopUnrollLimit, 60); // Design center runs on 1.3.1 define_pd_global(intx, LoopPercentProfileLimit, 10); -define_pd_global(intx, PostLoopMultiversioning, false); define_pd_global(intx, MinJumpTableSize, 5); // Peephole and CISC spilling both break the graph, and so makes the --- old/src/cpu/x86/vm/c2_globals_x86.hpp 2017-07-03 09:17:23.525087525 +0200 +++ new/src/cpu/x86/vm/c2_globals_x86.hpp 2017-07-03 09:17:23.437087528 +0200 @@ -47,7 +47,6 @@ define_pd_global(intx, FreqInlineSize, 325); define_pd_global(intx, MinJumpTableSize, 10); define_pd_global(intx, LoopPercentProfileLimit, 30); -define_pd_global(intx, PostLoopMultiversioning, true); #ifdef AMD64 define_pd_global(intx, INTPRESSURE, 13); define_pd_global(intx, FLOATPRESSURE, 14); --- old/src/cpu/x86/vm/globals_x86.hpp 2017-07-03 09:17:23.865087514 +0200 +++ new/src/cpu/x86/vm/globals_x86.hpp 2017-07-03 09:17:23.741087518 +0200 @@ -116,9 +116,10 @@ product(bool, UseStoreImmI16, true, \ "Use store immediate 16-bits value instruction on x86") \ \ - product(intx, UseAVX, 99, \ + product(intx, UseAVX, 2, \ "Highest supported AVX instructions set on x86/x64") \ range(0, 99) \ + constraint(UseAVXConstraintFunc, AtParse) \ \ product(bool, UseCLMUL, false, \ "Control whether CLMUL instructions can be used on x86/x64") \ --- old/src/share/vm/opto/c2_globals.hpp 2017-07-03 09:17:24.233087503 +0200 +++ new/src/share/vm/opto/c2_globals.hpp 2017-07-03 09:17:24.141087506 +0200 @@ -181,7 +181,7 @@ "Map number of unrolls for main loop via " \ "Superword Level Parallelism analysis") \ \ - diagnostic_pd(bool, PostLoopMultiversioning, \ + experimental(bool, PostLoopMultiversioning, false, \ "Multi versioned post loops to eliminate range checks") \ \ notproduct(bool, TraceSuperWordLoopUnrollAnalysis, false, \ --- old/src/share/vm/runtime/commandLineFlagConstraintsCompiler.cpp 2017-07-03 09:17:24.589087491 +0200 +++ new/src/share/vm/runtime/commandLineFlagConstraintsCompiler.cpp 2017-07-03 09:17:24.493087494 +0200 @@ -332,6 +332,17 @@ } } +Flag::Error UseAVXConstraintFunc(intx value, bool verbose) { + if (value > 2 && !UnlockExperimentalVMOptions) { + CommandLineError::print(verbose, + "UseAVX (" UINTX_FORMAT ") is experimental and must be " + "enabled via -XX:+UnlockExperimentalVMOptions \n", value); + return Flag::VIOLATES_CONSTRAINT; + } else { + return Flag::SUCCESS; + } +} + #ifdef COMPILER2 Flag::Error InteriorEntryAlignmentConstraintFunc(intx value, bool verbose) { if (InteriorEntryAlignment > CodeEntryAlignment) { --- old/src/share/vm/runtime/commandLineFlagConstraintsCompiler.hpp 2017-07-03 09:17:24.909087481 +0200 +++ new/src/share/vm/runtime/commandLineFlagConstraintsCompiler.hpp 2017-07-03 09:17:24.821087484 +0200 @@ -64,6 +64,8 @@ Flag::Error InitArrayShortSizeConstraintFunc(intx value, bool verbose); +Flag::Error UseAVXConstraintFunc(intx value, bool verbose); + #ifdef COMPILER2 Flag::Error InteriorEntryAlignmentConstraintFunc(intx value, bool verbose); --- old/test/compiler/rangechecks/TestRangeCheckEliminationDisabled.java 2017-07-03 09:17:25.229087470 +0200 +++ new/test/compiler/rangechecks/TestRangeCheckEliminationDisabled.java 2017-07-03 09:17:25.137087473 +0200 @@ -26,7 +26,7 @@ * @bug 8154763 * @summary Tests PostLoopMultiversioning with RangeCheckElimination disabled. * @run main/othervm -XX:+IgnoreUnrecognizedVMOptions -XX:+UnlockDiagnosticVMOptions - * -XX:+PostLoopMultiversioning -XX:-RangeCheckElimination + * -XX:+UnlockExperimentalVMOptions -XX:+PostLoopMultiversioning -XX:-RangeCheckElimination * compiler.rangechecks.TestRangeCheckEliminationDisabled */