1 /*
2 * Copyright (c) 2003, 2017, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #ifndef _WINDOWS
27 #include "alloca.h"
28 #endif
29 #include "asm/macroAssembler.hpp"
30 #include "asm/macroAssembler.inline.hpp"
31 #include "classfile/symbolTable.hpp"
32 #include "code/debugInfoRec.hpp"
33 #include "code/icBuffer.hpp"
34 #include "code/vtableStubs.hpp"
35 #include "interpreter/interpreter.hpp"
36 #include "logging/log.hpp"
37 #include "memory/resourceArea.hpp"
38 #include "oops/compiledICHolder.hpp"
39 #include "runtime/sharedRuntime.hpp"
40 #include "runtime/vframeArray.hpp"
41 #include "utilities/align.hpp"
42 #include "vm_version_x86.hpp"
43 #include "vmreg_x86.inline.hpp"
44 #ifdef COMPILER1
45 #include "c1/c1_Runtime1.hpp"
46 #endif
47 #ifdef COMPILER2
48 #include "opto/runtime.hpp"
49 #endif
50 #if INCLUDE_JVMCI
51 #include "jvmci/jvmciJavaClasses.hpp"
52 #endif
53
54 #define __ masm->
55
56 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
57
58 class SimpleRuntimeFrame {
59
60 public:
61
62 // Most of the runtime stubs have this simple frame layout.
63 // This class exists to make the layout shared in one place.
64 // Offsets are for compiler stack slots, which are jints.
65 enum layout {
66 // The frame sender code expects that rbp will be in the "natural" place and
67 // will override any oopMap setting for it. We must therefore force the layout
68 // so that it agrees with the frame sender code.
69 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt,
70 rbp_off2,
71 return_off, return_off2,
72 framesize
73 };
74 };
75
76 class RegisterSaver {
77 // Capture info about frame layout. Layout offsets are in jint
78 // units because compiler frame slots are jints.
79 #define XSAVE_AREA_BEGIN 160
80 #define XSAVE_AREA_YMM_BEGIN 576
81 #define XSAVE_AREA_ZMM_BEGIN 1152
82 #define XSAVE_AREA_UPPERBANK 1664
83 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
84 #define DEF_YMM_OFFS(regnum) ymm ## regnum ## _off = ymm_off + (regnum)*16/BytesPerInt, ymm ## regnum ## H_off
85 #define DEF_ZMM_OFFS(regnum) zmm ## regnum ## _off = zmm_off + (regnum-16)*64/BytesPerInt, zmm ## regnum ## H_off
86 enum layout {
87 fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area
88 xmm_off = fpu_state_off + XSAVE_AREA_BEGIN/BytesPerInt, // offset in fxsave save area
89 DEF_XMM_OFFS(0),
90 DEF_XMM_OFFS(1),
91 // 2..15 are implied in range usage
92 ymm_off = xmm_off + (XSAVE_AREA_YMM_BEGIN - XSAVE_AREA_BEGIN)/BytesPerInt,
93 DEF_YMM_OFFS(0),
94 DEF_YMM_OFFS(1),
95 // 2..15 are implied in range usage
96 zmm_high = xmm_off + (XSAVE_AREA_ZMM_BEGIN - XSAVE_AREA_BEGIN)/BytesPerInt,
97 zmm_off = xmm_off + (XSAVE_AREA_UPPERBANK - XSAVE_AREA_BEGIN)/BytesPerInt,
98 DEF_ZMM_OFFS(16),
99 DEF_ZMM_OFFS(17),
100 // 18..31 are implied in range usage
101 fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt),
102 fpu_stateH_end,
103 r15_off, r15H_off,
104 r14_off, r14H_off,
105 r13_off, r13H_off,
106 r12_off, r12H_off,
107 r11_off, r11H_off,
108 r10_off, r10H_off,
109 r9_off, r9H_off,
110 r8_off, r8H_off,
111 rdi_off, rdiH_off,
112 rsi_off, rsiH_off,
113 ignore_off, ignoreH_off, // extra copy of rbp
114 rsp_off, rspH_off,
115 rbx_off, rbxH_off,
116 rdx_off, rdxH_off,
117 rcx_off, rcxH_off,
118 rax_off, raxH_off,
119 // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state
120 align_off, alignH_off,
121 flags_off, flagsH_off,
122 // The frame sender code expects that rbp will be in the "natural" place and
123 // will override any oopMap setting for it. We must therefore force the layout
124 // so that it agrees with the frame sender code.
125 rbp_off, rbpH_off, // copy of rbp we will restore
126 return_off, returnH_off, // slot for return address
127 reg_save_size // size in compiler stack slots
128 };
129
130 public:
131 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors = false);
132 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false);
133
134 // Offsets into the register save area
135 // Used by deoptimization when it is managing result register
136 // values on its own
137
138 static int rax_offset_in_bytes(void) { return BytesPerInt * rax_off; }
139 static int rdx_offset_in_bytes(void) { return BytesPerInt * rdx_off; }
140 static int rbx_offset_in_bytes(void) { return BytesPerInt * rbx_off; }
141 static int xmm0_offset_in_bytes(void) { return BytesPerInt * xmm0_off; }
142 static int return_offset_in_bytes(void) { return BytesPerInt * return_off; }
143
144 // During deoptimization only the result registers need to be restored,
145 // all the other values have already been extracted.
146 static void restore_result_registers(MacroAssembler* masm);
147 };
148
149 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors) {
150 int off = 0;
151 int num_xmm_regs = XMMRegisterImpl::number_of_registers;
152 if (UseAVX < 3) {
153 num_xmm_regs = num_xmm_regs/2;
154 }
155 #if defined(COMPILER2) || INCLUDE_JVMCI
156 if (save_vectors) {
157 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
158 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
159 }
160 #else
161 assert(!save_vectors, "vectors are generated only by C2 and JVMCI");
162 #endif
163
164 // Always make the frame size 16-byte aligned, both vector and non vector stacks are always allocated
165 int frame_size_in_bytes = align_up(reg_save_size*BytesPerInt, num_xmm_regs);
166 // OopMap frame size is in compiler stack slots (jint's) not bytes or words
167 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt;
168 // CodeBlob frame size is in words.
169 int frame_size_in_words = frame_size_in_bytes / wordSize;
170 *total_frame_words = frame_size_in_words;
171
172 // Save registers, fpu state, and flags.
173 // We assume caller has already pushed the return address onto the
174 // stack, so rsp is 8-byte aligned here.
175 // We push rpb twice in this sequence because we want the real rbp
176 // to be under the return like a normal enter.
177
178 __ enter(); // rsp becomes 16-byte aligned here
179 __ push_CPU_state(); // Push a multiple of 16 bytes
180
181 // push cpu state handles this on EVEX enabled targets
182 if (save_vectors) {
183 // Save upper half of YMM registers(0..15)
184 int base_addr = XSAVE_AREA_YMM_BEGIN;
185 for (int n = 0; n < 16; n++) {
186 __ vextractf128_high(Address(rsp, base_addr+n*16), as_XMMRegister(n));
187 }
188 if (VM_Version::supports_evex()) {
189 // Save upper half of ZMM registers(0..15)
190 base_addr = XSAVE_AREA_ZMM_BEGIN;
191 for (int n = 0; n < 16; n++) {
192 __ vextractf64x4_high(Address(rsp, base_addr+n*32), as_XMMRegister(n));
193 }
194 // Save full ZMM registers(16..num_xmm_regs)
195 base_addr = XSAVE_AREA_UPPERBANK;
196 off = 0;
197 int vector_len = Assembler::AVX_512bit;
198 for (int n = 16; n < num_xmm_regs; n++) {
199 __ evmovdqul(Address(rsp, base_addr+(off++*64)), as_XMMRegister(n), vector_len);
200 }
201 }
202 } else {
203 if (VM_Version::supports_evex()) {
204 // Save upper bank of ZMM registers(16..31) for double/float usage
205 int base_addr = XSAVE_AREA_UPPERBANK;
206 off = 0;
207 for (int n = 16; n < num_xmm_regs; n++) {
208 __ movsd(Address(rsp, base_addr+(off++*64)), as_XMMRegister(n));
209 }
210 }
211 }
212 __ vzeroupper();
213 if (frame::arg_reg_save_area_bytes != 0) {
214 // Allocate argument register save area
215 __ subptr(rsp, frame::arg_reg_save_area_bytes);
216 }
217
218 // Set an oopmap for the call site. This oopmap will map all
219 // oop-registers and debug-info registers as callee-saved. This
220 // will allow deoptimization at this safepoint to find all possible
221 // debug-info recordings, as well as let GC find all oops.
222
223 OopMapSet *oop_maps = new OopMapSet();
224 OopMap* map = new OopMap(frame_size_in_slots, 0);
225
226 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x))
227
228 map->set_callee_saved(STACK_OFFSET( rax_off ), rax->as_VMReg());
229 map->set_callee_saved(STACK_OFFSET( rcx_off ), rcx->as_VMReg());
230 map->set_callee_saved(STACK_OFFSET( rdx_off ), rdx->as_VMReg());
231 map->set_callee_saved(STACK_OFFSET( rbx_off ), rbx->as_VMReg());
232 // rbp location is known implicitly by the frame sender code, needs no oopmap
233 // and the location where rbp was saved by is ignored
234 map->set_callee_saved(STACK_OFFSET( rsi_off ), rsi->as_VMReg());
235 map->set_callee_saved(STACK_OFFSET( rdi_off ), rdi->as_VMReg());
236 map->set_callee_saved(STACK_OFFSET( r8_off ), r8->as_VMReg());
237 map->set_callee_saved(STACK_OFFSET( r9_off ), r9->as_VMReg());
238 map->set_callee_saved(STACK_OFFSET( r10_off ), r10->as_VMReg());
239 map->set_callee_saved(STACK_OFFSET( r11_off ), r11->as_VMReg());
240 map->set_callee_saved(STACK_OFFSET( r12_off ), r12->as_VMReg());
241 map->set_callee_saved(STACK_OFFSET( r13_off ), r13->as_VMReg());
242 map->set_callee_saved(STACK_OFFSET( r14_off ), r14->as_VMReg());
243 map->set_callee_saved(STACK_OFFSET( r15_off ), r15->as_VMReg());
244 // For both AVX and EVEX we will use the legacy FXSAVE area for xmm0..xmm15,
245 // on EVEX enabled targets, we get it included in the xsave area
246 off = xmm0_off;
247 int delta = xmm1_off - off;
248 for (int n = 0; n < 16; n++) {
249 XMMRegister xmm_name = as_XMMRegister(n);
250 map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg());
251 off += delta;
252 }
253 if(UseAVX > 2) {
254 // Obtain xmm16..xmm31 from the XSAVE area on EVEX enabled targets
255 off = zmm16_off;
256 delta = zmm17_off - off;
257 for (int n = 16; n < num_xmm_regs; n++) {
258 XMMRegister zmm_name = as_XMMRegister(n);
259 map->set_callee_saved(STACK_OFFSET(off), zmm_name->as_VMReg());
260 off += delta;
261 }
262 }
263
264 #if defined(COMPILER2) || INCLUDE_JVMCI
265 if (save_vectors) {
266 off = ymm0_off;
267 int delta = ymm1_off - off;
268 for (int n = 0; n < 16; n++) {
269 XMMRegister ymm_name = as_XMMRegister(n);
270 map->set_callee_saved(STACK_OFFSET(off), ymm_name->as_VMReg()->next(4));
271 off += delta;
272 }
273 }
274 #endif // COMPILER2 || INCLUDE_JVMCI
275
276 // %%% These should all be a waste but we'll keep things as they were for now
277 if (true) {
278 map->set_callee_saved(STACK_OFFSET( raxH_off ), rax->as_VMReg()->next());
279 map->set_callee_saved(STACK_OFFSET( rcxH_off ), rcx->as_VMReg()->next());
280 map->set_callee_saved(STACK_OFFSET( rdxH_off ), rdx->as_VMReg()->next());
281 map->set_callee_saved(STACK_OFFSET( rbxH_off ), rbx->as_VMReg()->next());
282 // rbp location is known implicitly by the frame sender code, needs no oopmap
283 map->set_callee_saved(STACK_OFFSET( rsiH_off ), rsi->as_VMReg()->next());
284 map->set_callee_saved(STACK_OFFSET( rdiH_off ), rdi->as_VMReg()->next());
285 map->set_callee_saved(STACK_OFFSET( r8H_off ), r8->as_VMReg()->next());
286 map->set_callee_saved(STACK_OFFSET( r9H_off ), r9->as_VMReg()->next());
287 map->set_callee_saved(STACK_OFFSET( r10H_off ), r10->as_VMReg()->next());
288 map->set_callee_saved(STACK_OFFSET( r11H_off ), r11->as_VMReg()->next());
289 map->set_callee_saved(STACK_OFFSET( r12H_off ), r12->as_VMReg()->next());
290 map->set_callee_saved(STACK_OFFSET( r13H_off ), r13->as_VMReg()->next());
291 map->set_callee_saved(STACK_OFFSET( r14H_off ), r14->as_VMReg()->next());
292 map->set_callee_saved(STACK_OFFSET( r15H_off ), r15->as_VMReg()->next());
293 // For both AVX and EVEX we will use the legacy FXSAVE area for xmm0..xmm15,
294 // on EVEX enabled targets, we get it included in the xsave area
295 off = xmm0H_off;
296 delta = xmm1H_off - off;
297 for (int n = 0; n < 16; n++) {
298 XMMRegister xmm_name = as_XMMRegister(n);
299 map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg()->next());
300 off += delta;
301 }
302 if (UseAVX > 2) {
303 // Obtain xmm16..xmm31 from the XSAVE area on EVEX enabled targets
304 off = zmm16H_off;
305 delta = zmm17H_off - off;
306 for (int n = 16; n < num_xmm_regs; n++) {
307 XMMRegister zmm_name = as_XMMRegister(n);
308 map->set_callee_saved(STACK_OFFSET(off), zmm_name->as_VMReg()->next());
309 off += delta;
310 }
311 }
312 }
313
314 return map;
315 }
316
317 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) {
318 int num_xmm_regs = XMMRegisterImpl::number_of_registers;
319 if (UseAVX < 3) {
320 num_xmm_regs = num_xmm_regs/2;
321 }
322 if (frame::arg_reg_save_area_bytes != 0) {
323 // Pop arg register save area
324 __ addptr(rsp, frame::arg_reg_save_area_bytes);
325 }
326
327 #if defined(COMPILER2) || INCLUDE_JVMCI
328 if (restore_vectors) {
329 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
330 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
331 }
332 #else
333 assert(!restore_vectors, "vectors are generated only by C2");
334 #endif
335
336 __ vzeroupper();
337
338 // On EVEX enabled targets everything is handled in pop fpu state
339 if (restore_vectors) {
340 // Restore upper half of YMM registers (0..15)
341 int base_addr = XSAVE_AREA_YMM_BEGIN;
342 for (int n = 0; n < 16; n++) {
343 __ vinsertf128_high(as_XMMRegister(n), Address(rsp, base_addr+n*16));
344 }
345 if (VM_Version::supports_evex()) {
346 // Restore upper half of ZMM registers (0..15)
347 base_addr = XSAVE_AREA_ZMM_BEGIN;
348 for (int n = 0; n < 16; n++) {
349 __ vinsertf64x4_high(as_XMMRegister(n), Address(rsp, base_addr+n*32));
350 }
351 // Restore full ZMM registers(16..num_xmm_regs)
352 base_addr = XSAVE_AREA_UPPERBANK;
353 int vector_len = Assembler::AVX_512bit;
354 int off = 0;
355 for (int n = 16; n < num_xmm_regs; n++) {
356 __ evmovdqul(as_XMMRegister(n), Address(rsp, base_addr+(off++*64)), vector_len);
357 }
358 }
359 } else {
360 if (VM_Version::supports_evex()) {
361 // Restore upper bank of ZMM registers(16..31) for double/float usage
362 int base_addr = XSAVE_AREA_UPPERBANK;
363 int off = 0;
364 for (int n = 16; n < num_xmm_regs; n++) {
365 __ movsd(as_XMMRegister(n), Address(rsp, base_addr+(off++*64)));
366 }
367 }
368 }
369
370 // Recover CPU state
371 __ pop_CPU_state();
372 // Get the rbp described implicitly by the calling convention (no oopMap)
373 __ pop(rbp);
374 }
375
376 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
377
378 // Just restore result register. Only used by deoptimization. By
379 // now any callee save register that needs to be restored to a c2
380 // caller of the deoptee has been extracted into the vframeArray
381 // and will be stuffed into the c2i adapter we create for later
382 // restoration so only result registers need to be restored here.
383
384 // Restore fp result register
385 __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes()));
386 // Restore integer result register
387 __ movptr(rax, Address(rsp, rax_offset_in_bytes()));
388 __ movptr(rdx, Address(rsp, rdx_offset_in_bytes()));
389
390 // Pop all of the register save are off the stack except the return address
391 __ addptr(rsp, return_offset_in_bytes());
392 }
393
394 // Is vector's size (in bytes) bigger than a size saved by default?
395 // 16 bytes XMM registers are saved by default using fxsave/fxrstor instructions.
396 bool SharedRuntime::is_wide_vector(int size) {
397 return size > 16;
398 }
399
400 size_t SharedRuntime::trampoline_size() {
401 return 16;
402 }
403
404 void SharedRuntime::generate_trampoline(MacroAssembler *masm, address destination) {
405 __ jump(RuntimeAddress(destination));
406 }
407
408 // The java_calling_convention describes stack locations as ideal slots on
409 // a frame with no abi restrictions. Since we must observe abi restrictions
410 // (like the placement of the register window) the slots must be biased by
411 // the following value.
412 static int reg2offset_in(VMReg r) {
413 // Account for saved rbp and return address
414 // This should really be in_preserve_stack_slots
415 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size;
416 }
417
418 static int reg2offset_out(VMReg r) {
419 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
420 }
421
422 // ---------------------------------------------------------------------------
423 // Read the array of BasicTypes from a signature, and compute where the
424 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
425 // quantities. Values less than VMRegImpl::stack0 are registers, those above
426 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
427 // as framesizes are fixed.
428 // VMRegImpl::stack0 refers to the first slot 0(sp).
429 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register
430 // up to RegisterImpl::number_of_registers) are the 64-bit
431 // integer registers.
432
433 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
434 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
435 // units regardless of build. Of course for i486 there is no 64 bit build
436
437 // The Java calling convention is a "shifted" version of the C ABI.
438 // By skipping the first C ABI register we can call non-static jni methods
439 // with small numbers of arguments without having to shuffle the arguments
440 // at all. Since we control the java ABI we ought to at least get some
441 // advantage out of it.
442
443 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
444 VMRegPair *regs,
445 int total_args_passed,
446 int is_outgoing) {
447
448 // Create the mapping between argument positions and
449 // registers.
450 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = {
451 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5
452 };
453 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = {
454 j_farg0, j_farg1, j_farg2, j_farg3,
455 j_farg4, j_farg5, j_farg6, j_farg7
456 };
457
458
459 uint int_args = 0;
460 uint fp_args = 0;
461 uint stk_args = 0; // inc by 2 each time
462
463 for (int i = 0; i < total_args_passed; i++) {
464 switch (sig_bt[i]) {
465 case T_BOOLEAN:
466 case T_CHAR:
467 case T_BYTE:
468 case T_SHORT:
469 case T_INT:
470 if (int_args < Argument::n_int_register_parameters_j) {
471 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
472 } else {
473 regs[i].set1(VMRegImpl::stack2reg(stk_args));
474 stk_args += 2;
475 }
476 break;
477 case T_VOID:
478 // halves of T_LONG or T_DOUBLE
479 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
480 regs[i].set_bad();
481 break;
482 case T_LONG:
483 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
484 // fall through
485 case T_OBJECT:
486 case T_ARRAY:
487 case T_ADDRESS:
488 case T_VALUETYPEPTR:
489 if (int_args < Argument::n_int_register_parameters_j) {
490 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
491 } else {
492 regs[i].set2(VMRegImpl::stack2reg(stk_args));
493 stk_args += 2;
494 }
495 break;
496 case T_FLOAT:
497 if (fp_args < Argument::n_float_register_parameters_j) {
498 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
499 } else {
500 regs[i].set1(VMRegImpl::stack2reg(stk_args));
501 stk_args += 2;
502 }
503 break;
504 case T_DOUBLE:
505 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
506 if (fp_args < Argument::n_float_register_parameters_j) {
507 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
508 } else {
509 regs[i].set2(VMRegImpl::stack2reg(stk_args));
510 stk_args += 2;
511 }
512 break;
513 default:
514 ShouldNotReachHere();
515 break;
516 }
517 }
518
519 return align_up(stk_args, 2);
520 }
521
522 // Same as java_calling_convention() but for multiple return
523 // values. There's no way to store them on the stack so if we don't
524 // have enough registers, multiple values can't be returned.
525 const uint SharedRuntime::java_return_convention_max_int = Argument::n_int_register_parameters_j+1;
526 const uint SharedRuntime::java_return_convention_max_float = Argument::n_float_register_parameters_j;
527 int SharedRuntime::java_return_convention(const BasicType *sig_bt,
528 VMRegPair *regs,
529 int total_args_passed) {
530 // Create the mapping between argument positions and
531 // registers.
532 static const Register INT_ArgReg[java_return_convention_max_int] = {
533 rax, j_rarg5, j_rarg4, j_rarg3, j_rarg2, j_rarg1, j_rarg0
534 };
535 static const XMMRegister FP_ArgReg[java_return_convention_max_float] = {
536 j_farg0, j_farg1, j_farg2, j_farg3,
537 j_farg4, j_farg5, j_farg6, j_farg7
538 };
539
540
541 uint int_args = 0;
542 uint fp_args = 0;
543
544 for (int i = 0; i < total_args_passed; i++) {
545 switch (sig_bt[i]) {
546 case T_BOOLEAN:
547 case T_CHAR:
548 case T_BYTE:
549 case T_SHORT:
550 case T_INT:
551 if (int_args < Argument::n_int_register_parameters_j+1) {
552 regs[i].set1(INT_ArgReg[int_args]->as_VMReg());
553 int_args++;
554 } else {
555 return -1;
556 }
557 break;
558 case T_VOID:
559 // halves of T_LONG or T_DOUBLE
560 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
561 regs[i].set_bad();
562 break;
563 case T_LONG:
564 assert(sig_bt[i + 1] == T_VOID, "expecting half");
565 // fall through
566 case T_OBJECT:
567 case T_ARRAY:
568 case T_ADDRESS:
569 case T_METADATA:
570 case T_VALUETYPEPTR:
571 if (int_args < Argument::n_int_register_parameters_j+1) {
572 regs[i].set2(INT_ArgReg[int_args]->as_VMReg());
573 int_args++;
574 } else {
575 return -1;
576 }
577 break;
578 case T_FLOAT:
579 if (fp_args < Argument::n_float_register_parameters_j) {
580 regs[i].set1(FP_ArgReg[fp_args]->as_VMReg());
581 fp_args++;
582 } else {
583 return -1;
584 }
585 break;
586 case T_DOUBLE:
587 assert(sig_bt[i + 1] == T_VOID, "expecting half");
588 if (fp_args < Argument::n_float_register_parameters_j) {
589 regs[i].set2(FP_ArgReg[fp_args]->as_VMReg());
590 fp_args++;
591 } else {
592 return -1;
593 }
594 break;
595 default:
596 ShouldNotReachHere();
597 break;
598 }
599 }
600
601 return int_args + fp_args;
602 }
603
604 // Patch the callers callsite with entry to compiled code if it exists.
605 static void patch_callers_callsite(MacroAssembler *masm) {
606 Label L;
607 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
608 __ jcc(Assembler::equal, L);
609
610 // Save the current stack pointer
611 __ mov(r13, rsp);
612 // Schedule the branch target address early.
613 // Call into the VM to patch the caller, then jump to compiled callee
614 // rax isn't live so capture return address while we easily can
615 __ movptr(rax, Address(rsp, 0));
616
617 // align stack so push_CPU_state doesn't fault
618 __ andptr(rsp, -(StackAlignmentInBytes));
619 __ push_CPU_state();
620 __ vzeroupper();
621 // VM needs caller's callsite
622 // VM needs target method
623 // This needs to be a long call since we will relocate this adapter to
624 // the codeBuffer and it may not reach
625
626 // Allocate argument register save area
627 if (frame::arg_reg_save_area_bytes != 0) {
628 __ subptr(rsp, frame::arg_reg_save_area_bytes);
629 }
630 __ mov(c_rarg0, rbx);
631 __ mov(c_rarg1, rax);
632 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
633
634 // De-allocate argument register save area
635 if (frame::arg_reg_save_area_bytes != 0) {
636 __ addptr(rsp, frame::arg_reg_save_area_bytes);
637 }
638
639 __ vzeroupper();
640 __ pop_CPU_state();
641 // restore sp
642 __ mov(rsp, r13);
643 __ bind(L);
644 }
645
646 // For each value type argument, sig includes the list of fields of
647 // the value type. This utility function computes the number of
648 // arguments for the call if value types are passed by reference (the
649 // calling convention the interpreter expects).
650 static int compute_total_args_passed_int(const GrowableArray<SigEntry>& sig_extended) {
651 int total_args_passed = 0;
652 if (ValueTypePassFieldsAsArgs) {
653 for (int i = 0; i < sig_extended.length(); i++) {
654 BasicType bt = sig_extended.at(i)._bt;
655 if (bt == T_VALUETYPE) {
656 // In sig_extended, a value type argument starts with:
657 // T_VALUETYPE, followed by the types of the fields of the
658 // value type and T_VOID to mark the end of the value
659 // type. Value types are flattened so, for instance, in the
660 // case of a value type with an int field and a value type
661 // field that itself has 2 fields, an int and a long:
662 // T_VALUETYPE T_INT T_VALUETYPE T_INT T_LONG T_VOID (second
663 // slot for the T_LONG) T_VOID (inner T_VALUETYPE) T_VOID
664 // (outer T_VALUETYPE)
665 total_args_passed++;
666 int vt = 1;
667 do {
668 i++;
669 BasicType bt = sig_extended.at(i)._bt;
670 BasicType prev_bt = sig_extended.at(i-1)._bt;
671 if (bt == T_VALUETYPE) {
672 vt++;
673 } else if (bt == T_VOID &&
674 prev_bt != T_LONG &&
675 prev_bt != T_DOUBLE) {
676 vt--;
677 }
678 } while (vt != 0);
679 } else {
680 total_args_passed++;
681 }
682 }
683 } else {
684 total_args_passed = sig_extended.length();
685 }
686 return total_args_passed;
687 }
688
689
690 static void gen_c2i_adapter_helper(MacroAssembler* masm,
691 BasicType bt,
692 BasicType prev_bt,
693 size_t size_in_bytes,
694 const VMRegPair& reg_pair,
695 const Address& to,
696 int extraspace,
697 bool is_oop) {
698 assert(bt != T_VALUETYPE || !ValueTypePassFieldsAsArgs, "no value type here");
699 if (bt == T_VOID) {
700 assert(prev_bt == T_LONG || prev_bt == T_DOUBLE, "missing half");
701 return;
702 }
703
704 // Say 4 args:
705 // i st_off
706 // 0 32 T_LONG
707 // 1 24 T_VOID
708 // 2 16 T_OBJECT
709 // 3 8 T_BOOL
710 // - 0 return address
711 //
712 // However to make thing extra confusing. Because we can fit a long/double in
713 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter
714 // leaves one slot empty and only stores to a single slot. In this case the
715 // slot that is occupied is the T_VOID slot. See I said it was confusing.
716
717 bool wide = (size_in_bytes == wordSize);
718 VMReg r_1 = reg_pair.first();
719 VMReg r_2 = reg_pair.second();
720 assert(r_2->is_valid() == wide, "invalid size");
721 if (!r_1->is_valid()) {
722 assert(!r_2->is_valid(), "must be invalid");
723 return;
724 }
725
726 if (!r_1->is_XMMRegister()) {
727 Register val = rax;
728 assert_different_registers(to.base(), val);
729 if(r_1->is_stack()) {
730 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
731 __ load_sized_value(val, Address(rsp, ld_off), size_in_bytes, /* is_signed */ false);
732 } else {
733 val = r_1->as_Register();
734 }
735 if (is_oop) {
736 __ store_heap_oop(to, val);
737 } else {
738 __ store_sized_value(to, val, size_in_bytes);
739 }
740 } else {
741 if (wide) {
742 __ movdbl(to, r_1->as_XMMRegister());
743 } else {
744 __ movflt(to, r_1->as_XMMRegister());
745 }
746 }
747 }
748
749 static void gen_c2i_adapter(MacroAssembler *masm,
750 const GrowableArray<SigEntry>& sig_extended,
751 const VMRegPair *regs,
752 Label& skip_fixup,
753 address start,
754 OopMapSet*& oop_maps,
755 int& frame_complete,
756 int& frame_size_in_words) {
757 // Before we get into the guts of the C2I adapter, see if we should be here
758 // at all. We've come from compiled code and are attempting to jump to the
759 // interpreter, which means the caller made a static call to get here
760 // (vcalls always get a compiled target if there is one). Check for a
761 // compiled target. If there is one, we need to patch the caller's call.
762 patch_callers_callsite(masm);
763
764 __ bind(skip_fixup);
765
766 bool has_value_argument = false;
767 if (ValueTypePassFieldsAsArgs) {
768 // Is there a value type argument?
769 for (int i = 0; i < sig_extended.length() && !has_value_argument; i++) {
770 has_value_argument = (sig_extended.at(i)._bt == T_VALUETYPE);
771 }
772 if (has_value_argument) {
773 // There is at least a value type argument: we're coming from
774 // compiled code so we have no buffers to back the value
775 // types. Allocate the buffers here with a runtime call.
776 oop_maps = new OopMapSet();
777 OopMap* map = NULL;
778
779 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
780
781 frame_complete = __ offset();
782
783 __ set_last_Java_frame(noreg, noreg, NULL);
784
785 __ mov(c_rarg0, r15_thread);
786 __ mov(c_rarg1, rbx);
787
788 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::allocate_value_types)));
789
790 oop_maps->add_gc_map((int)(__ pc() - start), map);
791 __ reset_last_Java_frame(false);
792
793 RegisterSaver::restore_live_registers(masm);
794
795 Label no_exception;
796 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
797 __ jcc(Assembler::equal, no_exception);
798
799 __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD);
800 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
801 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
802
803 __ bind(no_exception);
804
805 // We get an array of objects from the runtime call
806 __ get_vm_result(r13, r15_thread); // Use r13 as temporary because r10 is trashed by movptr()
807 __ get_vm_result_2(rbx, r15_thread); // TODO: required to keep the callee Method live?
808 __ mov(r10, r13);
809 }
810 }
811
812 // Since all args are passed on the stack, total_args_passed *
813 // Interpreter::stackElementSize is the space we need. Plus 1 because
814 // we also account for the return address location since
815 // we store it first rather than hold it in rax across all the shuffling
816 int total_args_passed = compute_total_args_passed_int(sig_extended);
817 int extraspace = (total_args_passed * Interpreter::stackElementSize) + wordSize;
818
819 // stack is aligned, keep it that way
820 extraspace = align_up(extraspace, 2*wordSize);
821
822 // Get return address
823 __ pop(rax);
824
825 // set senderSP value
826 __ mov(r13, rsp);
827
828 __ subptr(rsp, extraspace);
829
830 // Store the return address in the expected location
831 __ movptr(Address(rsp, 0), rax);
832
833 // Now write the args into the outgoing interpreter space
834
835 // next_arg_comp is the next argument from the compiler point of
836 // view (value type fields are passed in registers/on the stack). In
837 // sig_extended, a value type argument starts with: T_VALUETYPE,
838 // followed by the types of the fields of the value type and T_VOID
839 // to mark the end of the value type. ignored counts the number of
840 // T_VALUETYPE/T_VOID. next_vt_arg is the next value type argument:
841 // used to get the buffer for that argument from the pool of buffers
842 // we allocated above and want to pass to the
843 // interpreter. next_arg_int is the next argument from the
844 // interpreter point of view (value types are passed by reference).
845 bool has_oop_field = false;
846 for (int next_arg_comp = 0, ignored = 0, next_vt_arg = 0, next_arg_int = 0;
847 next_arg_comp < sig_extended.length(); next_arg_comp++) {
848 assert(ignored <= next_arg_comp, "shouldn't skip over more slot than there are arguments");
849 assert(next_arg_int < total_args_passed, "more arguments for the interpreter than expected?");
850 BasicType bt = sig_extended.at(next_arg_comp)._bt;
851 int st_off = (total_args_passed - next_arg_int) * Interpreter::stackElementSize;
852 if (!ValueTypePassFieldsAsArgs || bt != T_VALUETYPE) {
853 int next_off = st_off - Interpreter::stackElementSize;
854 const int offset = (bt == T_LONG || bt == T_DOUBLE) ? next_off : st_off;
855 const VMRegPair reg_pair = regs[next_arg_comp-ignored];
856 size_t size_in_bytes = reg_pair.second()->is_valid() ? 8 : 4;
857 gen_c2i_adapter_helper(masm, bt, next_arg_comp > 0 ? sig_extended.at(next_arg_comp-1)._bt : T_ILLEGAL,
858 size_in_bytes, reg_pair, Address(rsp, offset), extraspace, false);
859 next_arg_int++;
860 #ifdef ASSERT
861 if (bt == T_LONG || bt == T_DOUBLE) {
862 // Overwrite the unused slot with known junk
863 __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
864 __ movptr(Address(rsp, st_off), rax);
865 }
866 #endif /* ASSERT */
867 } else {
868 ignored++;
869 // get the buffer from the just allocated pool of buffers
870 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + next_vt_arg * type2aelembytes(T_VALUETYPE);
871 __ load_heap_oop(r11, Address(r10, index));
872 next_vt_arg++; next_arg_int++;
873 int vt = 1;
874 // write fields we get from compiled code in registers/stack
875 // slots to the buffer: we know we are done with that value type
876 // argument when we hit the T_VOID that acts as an end of value
877 // type delimiter for this value type. Value types are flattened
878 // so we might encounter embedded value types. Each entry in
879 // sig_extended contains a field offset in the buffer.
880 do {
881 next_arg_comp++;
882 BasicType bt = sig_extended.at(next_arg_comp)._bt;
883 BasicType prev_bt = sig_extended.at(next_arg_comp-1)._bt;
884 if (bt == T_VALUETYPE) {
885 vt++;
886 ignored++;
887 } else if (bt == T_VOID &&
888 prev_bt != T_LONG &&
889 prev_bt != T_DOUBLE) {
890 vt--;
891 ignored++;
892 } else {
893 int off = sig_extended.at(next_arg_comp)._offset;
894 assert(off > 0, "offset in object should be positive");
895 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
896 bool is_oop = (bt == T_OBJECT || bt == T_ARRAY);
897 has_oop_field = has_oop_field || is_oop;
898 gen_c2i_adapter_helper(masm, bt, next_arg_comp > 0 ? sig_extended.at(next_arg_comp-1)._bt : T_ILLEGAL,
899 size_in_bytes, regs[next_arg_comp-ignored], Address(r11, off), extraspace, is_oop);
900 }
901 } while (vt != 0);
902 // pass the buffer to the interpreter
903 __ movptr(Address(rsp, st_off), r11);
904 }
905 }
906
907 // If a value type was allocated and initialized, apply post barrier to all oop fields
908 if (has_value_argument && has_oop_field) {
909 __ push(r13); // save senderSP
910 __ push(rbx); // save callee
911 // Allocate argument register save area
912 if (frame::arg_reg_save_area_bytes != 0) {
913 __ subptr(rsp, frame::arg_reg_save_area_bytes);
914 }
915 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::apply_post_barriers), r15_thread, r10);
916 // De-allocate argument register save area
917 if (frame::arg_reg_save_area_bytes != 0) {
918 __ addptr(rsp, frame::arg_reg_save_area_bytes);
919 }
920 __ pop(rbx); // restore callee
921 __ pop(r13); // restore sender SP
922 }
923
924 // Schedule the branch target address early.
925 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset())));
926 __ jmp(rcx);
927 }
928
929 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg,
930 address code_start, address code_end,
931 Label& L_ok) {
932 Label L_fail;
933 __ lea(temp_reg, ExternalAddress(code_start));
934 __ cmpptr(pc_reg, temp_reg);
935 __ jcc(Assembler::belowEqual, L_fail);
936 __ lea(temp_reg, ExternalAddress(code_end));
937 __ cmpptr(pc_reg, temp_reg);
938 __ jcc(Assembler::below, L_ok);
939 __ bind(L_fail);
940 }
941
942 static void gen_i2c_adapter_helper(MacroAssembler* masm,
943 BasicType bt,
944 BasicType prev_bt,
945 size_t size_in_bytes,
946 const VMRegPair& reg_pair,
947 const Address& from,
948 bool is_oop) {
949 assert(bt != T_VALUETYPE || !ValueTypePassFieldsAsArgs, "no value type here");
950 if (bt == T_VOID) {
951 // Longs and doubles are passed in native word order, but misaligned
952 // in the 32-bit build.
953 assert(prev_bt == T_LONG || prev_bt == T_DOUBLE, "missing half");
954 return;
955 }
956 assert(!reg_pair.second()->is_valid() || reg_pair.first()->next() == reg_pair.second(),
957 "scrambled load targets?");
958
959 bool wide = (size_in_bytes == wordSize);
960 VMReg r_1 = reg_pair.first();
961 VMReg r_2 = reg_pair.second();
962 assert(r_2->is_valid() == wide, "invalid size");
963 if (!r_1->is_valid()) {
964 assert(!r_2->is_valid(), "must be invalid");
965 return;
966 }
967
968 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
969 if (!r_1->is_XMMRegister()) {
970 // We can use r13 as a temp here because compiled code doesn't need r13 as an input
971 // and if we end up going thru a c2i because of a miss a reasonable value of r13
972 // will be generated.
973 Register dst = r_1->is_stack() ? r13 : r_1->as_Register();
974 if (is_oop) {
975 __ load_heap_oop(dst, from);
976 } else {
977 __ load_sized_value(dst, from, size_in_bytes, is_signed);
978 }
979 if (r_1->is_stack()) {
980 // Convert stack slot to an SP offset (+ wordSize to account for return address)
981 int st_off = reg_pair.first()->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
982 __ movq(Address(rsp, st_off), dst);
983 }
984 } else {
985 if (wide) {
986 __ movdbl(r_1->as_XMMRegister(), from);
987 } else {
988 __ movflt(r_1->as_XMMRegister(), from);
989 }
990 }
991 }
992
993 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
994 int comp_args_on_stack,
995 const GrowableArray<SigEntry>& sig_extended,
996 const VMRegPair *regs) {
997
998 // Note: r13 contains the senderSP on entry. We must preserve it since
999 // we may do a i2c -> c2i transition if we lose a race where compiled
1000 // code goes non-entrant while we get args ready.
1001 // In addition we use r13 to locate all the interpreter args as
1002 // we must align the stack to 16 bytes on an i2c entry else we
1003 // lose alignment we expect in all compiled code and register
1004 // save code can segv when fxsave instructions find improperly
1005 // aligned stack pointer.
1006
1007 // Adapters can be frameless because they do not require the caller
1008 // to perform additional cleanup work, such as correcting the stack pointer.
1009 // An i2c adapter is frameless because the *caller* frame, which is interpreted,
1010 // routinely repairs its own stack pointer (from interpreter_frame_last_sp),
1011 // even if a callee has modified the stack pointer.
1012 // A c2i adapter is frameless because the *callee* frame, which is interpreted,
1013 // routinely repairs its caller's stack pointer (from sender_sp, which is set
1014 // up via the senderSP register).
1015 // In other words, if *either* the caller or callee is interpreted, we can
1016 // get the stack pointer repaired after a call.
1017 // This is why c2i and i2c adapters cannot be indefinitely composed.
1018 // In particular, if a c2i adapter were to somehow call an i2c adapter,
1019 // both caller and callee would be compiled methods, and neither would
1020 // clean up the stack pointer changes performed by the two adapters.
1021 // If this happens, control eventually transfers back to the compiled
1022 // caller, but with an uncorrected stack, causing delayed havoc.
1023
1024 // Pick up the return address
1025 __ movptr(rax, Address(rsp, 0));
1026
1027 if (VerifyAdapterCalls &&
1028 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) {
1029 // So, let's test for cascading c2i/i2c adapters right now.
1030 // assert(Interpreter::contains($return_addr) ||
1031 // StubRoutines::contains($return_addr),
1032 // "i2c adapter must return to an interpreter frame");
1033 __ block_comment("verify_i2c { ");
1034 Label L_ok;
1035 if (Interpreter::code() != NULL)
1036 range_check(masm, rax, r11,
1037 Interpreter::code()->code_start(), Interpreter::code()->code_end(),
1038 L_ok);
1039 if (StubRoutines::code1() != NULL)
1040 range_check(masm, rax, r11,
1041 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(),
1042 L_ok);
1043 if (StubRoutines::code2() != NULL)
1044 range_check(masm, rax, r11,
1045 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(),
1046 L_ok);
1047 const char* msg = "i2c adapter must return to an interpreter frame";
1048 __ block_comment(msg);
1049 __ stop(msg);
1050 __ bind(L_ok);
1051 __ block_comment("} verify_i2ce ");
1052 }
1053
1054 // Must preserve original SP for loading incoming arguments because
1055 // we need to align the outgoing SP for compiled code.
1056 __ movptr(r11, rsp);
1057
1058 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
1059 // in registers, we will occasionally have no stack args.
1060 int comp_words_on_stack = 0;
1061 if (comp_args_on_stack) {
1062 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
1063 // registers are below. By subtracting stack0, we either get a negative
1064 // number (all values in registers) or the maximum stack slot accessed.
1065
1066 // Convert 4-byte c2 stack slots to words.
1067 comp_words_on_stack = align_up(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord;
1068 // Round up to miminum stack alignment, in wordSize
1069 comp_words_on_stack = align_up(comp_words_on_stack, 2);
1070 __ subptr(rsp, comp_words_on_stack * wordSize);
1071 }
1072
1073
1074 // Ensure compiled code always sees stack at proper alignment
1075 __ andptr(rsp, -16);
1076
1077 // push the return address and misalign the stack that youngest frame always sees
1078 // as far as the placement of the call instruction
1079 __ push(rax);
1080
1081 // Put saved SP in another register
1082 const Register saved_sp = rax;
1083 __ movptr(saved_sp, r11);
1084
1085 // Will jump to the compiled code just as if compiled code was doing it.
1086 // Pre-load the register-jump target early, to schedule it better.
1087 __ movptr(r11, Address(rbx, in_bytes(Method::from_compiled_offset())));
1088
1089 #if INCLUDE_JVMCI
1090 if (EnableJVMCI || UseAOT) {
1091 // check if this call should be routed towards a specific entry point
1092 __ cmpptr(Address(r15_thread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())), 0);
1093 Label no_alternative_target;
1094 __ jcc(Assembler::equal, no_alternative_target);
1095 __ movptr(r11, Address(r15_thread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
1096 __ movptr(Address(r15_thread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())), 0);
1097 __ bind(no_alternative_target);
1098 }
1099 #endif // INCLUDE_JVMCI
1100
1101 int total_args_passed = compute_total_args_passed_int(sig_extended);
1102 // Now generate the shuffle code. Pick up all register args and move the
1103 // rest through the floating point stack top.
1104
1105 // next_arg_comp is the next argument from the compiler point of
1106 // view (value type fields are passed in registers/on the stack). In
1107 // sig_extended, a value type argument starts with: T_VALUETYPE,
1108 // followed by the types of the fields of the value type and T_VOID
1109 // to mark the end of the value type. ignored counts the number of
1110 // T_VALUETYPE/T_VOID. next_arg_int is the next argument from the
1111 // interpreter point of view (value types are passed by reference).
1112 for (int next_arg_comp = 0, ignored = 0, next_arg_int = 0; next_arg_comp < sig_extended.length(); next_arg_comp++) {
1113 assert(ignored <= next_arg_comp, "shouldn't skip over more slot than there are arguments");
1114 assert(next_arg_int < total_args_passed, "more arguments from the interpreter than expected?");
1115 BasicType bt = sig_extended.at(next_arg_comp)._bt;
1116 int ld_off = (total_args_passed - next_arg_int)*Interpreter::stackElementSize;
1117 if (!ValueTypePassFieldsAsArgs || bt != T_VALUETYPE) {
1118 // Load in argument order going down.
1119 // Point to interpreter value (vs. tag)
1120 int next_off = ld_off - Interpreter::stackElementSize;
1121 int offset = (bt == T_LONG || bt == T_DOUBLE) ? next_off : ld_off;
1122 const VMRegPair reg_pair = regs[next_arg_comp-ignored];
1123 size_t size_in_bytes = reg_pair.second()->is_valid() ? 8 : 4;
1124 gen_i2c_adapter_helper(masm, bt, next_arg_comp > 0 ? sig_extended.at(next_arg_comp-1)._bt : T_ILLEGAL,
1125 size_in_bytes, reg_pair, Address(saved_sp, offset), false);
1126 next_arg_int++;
1127 } else {
1128 next_arg_int++;
1129 ignored++;
1130 // get the buffer for that value type
1131 __ movptr(r10, Address(saved_sp, ld_off));
1132 int vt = 1;
1133 // load fields to registers/stack slots from the buffer: we know
1134 // we are done with that value type argument when we hit the
1135 // T_VOID that acts as an end of value type delimiter for this
1136 // value type. Value types are flattened so we might encounter
1137 // embedded value types. Each entry in sig_extended contains a
1138 // field offset in the buffer.
1139 do {
1140 next_arg_comp++;
1141 BasicType bt = sig_extended.at(next_arg_comp)._bt;
1142 BasicType prev_bt = sig_extended.at(next_arg_comp-1)._bt;
1143 if (bt == T_VALUETYPE) {
1144 vt++;
1145 ignored++;
1146 } else if (bt == T_VOID &&
1147 prev_bt != T_LONG &&
1148 prev_bt != T_DOUBLE) {
1149 vt--;
1150 ignored++;
1151 } else {
1152 int off = sig_extended.at(next_arg_comp)._offset;
1153 assert(off > 0, "offset in object should be positive");
1154 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
1155 bool is_oop = (bt == T_OBJECT || bt == T_ARRAY);
1156 gen_i2c_adapter_helper(masm, bt, prev_bt, size_in_bytes, regs[next_arg_comp - ignored], Address(r10, off), is_oop);
1157 }
1158 } while (vt != 0);
1159 }
1160 }
1161
1162 // 6243940 We might end up in handle_wrong_method if
1163 // the callee is deoptimized as we race thru here. If that
1164 // happens we don't want to take a safepoint because the
1165 // caller frame will look interpreted and arguments are now
1166 // "compiled" so it is much better to make this transition
1167 // invisible to the stack walking code. Unfortunately if
1168 // we try and find the callee by normal means a safepoint
1169 // is possible. So we stash the desired callee in the thread
1170 // and the vm will find there should this case occur.
1171
1172 __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx);
1173
1174 // put Method* where a c2i would expect should we end up there
1175 // only needed because of c2 resolve stubs return Method* as a result in
1176 // rax
1177 __ mov(rax, rbx);
1178 __ jmp(r11);
1179 }
1180
1181 // ---------------------------------------------------------------
1182 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
1183 int comp_args_on_stack,
1184 const GrowableArray<SigEntry>& sig_extended,
1185 const VMRegPair *regs,
1186 AdapterFingerPrint* fingerprint,
1187 AdapterBlob*& new_adapter) {
1188 address i2c_entry = __ pc();
1189
1190 gen_i2c_adapter(masm, comp_args_on_stack, sig_extended, regs);
1191
1192 // -------------------------------------------------------------------------
1193 // Generate a C2I adapter. On entry we know rbx holds the Method* during calls
1194 // to the interpreter. The args start out packed in the compiled layout. They
1195 // need to be unpacked into the interpreter layout. This will almost always
1196 // require some stack space. We grow the current (compiled) stack, then repack
1197 // the args. We finally end in a jump to the generic interpreter entry point.
1198 // On exit from the interpreter, the interpreter will restore our SP (lest the
1199 // compiled code, which relys solely on SP and not RBP, get sick).
1200
1201 address c2i_unverified_entry = __ pc();
1202 Label skip_fixup;
1203 Label ok;
1204
1205 Register holder = rax;
1206 Register receiver = j_rarg0;
1207 Register temp = rbx;
1208
1209 {
1210 __ load_klass(temp, receiver);
1211 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset()));
1212 __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset()));
1213 __ jcc(Assembler::equal, ok);
1214 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1215
1216 __ bind(ok);
1217 // Method might have been compiled since the call site was patched to
1218 // interpreted if that is the case treat it as a miss so we can get
1219 // the call site corrected.
1220 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
1221 __ jcc(Assembler::equal, skip_fixup);
1222 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1223 }
1224
1225 address c2i_entry = __ pc();
1226
1227 OopMapSet* oop_maps = NULL;
1228 int frame_complete = CodeOffsets::frame_never_safe;
1229 int frame_size_in_words = 0;
1230 gen_c2i_adapter(masm, sig_extended, regs, skip_fixup, i2c_entry, oop_maps, frame_complete, frame_size_in_words);
1231
1232 __ flush();
1233 new_adapter = AdapterBlob::create(masm->code(), frame_complete, frame_size_in_words, oop_maps);
1234
1235 // If value types are passed as fields, save the extended signature as symbol in
1236 // the AdapterHandlerEntry to be used by nmethod::preserve_callee_argument_oops().
1237 Symbol* extended_signature = NULL;
1238 if (ValueTypePassFieldsAsArgs) {
1239 bool has_value_argument = false;
1240 Thread* THREAD = Thread::current();
1241 ResourceMark rm(THREAD);
1242 int length = sig_extended.length();
1243 char* sig_str = NEW_RESOURCE_ARRAY(char, 2*length + 3);
1244 int idx = 0;
1245 sig_str[idx++] = '(';
1246 for (int index = 0; index < length; index++) {
1247 BasicType bt = sig_extended.at(index)._bt;
1248 if (bt == T_VALUETYPE) {
1249 has_value_argument = true;
1250 } else if (bt == T_VOID) {
1251 // Ignore
1252 } else {
1253 if (bt == T_ARRAY) {
1254 bt = T_OBJECT; // We don't know the element type, treat as Object
1255 }
1256 sig_str[idx++] = type2char(bt);
1257 if (bt == T_OBJECT) {
1258 sig_str[idx++] = ';';
1259 }
1260 }
1261 }
1262 sig_str[idx++] = ')';
1263 sig_str[idx++] = '\0';
1264 if (has_value_argument) {
1265 // Extended signature is only required if a value type argument is passed
1266 extended_signature = SymbolTable::new_permanent_symbol(sig_str, THREAD);
1267 }
1268 }
1269
1270 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry, extended_signature);
1271 }
1272
1273 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
1274 VMRegPair *regs,
1275 VMRegPair *regs2,
1276 int total_args_passed) {
1277 assert(regs2 == NULL, "not needed on x86");
1278 // We return the amount of VMRegImpl stack slots we need to reserve for all
1279 // the arguments NOT counting out_preserve_stack_slots.
1280
1281 // NOTE: These arrays will have to change when c1 is ported
1282 #ifdef _WIN64
1283 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
1284 c_rarg0, c_rarg1, c_rarg2, c_rarg3
1285 };
1286 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
1287 c_farg0, c_farg1, c_farg2, c_farg3
1288 };
1289 #else
1290 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
1291 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5
1292 };
1293 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
1294 c_farg0, c_farg1, c_farg2, c_farg3,
1295 c_farg4, c_farg5, c_farg6, c_farg7
1296 };
1297 #endif // _WIN64
1298
1299
1300 uint int_args = 0;
1301 uint fp_args = 0;
1302 uint stk_args = 0; // inc by 2 each time
1303
1304 for (int i = 0; i < total_args_passed; i++) {
1305 switch (sig_bt[i]) {
1306 case T_BOOLEAN:
1307 case T_CHAR:
1308 case T_BYTE:
1309 case T_SHORT:
1310 case T_INT:
1311 if (int_args < Argument::n_int_register_parameters_c) {
1312 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
1313 #ifdef _WIN64
1314 fp_args++;
1315 // Allocate slots for callee to stuff register args the stack.
1316 stk_args += 2;
1317 #endif
1318 } else {
1319 regs[i].set1(VMRegImpl::stack2reg(stk_args));
1320 stk_args += 2;
1321 }
1322 break;
1323 case T_LONG:
1324 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
1325 // fall through
1326 case T_OBJECT:
1327 case T_ARRAY:
1328 case T_ADDRESS:
1329 case T_METADATA:
1330 if (int_args < Argument::n_int_register_parameters_c) {
1331 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
1332 #ifdef _WIN64
1333 fp_args++;
1334 stk_args += 2;
1335 #endif
1336 } else {
1337 regs[i].set2(VMRegImpl::stack2reg(stk_args));
1338 stk_args += 2;
1339 }
1340 break;
1341 case T_FLOAT:
1342 if (fp_args < Argument::n_float_register_parameters_c) {
1343 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
1344 #ifdef _WIN64
1345 int_args++;
1346 // Allocate slots for callee to stuff register args the stack.
1347 stk_args += 2;
1348 #endif
1349 } else {
1350 regs[i].set1(VMRegImpl::stack2reg(stk_args));
1351 stk_args += 2;
1352 }
1353 break;
1354 case T_DOUBLE:
1355 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
1356 if (fp_args < Argument::n_float_register_parameters_c) {
1357 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
1358 #ifdef _WIN64
1359 int_args++;
1360 // Allocate slots for callee to stuff register args the stack.
1361 stk_args += 2;
1362 #endif
1363 } else {
1364 regs[i].set2(VMRegImpl::stack2reg(stk_args));
1365 stk_args += 2;
1366 }
1367 break;
1368 case T_VOID: // Halves of longs and doubles
1369 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
1370 regs[i].set_bad();
1371 break;
1372 default:
1373 ShouldNotReachHere();
1374 break;
1375 }
1376 }
1377 #ifdef _WIN64
1378 // windows abi requires that we always allocate enough stack space
1379 // for 4 64bit registers to be stored down.
1380 if (stk_args < 8) {
1381 stk_args = 8;
1382 }
1383 #endif // _WIN64
1384
1385 return stk_args;
1386 }
1387
1388 // On 64 bit we will store integer like items to the stack as
1389 // 64 bits items (sparc abi) even though java would only store
1390 // 32bits for a parameter. On 32bit it will simply be 32 bits
1391 // So this routine will do 32->32 on 32bit and 32->64 on 64bit
1392 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1393 if (src.first()->is_stack()) {
1394 if (dst.first()->is_stack()) {
1395 // stack to stack
1396 __ movslq(rax, Address(rbp, reg2offset_in(src.first())));
1397 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1398 } else {
1399 // stack to reg
1400 __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
1401 }
1402 } else if (dst.first()->is_stack()) {
1403 // reg to stack
1404 // Do we really have to sign extend???
1405 // __ movslq(src.first()->as_Register(), src.first()->as_Register());
1406 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1407 } else {
1408 // Do we really have to sign extend???
1409 // __ movslq(dst.first()->as_Register(), src.first()->as_Register());
1410 if (dst.first() != src.first()) {
1411 __ movq(dst.first()->as_Register(), src.first()->as_Register());
1412 }
1413 }
1414 }
1415
1416 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1417 if (src.first()->is_stack()) {
1418 if (dst.first()->is_stack()) {
1419 // stack to stack
1420 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
1421 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1422 } else {
1423 // stack to reg
1424 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
1425 }
1426 } else if (dst.first()->is_stack()) {
1427 // reg to stack
1428 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1429 } else {
1430 if (dst.first() != src.first()) {
1431 __ movq(dst.first()->as_Register(), src.first()->as_Register());
1432 }
1433 }
1434 }
1435
1436 // An oop arg. Must pass a handle not the oop itself
1437 static void object_move(MacroAssembler* masm,
1438 OopMap* map,
1439 int oop_handle_offset,
1440 int framesize_in_slots,
1441 VMRegPair src,
1442 VMRegPair dst,
1443 bool is_receiver,
1444 int* receiver_offset) {
1445
1446 // must pass a handle. First figure out the location we use as a handle
1447
1448 Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register();
1449
1450 // See if oop is NULL if it is we need no handle
1451
1452 if (src.first()->is_stack()) {
1453
1454 // Oop is already on the stack as an argument
1455 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1456 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
1457 if (is_receiver) {
1458 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
1459 }
1460
1461 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
1462 __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
1463 // conditionally move a NULL
1464 __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first())));
1465 } else {
1466
1467 // Oop is in an a register we must store it to the space we reserve
1468 // on the stack for oop_handles and pass a handle if oop is non-NULL
1469
1470 const Register rOop = src.first()->as_Register();
1471 int oop_slot;
1472 if (rOop == j_rarg0)
1473 oop_slot = 0;
1474 else if (rOop == j_rarg1)
1475 oop_slot = 1;
1476 else if (rOop == j_rarg2)
1477 oop_slot = 2;
1478 else if (rOop == j_rarg3)
1479 oop_slot = 3;
1480 else if (rOop == j_rarg4)
1481 oop_slot = 4;
1482 else {
1483 assert(rOop == j_rarg5, "wrong register");
1484 oop_slot = 5;
1485 }
1486
1487 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset;
1488 int offset = oop_slot*VMRegImpl::stack_slot_size;
1489
1490 map->set_oop(VMRegImpl::stack2reg(oop_slot));
1491 // Store oop in handle area, may be NULL
1492 __ movptr(Address(rsp, offset), rOop);
1493 if (is_receiver) {
1494 *receiver_offset = offset;
1495 }
1496
1497 __ cmpptr(rOop, (int32_t)NULL_WORD);
1498 __ lea(rHandle, Address(rsp, offset));
1499 // conditionally move a NULL from the handle area where it was just stored
1500 __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset));
1501 }
1502
1503 // If arg is on the stack then place it otherwise it is already in correct reg.
1504 if (dst.first()->is_stack()) {
1505 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1506 }
1507 }
1508
1509 // A float arg may have to do float reg int reg conversion
1510 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1511 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1512
1513 // The calling conventions assures us that each VMregpair is either
1514 // all really one physical register or adjacent stack slots.
1515 // This greatly simplifies the cases here compared to sparc.
1516
1517 if (src.first()->is_stack()) {
1518 if (dst.first()->is_stack()) {
1519 __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1520 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1521 } else {
1522 // stack to reg
1523 assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters");
1524 __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first())));
1525 }
1526 } else if (dst.first()->is_stack()) {
1527 // reg to stack
1528 assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters");
1529 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1530 } else {
1531 // reg to reg
1532 // In theory these overlap but the ordering is such that this is likely a nop
1533 if ( src.first() != dst.first()) {
1534 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister());
1535 }
1536 }
1537 }
1538
1539 // A long move
1540 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1541
1542 // The calling conventions assures us that each VMregpair is either
1543 // all really one physical register or adjacent stack slots.
1544 // This greatly simplifies the cases here compared to sparc.
1545
1546 if (src.is_single_phys_reg() ) {
1547 if (dst.is_single_phys_reg()) {
1548 if (dst.first() != src.first()) {
1549 __ mov(dst.first()->as_Register(), src.first()->as_Register());
1550 }
1551 } else {
1552 assert(dst.is_single_reg(), "not a stack pair");
1553 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1554 }
1555 } else if (dst.is_single_phys_reg()) {
1556 assert(src.is_single_reg(), "not a stack pair");
1557 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first())));
1558 } else {
1559 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
1560 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
1561 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1562 }
1563 }
1564
1565 // A double move
1566 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1567
1568 // The calling conventions assures us that each VMregpair is either
1569 // all really one physical register or adjacent stack slots.
1570 // This greatly simplifies the cases here compared to sparc.
1571
1572 if (src.is_single_phys_reg() ) {
1573 if (dst.is_single_phys_reg()) {
1574 // In theory these overlap but the ordering is such that this is likely a nop
1575 if ( src.first() != dst.first()) {
1576 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister());
1577 }
1578 } else {
1579 assert(dst.is_single_reg(), "not a stack pair");
1580 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1581 }
1582 } else if (dst.is_single_phys_reg()) {
1583 assert(src.is_single_reg(), "not a stack pair");
1584 __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first())));
1585 } else {
1586 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
1587 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
1588 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1589 }
1590 }
1591
1592
1593 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1594 // We always ignore the frame_slots arg and just use the space just below frame pointer
1595 // which by this time is free to use
1596 switch (ret_type) {
1597 case T_FLOAT:
1598 __ movflt(Address(rbp, -wordSize), xmm0);
1599 break;
1600 case T_DOUBLE:
1601 __ movdbl(Address(rbp, -wordSize), xmm0);
1602 break;
1603 case T_VOID: break;
1604 default: {
1605 __ movptr(Address(rbp, -wordSize), rax);
1606 }
1607 }
1608 }
1609
1610 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1611 // We always ignore the frame_slots arg and just use the space just below frame pointer
1612 // which by this time is free to use
1613 switch (ret_type) {
1614 case T_FLOAT:
1615 __ movflt(xmm0, Address(rbp, -wordSize));
1616 break;
1617 case T_DOUBLE:
1618 __ movdbl(xmm0, Address(rbp, -wordSize));
1619 break;
1620 case T_VOID: break;
1621 default: {
1622 __ movptr(rax, Address(rbp, -wordSize));
1623 }
1624 }
1625 }
1626
1627 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1628 for ( int i = first_arg ; i < arg_count ; i++ ) {
1629 if (args[i].first()->is_Register()) {
1630 __ push(args[i].first()->as_Register());
1631 } else if (args[i].first()->is_XMMRegister()) {
1632 __ subptr(rsp, 2*wordSize);
1633 __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister());
1634 }
1635 }
1636 }
1637
1638 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1639 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) {
1640 if (args[i].first()->is_Register()) {
1641 __ pop(args[i].first()->as_Register());
1642 } else if (args[i].first()->is_XMMRegister()) {
1643 __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0));
1644 __ addptr(rsp, 2*wordSize);
1645 }
1646 }
1647 }
1648
1649
1650 static void save_or_restore_arguments(MacroAssembler* masm,
1651 const int stack_slots,
1652 const int total_in_args,
1653 const int arg_save_area,
1654 OopMap* map,
1655 VMRegPair* in_regs,
1656 BasicType* in_sig_bt) {
1657 // if map is non-NULL then the code should store the values,
1658 // otherwise it should load them.
1659 int slot = arg_save_area;
1660 // Save down double word first
1661 for ( int i = 0; i < total_in_args; i++) {
1662 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) {
1663 int offset = slot * VMRegImpl::stack_slot_size;
1664 slot += VMRegImpl::slots_per_word;
1665 assert(slot <= stack_slots, "overflow");
1666 if (map != NULL) {
1667 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1668 } else {
1669 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1670 }
1671 }
1672 if (in_regs[i].first()->is_Register() &&
1673 (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) {
1674 int offset = slot * VMRegImpl::stack_slot_size;
1675 if (map != NULL) {
1676 __ movq(Address(rsp, offset), in_regs[i].first()->as_Register());
1677 if (in_sig_bt[i] == T_ARRAY) {
1678 map->set_oop(VMRegImpl::stack2reg(slot));;
1679 }
1680 } else {
1681 __ movq(in_regs[i].first()->as_Register(), Address(rsp, offset));
1682 }
1683 slot += VMRegImpl::slots_per_word;
1684 }
1685 }
1686 // Save or restore single word registers
1687 for ( int i = 0; i < total_in_args; i++) {
1688 if (in_regs[i].first()->is_Register()) {
1689 int offset = slot * VMRegImpl::stack_slot_size;
1690 slot++;
1691 assert(slot <= stack_slots, "overflow");
1692
1693 // Value is in an input register pass we must flush it to the stack
1694 const Register reg = in_regs[i].first()->as_Register();
1695 switch (in_sig_bt[i]) {
1696 case T_BOOLEAN:
1697 case T_CHAR:
1698 case T_BYTE:
1699 case T_SHORT:
1700 case T_INT:
1701 if (map != NULL) {
1702 __ movl(Address(rsp, offset), reg);
1703 } else {
1704 __ movl(reg, Address(rsp, offset));
1705 }
1706 break;
1707 case T_ARRAY:
1708 case T_LONG:
1709 // handled above
1710 break;
1711 case T_OBJECT:
1712 default: ShouldNotReachHere();
1713 }
1714 } else if (in_regs[i].first()->is_XMMRegister()) {
1715 if (in_sig_bt[i] == T_FLOAT) {
1716 int offset = slot * VMRegImpl::stack_slot_size;
1717 slot++;
1718 assert(slot <= stack_slots, "overflow");
1719 if (map != NULL) {
1720 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1721 } else {
1722 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1723 }
1724 }
1725 } else if (in_regs[i].first()->is_stack()) {
1726 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1727 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1728 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots));
1729 }
1730 }
1731 }
1732 }
1733
1734
1735 // Check GCLocker::needs_gc and enter the runtime if it's true. This
1736 // keeps a new JNI critical region from starting until a GC has been
1737 // forced. Save down any oops in registers and describe them in an
1738 // OopMap.
1739 static void check_needs_gc_for_critical_native(MacroAssembler* masm,
1740 int stack_slots,
1741 int total_c_args,
1742 int total_in_args,
1743 int arg_save_area,
1744 OopMapSet* oop_maps,
1745 VMRegPair* in_regs,
1746 BasicType* in_sig_bt) {
1747 __ block_comment("check GCLocker::needs_gc");
1748 Label cont;
1749 __ cmp8(ExternalAddress((address)GCLocker::needs_gc_address()), false);
1750 __ jcc(Assembler::equal, cont);
1751
1752 // Save down any incoming oops and call into the runtime to halt for a GC
1753
1754 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1755 save_or_restore_arguments(masm, stack_slots, total_in_args,
1756 arg_save_area, map, in_regs, in_sig_bt);
1757
1758 address the_pc = __ pc();
1759 oop_maps->add_gc_map( __ offset(), map);
1760 __ set_last_Java_frame(rsp, noreg, the_pc);
1761
1762 __ block_comment("block_for_jni_critical");
1763 __ movptr(c_rarg0, r15_thread);
1764 __ mov(r12, rsp); // remember sp
1765 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
1766 __ andptr(rsp, -16); // align stack as required by ABI
1767 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical)));
1768 __ mov(rsp, r12); // restore sp
1769 __ reinit_heapbase();
1770
1771 __ reset_last_Java_frame(false);
1772
1773 save_or_restore_arguments(masm, stack_slots, total_in_args,
1774 arg_save_area, NULL, in_regs, in_sig_bt);
1775 __ bind(cont);
1776 #ifdef ASSERT
1777 if (StressCriticalJNINatives) {
1778 // Stress register saving
1779 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1780 save_or_restore_arguments(masm, stack_slots, total_in_args,
1781 arg_save_area, map, in_regs, in_sig_bt);
1782 // Destroy argument registers
1783 for (int i = 0; i < total_in_args - 1; i++) {
1784 if (in_regs[i].first()->is_Register()) {
1785 const Register reg = in_regs[i].first()->as_Register();
1786 __ xorptr(reg, reg);
1787 } else if (in_regs[i].first()->is_XMMRegister()) {
1788 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister());
1789 } else if (in_regs[i].first()->is_FloatRegister()) {
1790 ShouldNotReachHere();
1791 } else if (in_regs[i].first()->is_stack()) {
1792 // Nothing to do
1793 } else {
1794 ShouldNotReachHere();
1795 }
1796 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) {
1797 i++;
1798 }
1799 }
1800
1801 save_or_restore_arguments(masm, stack_slots, total_in_args,
1802 arg_save_area, NULL, in_regs, in_sig_bt);
1803 }
1804 #endif
1805 }
1806
1807 // Unpack an array argument into a pointer to the body and the length
1808 // if the array is non-null, otherwise pass 0 for both.
1809 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) {
1810 Register tmp_reg = rax;
1811 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1812 "possible collision");
1813 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1814 "possible collision");
1815
1816 __ block_comment("unpack_array_argument {");
1817
1818 // Pass the length, ptr pair
1819 Label is_null, done;
1820 VMRegPair tmp;
1821 tmp.set_ptr(tmp_reg->as_VMReg());
1822 if (reg.first()->is_stack()) {
1823 // Load the arg up from the stack
1824 move_ptr(masm, reg, tmp);
1825 reg = tmp;
1826 }
1827 __ testptr(reg.first()->as_Register(), reg.first()->as_Register());
1828 __ jccb(Assembler::equal, is_null);
1829 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1830 move_ptr(masm, tmp, body_arg);
1831 // load the length relative to the body.
1832 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() -
1833 arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1834 move32_64(masm, tmp, length_arg);
1835 __ jmpb(done);
1836 __ bind(is_null);
1837 // Pass zeros
1838 __ xorptr(tmp_reg, tmp_reg);
1839 move_ptr(masm, tmp, body_arg);
1840 move32_64(masm, tmp, length_arg);
1841 __ bind(done);
1842
1843 __ block_comment("} unpack_array_argument");
1844 }
1845
1846
1847 // Different signatures may require very different orders for the move
1848 // to avoid clobbering other arguments. There's no simple way to
1849 // order them safely. Compute a safe order for issuing stores and
1850 // break any cycles in those stores. This code is fairly general but
1851 // it's not necessary on the other platforms so we keep it in the
1852 // platform dependent code instead of moving it into a shared file.
1853 // (See bugs 7013347 & 7145024.)
1854 // Note that this code is specific to LP64.
1855 class ComputeMoveOrder: public StackObj {
1856 class MoveOperation: public ResourceObj {
1857 friend class ComputeMoveOrder;
1858 private:
1859 VMRegPair _src;
1860 VMRegPair _dst;
1861 int _src_index;
1862 int _dst_index;
1863 bool _processed;
1864 MoveOperation* _next;
1865 MoveOperation* _prev;
1866
1867 static int get_id(VMRegPair r) {
1868 return r.first()->value();
1869 }
1870
1871 public:
1872 MoveOperation(int src_index, VMRegPair src, int dst_index, VMRegPair dst):
1873 _src(src)
1874 , _src_index(src_index)
1875 , _dst(dst)
1876 , _dst_index(dst_index)
1877 , _next(NULL)
1878 , _prev(NULL)
1879 , _processed(false) {
1880 }
1881
1882 VMRegPair src() const { return _src; }
1883 int src_id() const { return get_id(src()); }
1884 int src_index() const { return _src_index; }
1885 VMRegPair dst() const { return _dst; }
1886 void set_dst(int i, VMRegPair dst) { _dst_index = i, _dst = dst; }
1887 int dst_index() const { return _dst_index; }
1888 int dst_id() const { return get_id(dst()); }
1889 MoveOperation* next() const { return _next; }
1890 MoveOperation* prev() const { return _prev; }
1891 void set_processed() { _processed = true; }
1892 bool is_processed() const { return _processed; }
1893
1894 // insert
1895 void break_cycle(VMRegPair temp_register) {
1896 // create a new store following the last store
1897 // to move from the temp_register to the original
1898 MoveOperation* new_store = new MoveOperation(-1, temp_register, dst_index(), dst());
1899
1900 // break the cycle of links and insert new_store at the end
1901 // break the reverse link.
1902 MoveOperation* p = prev();
1903 assert(p->next() == this, "must be");
1904 _prev = NULL;
1905 p->_next = new_store;
1906 new_store->_prev = p;
1907
1908 // change the original store to save it's value in the temp.
1909 set_dst(-1, temp_register);
1910 }
1911
1912 void link(GrowableArray<MoveOperation*>& killer) {
1913 // link this store in front the store that it depends on
1914 MoveOperation* n = killer.at_grow(src_id(), NULL);
1915 if (n != NULL) {
1916 assert(_next == NULL && n->_prev == NULL, "shouldn't have been set yet");
1917 _next = n;
1918 n->_prev = this;
1919 }
1920 }
1921 };
1922
1923 private:
1924 GrowableArray<MoveOperation*> edges;
1925
1926 public:
1927 ComputeMoveOrder(int total_in_args, VMRegPair* in_regs, int total_c_args, VMRegPair* out_regs,
1928 BasicType* in_sig_bt, GrowableArray<int>& arg_order, VMRegPair tmp_vmreg) {
1929 // Move operations where the dest is the stack can all be
1930 // scheduled first since they can't interfere with the other moves.
1931 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
1932 if (in_sig_bt[i] == T_ARRAY) {
1933 c_arg--;
1934 if (out_regs[c_arg].first()->is_stack() &&
1935 out_regs[c_arg + 1].first()->is_stack()) {
1936 arg_order.push(i);
1937 arg_order.push(c_arg);
1938 } else {
1939 if (out_regs[c_arg].first()->is_stack() ||
1940 in_regs[i].first() == out_regs[c_arg].first()) {
1941 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg + 1]);
1942 } else {
1943 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]);
1944 }
1945 }
1946 } else if (in_sig_bt[i] == T_VOID) {
1947 arg_order.push(i);
1948 arg_order.push(c_arg);
1949 } else {
1950 if (out_regs[c_arg].first()->is_stack() ||
1951 in_regs[i].first() == out_regs[c_arg].first()) {
1952 arg_order.push(i);
1953 arg_order.push(c_arg);
1954 } else {
1955 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]);
1956 }
1957 }
1958 }
1959 // Break any cycles in the register moves and emit the in the
1960 // proper order.
1961 GrowableArray<MoveOperation*>* stores = get_store_order(tmp_vmreg);
1962 for (int i = 0; i < stores->length(); i++) {
1963 arg_order.push(stores->at(i)->src_index());
1964 arg_order.push(stores->at(i)->dst_index());
1965 }
1966 }
1967
1968 // Collected all the move operations
1969 void add_edge(int src_index, VMRegPair src, int dst_index, VMRegPair dst) {
1970 if (src.first() == dst.first()) return;
1971 edges.append(new MoveOperation(src_index, src, dst_index, dst));
1972 }
1973
1974 // Walk the edges breaking cycles between moves. The result list
1975 // can be walked in order to produce the proper set of loads
1976 GrowableArray<MoveOperation*>* get_store_order(VMRegPair temp_register) {
1977 // Record which moves kill which values
1978 GrowableArray<MoveOperation*> killer;
1979 for (int i = 0; i < edges.length(); i++) {
1980 MoveOperation* s = edges.at(i);
1981 assert(killer.at_grow(s->dst_id(), NULL) == NULL, "only one killer");
1982 killer.at_put_grow(s->dst_id(), s, NULL);
1983 }
1984 assert(killer.at_grow(MoveOperation::get_id(temp_register), NULL) == NULL,
1985 "make sure temp isn't in the registers that are killed");
1986
1987 // create links between loads and stores
1988 for (int i = 0; i < edges.length(); i++) {
1989 edges.at(i)->link(killer);
1990 }
1991
1992 // at this point, all the move operations are chained together
1993 // in a doubly linked list. Processing it backwards finds
1994 // the beginning of the chain, forwards finds the end. If there's
1995 // a cycle it can be broken at any point, so pick an edge and walk
1996 // backward until the list ends or we end where we started.
1997 GrowableArray<MoveOperation*>* stores = new GrowableArray<MoveOperation*>();
1998 for (int e = 0; e < edges.length(); e++) {
1999 MoveOperation* s = edges.at(e);
2000 if (!s->is_processed()) {
2001 MoveOperation* start = s;
2002 // search for the beginning of the chain or cycle
2003 while (start->prev() != NULL && start->prev() != s) {
2004 start = start->prev();
2005 }
2006 if (start->prev() == s) {
2007 start->break_cycle(temp_register);
2008 }
2009 // walk the chain forward inserting to store list
2010 while (start != NULL) {
2011 stores->append(start);
2012 start->set_processed();
2013 start = start->next();
2014 }
2015 }
2016 }
2017 return stores;
2018 }
2019 };
2020
2021 static void verify_oop_args(MacroAssembler* masm,
2022 const methodHandle& method,
2023 const BasicType* sig_bt,
2024 const VMRegPair* regs) {
2025 Register temp_reg = rbx; // not part of any compiled calling seq
2026 if (VerifyOops) {
2027 for (int i = 0; i < method->size_of_parameters(); i++) {
2028 if (sig_bt[i] == T_OBJECT ||
2029 sig_bt[i] == T_ARRAY) {
2030 VMReg r = regs[i].first();
2031 assert(r->is_valid(), "bad oop arg");
2032 if (r->is_stack()) {
2033 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
2034 __ verify_oop(temp_reg);
2035 } else {
2036 __ verify_oop(r->as_Register());
2037 }
2038 }
2039 }
2040 }
2041 }
2042
2043 static void gen_special_dispatch(MacroAssembler* masm,
2044 const methodHandle& method,
2045 const BasicType* sig_bt,
2046 const VMRegPair* regs) {
2047 verify_oop_args(masm, method, sig_bt, regs);
2048 vmIntrinsics::ID iid = method->intrinsic_id();
2049
2050 // Now write the args into the outgoing interpreter space
2051 bool has_receiver = false;
2052 Register receiver_reg = noreg;
2053 int member_arg_pos = -1;
2054 Register member_reg = noreg;
2055 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
2056 if (ref_kind != 0) {
2057 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
2058 member_reg = rbx; // known to be free at this point
2059 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
2060 } else if (iid == vmIntrinsics::_invokeBasic) {
2061 has_receiver = true;
2062 } else {
2063 fatal("unexpected intrinsic id %d", iid);
2064 }
2065
2066 if (member_reg != noreg) {
2067 // Load the member_arg into register, if necessary.
2068 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
2069 VMReg r = regs[member_arg_pos].first();
2070 if (r->is_stack()) {
2071 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
2072 } else {
2073 // no data motion is needed
2074 member_reg = r->as_Register();
2075 }
2076 }
2077
2078 if (has_receiver) {
2079 // Make sure the receiver is loaded into a register.
2080 assert(method->size_of_parameters() > 0, "oob");
2081 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
2082 VMReg r = regs[0].first();
2083 assert(r->is_valid(), "bad receiver arg");
2084 if (r->is_stack()) {
2085 // Porting note: This assumes that compiled calling conventions always
2086 // pass the receiver oop in a register. If this is not true on some
2087 // platform, pick a temp and load the receiver from stack.
2088 fatal("receiver always in a register");
2089 receiver_reg = j_rarg0; // known to be free at this point
2090 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
2091 } else {
2092 // no data motion is needed
2093 receiver_reg = r->as_Register();
2094 }
2095 }
2096
2097 // Figure out which address we are really jumping to:
2098 MethodHandles::generate_method_handle_dispatch(masm, iid,
2099 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
2100 }
2101
2102 // ---------------------------------------------------------------------------
2103 // Generate a native wrapper for a given method. The method takes arguments
2104 // in the Java compiled code convention, marshals them to the native
2105 // convention (handlizes oops, etc), transitions to native, makes the call,
2106 // returns to java state (possibly blocking), unhandlizes any result and
2107 // returns.
2108 //
2109 // Critical native functions are a shorthand for the use of
2110 // GetPrimtiveArrayCritical and disallow the use of any other JNI
2111 // functions. The wrapper is expected to unpack the arguments before
2112 // passing them to the callee and perform checks before and after the
2113 // native call to ensure that they GCLocker
2114 // lock_critical/unlock_critical semantics are followed. Some other
2115 // parts of JNI setup are skipped like the tear down of the JNI handle
2116 // block and the check for pending exceptions it's impossible for them
2117 // to be thrown.
2118 //
2119 // They are roughly structured like this:
2120 // if (GCLocker::needs_gc())
2121 // SharedRuntime::block_for_jni_critical();
2122 // tranistion to thread_in_native
2123 // unpack arrray arguments and call native entry point
2124 // check for safepoint in progress
2125 // check if any thread suspend flags are set
2126 // call into JVM and possible unlock the JNI critical
2127 // if a GC was suppressed while in the critical native.
2128 // transition back to thread_in_Java
2129 // return to caller
2130 //
2131 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
2132 const methodHandle& method,
2133 int compile_id,
2134 BasicType* in_sig_bt,
2135 VMRegPair* in_regs,
2136 BasicType ret_type) {
2137 if (method->is_method_handle_intrinsic()) {
2138 vmIntrinsics::ID iid = method->intrinsic_id();
2139 intptr_t start = (intptr_t)__ pc();
2140 int vep_offset = ((intptr_t)__ pc()) - start;
2141 gen_special_dispatch(masm,
2142 method,
2143 in_sig_bt,
2144 in_regs);
2145 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
2146 __ flush();
2147 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
2148 return nmethod::new_native_nmethod(method,
2149 compile_id,
2150 masm->code(),
2151 vep_offset,
2152 frame_complete,
2153 stack_slots / VMRegImpl::slots_per_word,
2154 in_ByteSize(-1),
2155 in_ByteSize(-1),
2156 (OopMapSet*)NULL);
2157 }
2158 bool is_critical_native = true;
2159 address native_func = method->critical_native_function();
2160 if (native_func == NULL) {
2161 native_func = method->native_function();
2162 is_critical_native = false;
2163 }
2164 assert(native_func != NULL, "must have function");
2165
2166 // An OopMap for lock (and class if static)
2167 OopMapSet *oop_maps = new OopMapSet();
2168 intptr_t start = (intptr_t)__ pc();
2169
2170 // We have received a description of where all the java arg are located
2171 // on entry to the wrapper. We need to convert these args to where
2172 // the jni function will expect them. To figure out where they go
2173 // we convert the java signature to a C signature by inserting
2174 // the hidden arguments as arg[0] and possibly arg[1] (static method)
2175
2176 const int total_in_args = method->size_of_parameters();
2177 int total_c_args = total_in_args;
2178 if (!is_critical_native) {
2179 total_c_args += 1;
2180 if (method->is_static()) {
2181 total_c_args++;
2182 }
2183 } else {
2184 for (int i = 0; i < total_in_args; i++) {
2185 if (in_sig_bt[i] == T_ARRAY) {
2186 total_c_args++;
2187 }
2188 }
2189 }
2190
2191 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
2192 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
2193 BasicType* in_elem_bt = NULL;
2194
2195 int argc = 0;
2196 if (!is_critical_native) {
2197 out_sig_bt[argc++] = T_ADDRESS;
2198 if (method->is_static()) {
2199 out_sig_bt[argc++] = T_OBJECT;
2200 }
2201
2202 for (int i = 0; i < total_in_args ; i++ ) {
2203 out_sig_bt[argc++] = in_sig_bt[i];
2204 }
2205 } else {
2206 Thread* THREAD = Thread::current();
2207 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args);
2208 SignatureStream ss(method->signature());
2209 for (int i = 0; i < total_in_args ; i++ ) {
2210 if (in_sig_bt[i] == T_ARRAY) {
2211 // Arrays are passed as int, elem* pair
2212 out_sig_bt[argc++] = T_INT;
2213 out_sig_bt[argc++] = T_ADDRESS;
2214 Symbol* atype = ss.as_symbol(CHECK_NULL);
2215 const char* at = atype->as_C_string();
2216 if (strlen(at) == 2) {
2217 assert(at[0] == '[', "must be");
2218 switch (at[1]) {
2219 case 'B': in_elem_bt[i] = T_BYTE; break;
2220 case 'C': in_elem_bt[i] = T_CHAR; break;
2221 case 'D': in_elem_bt[i] = T_DOUBLE; break;
2222 case 'F': in_elem_bt[i] = T_FLOAT; break;
2223 case 'I': in_elem_bt[i] = T_INT; break;
2224 case 'J': in_elem_bt[i] = T_LONG; break;
2225 case 'S': in_elem_bt[i] = T_SHORT; break;
2226 case 'Z': in_elem_bt[i] = T_BOOLEAN; break;
2227 default: ShouldNotReachHere();
2228 }
2229 }
2230 } else {
2231 out_sig_bt[argc++] = in_sig_bt[i];
2232 in_elem_bt[i] = T_VOID;
2233 }
2234 if (in_sig_bt[i] != T_VOID) {
2235 assert(in_sig_bt[i] == ss.type(), "must match");
2236 ss.next();
2237 }
2238 }
2239 }
2240
2241 // Now figure out where the args must be stored and how much stack space
2242 // they require.
2243 int out_arg_slots;
2244 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args);
2245
2246 // Compute framesize for the wrapper. We need to handlize all oops in
2247 // incoming registers
2248
2249 // Calculate the total number of stack slots we will need.
2250
2251 // First count the abi requirement plus all of the outgoing args
2252 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
2253
2254 // Now the space for the inbound oop handle area
2255 int total_save_slots = 6 * VMRegImpl::slots_per_word; // 6 arguments passed in registers
2256 if (is_critical_native) {
2257 // Critical natives may have to call out so they need a save area
2258 // for register arguments.
2259 int double_slots = 0;
2260 int single_slots = 0;
2261 for ( int i = 0; i < total_in_args; i++) {
2262 if (in_regs[i].first()->is_Register()) {
2263 const Register reg = in_regs[i].first()->as_Register();
2264 switch (in_sig_bt[i]) {
2265 case T_BOOLEAN:
2266 case T_BYTE:
2267 case T_SHORT:
2268 case T_CHAR:
2269 case T_INT: single_slots++; break;
2270 case T_ARRAY: // specific to LP64 (7145024)
2271 case T_LONG: double_slots++; break;
2272 default: ShouldNotReachHere();
2273 }
2274 } else if (in_regs[i].first()->is_XMMRegister()) {
2275 switch (in_sig_bt[i]) {
2276 case T_FLOAT: single_slots++; break;
2277 case T_DOUBLE: double_slots++; break;
2278 default: ShouldNotReachHere();
2279 }
2280 } else if (in_regs[i].first()->is_FloatRegister()) {
2281 ShouldNotReachHere();
2282 }
2283 }
2284 total_save_slots = double_slots * 2 + single_slots;
2285 // align the save area
2286 if (double_slots != 0) {
2287 stack_slots = align_up(stack_slots, 2);
2288 }
2289 }
2290
2291 int oop_handle_offset = stack_slots;
2292 stack_slots += total_save_slots;
2293
2294 // Now any space we need for handlizing a klass if static method
2295
2296 int klass_slot_offset = 0;
2297 int klass_offset = -1;
2298 int lock_slot_offset = 0;
2299 bool is_static = false;
2300
2301 if (method->is_static()) {
2302 klass_slot_offset = stack_slots;
2303 stack_slots += VMRegImpl::slots_per_word;
2304 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
2305 is_static = true;
2306 }
2307
2308 // Plus a lock if needed
2309
2310 if (method->is_synchronized()) {
2311 lock_slot_offset = stack_slots;
2312 stack_slots += VMRegImpl::slots_per_word;
2313 }
2314
2315 // Now a place (+2) to save return values or temp during shuffling
2316 // + 4 for return address (which we own) and saved rbp
2317 stack_slots += 6;
2318
2319 // Ok The space we have allocated will look like:
2320 //
2321 //
2322 // FP-> | |
2323 // |---------------------|
2324 // | 2 slots for moves |
2325 // |---------------------|
2326 // | lock box (if sync) |
2327 // |---------------------| <- lock_slot_offset
2328 // | klass (if static) |
2329 // |---------------------| <- klass_slot_offset
2330 // | oopHandle area |
2331 // |---------------------| <- oop_handle_offset (6 java arg registers)
2332 // | outbound memory |
2333 // | based arguments |
2334 // | |
2335 // |---------------------|
2336 // | |
2337 // SP-> | out_preserved_slots |
2338 //
2339 //
2340
2341
2342 // Now compute actual number of stack words we need rounding to make
2343 // stack properly aligned.
2344 stack_slots = align_up(stack_slots, StackAlignmentInSlots);
2345
2346 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
2347
2348 // First thing make an ic check to see if we should even be here
2349
2350 // We are free to use all registers as temps without saving them and
2351 // restoring them except rbp. rbp is the only callee save register
2352 // as far as the interpreter and the compiler(s) are concerned.
2353
2354
2355 const Register ic_reg = rax;
2356 const Register receiver = j_rarg0;
2357
2358 Label hit;
2359 Label exception_pending;
2360
2361 assert_different_registers(ic_reg, receiver, rscratch1);
2362 __ verify_oop(receiver);
2363 __ load_klass(rscratch1, receiver);
2364 __ cmpq(ic_reg, rscratch1);
2365 __ jcc(Assembler::equal, hit);
2366
2367 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
2368
2369 // Verified entry point must be aligned
2370 __ align(8);
2371
2372 __ bind(hit);
2373
2374 int vep_offset = ((intptr_t)__ pc()) - start;
2375
2376 #ifdef COMPILER1
2377 // For Object.hashCode, System.identityHashCode try to pull hashCode from object header if available.
2378 if ((InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) || (method->intrinsic_id() == vmIntrinsics::_identityHashCode)) {
2379 inline_check_hashcode_from_object_header(masm, method, j_rarg0 /*obj_reg*/, rax /*result*/);
2380 }
2381 #endif // COMPILER1
2382
2383 // The instruction at the verified entry point must be 5 bytes or longer
2384 // because it can be patched on the fly by make_non_entrant. The stack bang
2385 // instruction fits that requirement.
2386
2387 // Generate stack overflow check
2388
2389 if (UseStackBanging) {
2390 __ bang_stack_with_offset((int)JavaThread::stack_shadow_zone_size());
2391 } else {
2392 // need a 5 byte instruction to allow MT safe patching to non-entrant
2393 __ fat_nop();
2394 }
2395
2396 // Generate a new frame for the wrapper.
2397 __ enter();
2398 // -2 because return address is already present and so is saved rbp
2399 __ subptr(rsp, stack_size - 2*wordSize);
2400
2401 // Frame is now completed as far as size and linkage.
2402 int frame_complete = ((intptr_t)__ pc()) - start;
2403
2404 if (UseRTMLocking) {
2405 // Abort RTM transaction before calling JNI
2406 // because critical section will be large and will be
2407 // aborted anyway. Also nmethod could be deoptimized.
2408 __ xabort(0);
2409 }
2410
2411 #ifdef ASSERT
2412 {
2413 Label L;
2414 __ mov(rax, rsp);
2415 __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI)
2416 __ cmpptr(rax, rsp);
2417 __ jcc(Assembler::equal, L);
2418 __ stop("improperly aligned stack");
2419 __ bind(L);
2420 }
2421 #endif /* ASSERT */
2422
2423
2424 // We use r14 as the oop handle for the receiver/klass
2425 // It is callee save so it survives the call to native
2426
2427 const Register oop_handle_reg = r14;
2428
2429 if (is_critical_native) {
2430 check_needs_gc_for_critical_native(masm, stack_slots, total_c_args, total_in_args,
2431 oop_handle_offset, oop_maps, in_regs, in_sig_bt);
2432 }
2433
2434 //
2435 // We immediately shuffle the arguments so that any vm call we have to
2436 // make from here on out (sync slow path, jvmti, etc.) we will have
2437 // captured the oops from our caller and have a valid oopMap for
2438 // them.
2439
2440 // -----------------
2441 // The Grand Shuffle
2442
2443 // The Java calling convention is either equal (linux) or denser (win64) than the
2444 // c calling convention. However the because of the jni_env argument the c calling
2445 // convention always has at least one more (and two for static) arguments than Java.
2446 // Therefore if we move the args from java -> c backwards then we will never have
2447 // a register->register conflict and we don't have to build a dependency graph
2448 // and figure out how to break any cycles.
2449 //
2450
2451 // Record esp-based slot for receiver on stack for non-static methods
2452 int receiver_offset = -1;
2453
2454 // This is a trick. We double the stack slots so we can claim
2455 // the oops in the caller's frame. Since we are sure to have
2456 // more args than the caller doubling is enough to make
2457 // sure we can capture all the incoming oop args from the
2458 // caller.
2459 //
2460 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
2461
2462 // Mark location of rbp (someday)
2463 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp));
2464
2465 // Use eax, ebx as temporaries during any memory-memory moves we have to do
2466 // All inbound args are referenced based on rbp and all outbound args via rsp.
2467
2468
2469 #ifdef ASSERT
2470 bool reg_destroyed[RegisterImpl::number_of_registers];
2471 bool freg_destroyed[XMMRegisterImpl::number_of_registers];
2472 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) {
2473 reg_destroyed[r] = false;
2474 }
2475 for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) {
2476 freg_destroyed[f] = false;
2477 }
2478
2479 #endif /* ASSERT */
2480
2481 // This may iterate in two different directions depending on the
2482 // kind of native it is. The reason is that for regular JNI natives
2483 // the incoming and outgoing registers are offset upwards and for
2484 // critical natives they are offset down.
2485 GrowableArray<int> arg_order(2 * total_in_args);
2486 VMRegPair tmp_vmreg;
2487 tmp_vmreg.set1(rbx->as_VMReg());
2488
2489 if (!is_critical_native) {
2490 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
2491 arg_order.push(i);
2492 arg_order.push(c_arg);
2493 }
2494 } else {
2495 // Compute a valid move order, using tmp_vmreg to break any cycles
2496 ComputeMoveOrder cmo(total_in_args, in_regs, total_c_args, out_regs, in_sig_bt, arg_order, tmp_vmreg);
2497 }
2498
2499 int temploc = -1;
2500 for (int ai = 0; ai < arg_order.length(); ai += 2) {
2501 int i = arg_order.at(ai);
2502 int c_arg = arg_order.at(ai + 1);
2503 __ block_comment(err_msg("move %d -> %d", i, c_arg));
2504 if (c_arg == -1) {
2505 assert(is_critical_native, "should only be required for critical natives");
2506 // This arg needs to be moved to a temporary
2507 __ mov(tmp_vmreg.first()->as_Register(), in_regs[i].first()->as_Register());
2508 in_regs[i] = tmp_vmreg;
2509 temploc = i;
2510 continue;
2511 } else if (i == -1) {
2512 assert(is_critical_native, "should only be required for critical natives");
2513 // Read from the temporary location
2514 assert(temploc != -1, "must be valid");
2515 i = temploc;
2516 temploc = -1;
2517 }
2518 #ifdef ASSERT
2519 if (in_regs[i].first()->is_Register()) {
2520 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!");
2521 } else if (in_regs[i].first()->is_XMMRegister()) {
2522 assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!");
2523 }
2524 if (out_regs[c_arg].first()->is_Register()) {
2525 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
2526 } else if (out_regs[c_arg].first()->is_XMMRegister()) {
2527 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true;
2528 }
2529 #endif /* ASSERT */
2530 switch (in_sig_bt[i]) {
2531 case T_ARRAY:
2532 if (is_critical_native) {
2533 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]);
2534 c_arg++;
2535 #ifdef ASSERT
2536 if (out_regs[c_arg].first()->is_Register()) {
2537 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
2538 } else if (out_regs[c_arg].first()->is_XMMRegister()) {
2539 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true;
2540 }
2541 #endif
2542 break;
2543 }
2544 case T_OBJECT:
2545 assert(!is_critical_native, "no oop arguments");
2546 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
2547 ((i == 0) && (!is_static)),
2548 &receiver_offset);
2549 break;
2550 case T_VOID:
2551 break;
2552
2553 case T_FLOAT:
2554 float_move(masm, in_regs[i], out_regs[c_arg]);
2555 break;
2556
2557 case T_DOUBLE:
2558 assert( i + 1 < total_in_args &&
2559 in_sig_bt[i + 1] == T_VOID &&
2560 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
2561 double_move(masm, in_regs[i], out_regs[c_arg]);
2562 break;
2563
2564 case T_LONG :
2565 long_move(masm, in_regs[i], out_regs[c_arg]);
2566 break;
2567
2568 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
2569
2570 default:
2571 move32_64(masm, in_regs[i], out_regs[c_arg]);
2572 }
2573 }
2574
2575 int c_arg;
2576
2577 // Pre-load a static method's oop into r14. Used both by locking code and
2578 // the normal JNI call code.
2579 if (!is_critical_native) {
2580 // point c_arg at the first arg that is already loaded in case we
2581 // need to spill before we call out
2582 c_arg = total_c_args - total_in_args;
2583
2584 if (method->is_static()) {
2585
2586 // load oop into a register
2587 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror()));
2588
2589 // Now handlize the static class mirror it's known not-null.
2590 __ movptr(Address(rsp, klass_offset), oop_handle_reg);
2591 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
2592
2593 // Now get the handle
2594 __ lea(oop_handle_reg, Address(rsp, klass_offset));
2595 // store the klass handle as second argument
2596 __ movptr(c_rarg1, oop_handle_reg);
2597 // and protect the arg if we must spill
2598 c_arg--;
2599 }
2600 } else {
2601 // For JNI critical methods we need to save all registers in save_args.
2602 c_arg = 0;
2603 }
2604
2605 // Change state to native (we save the return address in the thread, since it might not
2606 // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
2607 // points into the right code segment. It does not have to be the correct return pc.
2608 // We use the same pc/oopMap repeatedly when we call out
2609
2610 intptr_t the_pc = (intptr_t) __ pc();
2611 oop_maps->add_gc_map(the_pc - start, map);
2612
2613 __ set_last_Java_frame(rsp, noreg, (address)the_pc);
2614
2615
2616 // We have all of the arguments setup at this point. We must not touch any register
2617 // argument registers at this point (what if we save/restore them there are no oop?
2618
2619 {
2620 SkipIfEqual skip(masm, &DTraceMethodProbes, false);
2621 // protect the args we've loaded
2622 save_args(masm, total_c_args, c_arg, out_regs);
2623 __ mov_metadata(c_rarg1, method());
2624 __ call_VM_leaf(
2625 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
2626 r15_thread, c_rarg1);
2627 restore_args(masm, total_c_args, c_arg, out_regs);
2628 }
2629
2630 // RedefineClasses() tracing support for obsolete method entry
2631 if (log_is_enabled(Trace, redefine, class, obsolete)) {
2632 // protect the args we've loaded
2633 save_args(masm, total_c_args, c_arg, out_regs);
2634 __ mov_metadata(c_rarg1, method());
2635 __ call_VM_leaf(
2636 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
2637 r15_thread, c_rarg1);
2638 restore_args(masm, total_c_args, c_arg, out_regs);
2639 }
2640
2641 // Lock a synchronized method
2642
2643 // Register definitions used by locking and unlocking
2644
2645 const Register swap_reg = rax; // Must use rax for cmpxchg instruction
2646 const Register obj_reg = rbx; // Will contain the oop
2647 const Register lock_reg = r13; // Address of compiler lock object (BasicLock)
2648 const Register old_hdr = r13; // value of old header at unlock time
2649
2650 Label slow_path_lock;
2651 Label lock_done;
2652
2653 if (method->is_synchronized()) {
2654 assert(!is_critical_native, "unhandled");
2655
2656
2657 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
2658
2659 // Get the handle (the 2nd argument)
2660 __ mov(oop_handle_reg, c_rarg1);
2661
2662 // Get address of the box
2663
2664 __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
2665
2666 // Load the oop from the handle
2667 __ movptr(obj_reg, Address(oop_handle_reg, 0));
2668
2669 if (UseBiasedLocking) {
2670 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock);
2671 }
2672
2673 // Load immediate 1 into swap_reg %rax
2674 __ movl(swap_reg, 1);
2675
2676 // Load (object->mark() | 1) into swap_reg %rax
2677 __ orptr(swap_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
2678
2679 // Save (object->mark() | 1) into BasicLock's displaced header
2680 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2681
2682 if (os::is_MP()) {
2683 __ lock();
2684 }
2685
2686 // src -> dest iff dest == rax else rax <- dest
2687 __ cmpxchgptr(lock_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
2688 __ jcc(Assembler::equal, lock_done);
2689
2690 // Hmm should this move to the slow path code area???
2691
2692 // Test if the oopMark is an obvious stack pointer, i.e.,
2693 // 1) (mark & 3) == 0, and
2694 // 2) rsp <= mark < mark + os::pagesize()
2695 // These 3 tests can be done by evaluating the following
2696 // expression: ((mark - rsp) & (3 - os::vm_page_size())),
2697 // assuming both stack pointer and pagesize have their
2698 // least significant 2 bits clear.
2699 // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg
2700
2701 __ subptr(swap_reg, rsp);
2702 __ andptr(swap_reg, 3 - os::vm_page_size());
2703
2704 // Save the test result, for recursive case, the result is zero
2705 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2706 __ jcc(Assembler::notEqual, slow_path_lock);
2707
2708 // Slow path will re-enter here
2709
2710 __ bind(lock_done);
2711 }
2712
2713
2714 // Finally just about ready to make the JNI call
2715
2716
2717 // get JNIEnv* which is first argument to native
2718 if (!is_critical_native) {
2719 __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset())));
2720 }
2721
2722 // Now set thread in native
2723 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native);
2724
2725 __ call(RuntimeAddress(native_func));
2726
2727 // Verify or restore cpu control state after JNI call
2728 __ restore_cpu_control_state_after_jni();
2729
2730 // Unpack native results.
2731 switch (ret_type) {
2732 case T_BOOLEAN: __ c2bool(rax); break;
2733 case T_CHAR : __ movzwl(rax, rax); break;
2734 case T_BYTE : __ sign_extend_byte (rax); break;
2735 case T_SHORT : __ sign_extend_short(rax); break;
2736 case T_INT : /* nothing to do */ break;
2737 case T_DOUBLE :
2738 case T_FLOAT :
2739 // Result is in xmm0 we'll save as needed
2740 break;
2741 case T_ARRAY: // Really a handle
2742 case T_OBJECT: // Really a handle
2743 break; // can't de-handlize until after safepoint check
2744 case T_VOID: break;
2745 case T_LONG: break;
2746 default : ShouldNotReachHere();
2747 }
2748
2749 // Switch thread to "native transition" state before reading the synchronization state.
2750 // This additional state is necessary because reading and testing the synchronization
2751 // state is not atomic w.r.t. GC, as this scenario demonstrates:
2752 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
2753 // VM thread changes sync state to synchronizing and suspends threads for GC.
2754 // Thread A is resumed to finish this native method, but doesn't block here since it
2755 // didn't see any synchronization is progress, and escapes.
2756 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
2757
2758 if(os::is_MP()) {
2759 if (UseMembar) {
2760 // Force this write out before the read below
2761 __ membar(Assembler::Membar_mask_bits(
2762 Assembler::LoadLoad | Assembler::LoadStore |
2763 Assembler::StoreLoad | Assembler::StoreStore));
2764 } else {
2765 // Write serialization page so VM thread can do a pseudo remote membar.
2766 // We use the current thread pointer to calculate a thread specific
2767 // offset to write to within the page. This minimizes bus traffic
2768 // due to cache line collision.
2769 __ serialize_memory(r15_thread, rcx);
2770 }
2771 }
2772
2773 Label after_transition;
2774
2775 // check for safepoint operation in progress and/or pending suspend requests
2776 {
2777 Label Continue;
2778
2779 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()),
2780 SafepointSynchronize::_not_synchronized);
2781
2782 Label L;
2783 __ jcc(Assembler::notEqual, L);
2784 __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0);
2785 __ jcc(Assembler::equal, Continue);
2786 __ bind(L);
2787
2788 // Don't use call_VM as it will see a possible pending exception and forward it
2789 // and never return here preventing us from clearing _last_native_pc down below.
2790 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
2791 // preserved and correspond to the bcp/locals pointers. So we do a runtime call
2792 // by hand.
2793 //
2794 __ vzeroupper();
2795 save_native_result(masm, ret_type, stack_slots);
2796 __ mov(c_rarg0, r15_thread);
2797 __ mov(r12, rsp); // remember sp
2798 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
2799 __ andptr(rsp, -16); // align stack as required by ABI
2800 if (!is_critical_native) {
2801 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans)));
2802 } else {
2803 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition)));
2804 }
2805 __ mov(rsp, r12); // restore sp
2806 __ reinit_heapbase();
2807 // Restore any method result value
2808 restore_native_result(masm, ret_type, stack_slots);
2809
2810 if (is_critical_native) {
2811 // The call above performed the transition to thread_in_Java so
2812 // skip the transition logic below.
2813 __ jmpb(after_transition);
2814 }
2815
2816 __ bind(Continue);
2817 }
2818
2819 // change thread state
2820 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java);
2821 __ bind(after_transition);
2822
2823 Label reguard;
2824 Label reguard_done;
2825 __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_reserved_disabled);
2826 __ jcc(Assembler::equal, reguard);
2827 __ bind(reguard_done);
2828
2829 // native result if any is live
2830
2831 // Unlock
2832 Label unlock_done;
2833 Label slow_path_unlock;
2834 if (method->is_synchronized()) {
2835
2836 // Get locked oop from the handle we passed to jni
2837 __ movptr(obj_reg, Address(oop_handle_reg, 0));
2838
2839 Label done;
2840
2841 if (UseBiasedLocking) {
2842 __ biased_locking_exit(obj_reg, old_hdr, done);
2843 }
2844
2845 // Simple recursive lock?
2846
2847 __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD);
2848 __ jcc(Assembler::equal, done);
2849
2850 // Must save rax if if it is live now because cmpxchg must use it
2851 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2852 save_native_result(masm, ret_type, stack_slots);
2853 }
2854
2855
2856 // get address of the stack lock
2857 __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
2858 // get old displaced header
2859 __ movptr(old_hdr, Address(rax, 0));
2860
2861 // Atomic swap old header if oop still contains the stack lock
2862 if (os::is_MP()) {
2863 __ lock();
2864 }
2865 __ cmpxchgptr(old_hdr, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
2866 __ jcc(Assembler::notEqual, slow_path_unlock);
2867
2868 // slow path re-enters here
2869 __ bind(unlock_done);
2870 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2871 restore_native_result(masm, ret_type, stack_slots);
2872 }
2873
2874 __ bind(done);
2875
2876 }
2877 {
2878 SkipIfEqual skip(masm, &DTraceMethodProbes, false);
2879 save_native_result(masm, ret_type, stack_slots);
2880 __ mov_metadata(c_rarg1, method());
2881 __ call_VM_leaf(
2882 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2883 r15_thread, c_rarg1);
2884 restore_native_result(masm, ret_type, stack_slots);
2885 }
2886
2887 __ reset_last_Java_frame(false);
2888
2889 // Unbox oop result, e.g. JNIHandles::resolve value.
2890 if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
2891 __ resolve_jobject(rax /* value */,
2892 r15_thread /* thread */,
2893 rcx /* tmp */);
2894 }
2895
2896 if (CheckJNICalls) {
2897 // clear_pending_jni_exception_check
2898 __ movptr(Address(r15_thread, JavaThread::pending_jni_exception_check_fn_offset()), NULL_WORD);
2899 }
2900
2901 if (!is_critical_native) {
2902 // reset handle block
2903 __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset()));
2904 __ movl(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD);
2905 }
2906
2907 // pop our frame
2908
2909 __ leave();
2910
2911 if (!is_critical_native) {
2912 // Any exception pending?
2913 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2914 __ jcc(Assembler::notEqual, exception_pending);
2915 }
2916
2917 // Return
2918
2919 __ ret(0);
2920
2921 // Unexpected paths are out of line and go here
2922
2923 if (!is_critical_native) {
2924 // forward the exception
2925 __ bind(exception_pending);
2926
2927 // and forward the exception
2928 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2929 }
2930
2931 // Slow path locking & unlocking
2932 if (method->is_synchronized()) {
2933
2934 // BEGIN Slow path lock
2935 __ bind(slow_path_lock);
2936
2937 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2938 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2939
2940 // protect the args we've loaded
2941 save_args(masm, total_c_args, c_arg, out_regs);
2942
2943 __ mov(c_rarg0, obj_reg);
2944 __ mov(c_rarg1, lock_reg);
2945 __ mov(c_rarg2, r15_thread);
2946
2947 // Not a leaf but we have last_Java_frame setup as we want
2948 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3);
2949 restore_args(masm, total_c_args, c_arg, out_regs);
2950
2951 #ifdef ASSERT
2952 { Label L;
2953 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2954 __ jcc(Assembler::equal, L);
2955 __ stop("no pending exception allowed on exit from monitorenter");
2956 __ bind(L);
2957 }
2958 #endif
2959 __ jmp(lock_done);
2960
2961 // END Slow path lock
2962
2963 // BEGIN Slow path unlock
2964 __ bind(slow_path_unlock);
2965
2966 // If we haven't already saved the native result we must save it now as xmm registers
2967 // are still exposed.
2968 __ vzeroupper();
2969 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2970 save_native_result(masm, ret_type, stack_slots);
2971 }
2972
2973 __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
2974
2975 __ mov(c_rarg0, obj_reg);
2976 __ mov(c_rarg2, r15_thread);
2977 __ mov(r12, rsp); // remember sp
2978 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
2979 __ andptr(rsp, -16); // align stack as required by ABI
2980
2981 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2982 // NOTE that obj_reg == rbx currently
2983 __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset())));
2984 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2985
2986 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2987 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
2988 __ mov(rsp, r12); // restore sp
2989 __ reinit_heapbase();
2990 #ifdef ASSERT
2991 {
2992 Label L;
2993 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
2994 __ jcc(Assembler::equal, L);
2995 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2996 __ bind(L);
2997 }
2998 #endif /* ASSERT */
2999
3000 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx);
3001
3002 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
3003 restore_native_result(masm, ret_type, stack_slots);
3004 }
3005 __ jmp(unlock_done);
3006
3007 // END Slow path unlock
3008
3009 } // synchronized
3010
3011 // SLOW PATH Reguard the stack if needed
3012
3013 __ bind(reguard);
3014 __ vzeroupper();
3015 save_native_result(masm, ret_type, stack_slots);
3016 __ mov(r12, rsp); // remember sp
3017 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
3018 __ andptr(rsp, -16); // align stack as required by ABI
3019 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
3020 __ mov(rsp, r12); // restore sp
3021 __ reinit_heapbase();
3022 restore_native_result(masm, ret_type, stack_slots);
3023 // and continue
3024 __ jmp(reguard_done);
3025
3026
3027
3028 __ flush();
3029
3030 nmethod *nm = nmethod::new_native_nmethod(method,
3031 compile_id,
3032 masm->code(),
3033 vep_offset,
3034 frame_complete,
3035 stack_slots / VMRegImpl::slots_per_word,
3036 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
3037 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
3038 oop_maps);
3039
3040 if (is_critical_native) {
3041 nm->set_lazy_critical_native(true);
3042 }
3043
3044 return nm;
3045
3046 }
3047
3048 // this function returns the adjust size (in number of words) to a c2i adapter
3049 // activation for use during deoptimization
3050 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
3051 return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
3052 }
3053
3054
3055 uint SharedRuntime::out_preserve_stack_slots() {
3056 return 0;
3057 }
3058
3059 //------------------------------generate_deopt_blob----------------------------
3060 void SharedRuntime::generate_deopt_blob() {
3061 // Allocate space for the code
3062 ResourceMark rm;
3063 // Setup code generation tools
3064 int pad = 0;
3065 #if INCLUDE_JVMCI
3066 if (EnableJVMCI || UseAOT) {
3067 pad += 512; // Increase the buffer size when compiling for JVMCI
3068 }
3069 #endif
3070 CodeBuffer buffer("deopt_blob", 2048+pad, 1024);
3071 MacroAssembler* masm = new MacroAssembler(&buffer);
3072 int frame_size_in_words;
3073 OopMap* map = NULL;
3074 OopMapSet *oop_maps = new OopMapSet();
3075
3076 // -------------
3077 // This code enters when returning to a de-optimized nmethod. A return
3078 // address has been pushed on the the stack, and return values are in
3079 // registers.
3080 // If we are doing a normal deopt then we were called from the patched
3081 // nmethod from the point we returned to the nmethod. So the return
3082 // address on the stack is wrong by NativeCall::instruction_size
3083 // We will adjust the value so it looks like we have the original return
3084 // address on the stack (like when we eagerly deoptimized).
3085 // In the case of an exception pending when deoptimizing, we enter
3086 // with a return address on the stack that points after the call we patched
3087 // into the exception handler. We have the following register state from,
3088 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp).
3089 // rax: exception oop
3090 // rbx: exception handler
3091 // rdx: throwing pc
3092 // So in this case we simply jam rdx into the useless return address and
3093 // the stack looks just like we want.
3094 //
3095 // At this point we need to de-opt. We save the argument return
3096 // registers. We call the first C routine, fetch_unroll_info(). This
3097 // routine captures the return values and returns a structure which
3098 // describes the current frame size and the sizes of all replacement frames.
3099 // The current frame is compiled code and may contain many inlined
3100 // functions, each with their own JVM state. We pop the current frame, then
3101 // push all the new frames. Then we call the C routine unpack_frames() to
3102 // populate these frames. Finally unpack_frames() returns us the new target
3103 // address. Notice that callee-save registers are BLOWN here; they have
3104 // already been captured in the vframeArray at the time the return PC was
3105 // patched.
3106 address start = __ pc();
3107 Label cont;
3108
3109 // Prolog for non exception case!
3110
3111 // Save everything in sight.
3112 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
3113
3114 // Normal deoptimization. Save exec mode for unpack_frames.
3115 __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved
3116 __ jmp(cont);
3117
3118 int reexecute_offset = __ pc() - start;
3119 #if INCLUDE_JVMCI && !defined(COMPILER1)
3120 if (EnableJVMCI && UseJVMCICompiler) {
3121 // JVMCI does not use this kind of deoptimization
3122 __ should_not_reach_here();
3123 }
3124 #endif
3125
3126 // Reexecute case
3127 // return address is the pc describes what bci to do re-execute at
3128
3129 // No need to update map as each call to save_live_registers will produce identical oopmap
3130 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
3131
3132 __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved
3133 __ jmp(cont);
3134
3135 #if INCLUDE_JVMCI
3136 Label after_fetch_unroll_info_call;
3137 int implicit_exception_uncommon_trap_offset = 0;
3138 int uncommon_trap_offset = 0;
3139
3140 if (EnableJVMCI || UseAOT) {
3141 implicit_exception_uncommon_trap_offset = __ pc() - start;
3142
3143 __ pushptr(Address(r15_thread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
3144 __ movptr(Address(r15_thread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())), (int32_t)NULL_WORD);
3145
3146 uncommon_trap_offset = __ pc() - start;
3147
3148 // Save everything in sight.
3149 RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
3150 // fetch_unroll_info needs to call last_java_frame()
3151 __ set_last_Java_frame(noreg, noreg, NULL);
3152
3153 __ movl(c_rarg1, Address(r15_thread, in_bytes(JavaThread::pending_deoptimization_offset())));
3154 __ movl(Address(r15_thread, in_bytes(JavaThread::pending_deoptimization_offset())), -1);
3155
3156 __ movl(r14, (int32_t)Deoptimization::Unpack_reexecute);
3157 __ mov(c_rarg0, r15_thread);
3158 __ movl(c_rarg2, r14); // exec mode
3159 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
3160 oop_maps->add_gc_map( __ pc()-start, map->deep_copy());
3161
3162 __ reset_last_Java_frame(false);
3163
3164 __ jmp(after_fetch_unroll_info_call);
3165 } // EnableJVMCI
3166 #endif // INCLUDE_JVMCI
3167
3168 int exception_offset = __ pc() - start;
3169
3170 // Prolog for exception case
3171
3172 // all registers are dead at this entry point, except for rax, and
3173 // rdx which contain the exception oop and exception pc
3174 // respectively. Set them in TLS and fall thru to the
3175 // unpack_with_exception_in_tls entry point.
3176
3177 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx);
3178 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax);
3179
3180 int exception_in_tls_offset = __ pc() - start;
3181
3182 // new implementation because exception oop is now passed in JavaThread
3183
3184 // Prolog for exception case
3185 // All registers must be preserved because they might be used by LinearScan
3186 // Exceptiop oop and throwing PC are passed in JavaThread
3187 // tos: stack at point of call to method that threw the exception (i.e. only
3188 // args are on the stack, no return address)
3189
3190 // make room on stack for the return address
3191 // It will be patched later with the throwing pc. The correct value is not
3192 // available now because loading it from memory would destroy registers.
3193 __ push(0);
3194
3195 // Save everything in sight.
3196 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
3197
3198 // Now it is safe to overwrite any register
3199
3200 // Deopt during an exception. Save exec mode for unpack_frames.
3201 __ movl(r14, Deoptimization::Unpack_exception); // callee-saved
3202
3203 // load throwing pc from JavaThread and patch it as the return address
3204 // of the current frame. Then clear the field in JavaThread
3205
3206 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
3207 __ movptr(Address(rbp, wordSize), rdx);
3208 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
3209
3210 #ifdef ASSERT
3211 // verify that there is really an exception oop in JavaThread
3212 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
3213 __ verify_oop(rax);
3214
3215 // verify that there is no pending exception
3216 Label no_pending_exception;
3217 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
3218 __ testptr(rax, rax);
3219 __ jcc(Assembler::zero, no_pending_exception);
3220 __ stop("must not have pending exception here");
3221 __ bind(no_pending_exception);
3222 #endif
3223
3224 __ bind(cont);
3225
3226 // Call C code. Need thread and this frame, but NOT official VM entry
3227 // crud. We cannot block on this call, no GC can happen.
3228 //
3229 // UnrollBlock* fetch_unroll_info(JavaThread* thread)
3230
3231 // fetch_unroll_info needs to call last_java_frame().
3232
3233 __ set_last_Java_frame(noreg, noreg, NULL);
3234 #ifdef ASSERT
3235 { Label L;
3236 __ cmpptr(Address(r15_thread,
3237 JavaThread::last_Java_fp_offset()),
3238 (int32_t)0);
3239 __ jcc(Assembler::equal, L);
3240 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared");
3241 __ bind(L);
3242 }
3243 #endif // ASSERT
3244 __ mov(c_rarg0, r15_thread);
3245 __ movl(c_rarg1, r14); // exec_mode
3246 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
3247
3248 // Need to have an oopmap that tells fetch_unroll_info where to
3249 // find any register it might need.
3250 oop_maps->add_gc_map(__ pc() - start, map);
3251
3252 __ reset_last_Java_frame(false);
3253
3254 #if INCLUDE_JVMCI
3255 if (EnableJVMCI || UseAOT) {
3256 __ bind(after_fetch_unroll_info_call);
3257 }
3258 #endif
3259
3260 // Load UnrollBlock* into rdi
3261 __ mov(rdi, rax);
3262
3263 __ movl(r14, Address(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()));
3264 Label noException;
3265 __ cmpl(r14, Deoptimization::Unpack_exception); // Was exception pending?
3266 __ jcc(Assembler::notEqual, noException);
3267 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
3268 // QQQ this is useless it was NULL above
3269 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
3270 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD);
3271 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
3272
3273 __ verify_oop(rax);
3274
3275 // Overwrite the result registers with the exception results.
3276 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
3277 // I think this is useless
3278 __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx);
3279
3280 __ bind(noException);
3281
3282 // Only register save data is on the stack.
3283 // Now restore the result registers. Everything else is either dead
3284 // or captured in the vframeArray.
3285 RegisterSaver::restore_result_registers(masm);
3286
3287 // All of the register save area has been popped of the stack. Only the
3288 // return address remains.
3289
3290 // Pop all the frames we must move/replace.
3291 //
3292 // Frame picture (youngest to oldest)
3293 // 1: self-frame (no frame link)
3294 // 2: deopting frame (no frame link)
3295 // 3: caller of deopting frame (could be compiled/interpreted).
3296 //
3297 // Note: by leaving the return address of self-frame on the stack
3298 // and using the size of frame 2 to adjust the stack
3299 // when we are done the return to frame 3 will still be on the stack.
3300
3301 // Pop deoptimized frame
3302 __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
3303 __ addptr(rsp, rcx);
3304
3305 // rsp should be pointing at the return address to the caller (3)
3306
3307 // Pick up the initial fp we should save
3308 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
3309 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
3310
3311 #ifdef ASSERT
3312 // Compilers generate code that bang the stack by as much as the
3313 // interpreter would need. So this stack banging should never
3314 // trigger a fault. Verify that it does not on non product builds.
3315 if (UseStackBanging) {
3316 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
3317 __ bang_stack_size(rbx, rcx);
3318 }
3319 #endif
3320
3321 // Load address of array of frame pcs into rcx
3322 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
3323
3324 // Trash the old pc
3325 __ addptr(rsp, wordSize);
3326
3327 // Load address of array of frame sizes into rsi
3328 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
3329
3330 // Load counter into rdx
3331 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
3332
3333 // Now adjust the caller's stack to make up for the extra locals
3334 // but record the original sp so that we can save it in the skeletal interpreter
3335 // frame and the stack walking of interpreter_sender will get the unextended sp
3336 // value and not the "real" sp value.
3337
3338 const Register sender_sp = r8;
3339
3340 __ mov(sender_sp, rsp);
3341 __ movl(rbx, Address(rdi,
3342 Deoptimization::UnrollBlock::
3343 caller_adjustment_offset_in_bytes()));
3344 __ subptr(rsp, rbx);
3345
3346 // Push interpreter frames in a loop
3347 Label loop;
3348 __ bind(loop);
3349 __ movptr(rbx, Address(rsi, 0)); // Load frame size
3350 __ subptr(rbx, 2*wordSize); // We'll push pc and ebp by hand
3351 __ pushptr(Address(rcx, 0)); // Save return address
3352 __ enter(); // Save old & set new ebp
3353 __ subptr(rsp, rbx); // Prolog
3354 // This value is corrected by layout_activation_impl
3355 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD );
3356 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable
3357 __ mov(sender_sp, rsp); // Pass sender_sp to next frame
3358 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
3359 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
3360 __ decrementl(rdx); // Decrement counter
3361 __ jcc(Assembler::notZero, loop);
3362 __ pushptr(Address(rcx, 0)); // Save final return address
3363
3364 // Re-push self-frame
3365 __ enter(); // Save old & set new ebp
3366
3367 // Allocate a full sized register save area.
3368 // Return address and rbp are in place, so we allocate two less words.
3369 __ subptr(rsp, (frame_size_in_words - 2) * wordSize);
3370
3371 // Restore frame locals after moving the frame
3372 __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0);
3373 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
3374
3375 // Call C code. Need thread but NOT official VM entry
3376 // crud. We cannot block on this call, no GC can happen. Call should
3377 // restore return values to their stack-slots with the new SP.
3378 //
3379 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode)
3380
3381 // Use rbp because the frames look interpreted now
3382 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP.
3383 // Don't need the precise return PC here, just precise enough to point into this code blob.
3384 address the_pc = __ pc();
3385 __ set_last_Java_frame(noreg, rbp, the_pc);
3386
3387 __ andptr(rsp, -(StackAlignmentInBytes)); // Fix stack alignment as required by ABI
3388 __ mov(c_rarg0, r15_thread);
3389 __ movl(c_rarg1, r14); // second arg: exec_mode
3390 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
3391 // Revert SP alignment after call since we're going to do some SP relative addressing below
3392 __ movptr(rsp, Address(r15_thread, JavaThread::last_Java_sp_offset()));
3393
3394 // Set an oopmap for the call site
3395 // Use the same PC we used for the last java frame
3396 oop_maps->add_gc_map(the_pc - start,
3397 new OopMap( frame_size_in_words, 0 ));
3398
3399 // Clear fp AND pc
3400 __ reset_last_Java_frame(true);
3401
3402 // Collect return values
3403 __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes()));
3404 __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes()));
3405 // I think this is useless (throwing pc?)
3406 __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes()));
3407
3408 // Pop self-frame.
3409 __ leave(); // Epilog
3410
3411 // Jump to interpreter
3412 __ ret(0);
3413
3414 // Make sure all code is generated
3415 masm->flush();
3416
3417 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
3418 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
3419 #if INCLUDE_JVMCI
3420 if (EnableJVMCI || UseAOT) {
3421 _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset);
3422 _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset);
3423 }
3424 #endif
3425 }
3426
3427 #ifdef COMPILER2
3428 //------------------------------generate_uncommon_trap_blob--------------------
3429 void SharedRuntime::generate_uncommon_trap_blob() {
3430 // Allocate space for the code
3431 ResourceMark rm;
3432 // Setup code generation tools
3433 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024);
3434 MacroAssembler* masm = new MacroAssembler(&buffer);
3435
3436 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
3437
3438 address start = __ pc();
3439
3440 if (UseRTMLocking) {
3441 // Abort RTM transaction before possible nmethod deoptimization.
3442 __ xabort(0);
3443 }
3444
3445 // Push self-frame. We get here with a return address on the
3446 // stack, so rsp is 8-byte aligned until we allocate our frame.
3447 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog!
3448
3449 // No callee saved registers. rbp is assumed implicitly saved
3450 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp);
3451
3452 // compiler left unloaded_class_index in j_rarg0 move to where the
3453 // runtime expects it.
3454 __ movl(c_rarg1, j_rarg0);
3455
3456 __ set_last_Java_frame(noreg, noreg, NULL);
3457
3458 // Call C code. Need thread but NOT official VM entry
3459 // crud. We cannot block on this call, no GC can happen. Call should
3460 // capture callee-saved registers as well as return values.
3461 // Thread is in rdi already.
3462 //
3463 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index);
3464
3465 __ mov(c_rarg0, r15_thread);
3466 __ movl(c_rarg2, Deoptimization::Unpack_uncommon_trap);
3467 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
3468
3469 // Set an oopmap for the call site
3470 OopMapSet* oop_maps = new OopMapSet();
3471 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0);
3472
3473 // location of rbp is known implicitly by the frame sender code
3474
3475 oop_maps->add_gc_map(__ pc() - start, map);
3476
3477 __ reset_last_Java_frame(false);
3478
3479 // Load UnrollBlock* into rdi
3480 __ mov(rdi, rax);
3481
3482 #ifdef ASSERT
3483 { Label L;
3484 __ cmpptr(Address(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()),
3485 (int32_t)Deoptimization::Unpack_uncommon_trap);
3486 __ jcc(Assembler::equal, L);
3487 __ stop("SharedRuntime::generate_deopt_blob: expected Unpack_uncommon_trap");
3488 __ bind(L);
3489 }
3490 #endif
3491
3492 // Pop all the frames we must move/replace.
3493 //
3494 // Frame picture (youngest to oldest)
3495 // 1: self-frame (no frame link)
3496 // 2: deopting frame (no frame link)
3497 // 3: caller of deopting frame (could be compiled/interpreted).
3498
3499 // Pop self-frame. We have no frame, and must rely only on rax and rsp.
3500 __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog!
3501
3502 // Pop deoptimized frame (int)
3503 __ movl(rcx, Address(rdi,
3504 Deoptimization::UnrollBlock::
3505 size_of_deoptimized_frame_offset_in_bytes()));
3506 __ addptr(rsp, rcx);
3507
3508 // rsp should be pointing at the return address to the caller (3)
3509
3510 // Pick up the initial fp we should save
3511 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
3512 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
3513
3514 #ifdef ASSERT
3515 // Compilers generate code that bang the stack by as much as the
3516 // interpreter would need. So this stack banging should never
3517 // trigger a fault. Verify that it does not on non product builds.
3518 if (UseStackBanging) {
3519 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
3520 __ bang_stack_size(rbx, rcx);
3521 }
3522 #endif
3523
3524 // Load address of array of frame pcs into rcx (address*)
3525 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
3526
3527 // Trash the return pc
3528 __ addptr(rsp, wordSize);
3529
3530 // Load address of array of frame sizes into rsi (intptr_t*)
3531 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock:: frame_sizes_offset_in_bytes()));
3532
3533 // Counter
3534 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock:: number_of_frames_offset_in_bytes())); // (int)
3535
3536 // Now adjust the caller's stack to make up for the extra locals but
3537 // record the original sp so that we can save it in the skeletal
3538 // interpreter frame and the stack walking of interpreter_sender
3539 // will get the unextended sp value and not the "real" sp value.
3540
3541 const Register sender_sp = r8;
3542
3543 __ mov(sender_sp, rsp);
3544 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock:: caller_adjustment_offset_in_bytes())); // (int)
3545 __ subptr(rsp, rbx);
3546
3547 // Push interpreter frames in a loop
3548 Label loop;
3549 __ bind(loop);
3550 __ movptr(rbx, Address(rsi, 0)); // Load frame size
3551 __ subptr(rbx, 2 * wordSize); // We'll push pc and rbp by hand
3552 __ pushptr(Address(rcx, 0)); // Save return address
3553 __ enter(); // Save old & set new rbp
3554 __ subptr(rsp, rbx); // Prolog
3555 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize),
3556 sender_sp); // Make it walkable
3557 // This value is corrected by layout_activation_impl
3558 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD );
3559 __ mov(sender_sp, rsp); // Pass sender_sp to next frame
3560 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
3561 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
3562 __ decrementl(rdx); // Decrement counter
3563 __ jcc(Assembler::notZero, loop);
3564 __ pushptr(Address(rcx, 0)); // Save final return address
3565
3566 // Re-push self-frame
3567 __ enter(); // Save old & set new rbp
3568 __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt);
3569 // Prolog
3570
3571 // Use rbp because the frames look interpreted now
3572 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP.
3573 // Don't need the precise return PC here, just precise enough to point into this code blob.
3574 address the_pc = __ pc();
3575 __ set_last_Java_frame(noreg, rbp, the_pc);
3576
3577 // Call C code. Need thread but NOT official VM entry
3578 // crud. We cannot block on this call, no GC can happen. Call should
3579 // restore return values to their stack-slots with the new SP.
3580 // Thread is in rdi already.
3581 //
3582 // BasicType unpack_frames(JavaThread* thread, int exec_mode);
3583
3584 __ andptr(rsp, -(StackAlignmentInBytes)); // Align SP as required by ABI
3585 __ mov(c_rarg0, r15_thread);
3586 __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap);
3587 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
3588
3589 // Set an oopmap for the call site
3590 // Use the same PC we used for the last java frame
3591 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
3592
3593 // Clear fp AND pc
3594 __ reset_last_Java_frame(true);
3595
3596 // Pop self-frame.
3597 __ leave(); // Epilog
3598
3599 // Jump to interpreter
3600 __ ret(0);
3601
3602 // Make sure all code is generated
3603 masm->flush();
3604
3605 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps,
3606 SimpleRuntimeFrame::framesize >> 1);
3607 }
3608 #endif // COMPILER2
3609
3610
3611 //------------------------------generate_handler_blob------
3612 //
3613 // Generate a special Compile2Runtime blob that saves all registers,
3614 // and setup oopmap.
3615 //
3616 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
3617 assert(StubRoutines::forward_exception_entry() != NULL,
3618 "must be generated before");
3619
3620 ResourceMark rm;
3621 OopMapSet *oop_maps = new OopMapSet();
3622 OopMap* map;
3623
3624 // Allocate space for the code. Setup code generation tools.
3625 CodeBuffer buffer("handler_blob", 2048, 1024);
3626 MacroAssembler* masm = new MacroAssembler(&buffer);
3627
3628 address start = __ pc();
3629 address call_pc = NULL;
3630 int frame_size_in_words;
3631 bool cause_return = (poll_type == POLL_AT_RETURN);
3632 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP);
3633
3634 if (UseRTMLocking) {
3635 // Abort RTM transaction before calling runtime
3636 // because critical section will be large and will be
3637 // aborted anyway. Also nmethod could be deoptimized.
3638 __ xabort(0);
3639 }
3640
3641 // Make room for return address (or push it again)
3642 if (!cause_return) {
3643 __ push(rbx);
3644 }
3645
3646 // Save registers, fpu state, and flags
3647 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words, save_vectors);
3648
3649 // The following is basically a call_VM. However, we need the precise
3650 // address of the call in order to generate an oopmap. Hence, we do all the
3651 // work outselves.
3652
3653 __ set_last_Java_frame(noreg, noreg, NULL);
3654
3655 // The return address must always be correct so that frame constructor never
3656 // sees an invalid pc.
3657
3658 if (!cause_return) {
3659 // overwrite the dummy value we pushed on entry
3660 __ movptr(c_rarg0, Address(r15_thread, JavaThread::saved_exception_pc_offset()));
3661 __ movptr(Address(rbp, wordSize), c_rarg0);
3662 }
3663
3664 // Do the call
3665 __ mov(c_rarg0, r15_thread);
3666 __ call(RuntimeAddress(call_ptr));
3667
3668 // Set an oopmap for the call site. This oopmap will map all
3669 // oop-registers and debug-info registers as callee-saved. This
3670 // will allow deoptimization at this safepoint to find all possible
3671 // debug-info recordings, as well as let GC find all oops.
3672
3673 oop_maps->add_gc_map( __ pc() - start, map);
3674
3675 Label noException;
3676
3677 __ reset_last_Java_frame(false);
3678
3679 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3680 __ jcc(Assembler::equal, noException);
3681
3682 // Exception pending
3683
3684 RegisterSaver::restore_live_registers(masm, save_vectors);
3685
3686 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3687
3688 // No exception case
3689 __ bind(noException);
3690
3691 // Normal exit, restore registers and exit.
3692 RegisterSaver::restore_live_registers(masm, save_vectors);
3693
3694 __ ret(0);
3695
3696 // Make sure all code is generated
3697 masm->flush();
3698
3699 // Fill-out other meta info
3700 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
3701 }
3702
3703 //
3704 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
3705 //
3706 // Generate a stub that calls into vm to find out the proper destination
3707 // of a java call. All the argument registers are live at this point
3708 // but since this is generic code we don't know what they are and the caller
3709 // must do any gc of the args.
3710 //
3711 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
3712 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3713
3714 // allocate space for the code
3715 ResourceMark rm;
3716
3717 CodeBuffer buffer(name, 1000, 512);
3718 MacroAssembler* masm = new MacroAssembler(&buffer);
3719
3720 int frame_size_in_words;
3721
3722 OopMapSet *oop_maps = new OopMapSet();
3723 OopMap* map = NULL;
3724
3725 int start = __ offset();
3726
3727 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
3728
3729 int frame_complete = __ offset();
3730
3731 __ set_last_Java_frame(noreg, noreg, NULL);
3732
3733 __ mov(c_rarg0, r15_thread);
3734
3735 __ call(RuntimeAddress(destination));
3736
3737
3738 // Set an oopmap for the call site.
3739 // We need this not only for callee-saved registers, but also for volatile
3740 // registers that the compiler might be keeping live across a safepoint.
3741
3742 oop_maps->add_gc_map( __ offset() - start, map);
3743
3744 // rax contains the address we are going to jump to assuming no exception got installed
3745
3746 // clear last_Java_sp
3747 __ reset_last_Java_frame(false);
3748 // check for pending exceptions
3749 Label pending;
3750 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3751 __ jcc(Assembler::notEqual, pending);
3752
3753 // get the returned Method*
3754 __ get_vm_result_2(rbx, r15_thread);
3755 __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx);
3756
3757 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
3758
3759 RegisterSaver::restore_live_registers(masm);
3760
3761 // We are back the the original state on entry and ready to go.
3762
3763 __ jmp(rax);
3764
3765 // Pending exception after the safepoint
3766
3767 __ bind(pending);
3768
3769 RegisterSaver::restore_live_registers(masm);
3770
3771 // exception pending => remove activation and forward to exception handler
3772
3773 __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD);
3774
3775 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
3776 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3777
3778 // -------------
3779 // make sure all code is generated
3780 masm->flush();
3781
3782 // return the blob
3783 // frame_size_words or bytes??
3784 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true);
3785 }
3786
3787
3788 //------------------------------Montgomery multiplication------------------------
3789 //
3790
3791 #ifndef _WINDOWS
3792
3793 #define ASM_SUBTRACT
3794
3795 #ifdef ASM_SUBTRACT
3796 // Subtract 0:b from carry:a. Return carry.
3797 static unsigned long
3798 sub(unsigned long a[], unsigned long b[], unsigned long carry, long len) {
3799 long i = 0, cnt = len;
3800 unsigned long tmp;
3801 asm volatile("clc; "
3802 "0: ; "
3803 "mov (%[b], %[i], 8), %[tmp]; "
3804 "sbb %[tmp], (%[a], %[i], 8); "
3805 "inc %[i]; dec %[cnt]; "
3806 "jne 0b; "
3807 "mov %[carry], %[tmp]; sbb $0, %[tmp]; "
3808 : [i]"+r"(i), [cnt]"+r"(cnt), [tmp]"=&r"(tmp)
3809 : [a]"r"(a), [b]"r"(b), [carry]"r"(carry)
3810 : "memory");
3811 return tmp;
3812 }
3813 #else // ASM_SUBTRACT
3814 typedef int __attribute__((mode(TI))) int128;
3815
3816 // Subtract 0:b from carry:a. Return carry.
3817 static unsigned long
3818 sub(unsigned long a[], unsigned long b[], unsigned long carry, int len) {
3819 int128 tmp = 0;
3820 int i;
3821 for (i = 0; i < len; i++) {
3822 tmp += a[i];
3823 tmp -= b[i];
3824 a[i] = tmp;
3825 tmp >>= 64;
3826 assert(-1 <= tmp && tmp <= 0, "invariant");
3827 }
3828 return tmp + carry;
3829 }
3830 #endif // ! ASM_SUBTRACT
3831
3832 // Multiply (unsigned) Long A by Long B, accumulating the double-
3833 // length result into the accumulator formed of T0, T1, and T2.
3834 #define MACC(A, B, T0, T1, T2) \
3835 do { \
3836 unsigned long hi, lo; \
3837 __asm__ ("mul %5; add %%rax, %2; adc %%rdx, %3; adc $0, %4" \
3838 : "=&d"(hi), "=a"(lo), "+r"(T0), "+r"(T1), "+g"(T2) \
3839 : "r"(A), "a"(B) : "cc"); \
3840 } while(0)
3841
3842 // As above, but add twice the double-length result into the
3843 // accumulator.
3844 #define MACC2(A, B, T0, T1, T2) \
3845 do { \
3846 unsigned long hi, lo; \
3847 __asm__ ("mul %5; add %%rax, %2; adc %%rdx, %3; adc $0, %4; " \
3848 "add %%rax, %2; adc %%rdx, %3; adc $0, %4" \
3849 : "=&d"(hi), "=a"(lo), "+r"(T0), "+r"(T1), "+g"(T2) \
3850 : "r"(A), "a"(B) : "cc"); \
3851 } while(0)
3852
3853 // Fast Montgomery multiplication. The derivation of the algorithm is
3854 // in A Cryptographic Library for the Motorola DSP56000,
3855 // Dusse and Kaliski, Proc. EUROCRYPT 90, pp. 230-237.
3856
3857 static void __attribute__((noinline))
3858 montgomery_multiply(unsigned long a[], unsigned long b[], unsigned long n[],
3859 unsigned long m[], unsigned long inv, int len) {
3860 unsigned long t0 = 0, t1 = 0, t2 = 0; // Triple-precision accumulator
3861 int i;
3862
3863 assert(inv * n[0] == -1UL, "broken inverse in Montgomery multiply");
3864
3865 for (i = 0; i < len; i++) {
3866 int j;
3867 for (j = 0; j < i; j++) {
3868 MACC(a[j], b[i-j], t0, t1, t2);
3869 MACC(m[j], n[i-j], t0, t1, t2);
3870 }
3871 MACC(a[i], b[0], t0, t1, t2);
3872 m[i] = t0 * inv;
3873 MACC(m[i], n[0], t0, t1, t2);
3874
3875 assert(t0 == 0, "broken Montgomery multiply");
3876
3877 t0 = t1; t1 = t2; t2 = 0;
3878 }
3879
3880 for (i = len; i < 2*len; i++) {
3881 int j;
3882 for (j = i-len+1; j < len; j++) {
3883 MACC(a[j], b[i-j], t0, t1, t2);
3884 MACC(m[j], n[i-j], t0, t1, t2);
3885 }
3886 m[i-len] = t0;
3887 t0 = t1; t1 = t2; t2 = 0;
3888 }
3889
3890 while (t0)
3891 t0 = sub(m, n, t0, len);
3892 }
3893
3894 // Fast Montgomery squaring. This uses asymptotically 25% fewer
3895 // multiplies so it should be up to 25% faster than Montgomery
3896 // multiplication. However, its loop control is more complex and it
3897 // may actually run slower on some machines.
3898
3899 static void __attribute__((noinline))
3900 montgomery_square(unsigned long a[], unsigned long n[],
3901 unsigned long m[], unsigned long inv, int len) {
3902 unsigned long t0 = 0, t1 = 0, t2 = 0; // Triple-precision accumulator
3903 int i;
3904
3905 assert(inv * n[0] == -1UL, "broken inverse in Montgomery multiply");
3906
3907 for (i = 0; i < len; i++) {
3908 int j;
3909 int end = (i+1)/2;
3910 for (j = 0; j < end; j++) {
3911 MACC2(a[j], a[i-j], t0, t1, t2);
3912 MACC(m[j], n[i-j], t0, t1, t2);
3913 }
3914 if ((i & 1) == 0) {
3915 MACC(a[j], a[j], t0, t1, t2);
3916 }
3917 for (; j < i; j++) {
3918 MACC(m[j], n[i-j], t0, t1, t2);
3919 }
3920 m[i] = t0 * inv;
3921 MACC(m[i], n[0], t0, t1, t2);
3922
3923 assert(t0 == 0, "broken Montgomery square");
3924
3925 t0 = t1; t1 = t2; t2 = 0;
3926 }
3927
3928 for (i = len; i < 2*len; i++) {
3929 int start = i-len+1;
3930 int end = start + (len - start)/2;
3931 int j;
3932 for (j = start; j < end; j++) {
3933 MACC2(a[j], a[i-j], t0, t1, t2);
3934 MACC(m[j], n[i-j], t0, t1, t2);
3935 }
3936 if ((i & 1) == 0) {
3937 MACC(a[j], a[j], t0, t1, t2);
3938 }
3939 for (; j < len; j++) {
3940 MACC(m[j], n[i-j], t0, t1, t2);
3941 }
3942 m[i-len] = t0;
3943 t0 = t1; t1 = t2; t2 = 0;
3944 }
3945
3946 while (t0)
3947 t0 = sub(m, n, t0, len);
3948 }
3949
3950 // Swap words in a longword.
3951 static unsigned long swap(unsigned long x) {
3952 return (x << 32) | (x >> 32);
3953 }
3954
3955 // Copy len longwords from s to d, word-swapping as we go. The
3956 // destination array is reversed.
3957 static void reverse_words(unsigned long *s, unsigned long *d, int len) {
3958 d += len;
3959 while(len-- > 0) {
3960 d--;
3961 *d = swap(*s);
3962 s++;
3963 }
3964 }
3965
3966 // The threshold at which squaring is advantageous was determined
3967 // experimentally on an i7-3930K (Ivy Bridge) CPU @ 3.5GHz.
3968 #define MONTGOMERY_SQUARING_THRESHOLD 64
3969
3970 void SharedRuntime::montgomery_multiply(jint *a_ints, jint *b_ints, jint *n_ints,
3971 jint len, jlong inv,
3972 jint *m_ints) {
3973 assert(len % 2 == 0, "array length in montgomery_multiply must be even");
3974 int longwords = len/2;
3975
3976 // Make very sure we don't use so much space that the stack might
3977 // overflow. 512 jints corresponds to an 16384-bit integer and
3978 // will use here a total of 8k bytes of stack space.
3979 int total_allocation = longwords * sizeof (unsigned long) * 4;
3980 guarantee(total_allocation <= 8192, "must be");
3981 unsigned long *scratch = (unsigned long *)alloca(total_allocation);
3982
3983 // Local scratch arrays
3984 unsigned long
3985 *a = scratch + 0 * longwords,
3986 *b = scratch + 1 * longwords,
3987 *n = scratch + 2 * longwords,
3988 *m = scratch + 3 * longwords;
3989
3990 reverse_words((unsigned long *)a_ints, a, longwords);
3991 reverse_words((unsigned long *)b_ints, b, longwords);
3992 reverse_words((unsigned long *)n_ints, n, longwords);
3993
3994 ::montgomery_multiply(a, b, n, m, (unsigned long)inv, longwords);
3995
3996 reverse_words(m, (unsigned long *)m_ints, longwords);
3997 }
3998
3999 void SharedRuntime::montgomery_square(jint *a_ints, jint *n_ints,
4000 jint len, jlong inv,
4001 jint *m_ints) {
4002 assert(len % 2 == 0, "array length in montgomery_square must be even");
4003 int longwords = len/2;
4004
4005 // Make very sure we don't use so much space that the stack might
4006 // overflow. 512 jints corresponds to an 16384-bit integer and
4007 // will use here a total of 6k bytes of stack space.
4008 int total_allocation = longwords * sizeof (unsigned long) * 3;
4009 guarantee(total_allocation <= 8192, "must be");
4010 unsigned long *scratch = (unsigned long *)alloca(total_allocation);
4011
4012 // Local scratch arrays
4013 unsigned long
4014 *a = scratch + 0 * longwords,
4015 *n = scratch + 1 * longwords,
4016 *m = scratch + 2 * longwords;
4017
4018 reverse_words((unsigned long *)a_ints, a, longwords);
4019 reverse_words((unsigned long *)n_ints, n, longwords);
4020
4021 if (len >= MONTGOMERY_SQUARING_THRESHOLD) {
4022 ::montgomery_square(a, n, m, (unsigned long)inv, longwords);
4023 } else {
4024 ::montgomery_multiply(a, a, n, m, (unsigned long)inv, longwords);
4025 }
4026
4027 reverse_words(m, (unsigned long *)m_ints, longwords);
4028 }
4029
4030 #endif // WINDOWS
4031
4032 #ifdef COMPILER2
4033 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame
4034 //
4035 //------------------------------generate_exception_blob---------------------------
4036 // creates exception blob at the end
4037 // Using exception blob, this code is jumped from a compiled method.
4038 // (see emit_exception_handler in x86_64.ad file)
4039 //
4040 // Given an exception pc at a call we call into the runtime for the
4041 // handler in this method. This handler might merely restore state
4042 // (i.e. callee save registers) unwind the frame and jump to the
4043 // exception handler for the nmethod if there is no Java level handler
4044 // for the nmethod.
4045 //
4046 // This code is entered with a jmp.
4047 //
4048 // Arguments:
4049 // rax: exception oop
4050 // rdx: exception pc
4051 //
4052 // Results:
4053 // rax: exception oop
4054 // rdx: exception pc in caller or ???
4055 // destination: exception handler of caller
4056 //
4057 // Note: the exception pc MUST be at a call (precise debug information)
4058 // Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved.
4059 //
4060
4061 void OptoRuntime::generate_exception_blob() {
4062 assert(!OptoRuntime::is_callee_saved_register(RDX_num), "");
4063 assert(!OptoRuntime::is_callee_saved_register(RAX_num), "");
4064 assert(!OptoRuntime::is_callee_saved_register(RCX_num), "");
4065
4066 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
4067
4068 // Allocate space for the code
4069 ResourceMark rm;
4070 // Setup code generation tools
4071 CodeBuffer buffer("exception_blob", 2048, 1024);
4072 MacroAssembler* masm = new MacroAssembler(&buffer);
4073
4074
4075 address start = __ pc();
4076
4077 // Exception pc is 'return address' for stack walker
4078 __ push(rdx);
4079 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog
4080
4081 // Save callee-saved registers. See x86_64.ad.
4082
4083 // rbp is an implicitly saved callee saved register (i.e., the calling
4084 // convention will save/restore it in the prolog/epilog). Other than that
4085 // there are no callee save registers now that adapter frames are gone.
4086
4087 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp);
4088
4089 // Store exception in Thread object. We cannot pass any arguments to the
4090 // handle_exception call, since we do not want to make any assumption
4091 // about the size of the frame where the exception happened in.
4092 // c_rarg0 is either rdi (Linux) or rcx (Windows).
4093 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax);
4094 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx);
4095
4096 // This call does all the hard work. It checks if an exception handler
4097 // exists in the method.
4098 // If so, it returns the handler address.
4099 // If not, it prepares for stack-unwinding, restoring the callee-save
4100 // registers of the frame being removed.
4101 //
4102 // address OptoRuntime::handle_exception_C(JavaThread* thread)
4103
4104 // At a method handle call, the stack may not be properly aligned
4105 // when returning with an exception.
4106 address the_pc = __ pc();
4107 __ set_last_Java_frame(noreg, noreg, the_pc);
4108 __ mov(c_rarg0, r15_thread);
4109 __ andptr(rsp, -(StackAlignmentInBytes)); // Align stack
4110 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C)));
4111
4112 // Set an oopmap for the call site. This oopmap will only be used if we
4113 // are unwinding the stack. Hence, all locations will be dead.
4114 // Callee-saved registers will be the same as the frame above (i.e.,
4115 // handle_exception_stub), since they were restored when we got the
4116 // exception.
4117
4118 OopMapSet* oop_maps = new OopMapSet();
4119
4120 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
4121
4122 __ reset_last_Java_frame(false);
4123
4124 // Restore callee-saved registers
4125
4126 // rbp is an implicitly saved callee-saved register (i.e., the calling
4127 // convention will save restore it in prolog/epilog) Other than that
4128 // there are no callee save registers now that adapter frames are gone.
4129
4130 __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt));
4131
4132 __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog
4133 __ pop(rdx); // No need for exception pc anymore
4134
4135 // rax: exception handler
4136
4137 // We have a handler in rax (could be deopt blob).
4138 __ mov(r8, rax);
4139
4140 // Get the exception oop
4141 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
4142 // Get the exception pc in case we are deoptimized
4143 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
4144 #ifdef ASSERT
4145 __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD);
4146 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD);
4147 #endif
4148 // Clear the exception oop so GC no longer processes it as a root.
4149 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD);
4150
4151 // rax: exception oop
4152 // r8: exception handler
4153 // rdx: exception pc
4154 // Jump to handler
4155
4156 __ jmp(r8);
4157
4158 // Make sure all code is generated
4159 masm->flush();
4160
4161 // Set exception blob
4162 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1);
4163 }
4164 #endif // COMPILER2
4165
4166 BufferedValueTypeBlob* SharedRuntime::generate_buffered_value_type_adapter(const ValueKlass* vk) {
4167 BufferBlob* buf = BufferBlob::create("value types pack/unpack", 16 * K);
4168 CodeBuffer buffer(buf);
4169 short buffer_locs[20];
4170 buffer.insts()->initialize_shared_locs((relocInfo*)buffer_locs,
4171 sizeof(buffer_locs)/sizeof(relocInfo));
4172
4173 MacroAssembler _masm(&buffer);
4174 MacroAssembler* masm = &_masm;
4175
4176 const Array<SigEntry>* sig_vk = vk->extended_sig();
4177 const Array<VMRegPair>* regs = vk->return_regs();
4178
4179 int pack_fields_off = __ offset();
4180
4181 int j = 1;
4182 for (int i = 0; i < sig_vk->length(); i++) {
4183 BasicType bt = sig_vk->at(i)._bt;
4184 if (bt == T_VALUETYPE) {
4185 continue;
4186 }
4187 if (bt == T_VOID) {
4188 if (sig_vk->at(i-1)._bt == T_LONG ||
4189 sig_vk->at(i-1)._bt == T_DOUBLE) {
4190 j++;
4191 }
4192 continue;
4193 }
4194 int off = sig_vk->at(i)._offset;
4195 VMRegPair pair = regs->at(j);
4196 VMReg r_1 = pair.first();
4197 VMReg r_2 = pair.second();
4198 Address to(rax, off);
4199 if (bt == T_FLOAT) {
4200 __ movflt(to, r_1->as_XMMRegister());
4201 } else if (bt == T_DOUBLE) {
4202 __ movdbl(to, r_1->as_XMMRegister());
4203 } else if (bt == T_OBJECT || bt == T_ARRAY) {
4204 __ store_heap_oop(to, r_1->as_Register());
4205 } else {
4206 assert(is_java_primitive(bt), "unexpected basic type");
4207 size_t size_in_bytes = type2aelembytes(bt);
4208 __ store_sized_value(to, r_1->as_Register(), size_in_bytes);
4209 }
4210 j++;
4211 }
4212 assert(j == regs->length(), "missed a field?");
4213
4214 __ ret(0);
4215
4216 int unpack_fields_off = __ offset();
4217
4218 j = 1;
4219 for (int i = 0; i < sig_vk->length(); i++) {
4220 BasicType bt = sig_vk->at(i)._bt;
4221 if (bt == T_VALUETYPE) {
4222 continue;
4223 }
4224 if (bt == T_VOID) {
4225 if (sig_vk->at(i-1)._bt == T_LONG ||
4226 sig_vk->at(i-1)._bt == T_DOUBLE) {
4227 j++;
4228 }
4229 continue;
4230 }
4231 int off = sig_vk->at(i)._offset;
4232 VMRegPair pair = regs->at(j);
4233 VMReg r_1 = pair.first();
4234 VMReg r_2 = pair.second();
4235 Address from(rax, off);
4236 if (bt == T_FLOAT) {
4237 __ movflt(r_1->as_XMMRegister(), from);
4238 } else if (bt == T_DOUBLE) {
4239 __ movdbl(r_1->as_XMMRegister(), from);
4240 } else if (bt == T_OBJECT || bt == T_ARRAY) {
4241 __ load_heap_oop(r_1->as_Register(), from);
4242 } else {
4243 assert(is_java_primitive(bt), "unexpected basic type");
4244 size_t size_in_bytes = type2aelembytes(bt);
4245 __ load_sized_value(r_1->as_Register(), from, size_in_bytes, bt != T_CHAR && bt != T_BOOLEAN);
4246 }
4247 j++;
4248 }
4249 assert(j == regs->length(), "missed a field?");
4250
4251 if (StressValueTypeReturnedAsFields) {
4252 __ load_klass(rax, rax);
4253 __ orptr(rax, 1);
4254 }
4255
4256 __ ret(0);
4257
4258 __ flush();
4259
4260 return BufferedValueTypeBlob::create(&buffer, pack_fields_off, unpack_fields_off);
4261 }