1 /* 2 * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #ifndef SHARE_VM_OPTO_MACHNODE_HPP 26 #define SHARE_VM_OPTO_MACHNODE_HPP 27 28 #include "opto/callnode.hpp" 29 #include "opto/matcher.hpp" 30 #include "opto/multnode.hpp" 31 #include "opto/node.hpp" 32 #include "opto/regmask.hpp" 33 34 class BiasedLockingCounters; 35 class BufferBlob; 36 class CodeBuffer; 37 class JVMState; 38 class MachCallDynamicJavaNode; 39 class MachCallJavaNode; 40 class MachCallLeafNode; 41 class MachCallNode; 42 class MachCallRuntimeNode; 43 class MachCallStaticJavaNode; 44 class MachEpilogNode; 45 class MachIfNode; 46 class MachNullCheckNode; 47 class MachOper; 48 class MachProjNode; 49 class MachPrologNode; 50 class MachReturnNode; 51 class MachSafePointNode; 52 class MachSpillCopyNode; 53 class Matcher; 54 class PhaseRegAlloc; 55 class RegMask; 56 class RTMLockingCounters; 57 class State; 58 59 //---------------------------MachOper------------------------------------------ 60 class MachOper : public ResourceObj { 61 public: 62 // Allocate right next to the MachNodes in the same arena 63 void *operator new(size_t x) throw() { 64 Compile* C = Compile::current(); 65 return C->node_arena()->Amalloc_D(x); 66 } 67 68 // Opcode 69 virtual uint opcode() const = 0; 70 71 // Number of input edges. 72 // Generally at least 1 73 virtual uint num_edges() const { return 1; } 74 // Array of Register masks 75 virtual const RegMask *in_RegMask(int index) const; 76 77 // Methods to output the encoding of the operand 78 79 // Negate conditional branches. Error for non-branch Nodes 80 virtual void negate(); 81 82 // Return the value requested 83 // result register lookup, corresponding to int_format 84 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const; 85 // input register lookup, corresponding to ext_format 86 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const; 87 88 // helpers for MacroAssembler generation from ADLC 89 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const { 90 return ::as_Register(reg(ra_, node)); 91 } 92 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const { 93 return ::as_Register(reg(ra_, node, idx)); 94 } 95 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const { 96 return ::as_FloatRegister(reg(ra_, node)); 97 } 98 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { 99 return ::as_FloatRegister(reg(ra_, node, idx)); 100 } 101 102 #if defined(IA32) || defined(AMD64) 103 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const { 104 return ::as_XMMRegister(reg(ra_, node)); 105 } 106 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { 107 return ::as_XMMRegister(reg(ra_, node, idx)); 108 } 109 #endif 110 // CondRegister reg converter 111 #if defined(PPC64) 112 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node) const { 113 return ::as_ConditionRegister(reg(ra_, node)); 114 } 115 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { 116 return ::as_ConditionRegister(reg(ra_, node, idx)); 117 } 118 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node) const { 119 return ::as_VectorRegister(reg(ra_, node)); 120 } 121 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { 122 return ::as_VectorRegister(reg(ra_, node, idx)); 123 } 124 VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node) const { 125 return ::as_VectorSRegister(reg(ra_, node)); 126 } 127 VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { 128 return ::as_VectorSRegister(reg(ra_, node, idx)); 129 } 130 #endif 131 132 virtual intptr_t constant() const; 133 virtual relocInfo::relocType constant_reloc() const; 134 virtual jdouble constantD() const; 135 virtual jfloat constantF() const; 136 virtual jlong constantL() const; 137 virtual TypeOopPtr *oop() const; 138 virtual int ccode() const; 139 // A zero, default, indicates this value is not needed. 140 // May need to lookup the base register, as done in int_ and ext_format 141 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const; 142 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const; 143 virtual int scale() const; 144 // Parameters needed to support MEMORY_INTERFACE access to stackSlot 145 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const; 146 // Check for PC-Relative displacement 147 virtual relocInfo::relocType disp_reloc() const; 148 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot 149 virtual int base_position() const; // base edge position, or -1 150 virtual int index_position() const; // index edge position, or -1 151 152 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP 153 // Only returns non-null value for i486.ad's indOffset32X 154 virtual const TypePtr *disp_as_type() const { return NULL; } 155 156 // Return the label 157 virtual Label *label() const; 158 159 // Return the method's address 160 virtual intptr_t method() const; 161 162 // Hash and compare over operands are currently identical 163 virtual uint hash() const; 164 virtual uint cmp( const MachOper &oper ) const; 165 166 // Virtual clone, since I do not know how big the MachOper is. 167 virtual MachOper *clone() const = 0; 168 169 // Return ideal Type from simple operands. Fail for complex operands. 170 virtual const Type *type() const; 171 172 // Set an integer offset if we have one, or error otherwise 173 virtual void set_con( jint c0 ) { ShouldNotReachHere(); } 174 175 #ifndef PRODUCT 176 // Return name of operand 177 virtual const char *Name() const { return "???";} 178 179 // Methods to output the text version of the operand 180 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0; 181 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0; 182 183 virtual void dump_spec(outputStream *st) const; // Print per-operand info 184 185 // Check whether o is a valid oper. 186 static bool notAnOper(const MachOper *o) { 187 if (o == NULL) return true; 188 if (((intptr_t)o & 1) != 0) return true; 189 if (*(address*)o == badAddress) return true; // kill by Node::destruct 190 return false; 191 } 192 #endif // !PRODUCT 193 }; 194 195 //------------------------------MachNode--------------------------------------- 196 // Base type for all machine specific nodes. All node classes generated by the 197 // ADLC inherit from this class. 198 class MachNode : public Node { 199 public: 200 MachNode() : Node((uint)0), _num_opnds(0), _opnds(NULL) { 201 init_class_id(Class_Mach); 202 } 203 // Required boilerplate 204 virtual uint size_of() const { return sizeof(MachNode); } 205 virtual int Opcode() const; // Always equal to MachNode 206 virtual uint rule() const = 0; // Machine-specific opcode 207 // Number of inputs which come before the first operand. 208 // Generally at least 1, to skip the Control input 209 virtual uint oper_input_base() const { return 1; } 210 // Position of constant base node in node's inputs. -1 if 211 // no constant base node input. 212 virtual uint mach_constant_base_node_input() const { return (uint)-1; } 213 214 // Copy inputs and operands to new node of instruction. 215 // Called from cisc_version() and short_branch_version(). 216 // !!!! The method's body is defined in ad_<arch>.cpp file. 217 void fill_new_machnode(MachNode *n) const; 218 219 // Return an equivalent instruction using memory for cisc_operand position 220 virtual MachNode *cisc_version(int offset); 221 // Modify this instruction's register mask to use stack version for cisc_operand 222 virtual void use_cisc_RegMask(); 223 224 // Support for short branches 225 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; } 226 227 // Avoid back to back some instructions on some CPUs. 228 enum AvoidBackToBackFlag { AVOID_NONE = 0, 229 AVOID_BEFORE = Flag_avoid_back_to_back_before, 230 AVOID_AFTER = Flag_avoid_back_to_back_after, 231 AVOID_BEFORE_AND_AFTER = AVOID_BEFORE | AVOID_AFTER }; 232 233 bool avoid_back_to_back(AvoidBackToBackFlag flag_value) const { 234 return (flags() & flag_value) == flag_value; 235 } 236 237 // instruction implemented with a call 238 bool has_call() const { return (flags() & Flag_has_call) != 0; } 239 240 // First index in _in[] corresponding to operand, or -1 if there is none 241 int operand_index(uint operand) const; 242 int operand_index(const MachOper *oper) const; 243 244 // Register class input is expected in 245 virtual const RegMask &in_RegMask(uint) const; 246 247 // cisc-spillable instructions redefine for use by in_RegMask 248 virtual const RegMask *cisc_RegMask() const { return NULL; } 249 250 // If this instruction is a 2-address instruction, then return the 251 // index of the input which must match the output. Not nessecary 252 // for instructions which bind the input and output register to the 253 // same singleton regiser (e.g., Intel IDIV which binds AX to be 254 // both an input and an output). It is nessecary when the input and 255 // output have choices - but they must use the same choice. 256 virtual uint two_adr( ) const { return 0; } 257 258 // Array of complex operand pointers. Each corresponds to zero or 259 // more leafs. Must be set by MachNode constructor to point to an 260 // internal array of MachOpers. The MachOper array is sized by 261 // specific MachNodes described in the ADL. 262 uint _num_opnds; 263 MachOper **_opnds; 264 uint num_opnds() const { return _num_opnds; } 265 266 // Emit bytes into cbuf 267 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 268 // Expand node after register allocation. 269 // Node is replaced by several nodes in the postalloc expand phase. 270 // Corresponding methods are generated for nodes if they specify 271 // postalloc_expand. See block.cpp for more documentation. 272 virtual bool requires_postalloc_expand() const { return false; } 273 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_); 274 // Size of instruction in bytes 275 virtual uint size(PhaseRegAlloc *ra_) const; 276 // Helper function that computes size by emitting code 277 virtual uint emit_size(PhaseRegAlloc *ra_) const; 278 279 // Return the alignment required (in units of relocInfo::addr_unit()) 280 // for this instruction (must be a power of 2) 281 virtual int alignment_required() const { return 1; } 282 283 // Return the padding (in bytes) to be emitted before this 284 // instruction to properly align it. 285 virtual int compute_padding(int current_offset) const { return 0; } 286 287 // Return number of relocatable values contained in this instruction 288 virtual int reloc() const { return 0; } 289 290 // Return number of words used for double constants in this instruction 291 virtual int ins_num_consts() const { return 0; } 292 293 // Hash and compare over operands. Used to do GVN on machine Nodes. 294 virtual uint hash() const; 295 virtual uint cmp( const Node &n ) const; 296 297 // Expand method for MachNode, replaces nodes representing pseudo 298 // instructions with a set of nodes which represent real machine 299 // instructions and compute the same value. 300 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; } 301 302 // Bottom_type call; value comes from operand0 303 virtual const class Type *bottom_type() const { return _opnds[0]->type(); } 304 virtual uint ideal_reg() const { const Type *t = _opnds[0]->type(); return t == TypeInt::CC ? Op_RegFlags : t->ideal_reg(); } 305 306 // If this is a memory op, return the base pointer and fixed offset. 307 // If there are no such, return NULL. If there are multiple addresses 308 // or the address is indeterminate (rare cases) then return (Node*)-1, 309 // which serves as node bottom. 310 // If the offset is not statically determined, set it to Type::OffsetBot. 311 // This method is free to ignore stack slots if that helps. 312 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1) 313 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible 314 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const; 315 316 // Helper for get_base_and_disp: find the base and index input nodes. 317 // Returns the MachOper as determined by memory_operand(), for use, if 318 // needed by the caller. If (MachOper *)-1 is returned, base and index 319 // are set to NodeSentinel. If (MachOper *) NULL is returned, base and 320 // index are set to NULL. 321 const MachOper* memory_inputs(Node* &base, Node* &index) const; 322 323 // Helper for memory_inputs: Which operand carries the necessary info? 324 // By default, returns NULL, which means there is no such operand. 325 // If it returns (MachOper*)-1, this means there are multiple memories. 326 virtual const MachOper* memory_operand() const { return NULL; } 327 328 // Call "get_base_and_disp" to decide which category of memory is used here. 329 virtual const class TypePtr *adr_type() const; 330 331 // Apply peephole rule(s) to this instruction 332 virtual MachNode *peephole(Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted); 333 334 // Top-level ideal Opcode matched 335 virtual int ideal_Opcode() const { return Op_Node; } 336 337 // Adds the label for the case 338 virtual void add_case_label( int switch_val, Label* blockLabel); 339 340 // Set the absolute address for methods 341 virtual void method_set( intptr_t addr ); 342 343 // Should we clone rather than spill this instruction? 344 bool rematerialize() const; 345 346 // Get the pipeline info 347 static const Pipeline *pipeline_class(); 348 virtual const Pipeline *pipeline() const; 349 350 // Returns true if this node is a check that can be implemented with a trap. 351 virtual bool is_TrapBasedCheckNode() const { return false; } 352 353 #ifndef PRODUCT 354 virtual const char *Name() const = 0; // Machine-specific name 355 virtual void dump_spec(outputStream *st) const; // Print per-node info 356 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual 357 #endif 358 }; 359 360 //------------------------------MachIdealNode---------------------------- 361 // Machine specific versions of nodes that must be defined by user. 362 // These are not converted by matcher from ideal nodes to machine nodes 363 // but are inserted into the code by the compiler. 364 class MachIdealNode : public MachNode { 365 public: 366 MachIdealNode( ) {} 367 368 // Define the following defaults for non-matched machine nodes 369 virtual uint oper_input_base() const { return 0; } 370 virtual uint rule() const { return 9999999; } 371 virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); } 372 }; 373 374 //------------------------------MachTypeNode---------------------------- 375 // Machine Nodes that need to retain a known Type. 376 class MachTypeNode : public MachNode { 377 virtual uint size_of() const { return sizeof(*this); } // Size is bigger 378 public: 379 MachTypeNode( ) {} 380 const Type *_bottom_type; 381 382 virtual const class Type *bottom_type() const { return _bottom_type; } 383 #ifndef PRODUCT 384 virtual void dump_spec(outputStream *st) const; 385 #endif 386 }; 387 388 //------------------------------MachBreakpointNode---------------------------- 389 // Machine breakpoint or interrupt Node 390 class MachBreakpointNode : public MachIdealNode { 391 public: 392 MachBreakpointNode( ) {} 393 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 394 virtual uint size(PhaseRegAlloc *ra_) const; 395 396 #ifndef PRODUCT 397 virtual const char *Name() const { return "Breakpoint"; } 398 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 399 #endif 400 }; 401 402 //------------------------------MachConstantBaseNode-------------------------- 403 // Machine node that represents the base address of the constant table. 404 class MachConstantBaseNode : public MachIdealNode { 405 public: 406 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask(). 407 408 public: 409 MachConstantBaseNode() : MachIdealNode() { 410 init_class_id(Class_MachConstantBase); 411 } 412 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; } 413 virtual uint ideal_reg() const { return Op_RegP; } 414 virtual uint oper_input_base() const { return 1; } 415 416 virtual bool requires_postalloc_expand() const; 417 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_); 418 419 virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const; 420 virtual uint size(PhaseRegAlloc* ra_) const; 421 virtual bool pinned() const { return UseRDPCForConstantTableBase; } 422 423 static const RegMask& static_out_RegMask() { return _out_RegMask; } 424 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); } 425 426 #ifndef PRODUCT 427 virtual const char* Name() const { return "MachConstantBaseNode"; } 428 virtual void format(PhaseRegAlloc*, outputStream* st) const; 429 #endif 430 }; 431 432 //------------------------------MachConstantNode------------------------------- 433 // Machine node that holds a constant which is stored in the constant table. 434 class MachConstantNode : public MachTypeNode { 435 protected: 436 Compile::Constant _constant; // This node's constant. 437 438 public: 439 MachConstantNode() : MachTypeNode() { 440 init_class_id(Class_MachConstant); 441 } 442 443 virtual void eval_constant(Compile* C) { 444 #ifdef ASSERT 445 tty->print("missing MachConstantNode eval_constant function: "); 446 dump(); 447 #endif 448 ShouldNotCallThis(); 449 } 450 451 virtual const RegMask &in_RegMask(uint idx) const { 452 if (idx == mach_constant_base_node_input()) 453 return MachConstantBaseNode::static_out_RegMask(); 454 return MachNode::in_RegMask(idx); 455 } 456 457 // Input edge of MachConstantBaseNode. 458 virtual uint mach_constant_base_node_input() const { return req() - 1; } 459 460 int constant_offset(); 461 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); } 462 // Unchecked version to avoid assertions in debug output. 463 int constant_offset_unchecked() const; 464 }; 465 466 //------------------------------MachVVEPNode----------------------------------- 467 // Machine Verified Value Type Entry Point Node 468 class MachVVEPNode : public MachIdealNode { 469 public: 470 MachVVEPNode(Label* verified_entry) : _verified_entry(verified_entry) {} 471 virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const; 472 virtual uint size(PhaseRegAlloc* ra_) const; 473 474 #ifndef PRODUCT 475 virtual const char* Name() const { return "Verified ValueType Entry-Point"; } 476 virtual void format(PhaseRegAlloc*, outputStream* st) const; 477 #endif 478 private: 479 Label* _verified_entry; 480 }; 481 482 //------------------------------MachUEPNode----------------------------------- 483 // Machine Unvalidated Entry Point Node 484 class MachUEPNode : public MachIdealNode { 485 public: 486 MachUEPNode( ) {} 487 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 488 virtual uint size(PhaseRegAlloc *ra_) const; 489 490 #ifndef PRODUCT 491 virtual const char *Name() const { return "Unvalidated-Entry-Point"; } 492 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 493 #endif 494 }; 495 496 //------------------------------MachPrologNode-------------------------------- 497 // Machine function Prolog Node 498 class MachPrologNode : public MachIdealNode { 499 public: 500 MachPrologNode(Label* verified_entry) : _verified_entry(verified_entry) { 501 init_class_id(Class_MachProlog); 502 } 503 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 504 virtual uint size(PhaseRegAlloc *ra_) const; 505 virtual int reloc() const; 506 507 Label* _verified_entry; 508 #ifndef PRODUCT 509 virtual const char *Name() const { return "Prolog"; } 510 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 511 #endif 512 }; 513 514 //------------------------------MachEpilogNode-------------------------------- 515 // Machine function Epilog Node 516 class MachEpilogNode : public MachIdealNode { 517 public: 518 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {} 519 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 520 virtual uint size(PhaseRegAlloc *ra_) const; 521 virtual int reloc() const; 522 virtual const Pipeline *pipeline() const; 523 524 private: 525 bool _do_polling; 526 527 public: 528 bool do_polling() const { return _do_polling; } 529 530 // Offset of safepoint from the beginning of the node 531 int safepoint_offset() const; 532 533 #ifndef PRODUCT 534 virtual const char *Name() const { return "Epilog"; } 535 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 536 #endif 537 }; 538 539 //------------------------------MachNopNode----------------------------------- 540 // Machine function Nop Node 541 class MachNopNode : public MachIdealNode { 542 private: 543 int _count; 544 public: 545 MachNopNode( ) : _count(1) {} 546 MachNopNode( int count ) : _count(count) {} 547 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 548 virtual uint size(PhaseRegAlloc *ra_) const; 549 550 virtual const class Type *bottom_type() const { return Type::CONTROL; } 551 552 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp 553 virtual const Pipeline *pipeline() const; 554 #ifndef PRODUCT 555 virtual const char *Name() const { return "Nop"; } 556 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 557 virtual void dump_spec(outputStream *st) const { } // No per-operand info 558 #endif 559 }; 560 561 //------------------------------MachSpillCopyNode------------------------------ 562 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any 563 // location (stack or register). 564 class MachSpillCopyNode : public MachIdealNode { 565 public: 566 enum SpillType { 567 TwoAddress, // Inserted when coalescing of a two-address-instruction node and its input fails 568 PhiInput, // Inserted when coalescing of a phi node and its input fails 569 DebugUse, // Inserted as debug info spills to safepoints in non-frequent blocks 570 LoopPhiInput, // Pre-split compares of loop-phis 571 Definition, // An lrg marked as spilled will be spilled to memory right after its definition, 572 // if in high pressure region or the lrg is bound 573 RegToReg, // A register to register move 574 RegToMem, // A register to memory move 575 MemToReg, // A memory to register move 576 PhiLocationDifferToInputLocation, // When coalescing phi nodes in PhaseChaitin::Split(), a move spill is inserted if 577 // the phi and its input resides at different locations (i.e. reg or mem) 578 BasePointerToMem, // Spill base pointer to memory at safepoint 579 InputToRematerialization, // When rematerializing a node we stretch the inputs live ranges, and they might be 580 // stretched beyond a new definition point, therefore we split out new copies instead 581 CallUse, // Spill use at a call 582 Bound // An lrg marked as spill that is bound and needs to be spilled at a use 583 }; 584 private: 585 const RegMask *_in; // RegMask for input 586 const RegMask *_out; // RegMask for output 587 const Type *_type; 588 const SpillType _spill_type; 589 public: 590 MachSpillCopyNode(SpillType spill_type, Node *n, const RegMask &in, const RegMask &out ) : 591 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()), _spill_type(spill_type) { 592 init_class_id(Class_MachSpillCopy); 593 init_flags(Flag_is_Copy); 594 add_req(NULL); 595 add_req(n); 596 } 597 virtual uint size_of() const { return sizeof(*this); } 598 void set_out_RegMask(const RegMask &out) { _out = &out; } 599 void set_in_RegMask(const RegMask &in) { _in = ∈ } 600 virtual const RegMask &out_RegMask() const { return *_out; } 601 virtual const RegMask &in_RegMask(uint) const { return *_in; } 602 virtual const class Type *bottom_type() const { return _type; } 603 virtual uint ideal_reg() const { return _type->ideal_reg(); } 604 virtual uint oper_input_base() const { return 1; } 605 uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const; 606 607 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 608 virtual uint size(PhaseRegAlloc *ra_) const; 609 610 611 #ifndef PRODUCT 612 static const char *spill_type(SpillType st) { 613 switch (st) { 614 case TwoAddress: 615 return "TwoAddressSpillCopy"; 616 case PhiInput: 617 return "PhiInputSpillCopy"; 618 case DebugUse: 619 return "DebugUseSpillCopy"; 620 case LoopPhiInput: 621 return "LoopPhiInputSpillCopy"; 622 case Definition: 623 return "DefinitionSpillCopy"; 624 case RegToReg: 625 return "RegToRegSpillCopy"; 626 case RegToMem: 627 return "RegToMemSpillCopy"; 628 case MemToReg: 629 return "MemToRegSpillCopy"; 630 case PhiLocationDifferToInputLocation: 631 return "PhiLocationDifferToInputLocationSpillCopy"; 632 case BasePointerToMem: 633 return "BasePointerToMemSpillCopy"; 634 case InputToRematerialization: 635 return "InputToRematerializationSpillCopy"; 636 case CallUse: 637 return "CallUseSpillCopy"; 638 case Bound: 639 return "BoundSpillCopy"; 640 default: 641 assert(false, "Must have valid spill type"); 642 return "MachSpillCopy"; 643 } 644 } 645 646 virtual const char *Name() const { 647 return spill_type(_spill_type); 648 } 649 650 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 651 #endif 652 }; 653 654 // MachMergeNode is similar to a PhiNode in a sense it merges multiple values, 655 // however it doesn't have a control input and is more like a MergeMem. 656 // It is inserted after the register allocation is done to ensure that nodes use single 657 // definition of a multidef lrg in a block. 658 class MachMergeNode : public MachIdealNode { 659 public: 660 MachMergeNode(Node *n1) { 661 init_class_id(Class_MachMerge); 662 add_req(NULL); 663 add_req(n1); 664 } 665 virtual const RegMask &out_RegMask() const { return in(1)->out_RegMask(); } 666 virtual const RegMask &in_RegMask(uint idx) const { return in(1)->in_RegMask(idx); } 667 virtual const class Type *bottom_type() const { return in(1)->bottom_type(); } 668 virtual uint ideal_reg() const { return bottom_type()->ideal_reg(); } 669 virtual uint oper_input_base() const { return 1; } 670 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const { } 671 virtual uint size(PhaseRegAlloc *ra_) const { return 0; } 672 #ifndef PRODUCT 673 virtual const char *Name() const { return "MachMerge"; } 674 #endif 675 }; 676 677 //------------------------------MachBranchNode-------------------------------- 678 // Abstract machine branch Node 679 class MachBranchNode : public MachIdealNode { 680 public: 681 MachBranchNode() : MachIdealNode() { 682 init_class_id(Class_MachBranch); 683 } 684 virtual void label_set(Label* label, uint block_num) = 0; 685 virtual void save_label(Label** label, uint* block_num) = 0; 686 687 // Support for short branches 688 virtual MachNode *short_branch_version() { return NULL; } 689 690 virtual bool pinned() const { return true; }; 691 }; 692 693 //------------------------------MachNullChkNode-------------------------------- 694 // Machine-dependent null-pointer-check Node. Points a real MachNode that is 695 // also some kind of memory op. Turns the indicated MachNode into a 696 // conditional branch with good latency on the ptr-not-null path and awful 697 // latency on the pointer-is-null path. 698 699 class MachNullCheckNode : public MachBranchNode { 700 public: 701 const uint _vidx; // Index of memop being tested 702 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) { 703 init_class_id(Class_MachNullCheck); 704 add_req(ctrl); 705 add_req(memop); 706 } 707 virtual uint size_of() const { return sizeof(*this); } 708 709 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 710 virtual void label_set(Label* label, uint block_num); 711 virtual void save_label(Label** label, uint* block_num); 712 virtual void negate() { } 713 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; } 714 virtual uint ideal_reg() const { return NotAMachineReg; } 715 virtual const RegMask &in_RegMask(uint) const; 716 virtual const RegMask &out_RegMask() const { return RegMask::Empty; } 717 #ifndef PRODUCT 718 virtual const char *Name() const { return "NullCheck"; } 719 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 720 #endif 721 }; 722 723 //------------------------------MachProjNode---------------------------------- 724 // Machine-dependent Ideal projections (how is that for an oxymoron). Really 725 // just MachNodes made by the Ideal world that replicate simple projections 726 // but with machine-dependent input & output register masks. Generally 727 // produced as part of calling conventions. Normally I make MachNodes as part 728 // of the Matcher process, but the Matcher is ill suited to issues involving 729 // frame handling, so frame handling is all done in the Ideal world with 730 // occasional callbacks to the machine model for important info. 731 class MachProjNode : public ProjNode { 732 public: 733 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) { 734 init_class_id(Class_MachProj); 735 } 736 RegMask _rout; 737 const uint _ideal_reg; 738 enum projType { 739 unmatched_proj = 0, // Projs for Control, I/O, memory not matched 740 fat_proj = 999 // Projs killing many regs, defined by _rout 741 }; 742 virtual int Opcode() const; 743 virtual const Type *bottom_type() const; 744 virtual const TypePtr *adr_type() const; 745 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; } 746 virtual const RegMask &out_RegMask() const { return _rout; } 747 virtual uint ideal_reg() const { return _ideal_reg; } 748 // Need size_of() for virtual ProjNode::clone() 749 virtual uint size_of() const { return sizeof(MachProjNode); } 750 #ifndef PRODUCT 751 virtual void dump_spec(outputStream *st) const; 752 #endif 753 }; 754 755 //------------------------------MachIfNode------------------------------------- 756 // Machine-specific versions of IfNodes 757 class MachIfNode : public MachBranchNode { 758 virtual uint size_of() const { return sizeof(*this); } // Size is bigger 759 public: 760 float _prob; // Probability branch goes either way 761 float _fcnt; // Frequency counter 762 MachIfNode() : MachBranchNode() { 763 init_class_id(Class_MachIf); 764 } 765 // Negate conditional branches. 766 virtual void negate() = 0; 767 #ifndef PRODUCT 768 virtual void dump_spec(outputStream *st) const; 769 #endif 770 }; 771 772 //------------------------------MachJumpNode----------------------------------- 773 // Machine-specific versions of JumpNodes 774 class MachJumpNode : public MachConstantNode { 775 public: 776 float* _probs; 777 MachJumpNode() : MachConstantNode() { 778 init_class_id(Class_MachJump); 779 } 780 }; 781 782 //------------------------------MachGotoNode----------------------------------- 783 // Machine-specific versions of GotoNodes 784 class MachGotoNode : public MachBranchNode { 785 public: 786 MachGotoNode() : MachBranchNode() { 787 init_class_id(Class_MachGoto); 788 } 789 }; 790 791 //------------------------------MachFastLockNode------------------------------------- 792 // Machine-specific versions of FastLockNodes 793 class MachFastLockNode : public MachNode { 794 virtual uint size_of() const { return sizeof(*this); } // Size is bigger 795 public: 796 BiasedLockingCounters* _counters; 797 RTMLockingCounters* _rtm_counters; // RTM lock counters for inflated locks 798 RTMLockingCounters* _stack_rtm_counters; // RTM lock counters for stack locks 799 MachFastLockNode() : MachNode() {} 800 }; 801 802 //------------------------------MachReturnNode-------------------------------- 803 // Machine-specific versions of subroutine returns 804 class MachReturnNode : public MachNode { 805 virtual uint size_of() const; // Size is bigger 806 public: 807 RegMask *_in_rms; // Input register masks, set during allocation 808 ReallocMark _nesting; // assertion check for reallocations 809 const TypePtr* _adr_type; // memory effects of call or return 810 MachReturnNode() : MachNode() { 811 init_class_id(Class_MachReturn); 812 _adr_type = TypePtr::BOTTOM; // the default: all of memory 813 } 814 815 void set_adr_type(const TypePtr* atp) { _adr_type = atp; } 816 817 virtual const RegMask &in_RegMask(uint) const; 818 virtual bool pinned() const { return true; }; 819 virtual const TypePtr *adr_type() const; 820 }; 821 822 //------------------------------MachSafePointNode----------------------------- 823 // Machine-specific versions of safepoints 824 class MachSafePointNode : public MachReturnNode { 825 public: 826 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC 827 JVMState* _jvms; // Pointer to list of JVM State Objects 828 uint _jvmadj; // Extra delta to jvms indexes (mach. args) 829 OopMap* oop_map() const { return _oop_map; } 830 void set_oop_map(OopMap* om) { _oop_map = om; } 831 832 MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0) { 833 init_class_id(Class_MachSafePoint); 834 } 835 836 virtual JVMState* jvms() const { return _jvms; } 837 void set_jvms(JVMState* s) { 838 _jvms = s; 839 } 840 virtual const Type *bottom_type() const; 841 842 virtual const RegMask &in_RegMask(uint) const; 843 844 // Functionality from old debug nodes 845 Node *returnadr() const { return in(TypeFunc::ReturnAdr); } 846 Node *frameptr () const { return in(TypeFunc::FramePtr); } 847 848 Node *local(const JVMState* jvms, uint idx) const { 849 assert(verify_jvms(jvms), "jvms must match"); 850 return in(_jvmadj + jvms->locoff() + idx); 851 } 852 Node *stack(const JVMState* jvms, uint idx) const { 853 assert(verify_jvms(jvms), "jvms must match"); 854 return in(_jvmadj + jvms->stkoff() + idx); 855 } 856 Node *monitor_obj(const JVMState* jvms, uint idx) const { 857 assert(verify_jvms(jvms), "jvms must match"); 858 return in(_jvmadj + jvms->monitor_obj_offset(idx)); 859 } 860 Node *monitor_box(const JVMState* jvms, uint idx) const { 861 assert(verify_jvms(jvms), "jvms must match"); 862 return in(_jvmadj + jvms->monitor_box_offset(idx)); 863 } 864 void set_local(const JVMState* jvms, uint idx, Node *c) { 865 assert(verify_jvms(jvms), "jvms must match"); 866 set_req(_jvmadj + jvms->locoff() + idx, c); 867 } 868 void set_stack(const JVMState* jvms, uint idx, Node *c) { 869 assert(verify_jvms(jvms), "jvms must match"); 870 set_req(_jvmadj + jvms->stkoff() + idx, c); 871 } 872 void set_monitor(const JVMState* jvms, uint idx, Node *c) { 873 assert(verify_jvms(jvms), "jvms must match"); 874 set_req(_jvmadj + jvms->monoff() + idx, c); 875 } 876 }; 877 878 //------------------------------MachCallNode---------------------------------- 879 // Machine-specific versions of subroutine calls 880 class MachCallNode : public MachSafePointNode { 881 protected: 882 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash 883 virtual uint cmp( const Node &n ) const; 884 virtual uint size_of() const = 0; // Size is bigger 885 public: 886 const TypeFunc *_tf; // Function type 887 address _entry_point; // Address of the method being called 888 float _cnt; // Estimate of number of times called 889 uint _argsize; // Size of argument block on stack 890 891 const TypeFunc* tf() const { return _tf; } 892 const address entry_point() const { return _entry_point; } 893 const float cnt() const { return _cnt; } 894 uint argsize() const { return _argsize; } 895 896 void set_tf(const TypeFunc* tf) { _tf = tf; } 897 void set_entry_point(address p) { _entry_point = p; } 898 void set_cnt(float c) { _cnt = c; } 899 void set_argsize(int s) { _argsize = s; } 900 901 MachCallNode() : MachSafePointNode() { 902 init_class_id(Class_MachCall); 903 } 904 905 virtual const Type *bottom_type() const; 906 virtual bool pinned() const { return false; } 907 virtual const Type* Value(PhaseGVN* phase) const; 908 virtual const RegMask &in_RegMask(uint) const; 909 virtual int ret_addr_offset() { return 0; } 910 911 bool returns_long() const { return tf()->return_type() == T_LONG; } 912 bool return_value_is_used() const; 913 914 // Similar to cousin class CallNode::returns_pointer 915 bool returns_pointer() const; 916 bool returns_vt() const; 917 918 #ifndef PRODUCT 919 virtual void dump_spec(outputStream *st) const; 920 #endif 921 }; 922 923 //------------------------------MachCallJavaNode------------------------------ 924 // "Base" class for machine-specific versions of subroutine calls 925 class MachCallJavaNode : public MachCallNode { 926 protected: 927 virtual uint cmp( const Node &n ) const; 928 virtual uint size_of() const; // Size is bigger 929 public: 930 ciMethod* _method; // Method being direct called 931 bool _override_symbolic_info; // Override symbolic call site info from bytecode 932 int _bci; // Byte Code index of call byte code 933 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual 934 bool _method_handle_invoke; // Tells if the call has to preserve SP 935 MachCallJavaNode() : MachCallNode(), _override_symbolic_info(false) { 936 init_class_id(Class_MachCallJava); 937 } 938 939 virtual const RegMask &in_RegMask(uint) const; 940 941 int resolved_method_index(CodeBuffer &cbuf) const { 942 if (_override_symbolic_info) { 943 // Attach corresponding Method* to the call site, so VM can use it during resolution 944 // instead of querying symbolic info from bytecode. 945 assert(_method != NULL, "method should be set"); 946 assert(_method->constant_encoding()->is_method(), "should point to a Method"); 947 return cbuf.oop_recorder()->find_index(_method->constant_encoding()); 948 } 949 return 0; // Use symbolic info from bytecode (resolved_method == NULL). 950 } 951 952 #ifndef PRODUCT 953 virtual void dump_spec(outputStream *st) const; 954 #endif 955 }; 956 957 //------------------------------MachCallStaticJavaNode------------------------ 958 // Machine-specific versions of monomorphic subroutine calls 959 class MachCallStaticJavaNode : public MachCallJavaNode { 960 virtual uint cmp( const Node &n ) const; 961 virtual uint size_of() const; // Size is bigger 962 public: 963 const char *_name; // Runtime wrapper name 964 MachCallStaticJavaNode() : MachCallJavaNode() { 965 init_class_id(Class_MachCallStaticJava); 966 } 967 968 // If this is an uncommon trap, return the request code, else zero. 969 int uncommon_trap_request() const; 970 971 virtual int ret_addr_offset(); 972 #ifndef PRODUCT 973 virtual void dump_spec(outputStream *st) const; 974 void dump_trap_args(outputStream *st) const; 975 #endif 976 }; 977 978 //------------------------------MachCallDynamicJavaNode------------------------ 979 // Machine-specific versions of possibly megamorphic subroutine calls 980 class MachCallDynamicJavaNode : public MachCallJavaNode { 981 public: 982 int _vtable_index; 983 MachCallDynamicJavaNode() : MachCallJavaNode() { 984 init_class_id(Class_MachCallDynamicJava); 985 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized 986 } 987 virtual int ret_addr_offset(); 988 #ifndef PRODUCT 989 virtual void dump_spec(outputStream *st) const; 990 #endif 991 }; 992 993 //------------------------------MachCallRuntimeNode---------------------------- 994 // Machine-specific versions of subroutine calls 995 class MachCallRuntimeNode : public MachCallNode { 996 virtual uint cmp( const Node &n ) const; 997 virtual uint size_of() const; // Size is bigger 998 public: 999 const char *_name; // Printable name, if _method is NULL 1000 MachCallRuntimeNode() : MachCallNode() { 1001 init_class_id(Class_MachCallRuntime); 1002 } 1003 virtual int ret_addr_offset(); 1004 #ifndef PRODUCT 1005 virtual void dump_spec(outputStream *st) const; 1006 #endif 1007 }; 1008 1009 class MachCallLeafNode: public MachCallRuntimeNode { 1010 public: 1011 MachCallLeafNode() : MachCallRuntimeNode() { 1012 init_class_id(Class_MachCallLeaf); 1013 } 1014 }; 1015 1016 //------------------------------MachHaltNode----------------------------------- 1017 // Machine-specific versions of halt nodes 1018 class MachHaltNode : public MachReturnNode { 1019 public: 1020 virtual JVMState* jvms() const; 1021 }; 1022 1023 class MachMemBarNode : public MachNode { 1024 virtual uint size_of() const; // Size is bigger 1025 public: 1026 const TypePtr* _adr_type; // memory effects 1027 MachMemBarNode() : MachNode() { 1028 init_class_id(Class_MachMemBar); 1029 _adr_type = TypePtr::BOTTOM; // the default: all of memory 1030 } 1031 1032 void set_adr_type(const TypePtr* atp) { _adr_type = atp; } 1033 virtual const TypePtr *adr_type() const; 1034 }; 1035 1036 1037 //------------------------------MachTempNode----------------------------------- 1038 // Node used by the adlc to construct inputs to represent temporary registers 1039 class MachTempNode : public MachNode { 1040 private: 1041 MachOper *_opnd_array[1]; 1042 1043 public: 1044 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); } 1045 virtual uint rule() const { return 9999999; } 1046 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {} 1047 1048 MachTempNode(MachOper* oper) { 1049 init_class_id(Class_MachTemp); 1050 _num_opnds = 1; 1051 _opnds = _opnd_array; 1052 add_req(NULL); 1053 _opnds[0] = oper; 1054 } 1055 virtual uint size_of() const { return sizeof(MachTempNode); } 1056 1057 #ifndef PRODUCT 1058 virtual void format(PhaseRegAlloc *, outputStream *st ) const {} 1059 virtual const char *Name() const { return "MachTemp";} 1060 #endif 1061 }; 1062 1063 1064 1065 //------------------------------labelOper-------------------------------------- 1066 // Machine-independent version of label operand 1067 class labelOper : public MachOper { 1068 private: 1069 virtual uint num_edges() const { return 0; } 1070 public: 1071 // Supported for fixed size branches 1072 Label* _label; // Label for branch(es) 1073 1074 uint _block_num; 1075 1076 labelOper() : _label(0), _block_num(0) {} 1077 1078 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {} 1079 1080 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {} 1081 1082 virtual MachOper *clone() const; 1083 1084 virtual Label *label() const { assert(_label != NULL, "need Label"); return _label; } 1085 1086 virtual uint opcode() const; 1087 1088 virtual uint hash() const; 1089 virtual uint cmp( const MachOper &oper ) const; 1090 #ifndef PRODUCT 1091 virtual const char *Name() const { return "Label";} 1092 1093 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const; 1094 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); } 1095 #endif 1096 }; 1097 1098 1099 //------------------------------methodOper-------------------------------------- 1100 // Machine-independent version of method operand 1101 class methodOper : public MachOper { 1102 private: 1103 virtual uint num_edges() const { return 0; } 1104 public: 1105 intptr_t _method; // Address of method 1106 methodOper() : _method(0) {} 1107 methodOper(intptr_t method) : _method(method) {} 1108 1109 virtual MachOper *clone() const; 1110 1111 virtual intptr_t method() const { return _method; } 1112 1113 virtual uint opcode() const; 1114 1115 virtual uint hash() const; 1116 virtual uint cmp( const MachOper &oper ) const; 1117 #ifndef PRODUCT 1118 virtual const char *Name() const { return "Method";} 1119 1120 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const; 1121 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); } 1122 #endif 1123 }; 1124 1125 #endif // SHARE_VM_OPTO_MACHNODE_HPP