475 idealreg2debugmask [Op_RegP] = &rms[11];
476
477 idealreg2mhdebugmask[Op_RegN] = &rms[12];
478 idealreg2mhdebugmask[Op_RegI] = &rms[13];
479 idealreg2mhdebugmask[Op_RegL] = &rms[14];
480 idealreg2mhdebugmask[Op_RegF] = &rms[15];
481 idealreg2mhdebugmask[Op_RegD] = &rms[16];
482 idealreg2mhdebugmask[Op_RegP] = &rms[17];
483
484 idealreg2spillmask [Op_VecS] = &rms[18];
485 idealreg2spillmask [Op_VecD] = &rms[19];
486 idealreg2spillmask [Op_VecX] = &rms[20];
487 idealreg2spillmask [Op_VecY] = &rms[21];
488 idealreg2spillmask [Op_VecZ] = &rms[22];
489
490 OptoReg::Name i;
491
492 // At first, start with the empty mask
493 C->FIRST_STACK_mask().Clear();
494
495 // Add in the incoming argument area
496 OptoReg::Name init_in = OptoReg::add(_old_SP, C->out_preserve_stack_slots());
497 for (i = init_in; i < _in_arg_limit; i = OptoReg::add(i,1)) {
498 C->FIRST_STACK_mask().Insert(i);
499 }
500 // Add in all bits past the outgoing argument area
501 guarantee(RegMask::can_represent_arg(OptoReg::add(_out_arg_limit,-1)),
502 "must be able to represent all call arguments in reg mask");
503 OptoReg::Name init = _out_arg_limit;
504 for (i = init; RegMask::can_represent(i); i = OptoReg::add(i,1)) {
505 C->FIRST_STACK_mask().Insert(i);
506 }
507 // Finally, set the "infinite stack" bit.
508 C->FIRST_STACK_mask().set_AllStack();
509
510 // Make spill masks. Registers for their class, plus FIRST_STACK_mask.
511 RegMask aligned_stack_mask = C->FIRST_STACK_mask();
512 // Keep spill masks aligned.
513 aligned_stack_mask.clear_to_pairs();
514 assert(aligned_stack_mask.is_AllStack(), "should be infinite stack");
515
516 *idealreg2spillmask[Op_RegP] = *idealreg2regmask[Op_RegP];
517 #ifdef _LP64
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475 idealreg2debugmask [Op_RegP] = &rms[11];
476
477 idealreg2mhdebugmask[Op_RegN] = &rms[12];
478 idealreg2mhdebugmask[Op_RegI] = &rms[13];
479 idealreg2mhdebugmask[Op_RegL] = &rms[14];
480 idealreg2mhdebugmask[Op_RegF] = &rms[15];
481 idealreg2mhdebugmask[Op_RegD] = &rms[16];
482 idealreg2mhdebugmask[Op_RegP] = &rms[17];
483
484 idealreg2spillmask [Op_VecS] = &rms[18];
485 idealreg2spillmask [Op_VecD] = &rms[19];
486 idealreg2spillmask [Op_VecX] = &rms[20];
487 idealreg2spillmask [Op_VecY] = &rms[21];
488 idealreg2spillmask [Op_VecZ] = &rms[22];
489
490 OptoReg::Name i;
491
492 // At first, start with the empty mask
493 C->FIRST_STACK_mask().Clear();
494
495 // Check if method has a reserved entry in the argument stack area that
496 // should not be used for spilling because it holds the return address.
497 OptoRegPair res_entry;
498 if (C->needs_stack_repair()) {
499 int res_idx = C->get_res_entry()._offset;
500 res_entry = _parm_regs[res_idx];
501 }
502
503 // Add in the incoming argument area
504 OptoReg::Name init_in = OptoReg::add(_old_SP, C->out_preserve_stack_slots());
505 for (i = init_in; i < _in_arg_limit; i = OptoReg::add(i,1)) {
506 if (i == res_entry.first() || i == res_entry.second()) {
507 continue; // Skip reserved slot to avoid spilling
508 }
509 C->FIRST_STACK_mask().Insert(i);
510 }
511 // Add in all bits past the outgoing argument area
512 guarantee(RegMask::can_represent_arg(OptoReg::add(_out_arg_limit,-1)),
513 "must be able to represent all call arguments in reg mask");
514 OptoReg::Name init = _out_arg_limit;
515 for (i = init; RegMask::can_represent(i); i = OptoReg::add(i,1)) {
516 C->FIRST_STACK_mask().Insert(i);
517 }
518 // Finally, set the "infinite stack" bit.
519 C->FIRST_STACK_mask().set_AllStack();
520
521 // Make spill masks. Registers for their class, plus FIRST_STACK_mask.
522 RegMask aligned_stack_mask = C->FIRST_STACK_mask();
523 // Keep spill masks aligned.
524 aligned_stack_mask.clear_to_pairs();
525 assert(aligned_stack_mask.is_AllStack(), "should be infinite stack");
526
527 *idealreg2spillmask[Op_RegP] = *idealreg2regmask[Op_RegP];
528 #ifdef _LP64
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