1 /*
2 * Copyright (c) 1997, 2017, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "memory/allocation.inline.hpp"
27 #include "opto/addnode.hpp"
28 #include "opto/connode.hpp"
29 #include "opto/convertnode.hpp"
30 #include "opto/memnode.hpp"
31 #include "opto/mulnode.hpp"
32 #include "opto/phaseX.hpp"
33 #include "opto/subnode.hpp"
34
35 // Portions of code courtesy of Clifford Click
36
37
38 //=============================================================================
39 //------------------------------hash-------------------------------------------
40 // Hash function over MulNodes. Needs to be commutative; i.e., I swap
41 // (commute) inputs to MulNodes willy-nilly so the hash function must return
42 // the same value in the presence of edge swapping.
43 uint MulNode::hash() const {
44 return (uintptr_t)in(1) + (uintptr_t)in(2) + Opcode();
45 }
46
47 //------------------------------Identity---------------------------------------
48 // Multiplying a one preserves the other argument
49 Node* MulNode::Identity(PhaseGVN* phase) {
50 const Type *one = mul_id(); // The multiplicative identity
51 if( phase->type( in(1) )->higher_equal( one ) ) return in(2);
52 if( phase->type( in(2) )->higher_equal( one ) ) return in(1);
53
54 return this;
55 }
56
57 //------------------------------Ideal------------------------------------------
58 // We also canonicalize the Node, moving constants to the right input,
59 // and flatten expressions (so that 1+x+2 becomes x+3).
60 Node *MulNode::Ideal(PhaseGVN *phase, bool can_reshape) {
61 const Type *t1 = phase->type( in(1) );
62 const Type *t2 = phase->type( in(2) );
63 Node *progress = NULL; // Progress flag
64 // We are OK if right is a constant, or right is a load and
65 // left is a non-constant.
66 if( !(t2->singleton() ||
67 (in(2)->is_Load() && !(t1->singleton() || in(1)->is_Load())) ) ) {
68 if( t1->singleton() || // Left input is a constant?
69 // Otherwise, sort inputs (commutativity) to help value numbering.
70 (in(1)->_idx > in(2)->_idx) ) {
71 swap_edges(1, 2);
72 const Type *t = t1;
73 t1 = t2;
74 t2 = t;
75 progress = this; // Made progress
76 }
77 }
78
79 // If the right input is a constant, and the left input is a product of a
80 // constant, flatten the expression tree.
81 uint op = Opcode();
82 if( t2->singleton() && // Right input is a constant?
83 op != Op_MulF && // Float & double cannot reassociate
84 op != Op_MulD ) {
85 if( t2 == Type::TOP ) return NULL;
86 Node *mul1 = in(1);
87 #ifdef ASSERT
88 // Check for dead loop
89 int op1 = mul1->Opcode();
90 if( phase->eqv( mul1, this ) || phase->eqv( in(2), this ) ||
91 ( ( op1 == mul_opcode() || op1 == add_opcode() ) &&
92 ( phase->eqv( mul1->in(1), this ) || phase->eqv( mul1->in(2), this ) ||
93 phase->eqv( mul1->in(1), mul1 ) || phase->eqv( mul1->in(2), mul1 ) ) ) )
94 assert(false, "dead loop in MulNode::Ideal");
95 #endif
96
97 if( mul1->Opcode() == mul_opcode() ) { // Left input is a multiply?
98 // Mul of a constant?
99 const Type *t12 = phase->type( mul1->in(2) );
100 if( t12->singleton() && t12 != Type::TOP) { // Left input is an add of a constant?
101 // Compute new constant; check for overflow
102 const Type *tcon01 = ((MulNode*)mul1)->mul_ring(t2,t12);
103 if( tcon01->singleton() ) {
104 // The Mul of the flattened expression
105 set_req(1, mul1->in(1));
106 set_req(2, phase->makecon( tcon01 ));
107 t2 = tcon01;
108 progress = this; // Made progress
109 }
110 }
111 }
112 // If the right input is a constant, and the left input is an add of a
113 // constant, flatten the tree: (X+con1)*con0 ==> X*con0 + con1*con0
114 const Node *add1 = in(1);
115 if( add1->Opcode() == add_opcode() ) { // Left input is an add?
116 // Add of a constant?
117 const Type *t12 = phase->type( add1->in(2) );
118 if( t12->singleton() && t12 != Type::TOP ) { // Left input is an add of a constant?
119 assert( add1->in(1) != add1, "dead loop in MulNode::Ideal" );
120 // Compute new constant; check for overflow
121 const Type *tcon01 = mul_ring(t2,t12);
122 if( tcon01->singleton() ) {
123
124 // Convert (X+con1)*con0 into X*con0
125 Node *mul = clone(); // mul = ()*con0
126 mul->set_req(1,add1->in(1)); // mul = X*con0
127 mul = phase->transform(mul);
128
129 Node *add2 = add1->clone();
130 add2->set_req(1, mul); // X*con0 + con0*con1
131 add2->set_req(2, phase->makecon(tcon01) );
132 progress = add2;
133 }
134 }
135 } // End of is left input an add
136 } // End of is right input a Mul
137
138 return progress;
139 }
140
141 //------------------------------Value-----------------------------------------
142 const Type* MulNode::Value(PhaseGVN* phase) const {
143 const Type *t1 = phase->type( in(1) );
144 const Type *t2 = phase->type( in(2) );
145 // Either input is TOP ==> the result is TOP
146 if( t1 == Type::TOP ) return Type::TOP;
147 if( t2 == Type::TOP ) return Type::TOP;
148
149 // Either input is ZERO ==> the result is ZERO.
150 // Not valid for floats or doubles since +0.0 * -0.0 --> +0.0
151 int op = Opcode();
152 if( op == Op_MulI || op == Op_AndI || op == Op_MulL || op == Op_AndL ) {
153 const Type *zero = add_id(); // The multiplicative zero
154 if( t1->higher_equal( zero ) ) return zero;
155 if( t2->higher_equal( zero ) ) return zero;
156 }
157
158 // Code pattern on return from a call that returns an __Value. Can
159 // be optimized away if the return value turns out to be an oop.
160 if (op == Op_AndX &&
161 in(1) != NULL &&
162 in(1)->Opcode() == Op_CastP2X &&
163 in(1)->in(1) != NULL &&
164 phase->type(in(1)->in(1))->isa_oopptr() &&
165 t2->isa_intptr_t()->_lo >= 0 &&
166 t2->isa_intptr_t()->_hi <= MinObjAlignmentInBytesMask) {
167 return add_id();
168 }
169
170 // Either input is BOTTOM ==> the result is the local BOTTOM
171 if( t1 == Type::BOTTOM || t2 == Type::BOTTOM )
172 return bottom_type();
173
174 #if defined(IA32)
175 // Can't trust native compilers to properly fold strict double
176 // multiplication with round-to-zero on this platform.
177 if (op == Op_MulD && phase->C->method()->is_strict()) {
178 return TypeD::DOUBLE;
179 }
180 #endif
181
182 return mul_ring(t1,t2); // Local flavor of type multiplication
183 }
184
185 //=============================================================================
186 //------------------------------Ideal------------------------------------------
187 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
188 Node *MulINode::Ideal(PhaseGVN *phase, bool can_reshape) {
189 // Swap constant to right
190 jint con;
191 if ((con = in(1)->find_int_con(0)) != 0) {
192 swap_edges(1, 2);
193 // Finish rest of method to use info in 'con'
194 } else if ((con = in(2)->find_int_con(0)) == 0) {
195 return MulNode::Ideal(phase, can_reshape);
196 }
197
198 // Now we have a constant Node on the right and the constant in con
199 if (con == 0) return NULL; // By zero is handled by Value call
200 if (con == 1) return NULL; // By one is handled by Identity call
201
202 // Check for negative constant; if so negate the final result
203 bool sign_flip = false;
204
205 unsigned int abs_con = uabs(con);
206 if (abs_con != (unsigned int)con) {
207 sign_flip = true;
208 }
209
210 // Get low bit; check for being the only bit
211 Node *res = NULL;
212 unsigned int bit1 = abs_con & (0-abs_con); // Extract low bit
213 if (bit1 == abs_con) { // Found a power of 2?
214 res = new LShiftINode(in(1), phase->intcon(log2_uint(bit1)));
215 } else {
216
217 // Check for constant with 2 bits set
218 unsigned int bit2 = abs_con-bit1;
219 bit2 = bit2 & (0-bit2); // Extract 2nd bit
220 if (bit2 + bit1 == abs_con) { // Found all bits in con?
221 Node *n1 = phase->transform( new LShiftINode(in(1), phase->intcon(log2_uint(bit1))));
222 Node *n2 = phase->transform( new LShiftINode(in(1), phase->intcon(log2_uint(bit2))));
223 res = new AddINode(n2, n1);
224
225 } else if (is_power_of_2(abs_con+1)) {
226 // Sleezy: power-of-2 -1. Next time be generic.
227 unsigned int temp = abs_con + 1;
228 Node *n1 = phase->transform(new LShiftINode(in(1), phase->intcon(log2_uint(temp))));
229 res = new SubINode(n1, in(1));
230 } else {
231 return MulNode::Ideal(phase, can_reshape);
232 }
233 }
234
235 if (sign_flip) { // Need to negate result?
236 res = phase->transform(res);// Transform, before making the zero con
237 res = new SubINode(phase->intcon(0),res);
238 }
239
240 return res; // Return final result
241 }
242
243 //------------------------------mul_ring---------------------------------------
244 // Compute the product type of two integer ranges into this node.
245 const Type *MulINode::mul_ring(const Type *t0, const Type *t1) const {
246 const TypeInt *r0 = t0->is_int(); // Handy access
247 const TypeInt *r1 = t1->is_int();
248
249 // Fetch endpoints of all ranges
250 jint lo0 = r0->_lo;
251 double a = (double)lo0;
252 jint hi0 = r0->_hi;
253 double b = (double)hi0;
254 jint lo1 = r1->_lo;
255 double c = (double)lo1;
256 jint hi1 = r1->_hi;
257 double d = (double)hi1;
258
259 // Compute all endpoints & check for overflow
260 int32_t A = java_multiply(lo0, lo1);
261 if( (double)A != a*c ) return TypeInt::INT; // Overflow?
262 int32_t B = java_multiply(lo0, hi1);
263 if( (double)B != a*d ) return TypeInt::INT; // Overflow?
264 int32_t C = java_multiply(hi0, lo1);
265 if( (double)C != b*c ) return TypeInt::INT; // Overflow?
266 int32_t D = java_multiply(hi0, hi1);
267 if( (double)D != b*d ) return TypeInt::INT; // Overflow?
268
269 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
270 else { lo0 = B; hi0 = A; }
271 if( C < D ) {
272 if( C < lo0 ) lo0 = C;
273 if( D > hi0 ) hi0 = D;
274 } else {
275 if( D < lo0 ) lo0 = D;
276 if( C > hi0 ) hi0 = C;
277 }
278 return TypeInt::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
279 }
280
281
282 //=============================================================================
283 //------------------------------Ideal------------------------------------------
284 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
285 Node *MulLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
286 // Swap constant to right
287 jlong con;
288 if ((con = in(1)->find_long_con(0)) != 0) {
289 swap_edges(1, 2);
290 // Finish rest of method to use info in 'con'
291 } else if ((con = in(2)->find_long_con(0)) == 0) {
292 return MulNode::Ideal(phase, can_reshape);
293 }
294
295 // Now we have a constant Node on the right and the constant in con
296 if (con == CONST64(0)) return NULL; // By zero is handled by Value call
297 if (con == CONST64(1)) return NULL; // By one is handled by Identity call
298
299 // Check for negative constant; if so negate the final result
300 bool sign_flip = false;
301 julong abs_con = uabs(con);
302 if (abs_con != (julong)con) {
303 sign_flip = true;
304 }
305
306 // Get low bit; check for being the only bit
307 Node *res = NULL;
308 julong bit1 = abs_con & (0-abs_con); // Extract low bit
309 if (bit1 == abs_con) { // Found a power of 2?
310 res = new LShiftLNode(in(1), phase->intcon(log2_long(bit1)));
311 } else {
312
313 // Check for constant with 2 bits set
314 julong bit2 = abs_con-bit1;
315 bit2 = bit2 & (0-bit2); // Extract 2nd bit
316 if (bit2 + bit1 == abs_con) { // Found all bits in con?
317 Node *n1 = phase->transform(new LShiftLNode(in(1), phase->intcon(log2_long(bit1))));
318 Node *n2 = phase->transform(new LShiftLNode(in(1), phase->intcon(log2_long(bit2))));
319 res = new AddLNode(n2, n1);
320
321 } else if (is_power_of_2_long(abs_con+1)) {
322 // Sleezy: power-of-2 -1. Next time be generic.
323 julong temp = abs_con + 1;
324 Node *n1 = phase->transform( new LShiftLNode(in(1), phase->intcon(log2_long(temp))));
325 res = new SubLNode(n1, in(1));
326 } else {
327 return MulNode::Ideal(phase, can_reshape);
328 }
329 }
330
331 if (sign_flip) { // Need to negate result?
332 res = phase->transform(res);// Transform, before making the zero con
333 res = new SubLNode(phase->longcon(0),res);
334 }
335
336 return res; // Return final result
337 }
338
339 //------------------------------mul_ring---------------------------------------
340 // Compute the product type of two integer ranges into this node.
341 const Type *MulLNode::mul_ring(const Type *t0, const Type *t1) const {
342 const TypeLong *r0 = t0->is_long(); // Handy access
343 const TypeLong *r1 = t1->is_long();
344
345 // Fetch endpoints of all ranges
346 jlong lo0 = r0->_lo;
347 double a = (double)lo0;
348 jlong hi0 = r0->_hi;
349 double b = (double)hi0;
350 jlong lo1 = r1->_lo;
351 double c = (double)lo1;
352 jlong hi1 = r1->_hi;
353 double d = (double)hi1;
354
355 // Compute all endpoints & check for overflow
356 jlong A = java_multiply(lo0, lo1);
357 if( (double)A != a*c ) return TypeLong::LONG; // Overflow?
358 jlong B = java_multiply(lo0, hi1);
359 if( (double)B != a*d ) return TypeLong::LONG; // Overflow?
360 jlong C = java_multiply(hi0, lo1);
361 if( (double)C != b*c ) return TypeLong::LONG; // Overflow?
362 jlong D = java_multiply(hi0, hi1);
363 if( (double)D != b*d ) return TypeLong::LONG; // Overflow?
364
365 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
366 else { lo0 = B; hi0 = A; }
367 if( C < D ) {
368 if( C < lo0 ) lo0 = C;
369 if( D > hi0 ) hi0 = D;
370 } else {
371 if( D < lo0 ) lo0 = D;
372 if( C > hi0 ) hi0 = C;
373 }
374 return TypeLong::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
375 }
376
377 //=============================================================================
378 //------------------------------mul_ring---------------------------------------
379 // Compute the product type of two double ranges into this node.
380 const Type *MulFNode::mul_ring(const Type *t0, const Type *t1) const {
381 if( t0 == Type::FLOAT || t1 == Type::FLOAT ) return Type::FLOAT;
382 return TypeF::make( t0->getf() * t1->getf() );
383 }
384
385 //=============================================================================
386 //------------------------------mul_ring---------------------------------------
387 // Compute the product type of two double ranges into this node.
388 const Type *MulDNode::mul_ring(const Type *t0, const Type *t1) const {
389 if( t0 == Type::DOUBLE || t1 == Type::DOUBLE ) return Type::DOUBLE;
390 // We must be multiplying 2 double constants.
391 return TypeD::make( t0->getd() * t1->getd() );
392 }
393
394 //=============================================================================
395 //------------------------------Value------------------------------------------
396 const Type* MulHiLNode::Value(PhaseGVN* phase) const {
397 // Either input is TOP ==> the result is TOP
398 const Type *t1 = phase->type( in(1) );
399 const Type *t2 = phase->type( in(2) );
400 if( t1 == Type::TOP ) return Type::TOP;
401 if( t2 == Type::TOP ) return Type::TOP;
402
403 // Either input is BOTTOM ==> the result is the local BOTTOM
404 const Type *bot = bottom_type();
405 if( (t1 == bot) || (t2 == bot) ||
406 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
407 return bot;
408
409 // It is not worth trying to constant fold this stuff!
410 return TypeLong::LONG;
411 }
412
413 //=============================================================================
414 //------------------------------mul_ring---------------------------------------
415 // Supplied function returns the product of the inputs IN THE CURRENT RING.
416 // For the logical operations the ring's MUL is really a logical AND function.
417 // This also type-checks the inputs for sanity. Guaranteed never to
418 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
419 const Type *AndINode::mul_ring( const Type *t0, const Type *t1 ) const {
420 const TypeInt *r0 = t0->is_int(); // Handy access
421 const TypeInt *r1 = t1->is_int();
422 int widen = MAX2(r0->_widen,r1->_widen);
423
424 // If either input is a constant, might be able to trim cases
425 if( !r0->is_con() && !r1->is_con() )
426 return TypeInt::INT; // No constants to be had
427
428 // Both constants? Return bits
429 if( r0->is_con() && r1->is_con() )
430 return TypeInt::make( r0->get_con() & r1->get_con() );
431
432 if( r0->is_con() && r0->get_con() > 0 )
433 return TypeInt::make(0, r0->get_con(), widen);
434
435 if( r1->is_con() && r1->get_con() > 0 )
436 return TypeInt::make(0, r1->get_con(), widen);
437
438 if( r0 == TypeInt::BOOL || r1 == TypeInt::BOOL ) {
439 return TypeInt::BOOL;
440 }
441
442 return TypeInt::INT; // No constants to be had
443 }
444
445 //------------------------------Identity---------------------------------------
446 // Masking off the high bits of an unsigned load is not required
447 Node* AndINode::Identity(PhaseGVN* phase) {
448
449 // x & x => x
450 if (phase->eqv(in(1), in(2))) return in(1);
451
452 Node* in1 = in(1);
453 uint op = in1->Opcode();
454 const TypeInt* t2 = phase->type(in(2))->isa_int();
455 if (t2 && t2->is_con()) {
456 int con = t2->get_con();
457 // Masking off high bits which are always zero is useless.
458 const TypeInt* t1 = phase->type( in(1) )->isa_int();
459 if (t1 != NULL && t1->_lo >= 0) {
460 jint t1_support = right_n_bits(1 + log2_jint(t1->_hi));
461 if ((t1_support & con) == t1_support)
462 return in1;
463 }
464 // Masking off the high bits of a unsigned-shift-right is not
465 // needed either.
466 if (op == Op_URShiftI) {
467 const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
468 if (t12 && t12->is_con()) { // Shift is by a constant
469 int shift = t12->get_con();
470 shift &= BitsPerJavaInteger - 1; // semantics of Java shifts
471 int mask = max_juint >> shift;
472 if ((mask & con) == mask) // If AND is useless, skip it
473 return in1;
474 }
475 }
476 }
477 return MulNode::Identity(phase);
478 }
479
480 //------------------------------Ideal------------------------------------------
481 Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) {
482 // Special case constant AND mask
483 const TypeInt *t2 = phase->type( in(2) )->isa_int();
484 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
485 const int mask = t2->get_con();
486 Node *load = in(1);
487 uint lop = load->Opcode();
488
489 // Masking bits off of a Character? Hi bits are already zero.
490 if( lop == Op_LoadUS &&
491 (mask & 0xFFFF0000) ) // Can we make a smaller mask?
492 return new AndINode(load,phase->intcon(mask&0xFFFF));
493
494 // Masking bits off of a Short? Loading a Character does some masking
495 if (can_reshape &&
496 load->outcnt() == 1 && load->unique_out() == this) {
497 if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) {
498 Node* ldus = load->as_Load()->convert_to_unsigned_load(*phase);
499 ldus = phase->transform(ldus);
500 return new AndINode(ldus, phase->intcon(mask & 0xFFFF));
501 }
502
503 // Masking sign bits off of a Byte? Do an unsigned byte load plus
504 // an and.
505 if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0) {
506 Node* ldub = load->as_Load()->convert_to_unsigned_load(*phase);
507 ldub = phase->transform(ldub);
508 return new AndINode(ldub, phase->intcon(mask));
509 }
510 }
511
512 // Masking off sign bits? Dont make them!
513 if( lop == Op_RShiftI ) {
514 const TypeInt *t12 = phase->type(load->in(2))->isa_int();
515 if( t12 && t12->is_con() ) { // Shift is by a constant
516 int shift = t12->get_con();
517 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
518 const int sign_bits_mask = ~right_n_bits(BitsPerJavaInteger - shift);
519 // If the AND'ing of the 2 masks has no bits, then only original shifted
520 // bits survive. NO sign-extension bits survive the maskings.
521 if( (sign_bits_mask & mask) == 0 ) {
522 // Use zero-fill shift instead
523 Node *zshift = phase->transform(new URShiftINode(load->in(1),load->in(2)));
524 return new AndINode( zshift, in(2) );
525 }
526 }
527 }
528
529 // Check for 'negate/and-1', a pattern emitted when someone asks for
530 // 'mod 2'. Negate leaves the low order bit unchanged (think: complement
531 // plus 1) and the mask is of the low order bit. Skip the negate.
532 if( lop == Op_SubI && mask == 1 && load->in(1) &&
533 phase->type(load->in(1)) == TypeInt::ZERO )
534 return new AndINode( load->in(2), in(2) );
535
536 return MulNode::Ideal(phase, can_reshape);
537 }
538
539 //=============================================================================
540 //------------------------------mul_ring---------------------------------------
541 // Supplied function returns the product of the inputs IN THE CURRENT RING.
542 // For the logical operations the ring's MUL is really a logical AND function.
543 // This also type-checks the inputs for sanity. Guaranteed never to
544 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
545 const Type *AndLNode::mul_ring( const Type *t0, const Type *t1 ) const {
546 const TypeLong *r0 = t0->is_long(); // Handy access
547 const TypeLong *r1 = t1->is_long();
548 int widen = MAX2(r0->_widen,r1->_widen);
549
550 // If either input is a constant, might be able to trim cases
551 if( !r0->is_con() && !r1->is_con() )
552 return TypeLong::LONG; // No constants to be had
553
554 // Both constants? Return bits
555 if( r0->is_con() && r1->is_con() )
556 return TypeLong::make( r0->get_con() & r1->get_con() );
557
558 if( r0->is_con() && r0->get_con() > 0 )
559 return TypeLong::make(CONST64(0), r0->get_con(), widen);
560
561 if( r1->is_con() && r1->get_con() > 0 )
562 return TypeLong::make(CONST64(0), r1->get_con(), widen);
563
564 return TypeLong::LONG; // No constants to be had
565 }
566
567 //------------------------------Identity---------------------------------------
568 // Masking off the high bits of an unsigned load is not required
569 Node* AndLNode::Identity(PhaseGVN* phase) {
570
571 // x & x => x
572 if (phase->eqv(in(1), in(2))) return in(1);
573
574 Node *usr = in(1);
575 const TypeLong *t2 = phase->type( in(2) )->isa_long();
576 if( t2 && t2->is_con() ) {
577 jlong con = t2->get_con();
578 // Masking off high bits which are always zero is useless.
579 const TypeLong* t1 = phase->type( in(1) )->isa_long();
580 if (t1 != NULL && t1->_lo >= 0) {
581 int bit_count = log2_long(t1->_hi) + 1;
582 jlong t1_support = jlong(max_julong >> (BitsPerJavaLong - bit_count));
583 if ((t1_support & con) == t1_support)
584 return usr;
585 }
586 uint lop = usr->Opcode();
587 // Masking off the high bits of a unsigned-shift-right is not
588 // needed either.
589 if( lop == Op_URShiftL ) {
590 const TypeInt *t12 = phase->type( usr->in(2) )->isa_int();
591 if( t12 && t12->is_con() ) { // Shift is by a constant
592 int shift = t12->get_con();
593 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
594 jlong mask = max_julong >> shift;
595 if( (mask&con) == mask ) // If AND is useless, skip it
596 return usr;
597 }
598 }
599
600 if (con == markOopDesc::always_locked_pattern) {
601 assert(EnableValhalla || ACmpOnValues == 3, "should only be used for value types");
602 if (in(1)->is_Load() && phase->type(in(1)->in(MemNode::Address))->is_valuetypeptr()) {
603 return in(2); // Obj is known to be a value type
604 }
605 }
606 }
607 return MulNode::Identity(phase);
608 }
609
610 //------------------------------Ideal------------------------------------------
611 Node *AndLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
612 // Special case constant AND mask
613 const TypeLong *t2 = phase->type( in(2) )->isa_long();
614 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
615 const jlong mask = t2->get_con();
616
617 Node* in1 = in(1);
618 uint op = in1->Opcode();
619
620 // Are we masking a long that was converted from an int with a mask
621 // that fits in 32-bits? Commute them and use an AndINode. Don't
622 // convert masks which would cause a sign extension of the integer
623 // value. This check includes UI2L masks (0x00000000FFFFFFFF) which
624 // would be optimized away later in Identity.
625 if (op == Op_ConvI2L && (mask & UCONST64(0xFFFFFFFF80000000)) == 0) {
626 Node* andi = new AndINode(in1->in(1), phase->intcon(mask));
627 andi = phase->transform(andi);
628 return new ConvI2LNode(andi);
629 }
630
631 // Masking off sign bits? Dont make them!
632 if (op == Op_RShiftL) {
633 const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
634 if( t12 && t12->is_con() ) { // Shift is by a constant
635 int shift = t12->get_con();
636 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
637 const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - shift)) -1);
638 // If the AND'ing of the 2 masks has no bits, then only original shifted
639 // bits survive. NO sign-extension bits survive the maskings.
640 if( (sign_bits_mask & mask) == 0 ) {
641 // Use zero-fill shift instead
642 Node *zshift = phase->transform(new URShiftLNode(in1->in(1), in1->in(2)));
643 return new AndLNode(zshift, in(2));
644 }
645 }
646 }
647
648 return MulNode::Ideal(phase, can_reshape);
649 }
650
651 //=============================================================================
652
653 static int getShiftCon(PhaseGVN *phase, Node *shiftNode, int retVal) {
654 const Type *t = phase->type(shiftNode->in(2));
655 if (t == Type::TOP) return retVal; // Right input is dead.
656 const TypeInt *t2 = t->isa_int();
657 if (!t2 || !t2->is_con()) return retVal; // Right input is a constant.
658
659 return t2->get_con();
660 }
661
662 static int maskShiftAmount(PhaseGVN *phase, Node *shiftNode, int nBits) {
663 int shift = getShiftCon(phase, shiftNode, 0);
664 int maskedShift = shift & (nBits - 1);
665
666 if (maskedShift == 0) return 0; // Let Identity() handle 0 shift count.
667
668 if (shift != maskedShift) {
669 shiftNode->set_req(2, phase->intcon(maskedShift)); // Replace shift count with masked value.
670 phase->igvn_rehash_node_delayed(shiftNode);
671 }
672
673 return maskedShift;
674 }
675
676 //------------------------------Identity---------------------------------------
677 Node* LShiftINode::Identity(PhaseGVN* phase) {
678 return ((getShiftCon(phase, this, -1) & (BitsPerJavaInteger - 1)) == 0) ? in(1) : this;
679 }
680
681 //------------------------------Ideal------------------------------------------
682 // If the right input is a constant, and the left input is an add of a
683 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
684 Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
685 int con = maskShiftAmount(phase, this, BitsPerJavaInteger);
686 if (con == 0) {
687 return NULL;
688 }
689
690 // Left input is an add of a constant?
691 Node *add1 = in(1);
692 int add1_op = add1->Opcode();
693 if( add1_op == Op_AddI ) { // Left input is an add?
694 assert( add1 != add1->in(1), "dead loop in LShiftINode::Ideal" );
695 const TypeInt *t12 = phase->type(add1->in(2))->isa_int();
696 if( t12 && t12->is_con() ){ // Left input is an add of a con?
697 // Transform is legal, but check for profit. Avoid breaking 'i2s'
698 // and 'i2b' patterns which typically fold into 'StoreC/StoreB'.
699 if( con < 16 ) {
700 // Compute X << con0
701 Node *lsh = phase->transform( new LShiftINode( add1->in(1), in(2) ) );
702 // Compute X<<con0 + (con1<<con0)
703 return new AddINode( lsh, phase->intcon(t12->get_con() << con));
704 }
705 }
706 }
707
708 // Check for "(x>>c0)<<c0" which just masks off low bits
709 if( (add1_op == Op_RShiftI || add1_op == Op_URShiftI ) &&
710 add1->in(2) == in(2) )
711 // Convert to "(x & -(1<<c0))"
712 return new AndINode(add1->in(1),phase->intcon( -(1<<con)));
713
714 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
715 if( add1_op == Op_AndI ) {
716 Node *add2 = add1->in(1);
717 int add2_op = add2->Opcode();
718 if( (add2_op == Op_RShiftI || add2_op == Op_URShiftI ) &&
719 add2->in(2) == in(2) ) {
720 // Convert to "(x & (Y<<c0))"
721 Node *y_sh = phase->transform( new LShiftINode( add1->in(2), in(2) ) );
722 return new AndINode( add2->in(1), y_sh );
723 }
724 }
725
726 // Check for ((x & ((1<<(32-c0))-1)) << c0) which ANDs off high bits
727 // before shifting them away.
728 const jint bits_mask = right_n_bits(BitsPerJavaInteger-con);
729 if( add1_op == Op_AndI &&
730 phase->type(add1->in(2)) == TypeInt::make( bits_mask ) )
731 return new LShiftINode( add1->in(1), in(2) );
732
733 return NULL;
734 }
735
736 //------------------------------Value------------------------------------------
737 // A LShiftINode shifts its input2 left by input1 amount.
738 const Type* LShiftINode::Value(PhaseGVN* phase) const {
739 const Type *t1 = phase->type( in(1) );
740 const Type *t2 = phase->type( in(2) );
741 // Either input is TOP ==> the result is TOP
742 if( t1 == Type::TOP ) return Type::TOP;
743 if( t2 == Type::TOP ) return Type::TOP;
744
745 // Left input is ZERO ==> the result is ZERO.
746 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
747 // Shift by zero does nothing
748 if( t2 == TypeInt::ZERO ) return t1;
749
750 // Either input is BOTTOM ==> the result is BOTTOM
751 if( (t1 == TypeInt::INT) || (t2 == TypeInt::INT) ||
752 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
753 return TypeInt::INT;
754
755 const TypeInt *r1 = t1->is_int(); // Handy access
756 const TypeInt *r2 = t2->is_int(); // Handy access
757
758 if (!r2->is_con())
759 return TypeInt::INT;
760
761 uint shift = r2->get_con();
762 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
763 // Shift by a multiple of 32 does nothing:
764 if (shift == 0) return t1;
765
766 // If the shift is a constant, shift the bounds of the type,
767 // unless this could lead to an overflow.
768 if (!r1->is_con()) {
769 jint lo = r1->_lo, hi = r1->_hi;
770 if (((lo << shift) >> shift) == lo &&
771 ((hi << shift) >> shift) == hi) {
772 // No overflow. The range shifts up cleanly.
773 return TypeInt::make((jint)lo << (jint)shift,
774 (jint)hi << (jint)shift,
775 MAX2(r1->_widen,r2->_widen));
776 }
777 return TypeInt::INT;
778 }
779
780 return TypeInt::make( (jint)r1->get_con() << (jint)shift );
781 }
782
783 //=============================================================================
784 //------------------------------Identity---------------------------------------
785 Node* LShiftLNode::Identity(PhaseGVN* phase) {
786 return ((getShiftCon(phase, this, -1) & (BitsPerJavaLong - 1)) == 0) ? in(1) : this;
787 }
788
789 //------------------------------Ideal------------------------------------------
790 // If the right input is a constant, and the left input is an add of a
791 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
792 Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
793 int con = maskShiftAmount(phase, this, BitsPerJavaLong);
794 if (con == 0) {
795 return NULL;
796 }
797
798 // Left input is an add of a constant?
799 Node *add1 = in(1);
800 int add1_op = add1->Opcode();
801 if( add1_op == Op_AddL ) { // Left input is an add?
802 // Avoid dead data cycles from dead loops
803 assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" );
804 const TypeLong *t12 = phase->type(add1->in(2))->isa_long();
805 if( t12 && t12->is_con() ){ // Left input is an add of a con?
806 // Compute X << con0
807 Node *lsh = phase->transform( new LShiftLNode( add1->in(1), in(2) ) );
808 // Compute X<<con0 + (con1<<con0)
809 return new AddLNode( lsh, phase->longcon(t12->get_con() << con));
810 }
811 }
812
813 // Check for "(x>>c0)<<c0" which just masks off low bits
814 if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) &&
815 add1->in(2) == in(2) )
816 // Convert to "(x & -(1<<c0))"
817 return new AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con)));
818
819 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
820 if( add1_op == Op_AndL ) {
821 Node *add2 = add1->in(1);
822 int add2_op = add2->Opcode();
823 if( (add2_op == Op_RShiftL || add2_op == Op_URShiftL ) &&
824 add2->in(2) == in(2) ) {
825 // Convert to "(x & (Y<<c0))"
826 Node *y_sh = phase->transform( new LShiftLNode( add1->in(2), in(2) ) );
827 return new AndLNode( add2->in(1), y_sh );
828 }
829 }
830
831 // Check for ((x & ((CONST64(1)<<(64-c0))-1)) << c0) which ANDs off high bits
832 // before shifting them away.
833 const jlong bits_mask = jlong(max_julong >> con);
834 if( add1_op == Op_AndL &&
835 phase->type(add1->in(2)) == TypeLong::make( bits_mask ) )
836 return new LShiftLNode( add1->in(1), in(2) );
837
838 return NULL;
839 }
840
841 //------------------------------Value------------------------------------------
842 // A LShiftLNode shifts its input2 left by input1 amount.
843 const Type* LShiftLNode::Value(PhaseGVN* phase) const {
844 const Type *t1 = phase->type( in(1) );
845 const Type *t2 = phase->type( in(2) );
846 // Either input is TOP ==> the result is TOP
847 if( t1 == Type::TOP ) return Type::TOP;
848 if( t2 == Type::TOP ) return Type::TOP;
849
850 // Left input is ZERO ==> the result is ZERO.
851 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
852 // Shift by zero does nothing
853 if( t2 == TypeInt::ZERO ) return t1;
854
855 // Either input is BOTTOM ==> the result is BOTTOM
856 if( (t1 == TypeLong::LONG) || (t2 == TypeInt::INT) ||
857 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
858 return TypeLong::LONG;
859
860 const TypeLong *r1 = t1->is_long(); // Handy access
861 const TypeInt *r2 = t2->is_int(); // Handy access
862
863 if (!r2->is_con())
864 return TypeLong::LONG;
865
866 uint shift = r2->get_con();
867 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
868 // Shift by a multiple of 64 does nothing:
869 if (shift == 0) return t1;
870
871 // If the shift is a constant, shift the bounds of the type,
872 // unless this could lead to an overflow.
873 if (!r1->is_con()) {
874 jlong lo = r1->_lo, hi = r1->_hi;
875 if (((lo << shift) >> shift) == lo &&
876 ((hi << shift) >> shift) == hi) {
877 // No overflow. The range shifts up cleanly.
878 return TypeLong::make((jlong)lo << (jint)shift,
879 (jlong)hi << (jint)shift,
880 MAX2(r1->_widen,r2->_widen));
881 }
882 return TypeLong::LONG;
883 }
884
885 return TypeLong::make( (jlong)r1->get_con() << (jint)shift );
886 }
887
888 //=============================================================================
889 //------------------------------Identity---------------------------------------
890 Node* RShiftINode::Identity(PhaseGVN* phase) {
891 int shift = getShiftCon(phase, this, -1);
892 if (shift == -1) return this;
893 if ((shift & (BitsPerJavaInteger - 1)) == 0) return in(1);
894
895 // Check for useless sign-masking
896 if (in(1)->Opcode() == Op_LShiftI &&
897 in(1)->req() == 3 &&
898 in(1)->in(2) == in(2)) {
899 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
900 // Compute masks for which this shifting doesn't change
901 int lo = (-1 << (BitsPerJavaInteger - ((uint)shift)-1)); // FFFF8000
902 int hi = ~lo; // 00007FFF
903 const TypeInt *t11 = phase->type(in(1)->in(1))->isa_int();
904 if (!t11) return this;
905 // Does actual value fit inside of mask?
906 if (lo <= t11->_lo && t11->_hi <= hi) {
907 return in(1)->in(1); // Then shifting is a nop
908 }
909 }
910
911 return this;
912 }
913
914 //------------------------------Ideal------------------------------------------
915 Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
916 // Inputs may be TOP if they are dead.
917 const TypeInt *t1 = phase->type(in(1))->isa_int();
918 if (!t1) return NULL; // Left input is an integer
919 const TypeInt *t3; // type of in(1).in(2)
920 int shift = maskShiftAmount(phase, this, BitsPerJavaInteger);
921 if (shift == 0) {
922 return NULL;
923 }
924
925 // Check for (x & 0xFF000000) >> 24, whose mask can be made smaller.
926 // Such expressions arise normally from shift chains like (byte)(x >> 24).
927 const Node *mask = in(1);
928 if( mask->Opcode() == Op_AndI &&
929 (t3 = phase->type(mask->in(2))->isa_int()) &&
930 t3->is_con() ) {
931 Node *x = mask->in(1);
932 jint maskbits = t3->get_con();
933 // Convert to "(x >> shift) & (mask >> shift)"
934 Node *shr_nomask = phase->transform( new RShiftINode(mask->in(1), in(2)) );
935 return new AndINode(shr_nomask, phase->intcon( maskbits >> shift));
936 }
937
938 // Check for "(short[i] <<16)>>16" which simply sign-extends
939 const Node *shl = in(1);
940 if( shl->Opcode() != Op_LShiftI ) return NULL;
941
942 if( shift == 16 &&
943 (t3 = phase->type(shl->in(2))->isa_int()) &&
944 t3->is_con(16) ) {
945 Node *ld = shl->in(1);
946 if( ld->Opcode() == Op_LoadS ) {
947 // Sign extension is just useless here. Return a RShiftI of zero instead
948 // returning 'ld' directly. We cannot return an old Node directly as
949 // that is the job of 'Identity' calls and Identity calls only work on
950 // direct inputs ('ld' is an extra Node removed from 'this'). The
951 // combined optimization requires Identity only return direct inputs.
952 set_req(1, ld);
953 set_req(2, phase->intcon(0));
954 return this;
955 }
956 else if( can_reshape &&
957 ld->Opcode() == Op_LoadUS &&
958 ld->outcnt() == 1 && ld->unique_out() == shl)
959 // Replace zero-extension-load with sign-extension-load
960 return ld->as_Load()->convert_to_signed_load(*phase);
961 }
962
963 // Check for "(byte[i] <<24)>>24" which simply sign-extends
964 if( shift == 24 &&
965 (t3 = phase->type(shl->in(2))->isa_int()) &&
966 t3->is_con(24) ) {
967 Node *ld = shl->in(1);
968 if( ld->Opcode() == Op_LoadB ) {
969 // Sign extension is just useless here
970 set_req(1, ld);
971 set_req(2, phase->intcon(0));
972 return this;
973 }
974 }
975
976 return NULL;
977 }
978
979 //------------------------------Value------------------------------------------
980 // A RShiftINode shifts its input2 right by input1 amount.
981 const Type* RShiftINode::Value(PhaseGVN* phase) const {
982 const Type *t1 = phase->type( in(1) );
983 const Type *t2 = phase->type( in(2) );
984 // Either input is TOP ==> the result is TOP
985 if( t1 == Type::TOP ) return Type::TOP;
986 if( t2 == Type::TOP ) return Type::TOP;
987
988 // Left input is ZERO ==> the result is ZERO.
989 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
990 // Shift by zero does nothing
991 if( t2 == TypeInt::ZERO ) return t1;
992
993 // Either input is BOTTOM ==> the result is BOTTOM
994 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
995 return TypeInt::INT;
996
997 if (t2 == TypeInt::INT)
998 return TypeInt::INT;
999
1000 const TypeInt *r1 = t1->is_int(); // Handy access
1001 const TypeInt *r2 = t2->is_int(); // Handy access
1002
1003 // If the shift is a constant, just shift the bounds of the type.
1004 // For example, if the shift is 31, we just propagate sign bits.
1005 if (r2->is_con()) {
1006 uint shift = r2->get_con();
1007 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
1008 // Shift by a multiple of 32 does nothing:
1009 if (shift == 0) return t1;
1010 // Calculate reasonably aggressive bounds for the result.
1011 // This is necessary if we are to correctly type things
1012 // like (x<<24>>24) == ((byte)x).
1013 jint lo = (jint)r1->_lo >> (jint)shift;
1014 jint hi = (jint)r1->_hi >> (jint)shift;
1015 assert(lo <= hi, "must have valid bounds");
1016 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1017 #ifdef ASSERT
1018 // Make sure we get the sign-capture idiom correct.
1019 if (shift == BitsPerJavaInteger-1) {
1020 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>31 of + is 0");
1021 if (r1->_hi < 0) assert(ti == TypeInt::MINUS_1, ">>31 of - is -1");
1022 }
1023 #endif
1024 return ti;
1025 }
1026
1027 if( !r1->is_con() || !r2->is_con() )
1028 return TypeInt::INT;
1029
1030 // Signed shift right
1031 return TypeInt::make( r1->get_con() >> (r2->get_con()&31) );
1032 }
1033
1034 //=============================================================================
1035 //------------------------------Identity---------------------------------------
1036 Node* RShiftLNode::Identity(PhaseGVN* phase) {
1037 const TypeInt *ti = phase->type(in(2))->isa_int(); // Shift count is an int.
1038 return (ti && ti->is_con() && (ti->get_con() & (BitsPerJavaLong - 1)) == 0) ? in(1) : this;
1039 }
1040
1041 //------------------------------Value------------------------------------------
1042 // A RShiftLNode shifts its input2 right by input1 amount.
1043 const Type* RShiftLNode::Value(PhaseGVN* phase) const {
1044 const Type *t1 = phase->type( in(1) );
1045 const Type *t2 = phase->type( in(2) );
1046 // Either input is TOP ==> the result is TOP
1047 if( t1 == Type::TOP ) return Type::TOP;
1048 if( t2 == Type::TOP ) return Type::TOP;
1049
1050 // Left input is ZERO ==> the result is ZERO.
1051 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1052 // Shift by zero does nothing
1053 if( t2 == TypeInt::ZERO ) return t1;
1054
1055 // Either input is BOTTOM ==> the result is BOTTOM
1056 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1057 return TypeLong::LONG;
1058
1059 if (t2 == TypeInt::INT)
1060 return TypeLong::LONG;
1061
1062 const TypeLong *r1 = t1->is_long(); // Handy access
1063 const TypeInt *r2 = t2->is_int (); // Handy access
1064
1065 // If the shift is a constant, just shift the bounds of the type.
1066 // For example, if the shift is 63, we just propagate sign bits.
1067 if (r2->is_con()) {
1068 uint shift = r2->get_con();
1069 shift &= (2*BitsPerJavaInteger)-1; // semantics of Java shifts
1070 // Shift by a multiple of 64 does nothing:
1071 if (shift == 0) return t1;
1072 // Calculate reasonably aggressive bounds for the result.
1073 // This is necessary if we are to correctly type things
1074 // like (x<<24>>24) == ((byte)x).
1075 jlong lo = (jlong)r1->_lo >> (jlong)shift;
1076 jlong hi = (jlong)r1->_hi >> (jlong)shift;
1077 assert(lo <= hi, "must have valid bounds");
1078 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1079 #ifdef ASSERT
1080 // Make sure we get the sign-capture idiom correct.
1081 if (shift == (2*BitsPerJavaInteger)-1) {
1082 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>63 of + is 0");
1083 if (r1->_hi < 0) assert(tl == TypeLong::MINUS_1, ">>63 of - is -1");
1084 }
1085 #endif
1086 return tl;
1087 }
1088
1089 return TypeLong::LONG; // Give up
1090 }
1091
1092 //=============================================================================
1093 //------------------------------Identity---------------------------------------
1094 Node* URShiftINode::Identity(PhaseGVN* phase) {
1095 int shift = getShiftCon(phase, this, -1);
1096 if ((shift & (BitsPerJavaInteger - 1)) == 0) return in(1);
1097
1098 // Check for "((x << LogBytesPerWord) + (wordSize-1)) >> LogBytesPerWord" which is just "x".
1099 // Happens during new-array length computation.
1100 // Safe if 'x' is in the range [0..(max_int>>LogBytesPerWord)]
1101 Node *add = in(1);
1102 if (add->Opcode() == Op_AddI) {
1103 const TypeInt *t2 = phase->type(add->in(2))->isa_int();
1104 if (t2 && t2->is_con(wordSize - 1) &&
1105 add->in(1)->Opcode() == Op_LShiftI) {
1106 // Check that shift_counts are LogBytesPerWord.
1107 Node *lshift_count = add->in(1)->in(2);
1108 const TypeInt *t_lshift_count = phase->type(lshift_count)->isa_int();
1109 if (t_lshift_count && t_lshift_count->is_con(LogBytesPerWord) &&
1110 t_lshift_count == phase->type(in(2))) {
1111 Node *x = add->in(1)->in(1);
1112 const TypeInt *t_x = phase->type(x)->isa_int();
1113 if (t_x != NULL && 0 <= t_x->_lo && t_x->_hi <= (max_jint>>LogBytesPerWord)) {
1114 return x;
1115 }
1116 }
1117 }
1118 }
1119
1120 return (phase->type(in(2))->higher_equal(TypeInt::ZERO)) ? in(1) : this;
1121 }
1122
1123 //------------------------------Ideal------------------------------------------
1124 Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
1125 int con = maskShiftAmount(phase, this, BitsPerJavaInteger);
1126 if (con == 0) {
1127 return NULL;
1128 }
1129
1130 // We'll be wanting the right-shift amount as a mask of that many bits
1131 const int mask = right_n_bits(BitsPerJavaInteger - con);
1132
1133 int in1_op = in(1)->Opcode();
1134
1135 // Check for ((x>>>a)>>>b) and replace with (x>>>(a+b)) when a+b < 32
1136 if( in1_op == Op_URShiftI ) {
1137 const TypeInt *t12 = phase->type( in(1)->in(2) )->isa_int();
1138 if( t12 && t12->is_con() ) { // Right input is a constant
1139 assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" );
1140 const int con2 = t12->get_con() & 31; // Shift count is always masked
1141 const int con3 = con+con2;
1142 if( con3 < 32 ) // Only merge shifts if total is < 32
1143 return new URShiftINode( in(1)->in(1), phase->intcon(con3) );
1144 }
1145 }
1146
1147 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
1148 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1149 // If Q is "X << z" the rounding is useless. Look for patterns like
1150 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
1151 Node *add = in(1);
1152 const TypeInt *t2 = phase->type(in(2))->isa_int();
1153 if (in1_op == Op_AddI) {
1154 Node *lshl = add->in(1);
1155 if( lshl->Opcode() == Op_LShiftI &&
1156 phase->type(lshl->in(2)) == t2 ) {
1157 Node *y_z = phase->transform( new URShiftINode(add->in(2),in(2)) );
1158 Node *sum = phase->transform( new AddINode( lshl->in(1), y_z ) );
1159 return new AndINode( sum, phase->intcon(mask) );
1160 }
1161 }
1162
1163 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
1164 // This shortens the mask. Also, if we are extracting a high byte and
1165 // storing it to a buffer, the mask will be removed completely.
1166 Node *andi = in(1);
1167 if( in1_op == Op_AndI ) {
1168 const TypeInt *t3 = phase->type( andi->in(2) )->isa_int();
1169 if( t3 && t3->is_con() ) { // Right input is a constant
1170 jint mask2 = t3->get_con();
1171 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
1172 Node *newshr = phase->transform( new URShiftINode(andi->in(1), in(2)) );
1173 return new AndINode(newshr, phase->intcon(mask2));
1174 // The negative values are easier to materialize than positive ones.
1175 // A typical case from address arithmetic is ((x & ~15) >> 4).
1176 // It's better to change that to ((x >> 4) & ~0) versus
1177 // ((x >> 4) & 0x0FFFFFFF). The difference is greatest in LP64.
1178 }
1179 }
1180
1181 // Check for "(X << z ) >>> z" which simply zero-extends
1182 Node *shl = in(1);
1183 if( in1_op == Op_LShiftI &&
1184 phase->type(shl->in(2)) == t2 )
1185 return new AndINode( shl->in(1), phase->intcon(mask) );
1186
1187 return NULL;
1188 }
1189
1190 //------------------------------Value------------------------------------------
1191 // A URShiftINode shifts its input2 right by input1 amount.
1192 const Type* URShiftINode::Value(PhaseGVN* phase) const {
1193 // (This is a near clone of RShiftINode::Value.)
1194 const Type *t1 = phase->type( in(1) );
1195 const Type *t2 = phase->type( in(2) );
1196 // Either input is TOP ==> the result is TOP
1197 if( t1 == Type::TOP ) return Type::TOP;
1198 if( t2 == Type::TOP ) return Type::TOP;
1199
1200 // Left input is ZERO ==> the result is ZERO.
1201 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
1202 // Shift by zero does nothing
1203 if( t2 == TypeInt::ZERO ) return t1;
1204
1205 // Either input is BOTTOM ==> the result is BOTTOM
1206 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1207 return TypeInt::INT;
1208
1209 if (t2 == TypeInt::INT)
1210 return TypeInt::INT;
1211
1212 const TypeInt *r1 = t1->is_int(); // Handy access
1213 const TypeInt *r2 = t2->is_int(); // Handy access
1214
1215 if (r2->is_con()) {
1216 uint shift = r2->get_con();
1217 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
1218 // Shift by a multiple of 32 does nothing:
1219 if (shift == 0) return t1;
1220 // Calculate reasonably aggressive bounds for the result.
1221 jint lo = (juint)r1->_lo >> (juint)shift;
1222 jint hi = (juint)r1->_hi >> (juint)shift;
1223 if (r1->_hi >= 0 && r1->_lo < 0) {
1224 // If the type has both negative and positive values,
1225 // there are two separate sub-domains to worry about:
1226 // The positive half and the negative half.
1227 jint neg_lo = lo;
1228 jint neg_hi = (juint)-1 >> (juint)shift;
1229 jint pos_lo = (juint) 0 >> (juint)shift;
1230 jint pos_hi = hi;
1231 lo = MIN2(neg_lo, pos_lo); // == 0
1232 hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
1233 }
1234 assert(lo <= hi, "must have valid bounds");
1235 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1236 #ifdef ASSERT
1237 // Make sure we get the sign-capture idiom correct.
1238 if (shift == BitsPerJavaInteger-1) {
1239 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>>31 of + is 0");
1240 if (r1->_hi < 0) assert(ti == TypeInt::ONE, ">>>31 of - is +1");
1241 }
1242 #endif
1243 return ti;
1244 }
1245
1246 //
1247 // Do not support shifted oops in info for GC
1248 //
1249 // else if( t1->base() == Type::InstPtr ) {
1250 //
1251 // const TypeInstPtr *o = t1->is_instptr();
1252 // if( t1->singleton() )
1253 // return TypeInt::make( ((uint32_t)o->const_oop() + o->_offset) >> shift );
1254 // }
1255 // else if( t1->base() == Type::KlassPtr ) {
1256 // const TypeKlassPtr *o = t1->is_klassptr();
1257 // if( t1->singleton() )
1258 // return TypeInt::make( ((uint32_t)o->const_oop() + o->_offset) >> shift );
1259 // }
1260
1261 return TypeInt::INT;
1262 }
1263
1264 //=============================================================================
1265 //------------------------------Identity---------------------------------------
1266 Node* URShiftLNode::Identity(PhaseGVN* phase) {
1267 return ((getShiftCon(phase, this, -1) & (BitsPerJavaLong - 1)) == 0) ? in(1) : this;
1268 }
1269
1270 //------------------------------Ideal------------------------------------------
1271 Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
1272 int con = maskShiftAmount(phase, this, BitsPerJavaLong);
1273 if (con == 0) {
1274 return NULL;
1275 }
1276
1277 // We'll be wanting the right-shift amount as a mask of that many bits
1278 const jlong mask = jlong(max_julong >> con);
1279
1280 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
1281 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1282 // If Q is "X << z" the rounding is useless. Look for patterns like
1283 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
1284 Node *add = in(1);
1285 const TypeInt *t2 = phase->type(in(2))->isa_int();
1286 if (add->Opcode() == Op_AddL) {
1287 Node *lshl = add->in(1);
1288 if( lshl->Opcode() == Op_LShiftL &&
1289 phase->type(lshl->in(2)) == t2 ) {
1290 Node *y_z = phase->transform( new URShiftLNode(add->in(2),in(2)) );
1291 Node *sum = phase->transform( new AddLNode( lshl->in(1), y_z ) );
1292 return new AndLNode( sum, phase->longcon(mask) );
1293 }
1294 }
1295
1296 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
1297 // This shortens the mask. Also, if we are extracting a high byte and
1298 // storing it to a buffer, the mask will be removed completely.
1299 Node *andi = in(1);
1300 if( andi->Opcode() == Op_AndL ) {
1301 const TypeLong *t3 = phase->type( andi->in(2) )->isa_long();
1302 if( t3 && t3->is_con() ) { // Right input is a constant
1303 jlong mask2 = t3->get_con();
1304 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
1305 Node *newshr = phase->transform( new URShiftLNode(andi->in(1), in(2)) );
1306 return new AndLNode(newshr, phase->longcon(mask2));
1307 }
1308 }
1309
1310 // Check for "(X << z ) >>> z" which simply zero-extends
1311 Node *shl = in(1);
1312 if( shl->Opcode() == Op_LShiftL &&
1313 phase->type(shl->in(2)) == t2 )
1314 return new AndLNode( shl->in(1), phase->longcon(mask) );
1315
1316 return NULL;
1317 }
1318
1319 //------------------------------Value------------------------------------------
1320 // A URShiftINode shifts its input2 right by input1 amount.
1321 const Type* URShiftLNode::Value(PhaseGVN* phase) const {
1322 // (This is a near clone of RShiftLNode::Value.)
1323 const Type *t1 = phase->type( in(1) );
1324 const Type *t2 = phase->type( in(2) );
1325 // Either input is TOP ==> the result is TOP
1326 if( t1 == Type::TOP ) return Type::TOP;
1327 if( t2 == Type::TOP ) return Type::TOP;
1328
1329 // Left input is ZERO ==> the result is ZERO.
1330 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1331 // Shift by zero does nothing
1332 if( t2 == TypeInt::ZERO ) return t1;
1333
1334 // Either input is BOTTOM ==> the result is BOTTOM
1335 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1336 return TypeLong::LONG;
1337
1338 if (t2 == TypeInt::INT)
1339 return TypeLong::LONG;
1340
1341 const TypeLong *r1 = t1->is_long(); // Handy access
1342 const TypeInt *r2 = t2->is_int (); // Handy access
1343
1344 if (r2->is_con()) {
1345 uint shift = r2->get_con();
1346 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
1347 // Shift by a multiple of 64 does nothing:
1348 if (shift == 0) return t1;
1349 // Calculate reasonably aggressive bounds for the result.
1350 jlong lo = (julong)r1->_lo >> (juint)shift;
1351 jlong hi = (julong)r1->_hi >> (juint)shift;
1352 if (r1->_hi >= 0 && r1->_lo < 0) {
1353 // If the type has both negative and positive values,
1354 // there are two separate sub-domains to worry about:
1355 // The positive half and the negative half.
1356 jlong neg_lo = lo;
1357 jlong neg_hi = (julong)-1 >> (juint)shift;
1358 jlong pos_lo = (julong) 0 >> (juint)shift;
1359 jlong pos_hi = hi;
1360 //lo = MIN2(neg_lo, pos_lo); // == 0
1361 lo = neg_lo < pos_lo ? neg_lo : pos_lo;
1362 //hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
1363 hi = neg_hi > pos_hi ? neg_hi : pos_hi;
1364 }
1365 assert(lo <= hi, "must have valid bounds");
1366 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1367 #ifdef ASSERT
1368 // Make sure we get the sign-capture idiom correct.
1369 if (shift == BitsPerJavaLong - 1) {
1370 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>>63 of + is 0");
1371 if (r1->_hi < 0) assert(tl == TypeLong::ONE, ">>>63 of - is +1");
1372 }
1373 #endif
1374 return tl;
1375 }
1376
1377 return TypeLong::LONG; // Give up
1378 }
1379
1380 //=============================================================================
1381 //------------------------------Value------------------------------------------
1382 const Type* FmaDNode::Value(PhaseGVN* phase) const {
1383 const Type *t1 = phase->type(in(1));
1384 if (t1 == Type::TOP) return Type::TOP;
1385 if (t1->base() != Type::DoubleCon) return Type::DOUBLE;
1386 const Type *t2 = phase->type(in(2));
1387 if (t2 == Type::TOP) return Type::TOP;
1388 if (t2->base() != Type::DoubleCon) return Type::DOUBLE;
1389 const Type *t3 = phase->type(in(3));
1390 if (t3 == Type::TOP) return Type::TOP;
1391 if (t3->base() != Type::DoubleCon) return Type::DOUBLE;
1392 #ifndef __STDC_IEC_559__
1393 return Type::DOUBLE;
1394 #else
1395 double d1 = t1->getd();
1396 double d2 = t2->getd();
1397 double d3 = t3->getd();
1398 return TypeD::make(fma(d1, d2, d3));
1399 #endif
1400 }
1401
1402 //=============================================================================
1403 //------------------------------Value------------------------------------------
1404 const Type* FmaFNode::Value(PhaseGVN* phase) const {
1405 const Type *t1 = phase->type(in(1));
1406 if (t1 == Type::TOP) return Type::TOP;
1407 if (t1->base() != Type::FloatCon) return Type::FLOAT;
1408 const Type *t2 = phase->type(in(2));
1409 if (t2 == Type::TOP) return Type::TOP;
1410 if (t2->base() != Type::FloatCon) return Type::FLOAT;
1411 const Type *t3 = phase->type(in(3));
1412 if (t3 == Type::TOP) return Type::TOP;
1413 if (t3->base() != Type::FloatCon) return Type::FLOAT;
1414 #ifndef __STDC_IEC_559__
1415 return Type::FLOAT;
1416 #else
1417 float f1 = t1->getf();
1418 float f2 = t2->getf();
1419 float f3 = t3->getf();
1420 return TypeF::make(fma(f1, f2, f3));
1421 #endif
1422 }
1423
1424 //=============================================================================
1425 //------------------------------hash-------------------------------------------
1426 // Hash function for MulAddS2INode. Operation is commutative with commutative pairs.
1427 // The hash function must return the same value when edge swapping is performed.
1428 uint MulAddS2INode::hash() const {
1429 return (uintptr_t)in(1) + (uintptr_t)in(2) + (uintptr_t)in(3) + (uintptr_t)in(4) + Opcode();
1430 }
1431