1 /* 2 * Copyright (c) 1998, 2018, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "asm/macroAssembler.inline.hpp" 27 #include "memory/allocation.inline.hpp" 28 #include "oops/compressedOops.hpp" 29 #include "opto/ad.hpp" 30 #include "opto/block.hpp" 31 #include "opto/c2compiler.hpp" 32 #include "opto/callnode.hpp" 33 #include "opto/cfgnode.hpp" 34 #include "opto/machnode.hpp" 35 #include "opto/runtime.hpp" 36 #include "opto/chaitin.hpp" 37 #include "runtime/sharedRuntime.hpp" 38 39 // Optimization - Graph Style 40 41 // Check whether val is not-null-decoded compressed oop, 42 // i.e. will grab into the base of the heap if it represents NULL. 43 static bool accesses_heap_base_zone(Node *val) { 44 if (CompressedOops::base() != NULL) { // Implies UseCompressedOops. 45 if (val && val->is_Mach()) { 46 if (val->as_Mach()->ideal_Opcode() == Op_DecodeN) { 47 // This assumes all Decodes with TypePtr::NotNull are matched to nodes that 48 // decode NULL to point to the heap base (Decode_NN). 49 if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) { 50 return true; 51 } 52 } 53 // Must recognize load operation with Decode matched in memory operand. 54 // We should not reach here exept for PPC/AIX, as os::zero_page_read_protected() 55 // returns true everywhere else. On PPC, no such memory operands 56 // exist, therefore we did not yet implement a check for such operands. 57 NOT_AIX(Unimplemented()); 58 } 59 } 60 return false; 61 } 62 63 static bool needs_explicit_null_check_for_read(Node *val) { 64 // On some OSes (AIX) the page at address 0 is only write protected. 65 // If so, only Store operations will trap. 66 if (os::zero_page_read_protected()) { 67 return false; // Implicit null check will work. 68 } 69 // Also a read accessing the base of a heap-based compressed heap will trap. 70 if (accesses_heap_base_zone(val) && // Hits the base zone page. 71 CompressedOops::use_implicit_null_checks()) { // Base zone page is protected. 72 return false; 73 } 74 75 return true; 76 } 77 78 //------------------------------implicit_null_check---------------------------- 79 // Detect implicit-null-check opportunities. Basically, find NULL checks 80 // with suitable memory ops nearby. Use the memory op to do the NULL check. 81 // I can generate a memory op if there is not one nearby. 82 // The proj is the control projection for the not-null case. 83 // The val is the pointer being checked for nullness or 84 // decodeHeapOop_not_null node if it did not fold into address. 85 void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allowed_reasons) { 86 // Assume if null check need for 0 offset then always needed 87 // Intel solaris doesn't support any null checks yet and no 88 // mechanism exists (yet) to set the switches at an os_cpu level 89 if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return; 90 91 // Make sure the ptr-is-null path appears to be uncommon! 92 float f = block->end()->as_MachIf()->_prob; 93 if( proj->Opcode() == Op_IfTrue ) f = 1.0f - f; 94 if( f > PROB_UNLIKELY_MAG(4) ) return; 95 96 uint bidx = 0; // Capture index of value into memop 97 bool was_store; // Memory op is a store op 98 99 // Get the successor block for if the test ptr is non-null 100 Block* not_null_block; // this one goes with the proj 101 Block* null_block; 102 if (block->get_node(block->number_of_nodes()-1) == proj) { 103 null_block = block->_succs[0]; 104 not_null_block = block->_succs[1]; 105 } else { 106 assert(block->get_node(block->number_of_nodes()-2) == proj, "proj is one or the other"); 107 not_null_block = block->_succs[0]; 108 null_block = block->_succs[1]; 109 } 110 while (null_block->is_Empty() == Block::empty_with_goto) { 111 null_block = null_block->_succs[0]; 112 } 113 114 // Search the exception block for an uncommon trap. 115 // (See Parse::do_if and Parse::do_ifnull for the reason 116 // we need an uncommon trap. Briefly, we need a way to 117 // detect failure of this optimization, as in 6366351.) 118 { 119 bool found_trap = false; 120 for (uint i1 = 0; i1 < null_block->number_of_nodes(); i1++) { 121 Node* nn = null_block->get_node(i1); 122 if (nn->is_MachCall() && 123 nn->as_MachCall()->entry_point() == SharedRuntime::uncommon_trap_blob()->entry_point()) { 124 const Type* trtype = nn->in(TypeFunc::Parms)->bottom_type(); 125 if (trtype->isa_int() && trtype->is_int()->is_con()) { 126 jint tr_con = trtype->is_int()->get_con(); 127 Deoptimization::DeoptReason reason = Deoptimization::trap_request_reason(tr_con); 128 Deoptimization::DeoptAction action = Deoptimization::trap_request_action(tr_con); 129 assert((int)reason < (int)BitsPerInt, "recode bit map"); 130 if (is_set_nth_bit(allowed_reasons, (int) reason) 131 && action != Deoptimization::Action_none) { 132 // This uncommon trap is sure to recompile, eventually. 133 // When that happens, C->too_many_traps will prevent 134 // this transformation from happening again. 135 found_trap = true; 136 } 137 } 138 break; 139 } 140 } 141 if (!found_trap) { 142 // We did not find an uncommon trap. 143 return; 144 } 145 } 146 147 // Check for decodeHeapOop_not_null node which did not fold into address 148 bool is_decoden = ((intptr_t)val) & 1; 149 val = (Node*)(((intptr_t)val) & ~1); 150 151 assert(!is_decoden || (val->in(0) == NULL) && val->is_Mach() && 152 (val->as_Mach()->ideal_Opcode() == Op_DecodeN), "sanity"); 153 154 // Search the successor block for a load or store who's base value is also 155 // the tested value. There may be several. 156 Node_List *out = new Node_List(Thread::current()->resource_area()); 157 MachNode *best = NULL; // Best found so far 158 for (DUIterator i = val->outs(); val->has_out(i); i++) { 159 Node *m = val->out(i); 160 if( !m->is_Mach() ) continue; 161 MachNode *mach = m->as_Mach(); 162 was_store = false; 163 int iop = mach->ideal_Opcode(); 164 switch( iop ) { 165 case Op_LoadB: 166 case Op_LoadUB: 167 case Op_LoadUS: 168 case Op_LoadD: 169 case Op_LoadF: 170 case Op_LoadI: 171 case Op_LoadL: 172 case Op_LoadP: 173 case Op_LoadN: 174 case Op_LoadS: 175 case Op_LoadKlass: 176 case Op_LoadNKlass: 177 case Op_LoadRange: 178 case Op_LoadD_unaligned: 179 case Op_LoadL_unaligned: 180 assert(mach->in(2) == val, "should be address"); 181 break; 182 case Op_StoreB: 183 case Op_StoreC: 184 case Op_StoreCM: 185 case Op_StoreD: 186 case Op_StoreF: 187 case Op_StoreI: 188 case Op_StoreL: 189 case Op_StoreP: 190 case Op_StoreN: 191 case Op_StoreNKlass: 192 was_store = true; // Memory op is a store op 193 // Stores will have their address in slot 2 (memory in slot 1). 194 // If the value being nul-checked is in another slot, it means we 195 // are storing the checked value, which does NOT check the value! 196 if( mach->in(2) != val ) continue; 197 break; // Found a memory op? 198 case Op_StrComp: 199 case Op_StrEquals: 200 case Op_StrIndexOf: 201 case Op_StrIndexOfChar: 202 case Op_AryEq: 203 case Op_StrInflatedCopy: 204 case Op_StrCompressedCopy: 205 case Op_EncodeISOArray: 206 case Op_HasNegatives: 207 // Not a legit memory op for implicit null check regardless of 208 // embedded loads 209 continue; 210 default: // Also check for embedded loads 211 if( !mach->needs_anti_dependence_check() ) 212 continue; // Not an memory op; skip it 213 if( must_clone[iop] ) { 214 // Do not move nodes which produce flags because 215 // RA will try to clone it to place near branch and 216 // it will cause recompilation, see clone_node(). 217 continue; 218 } 219 { 220 // Check that value is used in memory address in 221 // instructions with embedded load (CmpP val1,(val2+off)). 222 Node* base; 223 Node* index; 224 const MachOper* oper = mach->memory_inputs(base, index); 225 if (oper == NULL || oper == (MachOper*)-1) { 226 continue; // Not an memory op; skip it 227 } 228 if (val == base || 229 (val == index && val->bottom_type()->isa_narrowoop())) { 230 break; // Found it 231 } else { 232 continue; // Skip it 233 } 234 } 235 break; 236 } 237 238 // On some OSes (AIX) the page at address 0 is only write protected. 239 // If so, only Store operations will trap. 240 // But a read accessing the base of a heap-based compressed heap will trap. 241 if (!was_store && needs_explicit_null_check_for_read(val)) { 242 continue; 243 } 244 245 // Check that node's control edge is not-null block's head or dominates it, 246 // otherwise we can't hoist it because there are other control dependencies. 247 Node* ctrl = mach->in(0); 248 if (ctrl != NULL && !(ctrl == not_null_block->head() || 249 get_block_for_node(ctrl)->dominates(not_null_block))) { 250 continue; 251 } 252 253 // check if the offset is not too high for implicit exception 254 { 255 intptr_t offset = 0; 256 const TypePtr *adr_type = NULL; // Do not need this return value here 257 const Node* base = mach->get_base_and_disp(offset, adr_type); 258 if (base == NULL || base == NodeSentinel) { 259 // Narrow oop address doesn't have base, only index. 260 // Give up if offset is beyond page size or if heap base is not protected. 261 if (val->bottom_type()->isa_narrowoop() && 262 (MacroAssembler::needs_explicit_null_check(offset) || 263 !CompressedOops::use_implicit_null_checks())) 264 continue; 265 // cannot reason about it; is probably not implicit null exception 266 } else { 267 const TypePtr* tptr; 268 if (UseCompressedOops && (CompressedOops::shift() == 0 || 269 CompressedKlassPointers::shift() == 0)) { 270 // 32-bits narrow oop can be the base of address expressions 271 tptr = base->get_ptr_type(); 272 } else { 273 // only regular oops are expected here 274 tptr = base->bottom_type()->is_ptr(); 275 } 276 // Give up if offset is not a compile-time constant. 277 if (offset == Type::OffsetBot || tptr->offset() == Type::OffsetBot) 278 continue; 279 offset += tptr->offset(); // correct if base is offseted 280 // Give up if reference is beyond page size. 281 if (MacroAssembler::needs_explicit_null_check(offset)) 282 continue; 283 // Give up if base is a decode node and the heap base is not protected. 284 if (base->is_Mach() && base->as_Mach()->ideal_Opcode() == Op_DecodeN && 285 !CompressedOops::use_implicit_null_checks()) 286 continue; 287 } 288 } 289 290 // Check ctrl input to see if the null-check dominates the memory op 291 Block *cb = get_block_for_node(mach); 292 cb = cb->_idom; // Always hoist at least 1 block 293 if( !was_store ) { // Stores can be hoisted only one block 294 while( cb->_dom_depth > (block->_dom_depth + 1)) 295 cb = cb->_idom; // Hoist loads as far as we want 296 // The non-null-block should dominate the memory op, too. Live 297 // range spilling will insert a spill in the non-null-block if it is 298 // needs to spill the memory op for an implicit null check. 299 if (cb->_dom_depth == (block->_dom_depth + 1)) { 300 if (cb != not_null_block) continue; 301 cb = cb->_idom; 302 } 303 } 304 if( cb != block ) continue; 305 306 // Found a memory user; see if it can be hoisted to check-block 307 uint vidx = 0; // Capture index of value into memop 308 uint j; 309 for( j = mach->req()-1; j > 0; j-- ) { 310 if( mach->in(j) == val ) { 311 vidx = j; 312 // Ignore DecodeN val which could be hoisted to where needed. 313 if( is_decoden ) continue; 314 } 315 // Block of memory-op input 316 Block* inb = get_block_for_node(mach->in(j)); 317 if (mach->in(j)->is_Con() && inb == get_block_for_node(mach)) { 318 // Ignore constant loads scheduled in the same block (we can simply hoist them as well) 319 continue; 320 } 321 Block *b = block; // Start from nul check 322 while( b != inb && b->_dom_depth > inb->_dom_depth ) 323 b = b->_idom; // search upwards for input 324 // See if input dominates null check 325 if( b != inb ) 326 break; 327 } 328 if( j > 0 ) 329 continue; 330 Block *mb = get_block_for_node(mach); 331 // Hoisting stores requires more checks for the anti-dependence case. 332 // Give up hoisting if we have to move the store past any load. 333 if( was_store ) { 334 Block *b = mb; // Start searching here for a local load 335 // mach use (faulting) trying to hoist 336 // n might be blocker to hoisting 337 while( b != block ) { 338 uint k; 339 for( k = 1; k < b->number_of_nodes(); k++ ) { 340 Node *n = b->get_node(k); 341 if( n->needs_anti_dependence_check() && 342 n->in(LoadNode::Memory) == mach->in(StoreNode::Memory) ) 343 break; // Found anti-dependent load 344 } 345 if( k < b->number_of_nodes() ) 346 break; // Found anti-dependent load 347 // Make sure control does not do a merge (would have to check allpaths) 348 if( b->num_preds() != 2 ) break; 349 b = get_block_for_node(b->pred(1)); // Move up to predecessor block 350 } 351 if( b != block ) continue; 352 } 353 354 // Make sure this memory op is not already being used for a NullCheck 355 Node *e = mb->end(); 356 if( e->is_MachNullCheck() && e->in(1) == mach ) 357 continue; // Already being used as a NULL check 358 359 // Found a candidate! Pick one with least dom depth - the highest 360 // in the dom tree should be closest to the null check. 361 if (best == NULL || get_block_for_node(mach)->_dom_depth < get_block_for_node(best)->_dom_depth) { 362 best = mach; 363 bidx = vidx; 364 } 365 } 366 // No candidate! 367 if (best == NULL) { 368 return; 369 } 370 371 // ---- Found an implicit null check 372 #ifndef PRODUCT 373 extern int implicit_null_checks; 374 implicit_null_checks++; 375 #endif 376 377 if( is_decoden ) { 378 // Check if we need to hoist decodeHeapOop_not_null first. 379 Block *valb = get_block_for_node(val); 380 if( block != valb && block->_dom_depth < valb->_dom_depth ) { 381 // Hoist it up to the end of the test block. 382 valb->find_remove(val); 383 block->add_inst(val); 384 map_node_to_block(val, block); 385 // DecodeN on x86 may kill flags. Check for flag-killing projections 386 // that also need to be hoisted. 387 for (DUIterator_Fast jmax, j = val->fast_outs(jmax); j < jmax; j++) { 388 Node* n = val->fast_out(j); 389 if( n->is_MachProj() ) { 390 get_block_for_node(n)->find_remove(n); 391 block->add_inst(n); 392 map_node_to_block(n, block); 393 } 394 } 395 } 396 } else { 397 // Hoist constant load inputs as well. 398 for (uint i = 1; i < best->req(); ++i) { 399 Node* n = best->in(i); 400 if (n->is_Con() && get_block_for_node(n) == get_block_for_node(best)) { 401 get_block_for_node(n)->find_remove(n); 402 block->add_inst(n); 403 map_node_to_block(n, block); 404 // Constant loads may kill flags (for example, when XORing a register). 405 // Check for flag-killing projections that also need to be hoisted. 406 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) { 407 Node* proj = n->fast_out(j); 408 if (proj->is_MachProj()) { 409 get_block_for_node(proj)->find_remove(proj); 410 block->add_inst(proj); 411 map_node_to_block(proj, block); 412 } 413 } 414 } 415 } 416 } 417 418 // Hoist the memory candidate up to the end of the test block. 419 Block *old_block = get_block_for_node(best); 420 old_block->find_remove(best); 421 block->add_inst(best); 422 map_node_to_block(best, block); 423 424 // Move the control dependence if it is pinned to not-null block. 425 // Don't change it in other cases: NULL or dominating control. 426 if (best->in(0) == not_null_block->head()) { 427 // Set it to control edge of null check. 428 best->set_req(0, proj->in(0)->in(0)); 429 } 430 431 // Check for flag-killing projections that also need to be hoisted 432 // Should be DU safe because no edge updates. 433 for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) { 434 Node* n = best->fast_out(j); 435 if( n->is_MachProj() ) { 436 get_block_for_node(n)->find_remove(n); 437 block->add_inst(n); 438 map_node_to_block(n, block); 439 } 440 } 441 442 // proj==Op_True --> ne test; proj==Op_False --> eq test. 443 // One of two graph shapes got matched: 444 // (IfTrue (If (Bool NE (CmpP ptr NULL)))) 445 // (IfFalse (If (Bool EQ (CmpP ptr NULL)))) 446 // NULL checks are always branch-if-eq. If we see a IfTrue projection 447 // then we are replacing a 'ne' test with a 'eq' NULL check test. 448 // We need to flip the projections to keep the same semantics. 449 if( proj->Opcode() == Op_IfTrue ) { 450 // Swap order of projections in basic block to swap branch targets 451 Node *tmp1 = block->get_node(block->end_idx()+1); 452 Node *tmp2 = block->get_node(block->end_idx()+2); 453 block->map_node(tmp2, block->end_idx()+1); 454 block->map_node(tmp1, block->end_idx()+2); 455 Node *tmp = new Node(C->top()); // Use not NULL input 456 tmp1->replace_by(tmp); 457 tmp2->replace_by(tmp1); 458 tmp->replace_by(tmp2); 459 tmp->destruct(); 460 } 461 462 // Remove the existing null check; use a new implicit null check instead. 463 // Since schedule-local needs precise def-use info, we need to correct 464 // it as well. 465 Node *old_tst = proj->in(0); 466 MachNode *nul_chk = new MachNullCheckNode(old_tst->in(0),best,bidx); 467 block->map_node(nul_chk, block->end_idx()); 468 map_node_to_block(nul_chk, block); 469 // Redirect users of old_test to nul_chk 470 for (DUIterator_Last i2min, i2 = old_tst->last_outs(i2min); i2 >= i2min; --i2) 471 old_tst->last_out(i2)->set_req(0, nul_chk); 472 // Clean-up any dead code 473 for (uint i3 = 0; i3 < old_tst->req(); i3++) { 474 Node* in = old_tst->in(i3); 475 old_tst->set_req(i3, NULL); 476 if (in->outcnt() == 0) { 477 // Remove dead input node 478 in->disconnect_inputs(NULL, C); 479 block->find_remove(in); 480 } 481 } 482 483 latency_from_uses(nul_chk); 484 latency_from_uses(best); 485 486 // insert anti-dependences to defs in this block 487 if (! best->needs_anti_dependence_check()) { 488 for (uint k = 1; k < block->number_of_nodes(); k++) { 489 Node *n = block->get_node(k); 490 if (n->needs_anti_dependence_check() && 491 n->in(LoadNode::Memory) == best->in(StoreNode::Memory)) { 492 // Found anti-dependent load 493 insert_anti_dependences(block, n); 494 } 495 } 496 } 497 } 498 499 500 //------------------------------select----------------------------------------- 501 // Select a nice fellow from the worklist to schedule next. If there is only 502 // one choice, then use it. Projections take top priority for correctness 503 // reasons - if I see a projection, then it is next. There are a number of 504 // other special cases, for instructions that consume condition codes, et al. 505 // These are chosen immediately. Some instructions are required to immediately 506 // precede the last instruction in the block, and these are taken last. Of the 507 // remaining cases (most), choose the instruction with the greatest latency 508 // (that is, the most number of pseudo-cycles required to the end of the 509 // routine). If there is a tie, choose the instruction with the most inputs. 510 Node* PhaseCFG::select( 511 Block* block, 512 Node_List &worklist, 513 GrowableArray<int> &ready_cnt, 514 VectorSet &next_call, 515 uint sched_slot, 516 intptr_t* recalc_pressure_nodes) { 517 518 // If only a single entry on the stack, use it 519 uint cnt = worklist.size(); 520 if (cnt == 1) { 521 Node *n = worklist[0]; 522 worklist.map(0,worklist.pop()); 523 return n; 524 } 525 526 uint choice = 0; // Bigger is most important 527 uint latency = 0; // Bigger is scheduled first 528 uint score = 0; // Bigger is better 529 int idx = -1; // Index in worklist 530 int cand_cnt = 0; // Candidate count 531 bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false; 532 533 for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist 534 // Order in worklist is used to break ties. 535 // See caller for how this is used to delay scheduling 536 // of induction variable increments to after the other 537 // uses of the phi are scheduled. 538 Node *n = worklist[i]; // Get Node on worklist 539 540 int iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : 0; 541 if( n->is_Proj() || // Projections always win 542 n->Opcode()== Op_Con || // So does constant 'Top' 543 iop == Op_CreateEx || // Create-exception must start block 544 iop == Op_CheckCastPP 545 ) { 546 worklist.map(i,worklist.pop()); 547 return n; 548 } 549 550 // Final call in a block must be adjacent to 'catch' 551 Node *e = block->end(); 552 if( e->is_Catch() && e->in(0)->in(0) == n ) 553 continue; 554 555 // Memory op for an implicit null check has to be at the end of the block 556 if( e->is_MachNullCheck() && e->in(1) == n ) 557 continue; 558 559 // Schedule IV increment last. 560 if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Op_CountedLoopEnd) { 561 // Cmp might be matched into CountedLoopEnd node. 562 Node *cmp = (e->in(1)->ideal_reg() == Op_RegFlags) ? e->in(1) : e; 563 if (cmp->req() > 1 && cmp->in(1) == n && n->is_iteratively_computed()) { 564 continue; 565 } 566 } 567 568 uint n_choice = 2; 569 570 // See if this instruction is consumed by a branch. If so, then (as the 571 // branch is the last instruction in the basic block) force it to the 572 // end of the basic block 573 if ( must_clone[iop] ) { 574 // See if any use is a branch 575 bool found_machif = false; 576 577 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) { 578 Node* use = n->fast_out(j); 579 580 // The use is a conditional branch, make them adjacent 581 if (use->is_MachIf() && get_block_for_node(use) == block) { 582 found_machif = true; 583 break; 584 } 585 586 // More than this instruction pending for successor to be ready, 587 // don't choose this if other opportunities are ready 588 if (ready_cnt.at(use->_idx) > 1) 589 n_choice = 1; 590 } 591 592 // loop terminated, prefer not to use this instruction 593 if (found_machif) 594 continue; 595 } 596 597 // See if this has a predecessor that is "must_clone", i.e. sets the 598 // condition code. If so, choose this first 599 for (uint j = 0; j < n->req() ; j++) { 600 Node *inn = n->in(j); 601 if (inn) { 602 if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) { 603 n_choice = 3; 604 break; 605 } 606 } 607 } 608 609 // MachTemps should be scheduled last so they are near their uses 610 if (n->is_MachTemp()) { 611 n_choice = 1; 612 } 613 614 uint n_latency = get_latency_for_node(n); 615 uint n_score = n->req(); // Many inputs get high score to break ties 616 617 if (OptoRegScheduling && block_size_threshold_ok) { 618 if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) { 619 _regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit()); 620 _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit()); 621 // simulate the notion that we just picked this node to schedule 622 n->add_flag(Node::Flag_is_scheduled); 623 // now caculate its effect upon the graph if we did 624 adjust_register_pressure(n, block, recalc_pressure_nodes, false); 625 // return its state for finalize in case somebody else wins 626 n->remove_flag(Node::Flag_is_scheduled); 627 // now save the two final pressure components of register pressure, limiting pressure calcs to short size 628 short int_pressure = (short)_regalloc->_scratch_int_pressure.current_pressure(); 629 short float_pressure = (short)_regalloc->_scratch_float_pressure.current_pressure(); 630 recalc_pressure_nodes[n->_idx] = int_pressure; 631 recalc_pressure_nodes[n->_idx] |= (float_pressure << 16); 632 } 633 634 if (_scheduling_for_pressure) { 635 latency = n_latency; 636 if (n_choice != 3) { 637 // Now evaluate each register pressure component based on threshold in the score. 638 // In general the defining register type will dominate the score, ergo we will not see register pressure grow on both banks 639 // on a single instruction, but we might see it shrink on both banks. 640 // For each use of register that has a register class that is over the high pressure limit, we build n_score up for 641 // live ranges that terminate on this instruction. 642 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) { 643 short int_pressure = (short)recalc_pressure_nodes[n->_idx]; 644 n_score = (int_pressure < 0) ? ((score + n_score) - int_pressure) : (int_pressure > 0) ? 1 : n_score; 645 } 646 if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) { 647 short float_pressure = (short)(recalc_pressure_nodes[n->_idx] >> 16); 648 n_score = (float_pressure < 0) ? ((score + n_score) - float_pressure) : (float_pressure > 0) ? 1 : n_score; 649 } 650 } else { 651 // make sure we choose these candidates 652 score = 0; 653 } 654 } 655 } 656 657 // Keep best latency found 658 cand_cnt++; 659 if (choice < n_choice || 660 (choice == n_choice && 661 ((StressLCM && Compile::randomized_select(cand_cnt)) || 662 (!StressLCM && 663 (latency < n_latency || 664 (latency == n_latency && 665 (score < n_score))))))) { 666 choice = n_choice; 667 latency = n_latency; 668 score = n_score; 669 idx = i; // Also keep index in worklist 670 } 671 } // End of for all ready nodes in worklist 672 673 guarantee(idx >= 0, "index should be set"); 674 Node *n = worklist[(uint)idx]; // Get the winner 675 676 worklist.map((uint)idx, worklist.pop()); // Compress worklist 677 return n; 678 } 679 680 //-------------------------adjust_register_pressure---------------------------- 681 void PhaseCFG::adjust_register_pressure(Node* n, Block* block, intptr_t* recalc_pressure_nodes, bool finalize_mode) { 682 PhaseLive* liveinfo = _regalloc->get_live(); 683 IndexSet* liveout = liveinfo->live(block); 684 // first adjust the register pressure for the sources 685 for (uint i = 1; i < n->req(); i++) { 686 bool lrg_ends = false; 687 Node *src_n = n->in(i); 688 if (src_n == NULL) continue; 689 if (!src_n->is_Mach()) continue; 690 uint src = _regalloc->_lrg_map.find(src_n); 691 if (src == 0) continue; 692 LRG& lrg_src = _regalloc->lrgs(src); 693 // detect if the live range ends or not 694 if (liveout->member(src) == false) { 695 lrg_ends = true; 696 for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) { 697 Node* m = src_n->fast_out(j); // Get user 698 if (m == n) continue; 699 if (!m->is_Mach()) continue; 700 MachNode *mach = m->as_Mach(); 701 bool src_matches = false; 702 int iop = mach->ideal_Opcode(); 703 704 switch (iop) { 705 case Op_StoreB: 706 case Op_StoreC: 707 case Op_StoreCM: 708 case Op_StoreD: 709 case Op_StoreF: 710 case Op_StoreI: 711 case Op_StoreL: 712 case Op_StoreP: 713 case Op_StoreN: 714 case Op_StoreVector: 715 case Op_StoreNKlass: 716 for (uint k = 1; k < m->req(); k++) { 717 Node *in = m->in(k); 718 if (in == src_n) { 719 src_matches = true; 720 break; 721 } 722 } 723 break; 724 725 default: 726 src_matches = true; 727 break; 728 } 729 730 // If we have a store as our use, ignore the non source operands 731 if (src_matches == false) continue; 732 733 // Mark every unscheduled use which is not n with a recalculation 734 if ((get_block_for_node(m) == block) && (!m->is_scheduled())) { 735 if (finalize_mode && !m->is_Phi()) { 736 recalc_pressure_nodes[m->_idx] = 0x7fff7fff; 737 } 738 lrg_ends = false; 739 } 740 } 741 } 742 // if none, this live range ends and we can adjust register pressure 743 if (lrg_ends) { 744 if (finalize_mode) { 745 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure); 746 } else { 747 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure); 748 } 749 } 750 } 751 752 // now add the register pressure from the dest and evaluate which heuristic we should use: 753 // 1.) The default, latency scheduling 754 // 2.) Register pressure scheduling based on the high pressure limit threshold for int or float register stacks 755 uint dst = _regalloc->_lrg_map.find(n); 756 if (dst != 0) { 757 LRG& lrg_dst = _regalloc->lrgs(dst); 758 if (finalize_mode) { 759 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure); 760 // check to see if we fall over the register pressure cliff here 761 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) { 762 _scheduling_for_pressure = true; 763 } else if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) { 764 _scheduling_for_pressure = true; 765 } else { 766 // restore latency scheduling mode 767 _scheduling_for_pressure = false; 768 } 769 } else { 770 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure); 771 } 772 } 773 } 774 775 //------------------------------set_next_call---------------------------------- 776 void PhaseCFG::set_next_call(Block* block, Node* n, VectorSet& next_call) { 777 if( next_call.test_set(n->_idx) ) return; 778 for( uint i=0; i<n->len(); i++ ) { 779 Node *m = n->in(i); 780 if( !m ) continue; // must see all nodes in block that precede call 781 if (get_block_for_node(m) == block) { 782 set_next_call(block, m, next_call); 783 } 784 } 785 } 786 787 //------------------------------needed_for_next_call--------------------------- 788 // Set the flag 'next_call' for each Node that is needed for the next call to 789 // be scheduled. This flag lets me bias scheduling so Nodes needed for the 790 // next subroutine call get priority - basically it moves things NOT needed 791 // for the next call till after the call. This prevents me from trying to 792 // carry lots of stuff live across a call. 793 void PhaseCFG::needed_for_next_call(Block* block, Node* this_call, VectorSet& next_call) { 794 // Find the next control-defining Node in this block 795 Node* call = NULL; 796 for (DUIterator_Fast imax, i = this_call->fast_outs(imax); i < imax; i++) { 797 Node* m = this_call->fast_out(i); 798 if (get_block_for_node(m) == block && // Local-block user 799 m != this_call && // Not self-start node 800 m->is_MachCall()) { 801 call = m; 802 break; 803 } 804 } 805 if (call == NULL) return; // No next call (e.g., block end is near) 806 // Set next-call for all inputs to this call 807 set_next_call(block, call, next_call); 808 } 809 810 //------------------------------add_call_kills------------------------------------- 811 // helper function that adds caller save registers to MachProjNode 812 static void add_call_kills(MachProjNode *proj, RegMask& regs, const char* save_policy, bool exclude_soe) { 813 // Fill in the kill mask for the call 814 for( OptoReg::Name r = OptoReg::Name(0); r < _last_Mach_Reg; r=OptoReg::add(r,1) ) { 815 if( !regs.Member(r) ) { // Not already defined by the call 816 // Save-on-call register? 817 if ((save_policy[r] == 'C') || 818 (save_policy[r] == 'A') || 819 ((save_policy[r] == 'E') && exclude_soe)) { 820 proj->_rout.Insert(r); 821 } 822 } 823 } 824 } 825 826 827 //------------------------------sched_call------------------------------------- 828 uint PhaseCFG::sched_call(Block* block, uint node_cnt, Node_List& worklist, GrowableArray<int>& ready_cnt, MachCallNode* mcall, VectorSet& next_call) { 829 RegMask regs; 830 831 // Schedule all the users of the call right now. All the users are 832 // projection Nodes, so they must be scheduled next to the call. 833 // Collect all the defined registers. 834 for (DUIterator_Fast imax, i = mcall->fast_outs(imax); i < imax; i++) { 835 Node* n = mcall->fast_out(i); 836 assert( n->is_MachProj(), "" ); 837 int n_cnt = ready_cnt.at(n->_idx)-1; 838 ready_cnt.at_put(n->_idx, n_cnt); 839 assert( n_cnt == 0, "" ); 840 // Schedule next to call 841 block->map_node(n, node_cnt++); 842 // Collect defined registers 843 regs.OR(n->out_RegMask()); 844 // Check for scheduling the next control-definer 845 if( n->bottom_type() == Type::CONTROL ) 846 // Warm up next pile of heuristic bits 847 needed_for_next_call(block, n, next_call); 848 849 // Children of projections are now all ready 850 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) { 851 Node* m = n->fast_out(j); // Get user 852 if(get_block_for_node(m) != block) { 853 continue; 854 } 855 if( m->is_Phi() ) continue; 856 int m_cnt = ready_cnt.at(m->_idx) - 1; 857 ready_cnt.at_put(m->_idx, m_cnt); 858 if( m_cnt == 0 ) 859 worklist.push(m); 860 } 861 862 } 863 864 // Act as if the call defines the Frame Pointer. 865 // Certainly the FP is alive and well after the call. 866 regs.Insert(_matcher.c_frame_pointer()); 867 868 // Set all registers killed and not already defined by the call. 869 uint r_cnt = mcall->tf()->range_cc()->cnt(); 870 int op = mcall->ideal_Opcode(); 871 MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj ); 872 map_node_to_block(proj, block); 873 block->insert_node(proj, node_cnt++); 874 875 // Select the right register save policy. 876 const char *save_policy = NULL; 877 switch (op) { 878 case Op_CallRuntime: 879 case Op_CallLeaf: 880 case Op_CallLeafNoFP: 881 // Calling C code so use C calling convention 882 save_policy = _matcher._c_reg_save_policy; 883 break; 884 885 case Op_CallStaticJava: 886 case Op_CallDynamicJava: 887 // Calling Java code so use Java calling convention 888 save_policy = _matcher._register_save_policy; 889 break; 890 891 default: 892 ShouldNotReachHere(); 893 } 894 895 // When using CallRuntime mark SOE registers as killed by the call 896 // so values that could show up in the RegisterMap aren't live in a 897 // callee saved register since the register wouldn't know where to 898 // find them. CallLeaf and CallLeafNoFP are ok because they can't 899 // have debug info on them. Strictly speaking this only needs to be 900 // done for oops since idealreg2debugmask takes care of debug info 901 // references but there no way to handle oops differently than other 902 // pointers as far as the kill mask goes. 903 bool exclude_soe = op == Op_CallRuntime; 904 905 // If the call is a MethodHandle invoke, we need to exclude the 906 // register which is used to save the SP value over MH invokes from 907 // the mask. Otherwise this register could be used for 908 // deoptimization information. 909 if (op == Op_CallStaticJava) { 910 MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall; 911 if (mcallstaticjava->_method_handle_invoke) 912 proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask()); 913 } 914 915 add_call_kills(proj, regs, save_policy, exclude_soe); 916 917 return node_cnt; 918 } 919 920 921 //------------------------------schedule_local--------------------------------- 922 // Topological sort within a block. Someday become a real scheduler. 923 bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) { 924 // Already "sorted" are the block start Node (as the first entry), and 925 // the block-ending Node and any trailing control projections. We leave 926 // these alone. PhiNodes and ParmNodes are made to follow the block start 927 // Node. Everything else gets topo-sorted. 928 929 #ifndef PRODUCT 930 if (trace_opto_pipelining()) { 931 tty->print_cr("# --- schedule_local B%d, before: ---", block->_pre_order); 932 for (uint i = 0;i < block->number_of_nodes(); i++) { 933 tty->print("# "); 934 block->get_node(i)->fast_dump(); 935 } 936 tty->print_cr("#"); 937 } 938 #endif 939 940 // RootNode is already sorted 941 if (block->number_of_nodes() == 1) { 942 return true; 943 } 944 945 bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false; 946 947 // We track the uses of local definitions as input dependences so that 948 // we know when a given instruction is avialable to be scheduled. 949 uint i; 950 if (OptoRegScheduling && block_size_threshold_ok) { 951 for (i = 1; i < block->number_of_nodes(); i++) { // setup nodes for pressure calc 952 Node *n = block->get_node(i); 953 n->remove_flag(Node::Flag_is_scheduled); 954 if (!n->is_Phi()) { 955 recalc_pressure_nodes[n->_idx] = 0x7fff7fff; 956 } 957 } 958 } 959 960 // Move PhiNodes and ParmNodes from 1 to cnt up to the start 961 uint node_cnt = block->end_idx(); 962 uint phi_cnt = 1; 963 for( i = 1; i<node_cnt; i++ ) { // Scan for Phi 964 Node *n = block->get_node(i); 965 if( n->is_Phi() || // Found a PhiNode or ParmNode 966 (n->is_Proj() && n->in(0) == block->head()) ) { 967 // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt 968 block->map_node(block->get_node(phi_cnt), i); 969 block->map_node(n, phi_cnt++); // swap Phi/Parm up front 970 if (OptoRegScheduling && block_size_threshold_ok) { 971 // mark n as scheduled 972 n->add_flag(Node::Flag_is_scheduled); 973 } 974 } else { // All others 975 // Count block-local inputs to 'n' 976 uint cnt = n->len(); // Input count 977 uint local = 0; 978 for( uint j=0; j<cnt; j++ ) { 979 Node *m = n->in(j); 980 if( m && get_block_for_node(m) == block && !m->is_top() ) 981 local++; // One more block-local input 982 } 983 ready_cnt.at_put(n->_idx, local); // Count em up 984 985 #ifdef ASSERT 986 if( UseConcMarkSweepGC || UseG1GC ) { 987 if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_StoreCM ) { 988 // Check the precedence edges 989 for (uint prec = n->req(); prec < n->len(); prec++) { 990 Node* oop_store = n->in(prec); 991 if (oop_store != NULL) { 992 assert(get_block_for_node(oop_store)->_dom_depth <= block->_dom_depth, "oop_store must dominate card-mark"); 993 } 994 } 995 } 996 } 997 #endif 998 999 // A few node types require changing a required edge to a precedence edge 1000 // before allocation. 1001 if( n->is_Mach() && n->req() > TypeFunc::Parms && 1002 (n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire || 1003 n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) { 1004 // MemBarAcquire could be created without Precedent edge. 1005 // del_req() replaces the specified edge with the last input edge 1006 // and then removes the last edge. If the specified edge > number of 1007 // edges the last edge will be moved outside of the input edges array 1008 // and the edge will be lost. This is why this code should be 1009 // executed only when Precedent (== TypeFunc::Parms) edge is present. 1010 Node *x = n->in(TypeFunc::Parms); 1011 if (x != NULL && get_block_for_node(x) == block && n->find_prec_edge(x) != -1) { 1012 // Old edge to node within same block will get removed, but no precedence 1013 // edge will get added because it already exists. Update ready count. 1014 int cnt = ready_cnt.at(n->_idx); 1015 assert(cnt > 1, "MemBar node %d must not get ready here", n->_idx); 1016 ready_cnt.at_put(n->_idx, cnt-1); 1017 } 1018 n->del_req(TypeFunc::Parms); 1019 n->add_prec(x); 1020 } 1021 } 1022 } 1023 for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count 1024 ready_cnt.at_put(block->get_node(i2)->_idx, 0); 1025 1026 // All the prescheduled guys do not hold back internal nodes 1027 uint i3; 1028 for (i3 = 0; i3 < phi_cnt; i3++) { // For all pre-scheduled 1029 Node *n = block->get_node(i3); // Get pre-scheduled 1030 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) { 1031 Node* m = n->fast_out(j); 1032 if (get_block_for_node(m) == block) { // Local-block user 1033 int m_cnt = ready_cnt.at(m->_idx)-1; 1034 if (OptoRegScheduling && block_size_threshold_ok) { 1035 // mark m as scheduled 1036 if (m_cnt < 0) { 1037 m->add_flag(Node::Flag_is_scheduled); 1038 } 1039 } 1040 ready_cnt.at_put(m->_idx, m_cnt); // Fix ready count 1041 } 1042 } 1043 } 1044 1045 Node_List delay; 1046 // Make a worklist 1047 Node_List worklist; 1048 for(uint i4=i3; i4<node_cnt; i4++ ) { // Put ready guys on worklist 1049 Node *m = block->get_node(i4); 1050 if( !ready_cnt.at(m->_idx) ) { // Zero ready count? 1051 if (m->is_iteratively_computed()) { 1052 // Push induction variable increments last to allow other uses 1053 // of the phi to be scheduled first. The select() method breaks 1054 // ties in scheduling by worklist order. 1055 delay.push(m); 1056 } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) { 1057 // Force the CreateEx to the top of the list so it's processed 1058 // first and ends up at the start of the block. 1059 worklist.insert(0, m); 1060 } else { 1061 worklist.push(m); // Then on to worklist! 1062 } 1063 } 1064 } 1065 while (delay.size()) { 1066 Node* d = delay.pop(); 1067 worklist.push(d); 1068 } 1069 1070 if (OptoRegScheduling && block_size_threshold_ok) { 1071 // To stage register pressure calculations we need to examine the live set variables 1072 // breaking them up by register class to compartmentalize the calculations. 1073 uint float_pressure = Matcher::float_pressure(FLOATPRESSURE); 1074 _regalloc->_sched_int_pressure.init(INTPRESSURE); 1075 _regalloc->_sched_float_pressure.init(float_pressure); 1076 _regalloc->_scratch_int_pressure.init(INTPRESSURE); 1077 _regalloc->_scratch_float_pressure.init(float_pressure); 1078 1079 _regalloc->compute_entry_block_pressure(block); 1080 } 1081 1082 // Warm up the 'next_call' heuristic bits 1083 needed_for_next_call(block, block->head(), next_call); 1084 1085 #ifndef PRODUCT 1086 if (trace_opto_pipelining()) { 1087 for (uint j=0; j< block->number_of_nodes(); j++) { 1088 Node *n = block->get_node(j); 1089 int idx = n->_idx; 1090 tty->print("# ready cnt:%3d ", ready_cnt.at(idx)); 1091 tty->print("latency:%3d ", get_latency_for_node(n)); 1092 tty->print("%4d: %s\n", idx, n->Name()); 1093 } 1094 } 1095 #endif 1096 1097 uint max_idx = (uint)ready_cnt.length(); 1098 // Pull from worklist and schedule 1099 while( worklist.size() ) { // Worklist is not ready 1100 1101 #ifndef PRODUCT 1102 if (trace_opto_pipelining()) { 1103 tty->print("# ready list:"); 1104 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist 1105 Node *n = worklist[i]; // Get Node on worklist 1106 tty->print(" %d", n->_idx); 1107 } 1108 tty->cr(); 1109 } 1110 #endif 1111 1112 // Select and pop a ready guy from worklist 1113 Node* n = select(block, worklist, ready_cnt, next_call, phi_cnt, recalc_pressure_nodes); 1114 block->map_node(n, phi_cnt++); // Schedule him next 1115 1116 if (OptoRegScheduling && block_size_threshold_ok) { 1117 n->add_flag(Node::Flag_is_scheduled); 1118 1119 // Now adjust the resister pressure with the node we selected 1120 if (!n->is_Phi()) { 1121 adjust_register_pressure(n, block, recalc_pressure_nodes, true); 1122 } 1123 } 1124 1125 #ifndef PRODUCT 1126 if (trace_opto_pipelining()) { 1127 tty->print("# select %d: %s", n->_idx, n->Name()); 1128 tty->print(", latency:%d", get_latency_for_node(n)); 1129 n->dump(); 1130 if (Verbose) { 1131 tty->print("# ready list:"); 1132 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist 1133 Node *n = worklist[i]; // Get Node on worklist 1134 tty->print(" %d", n->_idx); 1135 } 1136 tty->cr(); 1137 } 1138 } 1139 1140 #endif 1141 if( n->is_MachCall() ) { 1142 MachCallNode *mcall = n->as_MachCall(); 1143 phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call); 1144 continue; 1145 } 1146 1147 if (n->is_Mach() && n->as_Mach()->has_call()) { 1148 RegMask regs; 1149 regs.Insert(_matcher.c_frame_pointer()); 1150 regs.OR(n->out_RegMask()); 1151 1152 MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj ); 1153 map_node_to_block(proj, block); 1154 block->insert_node(proj, phi_cnt++); 1155 1156 add_call_kills(proj, regs, _matcher._c_reg_save_policy, false); 1157 } 1158 1159 // Children are now all ready 1160 for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) { 1161 Node* m = n->fast_out(i5); // Get user 1162 if (get_block_for_node(m) != block) { 1163 continue; 1164 } 1165 if( m->is_Phi() ) continue; 1166 if (m->_idx >= max_idx) { // new node, skip it 1167 assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types"); 1168 continue; 1169 } 1170 int m_cnt = ready_cnt.at(m->_idx) - 1; 1171 ready_cnt.at_put(m->_idx, m_cnt); 1172 if( m_cnt == 0 ) 1173 worklist.push(m); 1174 } 1175 } 1176 1177 if( phi_cnt != block->end_idx() ) { 1178 // did not schedule all. Retry, Bailout, or Die 1179 if (C->subsume_loads() == true && !C->failing()) { 1180 // Retry with subsume_loads == false 1181 // If this is the first failure, the sentinel string will "stick" 1182 // to the Compile object, and the C2Compiler will see it and retry. 1183 C->record_failure(C2Compiler::retry_no_subsuming_loads()); 1184 } else { 1185 assert(false, "graph should be schedulable"); 1186 } 1187 // assert( phi_cnt == end_idx(), "did not schedule all" ); 1188 return false; 1189 } 1190 1191 if (OptoRegScheduling && block_size_threshold_ok) { 1192 _regalloc->compute_exit_block_pressure(block); 1193 block->_reg_pressure = _regalloc->_sched_int_pressure.final_pressure(); 1194 block->_freg_pressure = _regalloc->_sched_float_pressure.final_pressure(); 1195 } 1196 1197 #ifndef PRODUCT 1198 if (trace_opto_pipelining()) { 1199 tty->print_cr("#"); 1200 tty->print_cr("# after schedule_local"); 1201 for (uint i = 0;i < block->number_of_nodes();i++) { 1202 tty->print("# "); 1203 block->get_node(i)->fast_dump(); 1204 } 1205 tty->print_cr("# "); 1206 1207 if (OptoRegScheduling && block_size_threshold_ok) { 1208 tty->print_cr("# pressure info : %d", block->_pre_order); 1209 _regalloc->print_pressure_info(_regalloc->_sched_int_pressure, "int register info"); 1210 _regalloc->print_pressure_info(_regalloc->_sched_float_pressure, "float register info"); 1211 } 1212 tty->cr(); 1213 } 1214 #endif 1215 1216 return true; 1217 } 1218 1219 //--------------------------catch_cleanup_fix_all_inputs----------------------- 1220 static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) { 1221 for (uint l = 0; l < use->len(); l++) { 1222 if (use->in(l) == old_def) { 1223 if (l < use->req()) { 1224 use->set_req(l, new_def); 1225 } else { 1226 use->rm_prec(l); 1227 use->add_prec(new_def); 1228 l--; 1229 } 1230 } 1231 } 1232 } 1233 1234 //------------------------------catch_cleanup_find_cloned_def------------------ 1235 Node* PhaseCFG::catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) { 1236 assert( use_blk != def_blk, "Inter-block cleanup only"); 1237 1238 // The use is some block below the Catch. Find and return the clone of the def 1239 // that dominates the use. If there is no clone in a dominating block, then 1240 // create a phi for the def in a dominating block. 1241 1242 // Find which successor block dominates this use. The successor 1243 // blocks must all be single-entry (from the Catch only; I will have 1244 // split blocks to make this so), hence they all dominate. 1245 while( use_blk->_dom_depth > def_blk->_dom_depth+1 ) 1246 use_blk = use_blk->_idom; 1247 1248 // Find the successor 1249 Node *fixup = NULL; 1250 1251 uint j; 1252 for( j = 0; j < def_blk->_num_succs; j++ ) 1253 if( use_blk == def_blk->_succs[j] ) 1254 break; 1255 1256 if( j == def_blk->_num_succs ) { 1257 // Block at same level in dom-tree is not a successor. It needs a 1258 // PhiNode, the PhiNode uses from the def and IT's uses need fixup. 1259 Node_Array inputs = new Node_List(Thread::current()->resource_area()); 1260 for(uint k = 1; k < use_blk->num_preds(); k++) { 1261 Block* block = get_block_for_node(use_blk->pred(k)); 1262 inputs.map(k, catch_cleanup_find_cloned_def(block, def, def_blk, n_clone_idx)); 1263 } 1264 1265 // Check to see if the use_blk already has an identical phi inserted. 1266 // If it exists, it will be at the first position since all uses of a 1267 // def are processed together. 1268 Node *phi = use_blk->get_node(1); 1269 if( phi->is_Phi() ) { 1270 fixup = phi; 1271 for (uint k = 1; k < use_blk->num_preds(); k++) { 1272 if (phi->in(k) != inputs[k]) { 1273 // Not a match 1274 fixup = NULL; 1275 break; 1276 } 1277 } 1278 } 1279 1280 // If an existing PhiNode was not found, make a new one. 1281 if (fixup == NULL) { 1282 Node *new_phi = PhiNode::make(use_blk->head(), def); 1283 use_blk->insert_node(new_phi, 1); 1284 map_node_to_block(new_phi, use_blk); 1285 for (uint k = 1; k < use_blk->num_preds(); k++) { 1286 new_phi->set_req(k, inputs[k]); 1287 } 1288 fixup = new_phi; 1289 } 1290 1291 } else { 1292 // Found the use just below the Catch. Make it use the clone. 1293 fixup = use_blk->get_node(n_clone_idx); 1294 } 1295 1296 return fixup; 1297 } 1298 1299 //--------------------------catch_cleanup_intra_block-------------------------- 1300 // Fix all input edges in use that reference "def". The use is in the same 1301 // block as the def and both have been cloned in each successor block. 1302 static void catch_cleanup_intra_block(Node *use, Node *def, Block *blk, int beg, int n_clone_idx) { 1303 1304 // Both the use and def have been cloned. For each successor block, 1305 // get the clone of the use, and make its input the clone of the def 1306 // found in that block. 1307 1308 uint use_idx = blk->find_node(use); 1309 uint offset_idx = use_idx - beg; 1310 for( uint k = 0; k < blk->_num_succs; k++ ) { 1311 // Get clone in each successor block 1312 Block *sb = blk->_succs[k]; 1313 Node *clone = sb->get_node(offset_idx+1); 1314 assert( clone->Opcode() == use->Opcode(), "" ); 1315 1316 // Make use-clone reference the def-clone 1317 catch_cleanup_fix_all_inputs(clone, def, sb->get_node(n_clone_idx)); 1318 } 1319 } 1320 1321 //------------------------------catch_cleanup_inter_block--------------------- 1322 // Fix all input edges in use that reference "def". The use is in a different 1323 // block than the def. 1324 void PhaseCFG::catch_cleanup_inter_block(Node *use, Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) { 1325 if( !use_blk ) return; // Can happen if the use is a precedence edge 1326 1327 Node *new_def = catch_cleanup_find_cloned_def(use_blk, def, def_blk, n_clone_idx); 1328 catch_cleanup_fix_all_inputs(use, def, new_def); 1329 } 1330 1331 //------------------------------call_catch_cleanup----------------------------- 1332 // If we inserted any instructions between a Call and his CatchNode, 1333 // clone the instructions on all paths below the Catch. 1334 void PhaseCFG::call_catch_cleanup(Block* block) { 1335 1336 // End of region to clone 1337 uint end = block->end_idx(); 1338 if( !block->get_node(end)->is_Catch() ) return; 1339 // Start of region to clone 1340 uint beg = end; 1341 while(!block->get_node(beg-1)->is_MachProj() || 1342 !block->get_node(beg-1)->in(0)->is_MachCall() ) { 1343 beg--; 1344 assert(beg > 0,"Catch cleanup walking beyond block boundary"); 1345 } 1346 // Range of inserted instructions is [beg, end) 1347 if( beg == end ) return; 1348 1349 // Clone along all Catch output paths. Clone area between the 'beg' and 1350 // 'end' indices. 1351 for( uint i = 0; i < block->_num_succs; i++ ) { 1352 Block *sb = block->_succs[i]; 1353 // Clone the entire area; ignoring the edge fixup for now. 1354 for( uint j = end; j > beg; j-- ) { 1355 Node *clone = block->get_node(j-1)->clone(); 1356 sb->insert_node(clone, 1); 1357 map_node_to_block(clone, sb); 1358 if (clone->needs_anti_dependence_check()) { 1359 insert_anti_dependences(sb, clone); 1360 } 1361 } 1362 } 1363 1364 1365 // Fixup edges. Check the def-use info per cloned Node 1366 for(uint i2 = beg; i2 < end; i2++ ) { 1367 uint n_clone_idx = i2-beg+1; // Index of clone of n in each successor block 1368 Node *n = block->get_node(i2); // Node that got cloned 1369 // Need DU safe iterator because of edge manipulation in calls. 1370 Unique_Node_List *out = new Unique_Node_List(Thread::current()->resource_area()); 1371 for (DUIterator_Fast j1max, j1 = n->fast_outs(j1max); j1 < j1max; j1++) { 1372 out->push(n->fast_out(j1)); 1373 } 1374 uint max = out->size(); 1375 for (uint j = 0; j < max; j++) {// For all users 1376 Node *use = out->pop(); 1377 Block *buse = get_block_for_node(use); 1378 if( use->is_Phi() ) { 1379 for( uint k = 1; k < use->req(); k++ ) 1380 if( use->in(k) == n ) { 1381 Block* b = get_block_for_node(buse->pred(k)); 1382 Node *fixup = catch_cleanup_find_cloned_def(b, n, block, n_clone_idx); 1383 use->set_req(k, fixup); 1384 } 1385 } else { 1386 if (block == buse) { 1387 catch_cleanup_intra_block(use, n, block, beg, n_clone_idx); 1388 } else { 1389 catch_cleanup_inter_block(use, buse, n, block, n_clone_idx); 1390 } 1391 } 1392 } // End for all users 1393 1394 } // End of for all Nodes in cloned area 1395 1396 // Remove the now-dead cloned ops 1397 for(uint i3 = beg; i3 < end; i3++ ) { 1398 block->get_node(beg)->disconnect_inputs(NULL, C); 1399 block->remove_node(beg); 1400 } 1401 1402 // If the successor blocks have a CreateEx node, move it back to the top 1403 for(uint i4 = 0; i4 < block->_num_succs; i4++ ) { 1404 Block *sb = block->_succs[i4]; 1405 uint new_cnt = end - beg; 1406 // Remove any newly created, but dead, nodes. 1407 for( uint j = new_cnt; j > 0; j-- ) { 1408 Node *n = sb->get_node(j); 1409 if (n->outcnt() == 0 && 1410 (!n->is_Proj() || n->as_Proj()->in(0)->outcnt() == 1) ){ 1411 n->disconnect_inputs(NULL, C); 1412 sb->remove_node(j); 1413 new_cnt--; 1414 } 1415 } 1416 // If any newly created nodes remain, move the CreateEx node to the top 1417 if (new_cnt > 0) { 1418 Node *cex = sb->get_node(1+new_cnt); 1419 if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Op_CreateEx ) { 1420 sb->remove_node(1+new_cnt); 1421 sb->insert_node(cex, 1); 1422 } 1423 } 1424 } 1425 }