1 /*
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   3  * Copyright 2012, 2015 SAP AG. All rights reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
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  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
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  25 
  26 #ifndef CPU_PPC_VM_GLOBALS_PPC_HPP
  27 #define CPU_PPC_VM_GLOBALS_PPC_HPP
  28 
  29 #include "utilities/globalDefinitions.hpp"
  30 #include "utilities/macros.hpp"
  31 
  32 // Sets the default values for platform dependent flags used by the runtime system.
  33 // (see globals.hpp)
  34 
  35 define_pd_global(bool, ConvertSleepToYield,   true);
  36 define_pd_global(bool, ShareVtableStubs,      false); // Improves performance markedly for mtrt and compress.
  37 define_pd_global(bool, NeedsDeoptSuspend,     false); // Only register window machines need this.
  38 
  39 
  40 define_pd_global(bool, ImplicitNullChecks,    true);  // Generate code for implicit null checks.
  41 define_pd_global(bool, TrapBasedNullChecks,   true);
  42 define_pd_global(bool, UncommonNullCast,      true);  // Uncommon-trap NULLs passed to check cast.
  43 
  44 #define DEFAULT_STACK_YELLOW_PAGES (6)
  45 #define DEFAULT_STACK_RED_PAGES (1)
  46 #define DEFAULT_STACK_SHADOW_PAGES (6 DEBUG_ONLY(+2))
  47 
  48 #define MIN_STACK_YELLOW_PAGES (1)
  49 #define MIN_STACK_RED_PAGES DEFAULT_STACK_RED_PAGES
  50 #define MIN_STACK_SHADOW_PAGES (1)
  51 
  52 define_pd_global(intx, StackYellowPages,      DEFAULT_STACK_YELLOW_PAGES);
  53 define_pd_global(intx, StackRedPages,         DEFAULT_STACK_RED_PAGES);
  54 define_pd_global(intx, StackShadowPages,      DEFAULT_STACK_SHADOW_PAGES);
  55 
  56 // Use large code-entry alignment.
  57 define_pd_global(intx, CodeEntryAlignment,    128);
  58 define_pd_global(intx, OptoLoopAlignment,     16);
  59 define_pd_global(intx, InlineFrequencyCount,  100);
  60 define_pd_global(intx, InlineSmallCode,       1500);
  61 
  62 // Flags for template interpreter.
  63 define_pd_global(bool, RewriteBytecodes,      true);
  64 define_pd_global(bool, RewriteFrequentPairs,  true);
  65 
  66 define_pd_global(bool, UseMembar,             false);
  67 
  68 define_pd_global(bool, PreserveFramePointer,  false);
  69 
  70 // GC Ergo Flags
  71 define_pd_global(size_t, CMSYoungGenPerWorker, 16*M);  // Default max size of CMS young gen, per GC worker thread.
  72 
  73 define_pd_global(uintx, TypeProfileLevel, 111);
  74 
  75 // Platform dependent flag handling: flags only defined on this platform.
  76 #define ARCH_FLAGS(develop, product, diagnostic, experimental, notproduct, range, constraint)  \
  77                                                                             \
  78   /* Load poll address from thread. This is used to implement per-thread */ \
  79   /* safepoints on platforms != IA64. */                                    \
  80   product(bool, LoadPollAddressFromThread, false,                           \
  81           "Load polling page address from thread object (required for "     \
  82           "per-thread safepoints on platforms != IA64)")                    \
  83                                                                             \
  84   product(uintx, PowerArchitecturePPC64, 0,                                 \
  85           "CPU Version: x for PowerX. Currently recognizes Power5 to "      \
  86           "Power8. Default is 0. Newer CPUs will be recognized as Power8.") \
  87                                                                             \
  88   /* Reoptimize code-sequences of calls at runtime, e.g. replace an */      \
  89   /* indirect call by a direct call.                                */      \
  90   product(bool, ReoptimizeCallSequences, true,                              \
  91           "Reoptimize code-sequences of calls at runtime.")                 \
  92                                                                             \
  93   /* Power 8: Configure Data Stream Control Register. */                    \
  94   product(uint64_t,DSCR_PPC64, (uintx)-1,                                   \
  95           "Power8 or later: Specify encoded value for Data Stream Control " \
  96           "Register")                                                       \
  97   product(uint64_t,DSCR_DPFD_PPC64, 8,                                      \
  98           "Power8 or later: DPFD (default prefetch depth) value of the "    \
  99           "Data Stream Control Register."                                   \
 100           " 0: hardware default, 1: none, 2-7: min-max, 8: don't touch")    \
 101   product(uint64_t,DSCR_URG_PPC64, 8,                                       \
 102           "Power8 or later: URG (depth attainment urgency) value of the "   \
 103           "Data Stream Control Register."                                   \
 104           " 0: hardware default, 1: none, 2-7: min-max, 8: don't touch")    \
 105                                                                             \
 106   product(bool, UseLoadInstructionsForStackBangingPPC64, false,             \
 107           "Use load instructions for stack banging.")                       \
 108                                                                             \
 109   /* special instructions */                                                \
 110                                                                             \
 111   product(bool, UseCountLeadingZerosInstructionsPPC64, true,                \
 112           "Use count leading zeros instructions.")                          \
 113                                                                             \
 114   product(bool, UseExtendedLoadAndReserveInstructionsPPC64, false,          \
 115           "Use extended versions of load-and-reserve instructions.")        \
 116                                                                             \
 117   product(bool, UseRotateAndMaskInstructionsPPC64, true,                    \
 118           "Use rotate and mask instructions.")                              \
 119                                                                             \
 120   product(bool, UseStaticBranchPredictionInCompareAndSwapPPC64, true,       \
 121           "Use static branch prediction hints in CAS operations.")          \
 122   product(bool, UseStaticBranchPredictionForUncommonPathsPPC64, false,      \
 123           "Use static branch prediction hints for uncommon paths.")         \
 124                                                                             \
 125   product(bool, UsePower6SchedulerPPC64, false,                             \
 126           "Use Power6 Scheduler.")                                          \
 127                                                                             \
 128   product(bool, InsertEndGroupPPC64, false,                                 \
 129           "Insert EndGroup instructions to optimize for Power6.")           \
 130                                                                             \
 131   /* Trap based checks. */                                                  \
 132   /* Trap based checks use the ppc trap instructions to check certain */    \
 133   /* conditions. This instruction raises a SIGTRAP caught by the      */    \
 134   /* exception handler of the VM.                                     */    \
 135   product(bool, UseSIGTRAP, true,                                           \
 136           "Allow trap instructions that make use of SIGTRAP. Use this to "  \
 137           "switch off all optimizations requiring SIGTRAP.")                \
 138   product(bool, TrapBasedICMissChecks, true,                                \
 139           "Raise and handle SIGTRAP if inline cache miss detected.")        \
 140   product(bool, TrapBasedNotEntrantChecks, true,                            \
 141           "Raise and handle SIGTRAP if calling not entrant or zombie"       \
 142           " method.")                                                       \
 143   product(bool, TraceTraps, false, "Trace all traps the signal handler"     \
 144           "handles.")                                                       \
 145                                                                             \
 146   product(bool, ZapMemory, false, "Write 0x0101... to empty memory."        \
 147           " Use this to ease debugging.")                                   \
 148                                                                             \
 149   /* Use Restricted Transactional Memory for lock eliding */                \
 150   product(bool, UseRTMLocking, false,                                       \
 151           "Enable RTM lock eliding for inflated locks in compiled code")    \
 152                                                                             \
 153   experimental(bool, UseRTMForStackLocks, false,                            \
 154           "Enable RTM lock eliding for stack locks in compiled code")       \
 155                                                                             \
 156   product(bool, UseRTMDeopt, false,                                         \
 157           "Perform deopt and recompilation based on RTM abort ratio")       \
 158                                                                             \
 159   product(uintx, RTMRetryCount, 5,                                          \
 160           "Number of RTM retries on lock abort or busy")                    \
 161                                                                             \
 162   experimental(intx, RTMSpinLoopCount, 100,                                 \
 163           "Spin count for lock to become free before RTM retry")            \
 164                                                                             \
 165   experimental(intx, RTMAbortThreshold, 1000,                               \
 166           "Calculate abort ratio after this number of aborts")              \
 167                                                                             \
 168   experimental(intx, RTMLockingThreshold, 10000,                            \
 169           "Lock count at which to do RTM lock eliding without "             \
 170           "abort ratio calculation")                                        \
 171                                                                             \
 172   experimental(intx, RTMAbortRatio, 50,                                     \
 173           "Lock abort ratio at which to stop use RTM lock eliding")         \
 174                                                                             \
 175   experimental(intx, RTMTotalCountIncrRate, 64,                             \
 176           "Increment total RTM attempted lock count once every n times")    \
 177                                                                             \
 178   experimental(intx, RTMLockingCalculationDelay, 0,                         \
 179           "Number of milliseconds to wait before start calculating aborts " \
 180           "for RTM locking")                                                \
 181                                                                             \
 182   experimental(bool, UseRTMXendForLockBusy, true,                           \
 183           "Use RTM Xend instead of Xabort when lock busy")                  \
 184 
 185 #endif // CPU_PPC_VM_GLOBALS_PPC_HPP