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src/cpu/x86/vm/assembler_x86.cpp

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3010 
3011 void Assembler::pcmpestri(XMMRegister dst, Address src, int imm8) {
3012   assert(VM_Version::supports_sse4_2(), "");
3013   InstructionMark im(this);
3014   simd_prefix(dst, xnoreg, src, VEX_SIMD_66, /* no_mask_reg */ false, VEX_OPCODE_0F_3A,
3015               /* rex_w */ false, AVX_128bit, /* legacy_mode */ true);
3016   emit_int8(0x61);
3017   emit_operand(dst, src);
3018   emit_int8(imm8);
3019 }
3020 
3021 void Assembler::pcmpestri(XMMRegister dst, XMMRegister src, int imm8) {
3022   assert(VM_Version::supports_sse4_2(), "");
3023   int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, /* no_mask_reg */ false,
3024                                       VEX_OPCODE_0F_3A, /* rex_w */ false, AVX_128bit, /* legacy_mode */ true);
3025   emit_int8(0x61);
3026   emit_int8((unsigned char)(0xC0 | encode));
3027   emit_int8(imm8);
3028 }
3029 





























3030 void Assembler::pextrd(Register dst, XMMRegister src, int imm8) {
3031   assert(VM_Version::supports_sse4_1(), "");
3032   int encode = simd_prefix_and_encode(as_XMMRegister(dst->encoding()), xnoreg, src, VEX_SIMD_66, /* no_mask_reg */ true,
3033                                       VEX_OPCODE_0F_3A, /* rex_w */ false, AVX_128bit, /* legacy_mode */ _legacy_mode_dq);
3034   emit_int8(0x16);
3035   emit_int8((unsigned char)(0xC0 | encode));
3036   emit_int8(imm8);
3037 }
3038 
3039 void Assembler::pextrq(Register dst, XMMRegister src, int imm8) {
3040   assert(VM_Version::supports_sse4_1(), "");
3041   int encode = simd_prefix_and_encode(as_XMMRegister(dst->encoding()), xnoreg, src, VEX_SIMD_66, /* no_mask_reg */  true,
3042                                       VEX_OPCODE_0F_3A, /* rex_w */ true, AVX_128bit, /* legacy_mode */ _legacy_mode_dq);
3043   emit_int8(0x16);
3044   emit_int8((unsigned char)(0xC0 | encode));
3045   emit_int8(imm8);
3046 }
3047 
3048 void Assembler::pextrw(Register dst, XMMRegister src, int imm8) {
3049   assert(VM_Version::supports_sse2(), "");


3082 }
3083 
3084 void Assembler::pmovzxbw(XMMRegister dst, Address src) {
3085   assert(VM_Version::supports_sse4_1(), "");
3086   if (VM_Version::supports_evex()) {
3087     _tuple_type = EVEX_HVM;
3088   }
3089   InstructionMark im(this);
3090   simd_prefix(dst, src, VEX_SIMD_66, /* no_mask_reg */ false, VEX_OPCODE_0F_38);
3091   emit_int8(0x30);
3092   emit_operand(dst, src);
3093 }
3094 
3095 void Assembler::pmovzxbw(XMMRegister dst, XMMRegister src) {
3096   assert(VM_Version::supports_sse4_1(), "");
3097   int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, /* no_mask_reg */ false, VEX_OPCODE_0F_38);
3098   emit_int8(0x30);
3099   emit_int8((unsigned char)(0xC0 | encode));
3100 }
3101 











3102 // generic
3103 void Assembler::pop(Register dst) {
3104   int encode = prefix_and_encode(dst->encoding());
3105   emit_int8(0x58 | encode);
3106 }
3107 
3108 void Assembler::popcntl(Register dst, Address src) {
3109   assert(VM_Version::supports_popcnt(), "must support");
3110   InstructionMark im(this);
3111   emit_int8((unsigned char)0xF3);
3112   prefix(src, dst);
3113   emit_int8(0x0F);
3114   emit_int8((unsigned char)0xB8);
3115   emit_operand(dst, src);
3116 }
3117 
3118 void Assembler::popcntl(Register dst, Register src) {
3119   assert(VM_Version::supports_popcnt(), "must support");
3120   emit_int8((unsigned char)0xF3);
3121   int encode = prefix_and_encode(dst->encoding(), src->encoding());


5327   int vector_len = AVX_512bit;
5328   int src_enc = src->encoding();
5329   int dst_enc = dst->encoding();
5330   int encode = vex_prefix_and_encode(src_enc, 0, dst_enc, VEX_SIMD_66, VEX_OPCODE_0F_3A,
5331                                      /* vex_w */ !_legacy_mode_dq, vector_len, /* legacy_mode */ false, /* no_mask_reg */ false);
5332   emit_int8(0x19);
5333   emit_int8((unsigned char)(0xC0 | encode));
5334   // 0x01 - extract from bits 255:128
5335   // 0x02 - extract from bits 383:256
5336   // 0x03 - extract from bits 511:384
5337   emit_int8(value & 0x3);
5338 }
5339 
5340 // duplicate 4-bytes integer data from src into 8 locations in dest
5341 void Assembler::vpbroadcastd(XMMRegister dst, XMMRegister src) {
5342   _instruction_uses_vl = true;
5343   assert(UseAVX > 1, "");
5344   int vector_len = AVX_256bit;
5345   int encode = vex_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, vector_len, VEX_OPCODE_0F_38);
5346   emit_int8(0x58);










5347   emit_int8((unsigned char)(0xC0 | encode));
5348 }
5349 
5350 // duplicate 1-byte integer data from src into 16||32|64 locations in dest : requires AVX512BW and AVX512VL
5351 void Assembler::evpbroadcastb(XMMRegister dst, XMMRegister src, int vector_len) {
5352   _instruction_uses_vl = true;
5353   assert(UseAVX > 1, "");
5354   int encode = vex_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, vector_len, VEX_OPCODE_0F_38);
5355   emit_int8(0x78);
5356   emit_int8((unsigned char)(0xC0 | encode));
5357 }
5358 
5359 void Assembler::evpbroadcastb(XMMRegister dst, Address src, int vector_len) {
5360   _instruction_uses_vl = true;
5361   assert(UseAVX > 1, "");
5362   _tuple_type = EVEX_T1S;
5363   _input_size_in_bits = EVEX_8bit;
5364   InstructionMark im(this);
5365   assert(dst != xnoreg, "sanity");
5366   int dst_enc = dst->encoding();




3010 
3011 void Assembler::pcmpestri(XMMRegister dst, Address src, int imm8) {
3012   assert(VM_Version::supports_sse4_2(), "");
3013   InstructionMark im(this);
3014   simd_prefix(dst, xnoreg, src, VEX_SIMD_66, /* no_mask_reg */ false, VEX_OPCODE_0F_3A,
3015               /* rex_w */ false, AVX_128bit, /* legacy_mode */ true);
3016   emit_int8(0x61);
3017   emit_operand(dst, src);
3018   emit_int8(imm8);
3019 }
3020 
3021 void Assembler::pcmpestri(XMMRegister dst, XMMRegister src, int imm8) {
3022   assert(VM_Version::supports_sse4_2(), "");
3023   int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, /* no_mask_reg */ false,
3024                                       VEX_OPCODE_0F_3A, /* rex_w */ false, AVX_128bit, /* legacy_mode */ true);
3025   emit_int8(0x61);
3026   emit_int8((unsigned char)(0xC0 | encode));
3027   emit_int8(imm8);
3028 }
3029 
3030 void Assembler::pcmpeqw(XMMRegister dst, XMMRegister src) {
3031   NOT_LP64(assert(VM_Version::supports_sse2(), ""));
3032   emit_simd_arith(0x75, dst, src, VEX_SIMD_66,
3033                   false, (VM_Version::supports_avx512dq() == false));
3034 }
3035 
3036 void Assembler::vpcmpeqw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
3037   assert(UseAVX > 0, "some form of AVX must be enabled");
3038   emit_vex_arith(0x75, dst, nds, src, VEX_SIMD_66, vector_len,
3039                  false, (VM_Version::supports_avx512dq() == false));
3040 }
3041 
3042 void Assembler::pmovmskb(Register dst, XMMRegister src) {
3043   assert(VM_Version::supports_sse2(), "");
3044   int encode = simd_prefix_and_encode(as_XMMRegister(dst->encoding()), xnoreg, src, VEX_SIMD_66, true, VEX_OPCODE_0F,
3045                                       false, AVX_128bit, (VM_Version::supports_avx512dq() == false));
3046   emit_int8((unsigned char)0xD7);
3047   emit_int8((unsigned char)(0xC0 | encode));
3048 }
3049 
3050 void Assembler::vpmovmskb(Register dst, XMMRegister src) {
3051   assert(VM_Version::supports_avx2(), "");
3052   int vector_len = AVX_256bit;
3053   int encode = vex_prefix_and_encode(as_XMMRegister(dst->encoding()), xnoreg, src, VEX_SIMD_66,
3054                                      vector_len, VEX_OPCODE_0F, true, false);
3055   emit_int8((unsigned char)0xD7);
3056   emit_int8((unsigned char)(0xC0 | encode));
3057 }
3058 
3059 void Assembler::pextrd(Register dst, XMMRegister src, int imm8) {
3060   assert(VM_Version::supports_sse4_1(), "");
3061   int encode = simd_prefix_and_encode(as_XMMRegister(dst->encoding()), xnoreg, src, VEX_SIMD_66, /* no_mask_reg */ true,
3062                                       VEX_OPCODE_0F_3A, /* rex_w */ false, AVX_128bit, /* legacy_mode */ _legacy_mode_dq);
3063   emit_int8(0x16);
3064   emit_int8((unsigned char)(0xC0 | encode));
3065   emit_int8(imm8);
3066 }
3067 
3068 void Assembler::pextrq(Register dst, XMMRegister src, int imm8) {
3069   assert(VM_Version::supports_sse4_1(), "");
3070   int encode = simd_prefix_and_encode(as_XMMRegister(dst->encoding()), xnoreg, src, VEX_SIMD_66, /* no_mask_reg */  true,
3071                                       VEX_OPCODE_0F_3A, /* rex_w */ true, AVX_128bit, /* legacy_mode */ _legacy_mode_dq);
3072   emit_int8(0x16);
3073   emit_int8((unsigned char)(0xC0 | encode));
3074   emit_int8(imm8);
3075 }
3076 
3077 void Assembler::pextrw(Register dst, XMMRegister src, int imm8) {
3078   assert(VM_Version::supports_sse2(), "");


3111 }
3112 
3113 void Assembler::pmovzxbw(XMMRegister dst, Address src) {
3114   assert(VM_Version::supports_sse4_1(), "");
3115   if (VM_Version::supports_evex()) {
3116     _tuple_type = EVEX_HVM;
3117   }
3118   InstructionMark im(this);
3119   simd_prefix(dst, src, VEX_SIMD_66, /* no_mask_reg */ false, VEX_OPCODE_0F_38);
3120   emit_int8(0x30);
3121   emit_operand(dst, src);
3122 }
3123 
3124 void Assembler::pmovzxbw(XMMRegister dst, XMMRegister src) {
3125   assert(VM_Version::supports_sse4_1(), "");
3126   int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, /* no_mask_reg */ false, VEX_OPCODE_0F_38);
3127   emit_int8(0x30);
3128   emit_int8((unsigned char)(0xC0 | encode));
3129 }
3130 
3131 void Assembler::vpmovzxbw(XMMRegister dst, Address src) {
3132   assert(VM_Version::supports_avx(), "");
3133   InstructionMark im(this);
3134   bool vector256 = true;
3135   assert(dst != xnoreg, "sanity");
3136   int dst_enc = dst->encoding();
3137   vex_prefix(src, 0, dst_enc, VEX_SIMD_66, VEX_OPCODE_0F_38, false, vector256);
3138   emit_int8(0x30);
3139   emit_operand(dst, src);
3140 }
3141 
3142 // generic
3143 void Assembler::pop(Register dst) {
3144   int encode = prefix_and_encode(dst->encoding());
3145   emit_int8(0x58 | encode);
3146 }
3147 
3148 void Assembler::popcntl(Register dst, Address src) {
3149   assert(VM_Version::supports_popcnt(), "must support");
3150   InstructionMark im(this);
3151   emit_int8((unsigned char)0xF3);
3152   prefix(src, dst);
3153   emit_int8(0x0F);
3154   emit_int8((unsigned char)0xB8);
3155   emit_operand(dst, src);
3156 }
3157 
3158 void Assembler::popcntl(Register dst, Register src) {
3159   assert(VM_Version::supports_popcnt(), "must support");
3160   emit_int8((unsigned char)0xF3);
3161   int encode = prefix_and_encode(dst->encoding(), src->encoding());


5367   int vector_len = AVX_512bit;
5368   int src_enc = src->encoding();
5369   int dst_enc = dst->encoding();
5370   int encode = vex_prefix_and_encode(src_enc, 0, dst_enc, VEX_SIMD_66, VEX_OPCODE_0F_3A,
5371                                      /* vex_w */ !_legacy_mode_dq, vector_len, /* legacy_mode */ false, /* no_mask_reg */ false);
5372   emit_int8(0x19);
5373   emit_int8((unsigned char)(0xC0 | encode));
5374   // 0x01 - extract from bits 255:128
5375   // 0x02 - extract from bits 383:256
5376   // 0x03 - extract from bits 511:384
5377   emit_int8(value & 0x3);
5378 }
5379 
5380 // duplicate 4-bytes integer data from src into 8 locations in dest
5381 void Assembler::vpbroadcastd(XMMRegister dst, XMMRegister src) {
5382   _instruction_uses_vl = true;
5383   assert(UseAVX > 1, "");
5384   int vector_len = AVX_256bit;
5385   int encode = vex_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, vector_len, VEX_OPCODE_0F_38);
5386   emit_int8(0x58);
5387   emit_int8((unsigned char)(0xC0 | encode));
5388 }
5389 
5390 // duplicate 2-bytes integer data from src into 16 locations in dest
5391 void Assembler::vpbroadcastw(XMMRegister dst, XMMRegister src) {
5392   assert(VM_Version::supports_avx2(), "");
5393   bool vector_len = AVX_256bit;
5394   int encode = vex_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66,
5395                                      vector_len, VEX_OPCODE_0F_38, false);
5396   emit_int8(0x79);
5397   emit_int8((unsigned char)(0xC0 | encode));
5398 }
5399 
5400 // duplicate 1-byte integer data from src into 16||32|64 locations in dest : requires AVX512BW and AVX512VL
5401 void Assembler::evpbroadcastb(XMMRegister dst, XMMRegister src, int vector_len) {
5402   _instruction_uses_vl = true;
5403   assert(UseAVX > 1, "");
5404   int encode = vex_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, vector_len, VEX_OPCODE_0F_38);
5405   emit_int8(0x78);
5406   emit_int8((unsigned char)(0xC0 | encode));
5407 }
5408 
5409 void Assembler::evpbroadcastb(XMMRegister dst, Address src, int vector_len) {
5410   _instruction_uses_vl = true;
5411   assert(UseAVX > 1, "");
5412   _tuple_type = EVEX_T1S;
5413   _input_size_in_bits = EVEX_8bit;
5414   InstructionMark im(this);
5415   assert(dst != xnoreg, "sanity");
5416   int dst_enc = dst->encoding();


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