1 /* 2 * Copyright (c) 1998, 2015, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "memory/allocation.inline.hpp" 27 #include "opto/ad.hpp" 28 #include "opto/block.hpp" 29 #include "opto/c2compiler.hpp" 30 #include "opto/callnode.hpp" 31 #include "opto/cfgnode.hpp" 32 #include "opto/machnode.hpp" 33 #include "opto/runtime.hpp" 34 #include "opto/chaitin.hpp" 35 #include "runtime/sharedRuntime.hpp" 36 37 // Optimization - Graph Style 38 39 // Check whether val is not-null-decoded compressed oop, 40 // i.e. will grab into the base of the heap if it represents NULL. 41 static bool accesses_heap_base_zone(Node *val) { 42 if (Universe::narrow_oop_base() > 0) { // Implies UseCompressedOops. 43 if (val && val->is_Mach()) { 44 if (val->as_Mach()->ideal_Opcode() == Op_DecodeN) { 45 // This assumes all Decodes with TypePtr::NotNull are matched to nodes that 46 // decode NULL to point to the heap base (Decode_NN). 47 if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) { 48 return true; 49 } 50 } 51 // Must recognize load operation with Decode matched in memory operand. 52 // We should not reach here exept for PPC/AIX, as os::zero_page_read_protected() 53 // returns true everywhere else. On PPC, no such memory operands 54 // exist, therefore we did not yet implement a check for such operands. 55 NOT_AIX(Unimplemented()); 56 } 57 } 58 return false; 59 } 60 61 static bool needs_explicit_null_check_for_read(Node *val) { 62 // On some OSes (AIX) the page at address 0 is only write protected. 63 // If so, only Store operations will trap. 64 if (os::zero_page_read_protected()) { 65 return false; // Implicit null check will work. 66 } 67 // Also a read accessing the base of a heap-based compressed heap will trap. 68 if (accesses_heap_base_zone(val) && // Hits the base zone page. 69 Universe::narrow_oop_use_implicit_null_checks()) { // Base zone page is protected. 70 return false; 71 } 72 73 return true; 74 } 75 76 //------------------------------implicit_null_check---------------------------- 77 // Detect implicit-null-check opportunities. Basically, find NULL checks 78 // with suitable memory ops nearby. Use the memory op to do the NULL check. 79 // I can generate a memory op if there is not one nearby. 80 // The proj is the control projection for the not-null case. 81 // The val is the pointer being checked for nullness or 82 // decodeHeapOop_not_null node if it did not fold into address. 83 void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allowed_reasons) { 84 // Assume if null check need for 0 offset then always needed 85 // Intel solaris doesn't support any null checks yet and no 86 // mechanism exists (yet) to set the switches at an os_cpu level 87 if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return; 88 89 // Make sure the ptr-is-null path appears to be uncommon! 90 float f = block->end()->as_MachIf()->_prob; 91 if( proj->Opcode() == Op_IfTrue ) f = 1.0f - f; 92 if( f > PROB_UNLIKELY_MAG(4) ) return; 93 94 uint bidx = 0; // Capture index of value into memop 95 bool was_store; // Memory op is a store op 96 97 // Get the successor block for if the test ptr is non-null 98 Block* not_null_block; // this one goes with the proj 99 Block* null_block; 100 if (block->get_node(block->number_of_nodes()-1) == proj) { 101 null_block = block->_succs[0]; 102 not_null_block = block->_succs[1]; 103 } else { 104 assert(block->get_node(block->number_of_nodes()-2) == proj, "proj is one or the other"); 105 not_null_block = block->_succs[0]; 106 null_block = block->_succs[1]; 107 } 108 while (null_block->is_Empty() == Block::empty_with_goto) { 109 null_block = null_block->_succs[0]; 110 } 111 112 // Search the exception block for an uncommon trap. 113 // (See Parse::do_if and Parse::do_ifnull for the reason 114 // we need an uncommon trap. Briefly, we need a way to 115 // detect failure of this optimization, as in 6366351.) 116 { 117 bool found_trap = false; 118 for (uint i1 = 0; i1 < null_block->number_of_nodes(); i1++) { 119 Node* nn = null_block->get_node(i1); 120 if (nn->is_MachCall() && 121 nn->as_MachCall()->entry_point() == SharedRuntime::uncommon_trap_blob()->entry_point()) { 122 const Type* trtype = nn->in(TypeFunc::Parms)->bottom_type(); 123 if (trtype->isa_int() && trtype->is_int()->is_con()) { 124 jint tr_con = trtype->is_int()->get_con(); 125 Deoptimization::DeoptReason reason = Deoptimization::trap_request_reason(tr_con); 126 Deoptimization::DeoptAction action = Deoptimization::trap_request_action(tr_con); 127 assert((int)reason < (int)BitsPerInt, "recode bit map"); 128 if (is_set_nth_bit(allowed_reasons, (int) reason) 129 && action != Deoptimization::Action_none) { 130 // This uncommon trap is sure to recompile, eventually. 131 // When that happens, C->too_many_traps will prevent 132 // this transformation from happening again. 133 found_trap = true; 134 } 135 } 136 break; 137 } 138 } 139 if (!found_trap) { 140 // We did not find an uncommon trap. 141 return; 142 } 143 } 144 145 // Check for decodeHeapOop_not_null node which did not fold into address 146 bool is_decoden = ((intptr_t)val) & 1; 147 val = (Node*)(((intptr_t)val) & ~1); 148 149 assert(!is_decoden || (val->in(0) == NULL) && val->is_Mach() && 150 (val->as_Mach()->ideal_Opcode() == Op_DecodeN), "sanity"); 151 152 // Search the successor block for a load or store who's base value is also 153 // the tested value. There may be several. 154 Node_List *out = new Node_List(Thread::current()->resource_area()); 155 MachNode *best = NULL; // Best found so far 156 for (DUIterator i = val->outs(); val->has_out(i); i++) { 157 Node *m = val->out(i); 158 if( !m->is_Mach() ) continue; 159 MachNode *mach = m->as_Mach(); 160 was_store = false; 161 int iop = mach->ideal_Opcode(); 162 switch( iop ) { 163 case Op_LoadB: 164 case Op_LoadUB: 165 case Op_LoadUS: 166 case Op_LoadD: 167 case Op_LoadF: 168 case Op_LoadI: 169 case Op_LoadL: 170 case Op_LoadP: 171 case Op_LoadN: 172 case Op_LoadS: 173 case Op_LoadKlass: 174 case Op_LoadNKlass: 175 case Op_LoadRange: 176 case Op_LoadD_unaligned: 177 case Op_LoadL_unaligned: 178 assert(mach->in(2) == val, "should be address"); 179 break; 180 case Op_StoreB: 181 case Op_StoreC: 182 case Op_StoreCM: 183 case Op_StoreD: 184 case Op_StoreF: 185 case Op_StoreI: 186 case Op_StoreL: 187 case Op_StoreP: 188 case Op_StoreN: 189 case Op_StoreNKlass: 190 was_store = true; // Memory op is a store op 191 // Stores will have their address in slot 2 (memory in slot 1). 192 // If the value being nul-checked is in another slot, it means we 193 // are storing the checked value, which does NOT check the value! 194 if( mach->in(2) != val ) continue; 195 break; // Found a memory op? 196 case Op_StrComp: 197 case Op_StrEquals: 198 case Op_StrIndexOf: 199 case Op_StrIndexOfChar: 200 case Op_AryEq: 201 case Op_StrInflatedCopy: 202 case Op_StrCompressedCopy: 203 case Op_EncodeISOArray: 204 case Op_HasNegatives: 205 // Not a legit memory op for implicit null check regardless of 206 // embedded loads 207 continue; 208 default: // Also check for embedded loads 209 if( !mach->needs_anti_dependence_check() ) 210 continue; // Not an memory op; skip it 211 if( must_clone[iop] ) { 212 // Do not move nodes which produce flags because 213 // RA will try to clone it to place near branch and 214 // it will cause recompilation, see clone_node(). 215 continue; 216 } 217 { 218 // Check that value is used in memory address in 219 // instructions with embedded load (CmpP val1,(val2+off)). 220 Node* base; 221 Node* index; 222 const MachOper* oper = mach->memory_inputs(base, index); 223 if (oper == NULL || oper == (MachOper*)-1) { 224 continue; // Not an memory op; skip it 225 } 226 if (val == base || 227 val == index && val->bottom_type()->isa_narrowoop()) { 228 break; // Found it 229 } else { 230 continue; // Skip it 231 } 232 } 233 break; 234 } 235 236 // On some OSes (AIX) the page at address 0 is only write protected. 237 // If so, only Store operations will trap. 238 // But a read accessing the base of a heap-based compressed heap will trap. 239 if (!was_store && needs_explicit_null_check_for_read(val)) { 240 continue; 241 } 242 243 // check if the offset is not too high for implicit exception 244 { 245 intptr_t offset = 0; 246 const TypePtr *adr_type = NULL; // Do not need this return value here 247 const Node* base = mach->get_base_and_disp(offset, adr_type); 248 if (base == NULL || base == NodeSentinel) { 249 // Narrow oop address doesn't have base, only index 250 if( val->bottom_type()->isa_narrowoop() && 251 MacroAssembler::needs_explicit_null_check(offset) ) 252 continue; // Give up if offset is beyond page size 253 // cannot reason about it; is probably not implicit null exception 254 } else { 255 const TypePtr* tptr; 256 if (UseCompressedOops && (Universe::narrow_oop_shift() == 0 || 257 Universe::narrow_klass_shift() == 0)) { 258 // 32-bits narrow oop can be the base of address expressions 259 tptr = base->get_ptr_type(); 260 } else { 261 // only regular oops are expected here 262 tptr = base->bottom_type()->is_ptr(); 263 } 264 // Give up if offset is not a compile-time constant 265 if( offset == Type::OffsetBot || tptr->_offset == Type::OffsetBot ) 266 continue; 267 offset += tptr->_offset; // correct if base is offseted 268 if( MacroAssembler::needs_explicit_null_check(offset) ) 269 continue; // Give up is reference is beyond 4K page size 270 } 271 } 272 273 // Check ctrl input to see if the null-check dominates the memory op 274 Block *cb = get_block_for_node(mach); 275 cb = cb->_idom; // Always hoist at least 1 block 276 if( !was_store ) { // Stores can be hoisted only one block 277 while( cb->_dom_depth > (block->_dom_depth + 1)) 278 cb = cb->_idom; // Hoist loads as far as we want 279 // The non-null-block should dominate the memory op, too. Live 280 // range spilling will insert a spill in the non-null-block if it is 281 // needs to spill the memory op for an implicit null check. 282 if (cb->_dom_depth == (block->_dom_depth + 1)) { 283 if (cb != not_null_block) continue; 284 cb = cb->_idom; 285 } 286 } 287 if( cb != block ) continue; 288 289 // Found a memory user; see if it can be hoisted to check-block 290 uint vidx = 0; // Capture index of value into memop 291 uint j; 292 for( j = mach->req()-1; j > 0; j-- ) { 293 if( mach->in(j) == val ) { 294 vidx = j; 295 // Ignore DecodeN val which could be hoisted to where needed. 296 if( is_decoden ) continue; 297 } 298 // Block of memory-op input 299 Block *inb = get_block_for_node(mach->in(j)); 300 Block *b = block; // Start from nul check 301 while( b != inb && b->_dom_depth > inb->_dom_depth ) 302 b = b->_idom; // search upwards for input 303 // See if input dominates null check 304 if( b != inb ) 305 break; 306 } 307 if( j > 0 ) 308 continue; 309 Block *mb = get_block_for_node(mach); 310 // Hoisting stores requires more checks for the anti-dependence case. 311 // Give up hoisting if we have to move the store past any load. 312 if( was_store ) { 313 Block *b = mb; // Start searching here for a local load 314 // mach use (faulting) trying to hoist 315 // n might be blocker to hoisting 316 while( b != block ) { 317 uint k; 318 for( k = 1; k < b->number_of_nodes(); k++ ) { 319 Node *n = b->get_node(k); 320 if( n->needs_anti_dependence_check() && 321 n->in(LoadNode::Memory) == mach->in(StoreNode::Memory) ) 322 break; // Found anti-dependent load 323 } 324 if( k < b->number_of_nodes() ) 325 break; // Found anti-dependent load 326 // Make sure control does not do a merge (would have to check allpaths) 327 if( b->num_preds() != 2 ) break; 328 b = get_block_for_node(b->pred(1)); // Move up to predecessor block 329 } 330 if( b != block ) continue; 331 } 332 333 // Make sure this memory op is not already being used for a NullCheck 334 Node *e = mb->end(); 335 if( e->is_MachNullCheck() && e->in(1) == mach ) 336 continue; // Already being used as a NULL check 337 338 // Found a candidate! Pick one with least dom depth - the highest 339 // in the dom tree should be closest to the null check. 340 if (best == NULL || get_block_for_node(mach)->_dom_depth < get_block_for_node(best)->_dom_depth) { 341 best = mach; 342 bidx = vidx; 343 } 344 } 345 // No candidate! 346 if (best == NULL) { 347 return; 348 } 349 350 // ---- Found an implicit null check 351 extern int implicit_null_checks; 352 implicit_null_checks++; 353 354 if( is_decoden ) { 355 // Check if we need to hoist decodeHeapOop_not_null first. 356 Block *valb = get_block_for_node(val); 357 if( block != valb && block->_dom_depth < valb->_dom_depth ) { 358 // Hoist it up to the end of the test block. 359 valb->find_remove(val); 360 block->add_inst(val); 361 map_node_to_block(val, block); 362 // DecodeN on x86 may kill flags. Check for flag-killing projections 363 // that also need to be hoisted. 364 for (DUIterator_Fast jmax, j = val->fast_outs(jmax); j < jmax; j++) { 365 Node* n = val->fast_out(j); 366 if( n->is_MachProj() ) { 367 get_block_for_node(n)->find_remove(n); 368 block->add_inst(n); 369 map_node_to_block(n, block); 370 } 371 } 372 } 373 } 374 // Hoist the memory candidate up to the end of the test block. 375 Block *old_block = get_block_for_node(best); 376 old_block->find_remove(best); 377 block->add_inst(best); 378 map_node_to_block(best, block); 379 380 // Move the control dependence 381 if (best->in(0) && best->in(0) == old_block->head()) 382 best->set_req(0, block->head()); 383 384 // Check for flag-killing projections that also need to be hoisted 385 // Should be DU safe because no edge updates. 386 for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) { 387 Node* n = best->fast_out(j); 388 if( n->is_MachProj() ) { 389 get_block_for_node(n)->find_remove(n); 390 block->add_inst(n); 391 map_node_to_block(n, block); 392 } 393 } 394 395 // proj==Op_True --> ne test; proj==Op_False --> eq test. 396 // One of two graph shapes got matched: 397 // (IfTrue (If (Bool NE (CmpP ptr NULL)))) 398 // (IfFalse (If (Bool EQ (CmpP ptr NULL)))) 399 // NULL checks are always branch-if-eq. If we see a IfTrue projection 400 // then we are replacing a 'ne' test with a 'eq' NULL check test. 401 // We need to flip the projections to keep the same semantics. 402 if( proj->Opcode() == Op_IfTrue ) { 403 // Swap order of projections in basic block to swap branch targets 404 Node *tmp1 = block->get_node(block->end_idx()+1); 405 Node *tmp2 = block->get_node(block->end_idx()+2); 406 block->map_node(tmp2, block->end_idx()+1); 407 block->map_node(tmp1, block->end_idx()+2); 408 Node *tmp = new Node(C->top()); // Use not NULL input 409 tmp1->replace_by(tmp); 410 tmp2->replace_by(tmp1); 411 tmp->replace_by(tmp2); 412 tmp->destruct(); 413 } 414 415 // Remove the existing null check; use a new implicit null check instead. 416 // Since schedule-local needs precise def-use info, we need to correct 417 // it as well. 418 Node *old_tst = proj->in(0); 419 MachNode *nul_chk = new MachNullCheckNode(old_tst->in(0),best,bidx); 420 block->map_node(nul_chk, block->end_idx()); 421 map_node_to_block(nul_chk, block); 422 // Redirect users of old_test to nul_chk 423 for (DUIterator_Last i2min, i2 = old_tst->last_outs(i2min); i2 >= i2min; --i2) 424 old_tst->last_out(i2)->set_req(0, nul_chk); 425 // Clean-up any dead code 426 for (uint i3 = 0; i3 < old_tst->req(); i3++) { 427 Node* in = old_tst->in(i3); 428 old_tst->set_req(i3, NULL); 429 if (in->outcnt() == 0) { 430 // Remove dead input node 431 in->disconnect_inputs(NULL, C); 432 block->find_remove(in); 433 } 434 } 435 436 latency_from_uses(nul_chk); 437 latency_from_uses(best); 438 } 439 440 441 //------------------------------select----------------------------------------- 442 // Select a nice fellow from the worklist to schedule next. If there is only 443 // one choice, then use it. Projections take top priority for correctness 444 // reasons - if I see a projection, then it is next. There are a number of 445 // other special cases, for instructions that consume condition codes, et al. 446 // These are chosen immediately. Some instructions are required to immediately 447 // precede the last instruction in the block, and these are taken last. Of the 448 // remaining cases (most), choose the instruction with the greatest latency 449 // (that is, the most number of pseudo-cycles required to the end of the 450 // routine). If there is a tie, choose the instruction with the most inputs. 451 Node* PhaseCFG::select( 452 Block* block, 453 Node_List &worklist, 454 GrowableArray<int> &ready_cnt, 455 VectorSet &next_call, 456 uint sched_slot, 457 intptr_t* recalc_pressure_nodes) { 458 459 // If only a single entry on the stack, use it 460 uint cnt = worklist.size(); 461 if (cnt == 1) { 462 Node *n = worklist[0]; 463 worklist.map(0,worklist.pop()); 464 return n; 465 } 466 467 uint choice = 0; // Bigger is most important 468 uint latency = 0; // Bigger is scheduled first 469 uint score = 0; // Bigger is better 470 int idx = -1; // Index in worklist 471 int cand_cnt = 0; // Candidate count 472 bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false; 473 474 for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist 475 // Order in worklist is used to break ties. 476 // See caller for how this is used to delay scheduling 477 // of induction variable increments to after the other 478 // uses of the phi are scheduled. 479 Node *n = worklist[i]; // Get Node on worklist 480 481 int iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : 0; 482 if( n->is_Proj() || // Projections always win 483 n->Opcode()== Op_Con || // So does constant 'Top' 484 iop == Op_CreateEx || // Create-exception must start block 485 iop == Op_CheckCastPP 486 ) { 487 worklist.map(i,worklist.pop()); 488 return n; 489 } 490 491 // Final call in a block must be adjacent to 'catch' 492 Node *e = block->end(); 493 if( e->is_Catch() && e->in(0)->in(0) == n ) 494 continue; 495 496 // Memory op for an implicit null check has to be at the end of the block 497 if( e->is_MachNullCheck() && e->in(1) == n ) 498 continue; 499 500 // Schedule IV increment last. 501 if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Op_CountedLoopEnd && 502 e->in(1)->in(1) == n && n->is_iteratively_computed()) 503 continue; 504 505 uint n_choice = 2; 506 507 // See if this instruction is consumed by a branch. If so, then (as the 508 // branch is the last instruction in the basic block) force it to the 509 // end of the basic block 510 if ( must_clone[iop] ) { 511 // See if any use is a branch 512 bool found_machif = false; 513 514 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) { 515 Node* use = n->fast_out(j); 516 517 // The use is a conditional branch, make them adjacent 518 if (use->is_MachIf() && get_block_for_node(use) == block) { 519 found_machif = true; 520 break; 521 } 522 523 // More than this instruction pending for successor to be ready, 524 // don't choose this if other opportunities are ready 525 if (ready_cnt.at(use->_idx) > 1) 526 n_choice = 1; 527 } 528 529 // loop terminated, prefer not to use this instruction 530 if (found_machif) 531 continue; 532 } 533 534 // See if this has a predecessor that is "must_clone", i.e. sets the 535 // condition code. If so, choose this first 536 for (uint j = 0; j < n->req() ; j++) { 537 Node *inn = n->in(j); 538 if (inn) { 539 if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) { 540 n_choice = 3; 541 break; 542 } 543 } 544 } 545 546 // MachTemps should be scheduled last so they are near their uses 547 if (n->is_MachTemp()) { 548 n_choice = 1; 549 } 550 551 uint n_latency = get_latency_for_node(n); 552 uint n_score = n->req(); // Many inputs get high score to break ties 553 554 if (OptoRegScheduling && block_size_threshold_ok) { 555 if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) { 556 _regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit()); 557 _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit()); 558 // simulate the notion that we just picked this node to schedule 559 n->add_flag(Node::Flag_is_scheduled); 560 // now caculate its effect upon the graph if we did 561 adjust_register_pressure(n, block, recalc_pressure_nodes, false); 562 // return its state for finalize in case somebody else wins 563 n->remove_flag(Node::Flag_is_scheduled); 564 // now save the two final pressure components of register pressure, limiting pressure calcs to short size 565 short int_pressure = (short)_regalloc->_scratch_int_pressure.current_pressure(); 566 short float_pressure = (short)_regalloc->_scratch_float_pressure.current_pressure(); 567 recalc_pressure_nodes[n->_idx] = int_pressure; 568 recalc_pressure_nodes[n->_idx] |= (float_pressure << 16); 569 } 570 571 if (_scheduling_for_pressure) { 572 latency = n_latency; 573 if (n_choice != 3) { 574 // Now evaluate each register pressure component based on threshold in the score. 575 // In general the defining register type will dominate the score, ergo we will not see register pressure grow on both banks 576 // on a single instruction, but we might see it shrink on both banks. 577 // For each use of register that has a register class that is over the high pressure limit, we build n_score up for 578 // live ranges that terminate on this instruction. 579 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) { 580 short int_pressure = (short)recalc_pressure_nodes[n->_idx]; 581 n_score = (int_pressure < 0) ? ((score + n_score) - int_pressure) : (int_pressure > 0) ? 1 : n_score; 582 } 583 if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) { 584 short float_pressure = (short)(recalc_pressure_nodes[n->_idx] >> 16); 585 n_score = (float_pressure < 0) ? ((score + n_score) - float_pressure) : (float_pressure > 0) ? 1 : n_score; 586 } 587 } else { 588 // make sure we choose these candidates 589 score = 0; 590 } 591 } 592 } 593 594 // Keep best latency found 595 cand_cnt++; 596 if (choice < n_choice || 597 (choice == n_choice && 598 ((StressLCM && Compile::randomized_select(cand_cnt)) || 599 (!StressLCM && 600 (latency < n_latency || 601 (latency == n_latency && 602 (score < n_score))))))) { 603 choice = n_choice; 604 latency = n_latency; 605 score = n_score; 606 idx = i; // Also keep index in worklist 607 } 608 } // End of for all ready nodes in worklist 609 610 assert(idx >= 0, "index should be set"); 611 Node *n = worklist[(uint)idx]; // Get the winner 612 613 worklist.map((uint)idx, worklist.pop()); // Compress worklist 614 return n; 615 } 616 617 //-------------------------adjust_register_pressure---------------------------- 618 void PhaseCFG::adjust_register_pressure(Node* n, Block* block, intptr_t* recalc_pressure_nodes, bool finalize_mode) { 619 PhaseLive* liveinfo = _regalloc->get_live(); 620 IndexSet* liveout = liveinfo->live(block); 621 // first adjust the register pressure for the sources 622 for (uint i = 1; i < n->req(); i++) { 623 bool lrg_ends = false; 624 Node *src_n = n->in(i); 625 if (src_n == NULL) continue; 626 if (!src_n->is_Mach()) continue; 627 uint src = _regalloc->_lrg_map.find(src_n); 628 if (src == 0) continue; 629 LRG& lrg_src = _regalloc->lrgs(src); 630 // detect if the live range ends or not 631 if (liveout->member(src) == false) { 632 lrg_ends = true; 633 for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) { 634 Node* m = src_n->fast_out(j); // Get user 635 if (m == n) continue; 636 if (!m->is_Mach()) continue; 637 MachNode *mach = m->as_Mach(); 638 bool src_matches = false; 639 int iop = mach->ideal_Opcode(); 640 641 switch (iop) { 642 case Op_StoreB: 643 case Op_StoreC: 644 case Op_StoreCM: 645 case Op_StoreD: 646 case Op_StoreF: 647 case Op_StoreI: 648 case Op_StoreL: 649 case Op_StoreP: 650 case Op_StoreN: 651 case Op_StoreVector: 652 case Op_StoreNKlass: 653 for (uint k = 1; k < m->req(); k++) { 654 Node *in = m->in(k); 655 if (in == src_n) { 656 src_matches = true; 657 break; 658 } 659 } 660 break; 661 662 default: 663 src_matches = true; 664 break; 665 } 666 667 // If we have a store as our use, ignore the non source operands 668 if (src_matches == false) continue; 669 670 // Mark every unscheduled use which is not n with a recalculation 671 if ((get_block_for_node(m) == block) && (!m->is_scheduled())) { 672 if (finalize_mode && !m->is_Phi()) { 673 recalc_pressure_nodes[m->_idx] = 0x7fff7fff; 674 } 675 lrg_ends = false; 676 } 677 } 678 } 679 // if none, this live range ends and we can adjust register pressure 680 if (lrg_ends) { 681 if (finalize_mode) { 682 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure); 683 } else { 684 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure); 685 } 686 } 687 } 688 689 // now add the register pressure from the dest and evaluate which heuristic we should use: 690 // 1.) The default, latency scheduling 691 // 2.) Register pressure scheduling based on the high pressure limit threshold for int or float register stacks 692 uint dst = _regalloc->_lrg_map.find(n); 693 if (dst != 0) { 694 LRG& lrg_dst = _regalloc->lrgs(dst); 695 if (finalize_mode) { 696 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure); 697 // check to see if we fall over the register pressure cliff here 698 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) { 699 _scheduling_for_pressure = true; 700 } else if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) { 701 _scheduling_for_pressure = true; 702 } else { 703 // restore latency scheduling mode 704 _scheduling_for_pressure = false; 705 } 706 } else { 707 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure); 708 } 709 } 710 } 711 712 //------------------------------set_next_call---------------------------------- 713 void PhaseCFG::set_next_call(Block* block, Node* n, VectorSet& next_call) { 714 if( next_call.test_set(n->_idx) ) return; 715 for( uint i=0; i<n->len(); i++ ) { 716 Node *m = n->in(i); 717 if( !m ) continue; // must see all nodes in block that precede call 718 if (get_block_for_node(m) == block) { 719 set_next_call(block, m, next_call); 720 } 721 } 722 } 723 724 //------------------------------needed_for_next_call--------------------------- 725 // Set the flag 'next_call' for each Node that is needed for the next call to 726 // be scheduled. This flag lets me bias scheduling so Nodes needed for the 727 // next subroutine call get priority - basically it moves things NOT needed 728 // for the next call till after the call. This prevents me from trying to 729 // carry lots of stuff live across a call. 730 void PhaseCFG::needed_for_next_call(Block* block, Node* this_call, VectorSet& next_call) { 731 // Find the next control-defining Node in this block 732 Node* call = NULL; 733 for (DUIterator_Fast imax, i = this_call->fast_outs(imax); i < imax; i++) { 734 Node* m = this_call->fast_out(i); 735 if (get_block_for_node(m) == block && // Local-block user 736 m != this_call && // Not self-start node 737 m->is_MachCall()) { 738 call = m; 739 break; 740 } 741 } 742 if (call == NULL) return; // No next call (e.g., block end is near) 743 // Set next-call for all inputs to this call 744 set_next_call(block, call, next_call); 745 } 746 747 //------------------------------add_call_kills------------------------------------- 748 // helper function that adds caller save registers to MachProjNode 749 static void add_call_kills(MachProjNode *proj, RegMask& regs, const char* save_policy, bool exclude_soe) { 750 // Fill in the kill mask for the call 751 for( OptoReg::Name r = OptoReg::Name(0); r < _last_Mach_Reg; r=OptoReg::add(r,1) ) { 752 if( !regs.Member(r) ) { // Not already defined by the call 753 // Save-on-call register? 754 if ((save_policy[r] == 'C') || 755 (save_policy[r] == 'A') || 756 ((save_policy[r] == 'E') && exclude_soe)) { 757 proj->_rout.Insert(r); 758 } 759 } 760 } 761 } 762 763 764 //------------------------------sched_call------------------------------------- 765 uint PhaseCFG::sched_call(Block* block, uint node_cnt, Node_List& worklist, GrowableArray<int>& ready_cnt, MachCallNode* mcall, VectorSet& next_call) { 766 RegMask regs; 767 768 // Schedule all the users of the call right now. All the users are 769 // projection Nodes, so they must be scheduled next to the call. 770 // Collect all the defined registers. 771 for (DUIterator_Fast imax, i = mcall->fast_outs(imax); i < imax; i++) { 772 Node* n = mcall->fast_out(i); 773 assert( n->is_MachProj(), "" ); 774 int n_cnt = ready_cnt.at(n->_idx)-1; 775 ready_cnt.at_put(n->_idx, n_cnt); 776 assert( n_cnt == 0, "" ); 777 // Schedule next to call 778 block->map_node(n, node_cnt++); 779 // Collect defined registers 780 regs.OR(n->out_RegMask()); 781 // Check for scheduling the next control-definer 782 if( n->bottom_type() == Type::CONTROL ) 783 // Warm up next pile of heuristic bits 784 needed_for_next_call(block, n, next_call); 785 786 // Children of projections are now all ready 787 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) { 788 Node* m = n->fast_out(j); // Get user 789 if(get_block_for_node(m) != block) { 790 continue; 791 } 792 if( m->is_Phi() ) continue; 793 int m_cnt = ready_cnt.at(m->_idx) - 1; 794 ready_cnt.at_put(m->_idx, m_cnt); 795 if( m_cnt == 0 ) 796 worklist.push(m); 797 } 798 799 } 800 801 // Act as if the call defines the Frame Pointer. 802 // Certainly the FP is alive and well after the call. 803 regs.Insert(_matcher.c_frame_pointer()); 804 805 // Set all registers killed and not already defined by the call. 806 uint r_cnt = mcall->tf()->range()->cnt(); 807 int op = mcall->ideal_Opcode(); 808 MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj ); 809 map_node_to_block(proj, block); 810 block->insert_node(proj, node_cnt++); 811 812 // Select the right register save policy. 813 const char * save_policy; 814 switch (op) { 815 case Op_CallRuntime: 816 case Op_CallLeaf: 817 case Op_CallLeafNoFP: 818 // Calling C code so use C calling convention 819 save_policy = _matcher._c_reg_save_policy; 820 break; 821 822 case Op_CallStaticJava: 823 case Op_CallDynamicJava: 824 // Calling Java code so use Java calling convention 825 save_policy = _matcher._register_save_policy; 826 break; 827 828 default: 829 ShouldNotReachHere(); 830 } 831 832 // When using CallRuntime mark SOE registers as killed by the call 833 // so values that could show up in the RegisterMap aren't live in a 834 // callee saved register since the register wouldn't know where to 835 // find them. CallLeaf and CallLeafNoFP are ok because they can't 836 // have debug info on them. Strictly speaking this only needs to be 837 // done for oops since idealreg2debugmask takes care of debug info 838 // references but there no way to handle oops differently than other 839 // pointers as far as the kill mask goes. 840 bool exclude_soe = op == Op_CallRuntime; 841 842 // If the call is a MethodHandle invoke, we need to exclude the 843 // register which is used to save the SP value over MH invokes from 844 // the mask. Otherwise this register could be used for 845 // deoptimization information. 846 if (op == Op_CallStaticJava) { 847 MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall; 848 if (mcallstaticjava->_method_handle_invoke) 849 proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask()); 850 } 851 852 add_call_kills(proj, regs, save_policy, exclude_soe); 853 854 return node_cnt; 855 } 856 857 858 //------------------------------schedule_local--------------------------------- 859 // Topological sort within a block. Someday become a real scheduler. 860 bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) { 861 // Already "sorted" are the block start Node (as the first entry), and 862 // the block-ending Node and any trailing control projections. We leave 863 // these alone. PhiNodes and ParmNodes are made to follow the block start 864 // Node. Everything else gets topo-sorted. 865 866 #ifndef PRODUCT 867 if (trace_opto_pipelining()) { 868 tty->print_cr("# --- schedule_local B%d, before: ---", block->_pre_order); 869 for (uint i = 0;i < block->number_of_nodes(); i++) { 870 tty->print("# "); 871 block->get_node(i)->fast_dump(); 872 } 873 tty->print_cr("#"); 874 } 875 #endif 876 877 // RootNode is already sorted 878 if (block->number_of_nodes() == 1) { 879 return true; 880 } 881 882 bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false; 883 884 // We track the uses of local definitions as input dependences so that 885 // we know when a given instruction is avialable to be scheduled. 886 uint i; 887 if (OptoRegScheduling && block_size_threshold_ok) { 888 for (i = 1; i < block->number_of_nodes(); i++) { // setup nodes for pressure calc 889 Node *n = block->get_node(i); 890 n->remove_flag(Node::Flag_is_scheduled); 891 if (!n->is_Phi()) { 892 recalc_pressure_nodes[n->_idx] = 0x7fff7fff; 893 } 894 } 895 } 896 897 // Move PhiNodes and ParmNodes from 1 to cnt up to the start 898 uint node_cnt = block->end_idx(); 899 uint phi_cnt = 1; 900 for( i = 1; i<node_cnt; i++ ) { // Scan for Phi 901 Node *n = block->get_node(i); 902 if( n->is_Phi() || // Found a PhiNode or ParmNode 903 (n->is_Proj() && n->in(0) == block->head()) ) { 904 // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt 905 block->map_node(block->get_node(phi_cnt), i); 906 block->map_node(n, phi_cnt++); // swap Phi/Parm up front 907 if (OptoRegScheduling && block_size_threshold_ok) { 908 // mark n as scheduled 909 n->add_flag(Node::Flag_is_scheduled); 910 } 911 } else { // All others 912 // Count block-local inputs to 'n' 913 uint cnt = n->len(); // Input count 914 uint local = 0; 915 for( uint j=0; j<cnt; j++ ) { 916 Node *m = n->in(j); 917 if( m && get_block_for_node(m) == block && !m->is_top() ) 918 local++; // One more block-local input 919 } 920 ready_cnt.at_put(n->_idx, local); // Count em up 921 922 #ifdef ASSERT 923 if( UseConcMarkSweepGC || UseG1GC ) { 924 if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_StoreCM ) { 925 // Check the precedence edges 926 for (uint prec = n->req(); prec < n->len(); prec++) { 927 Node* oop_store = n->in(prec); 928 if (oop_store != NULL) { 929 assert(get_block_for_node(oop_store)->_dom_depth <= block->_dom_depth, "oop_store must dominate card-mark"); 930 } 931 } 932 } 933 } 934 #endif 935 936 // A few node types require changing a required edge to a precedence edge 937 // before allocation. 938 if( n->is_Mach() && n->req() > TypeFunc::Parms && 939 (n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire || 940 n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) { 941 // MemBarAcquire could be created without Precedent edge. 942 // del_req() replaces the specified edge with the last input edge 943 // and then removes the last edge. If the specified edge > number of 944 // edges the last edge will be moved outside of the input edges array 945 // and the edge will be lost. This is why this code should be 946 // executed only when Precedent (== TypeFunc::Parms) edge is present. 947 Node *x = n->in(TypeFunc::Parms); 948 n->del_req(TypeFunc::Parms); 949 n->add_prec(x); 950 } 951 } 952 } 953 for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count 954 ready_cnt.at_put(block->get_node(i2)->_idx, 0); 955 956 // All the prescheduled guys do not hold back internal nodes 957 uint i3; 958 for (i3 = 0; i3 < phi_cnt; i3++) { // For all pre-scheduled 959 Node *n = block->get_node(i3); // Get pre-scheduled 960 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) { 961 Node* m = n->fast_out(j); 962 if (get_block_for_node(m) == block) { // Local-block user 963 int m_cnt = ready_cnt.at(m->_idx)-1; 964 if (OptoRegScheduling && block_size_threshold_ok) { 965 // mark m as scheduled 966 if (m_cnt < 0) { 967 m->add_flag(Node::Flag_is_scheduled); 968 } 969 } 970 ready_cnt.at_put(m->_idx, m_cnt); // Fix ready count 971 } 972 } 973 } 974 975 Node_List delay; 976 // Make a worklist 977 Node_List worklist; 978 for(uint i4=i3; i4<node_cnt; i4++ ) { // Put ready guys on worklist 979 Node *m = block->get_node(i4); 980 if( !ready_cnt.at(m->_idx) ) { // Zero ready count? 981 if (m->is_iteratively_computed()) { 982 // Push induction variable increments last to allow other uses 983 // of the phi to be scheduled first. The select() method breaks 984 // ties in scheduling by worklist order. 985 delay.push(m); 986 } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) { 987 // Force the CreateEx to the top of the list so it's processed 988 // first and ends up at the start of the block. 989 worklist.insert(0, m); 990 } else { 991 worklist.push(m); // Then on to worklist! 992 } 993 } 994 } 995 while (delay.size()) { 996 Node* d = delay.pop(); 997 worklist.push(d); 998 } 999 1000 if (OptoRegScheduling && block_size_threshold_ok) { 1001 // To stage register pressure calculations we need to examine the live set variables 1002 // breaking them up by register class to compartmentalize the calculations. 1003 uint float_pressure = Matcher::float_pressure(FLOATPRESSURE); 1004 _regalloc->_sched_int_pressure.init(INTPRESSURE); 1005 _regalloc->_sched_float_pressure.init(float_pressure); 1006 _regalloc->_scratch_int_pressure.init(INTPRESSURE); 1007 _regalloc->_scratch_float_pressure.init(float_pressure); 1008 1009 _regalloc->compute_entry_block_pressure(block); 1010 } 1011 1012 // Warm up the 'next_call' heuristic bits 1013 needed_for_next_call(block, block->head(), next_call); 1014 1015 #ifndef PRODUCT 1016 if (trace_opto_pipelining()) { 1017 for (uint j=0; j< block->number_of_nodes(); j++) { 1018 Node *n = block->get_node(j); 1019 int idx = n->_idx; 1020 tty->print("# ready cnt:%3d ", ready_cnt.at(idx)); 1021 tty->print("latency:%3d ", get_latency_for_node(n)); 1022 tty->print("%4d: %s\n", idx, n->Name()); 1023 } 1024 } 1025 #endif 1026 1027 uint max_idx = (uint)ready_cnt.length(); 1028 // Pull from worklist and schedule 1029 while( worklist.size() ) { // Worklist is not ready 1030 1031 #ifndef PRODUCT 1032 if (trace_opto_pipelining()) { 1033 tty->print("# ready list:"); 1034 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist 1035 Node *n = worklist[i]; // Get Node on worklist 1036 tty->print(" %d", n->_idx); 1037 } 1038 tty->cr(); 1039 } 1040 #endif 1041 1042 // Select and pop a ready guy from worklist 1043 Node* n = select(block, worklist, ready_cnt, next_call, phi_cnt, recalc_pressure_nodes); 1044 block->map_node(n, phi_cnt++); // Schedule him next 1045 1046 if (OptoRegScheduling && block_size_threshold_ok) { 1047 n->add_flag(Node::Flag_is_scheduled); 1048 1049 // Now adjust the resister pressure with the node we selected 1050 if (!n->is_Phi()) { 1051 adjust_register_pressure(n, block, recalc_pressure_nodes, true); 1052 } 1053 } 1054 1055 #ifndef PRODUCT 1056 if (trace_opto_pipelining()) { 1057 tty->print("# select %d: %s", n->_idx, n->Name()); 1058 tty->print(", latency:%d", get_latency_for_node(n)); 1059 n->dump(); 1060 if (Verbose) { 1061 tty->print("# ready list:"); 1062 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist 1063 Node *n = worklist[i]; // Get Node on worklist 1064 tty->print(" %d", n->_idx); 1065 } 1066 tty->cr(); 1067 } 1068 } 1069 1070 #endif 1071 if( n->is_MachCall() ) { 1072 MachCallNode *mcall = n->as_MachCall(); 1073 phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call); 1074 continue; 1075 } 1076 1077 if (n->is_Mach() && n->as_Mach()->has_call()) { 1078 RegMask regs; 1079 regs.Insert(_matcher.c_frame_pointer()); 1080 regs.OR(n->out_RegMask()); 1081 1082 MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj ); 1083 map_node_to_block(proj, block); 1084 block->insert_node(proj, phi_cnt++); 1085 1086 add_call_kills(proj, regs, _matcher._c_reg_save_policy, false); 1087 } 1088 1089 // Children are now all ready 1090 for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) { 1091 Node* m = n->fast_out(i5); // Get user 1092 if (get_block_for_node(m) != block) { 1093 continue; 1094 } 1095 if( m->is_Phi() ) continue; 1096 if (m->_idx >= max_idx) { // new node, skip it 1097 assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types"); 1098 continue; 1099 } 1100 int m_cnt = ready_cnt.at(m->_idx) - 1; 1101 ready_cnt.at_put(m->_idx, m_cnt); 1102 if( m_cnt == 0 ) 1103 worklist.push(m); 1104 } 1105 } 1106 1107 if( phi_cnt != block->end_idx() ) { 1108 // did not schedule all. Retry, Bailout, or Die 1109 if (C->subsume_loads() == true && !C->failing()) { 1110 // Retry with subsume_loads == false 1111 // If this is the first failure, the sentinel string will "stick" 1112 // to the Compile object, and the C2Compiler will see it and retry. 1113 C->record_failure(C2Compiler::retry_no_subsuming_loads()); 1114 } 1115 // assert( phi_cnt == end_idx(), "did not schedule all" ); 1116 return false; 1117 } 1118 1119 if (OptoRegScheduling && block_size_threshold_ok) { 1120 _regalloc->compute_exit_block_pressure(block); 1121 block->_reg_pressure = _regalloc->_sched_int_pressure.final_pressure(); 1122 block->_freg_pressure = _regalloc->_sched_float_pressure.final_pressure(); 1123 } 1124 1125 #ifndef PRODUCT 1126 if (trace_opto_pipelining()) { 1127 tty->print_cr("#"); 1128 tty->print_cr("# after schedule_local"); 1129 for (uint i = 0;i < block->number_of_nodes();i++) { 1130 tty->print("# "); 1131 block->get_node(i)->fast_dump(); 1132 } 1133 tty->print_cr("# "); 1134 1135 if (OptoRegScheduling && block_size_threshold_ok) { 1136 tty->print_cr("# pressure info : %d", block->_pre_order); 1137 _regalloc->print_pressure_info(_regalloc->_sched_int_pressure, "int register info"); 1138 _regalloc->print_pressure_info(_regalloc->_sched_float_pressure, "float register info"); 1139 } 1140 tty->cr(); 1141 } 1142 #endif 1143 1144 return true; 1145 } 1146 1147 //--------------------------catch_cleanup_fix_all_inputs----------------------- 1148 static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) { 1149 for (uint l = 0; l < use->len(); l++) { 1150 if (use->in(l) == old_def) { 1151 if (l < use->req()) { 1152 use->set_req(l, new_def); 1153 } else { 1154 use->rm_prec(l); 1155 use->add_prec(new_def); 1156 l--; 1157 } 1158 } 1159 } 1160 } 1161 1162 //------------------------------catch_cleanup_find_cloned_def------------------ 1163 Node* PhaseCFG::catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) { 1164 assert( use_blk != def_blk, "Inter-block cleanup only"); 1165 1166 // The use is some block below the Catch. Find and return the clone of the def 1167 // that dominates the use. If there is no clone in a dominating block, then 1168 // create a phi for the def in a dominating block. 1169 1170 // Find which successor block dominates this use. The successor 1171 // blocks must all be single-entry (from the Catch only; I will have 1172 // split blocks to make this so), hence they all dominate. 1173 while( use_blk->_dom_depth > def_blk->_dom_depth+1 ) 1174 use_blk = use_blk->_idom; 1175 1176 // Find the successor 1177 Node *fixup = NULL; 1178 1179 uint j; 1180 for( j = 0; j < def_blk->_num_succs; j++ ) 1181 if( use_blk == def_blk->_succs[j] ) 1182 break; 1183 1184 if( j == def_blk->_num_succs ) { 1185 // Block at same level in dom-tree is not a successor. It needs a 1186 // PhiNode, the PhiNode uses from the def and IT's uses need fixup. 1187 Node_Array inputs = new Node_List(Thread::current()->resource_area()); 1188 for(uint k = 1; k < use_blk->num_preds(); k++) { 1189 Block* block = get_block_for_node(use_blk->pred(k)); 1190 inputs.map(k, catch_cleanup_find_cloned_def(block, def, def_blk, n_clone_idx)); 1191 } 1192 1193 // Check to see if the use_blk already has an identical phi inserted. 1194 // If it exists, it will be at the first position since all uses of a 1195 // def are processed together. 1196 Node *phi = use_blk->get_node(1); 1197 if( phi->is_Phi() ) { 1198 fixup = phi; 1199 for (uint k = 1; k < use_blk->num_preds(); k++) { 1200 if (phi->in(k) != inputs[k]) { 1201 // Not a match 1202 fixup = NULL; 1203 break; 1204 } 1205 } 1206 } 1207 1208 // If an existing PhiNode was not found, make a new one. 1209 if (fixup == NULL) { 1210 Node *new_phi = PhiNode::make(use_blk->head(), def); 1211 use_blk->insert_node(new_phi, 1); 1212 map_node_to_block(new_phi, use_blk); 1213 for (uint k = 1; k < use_blk->num_preds(); k++) { 1214 new_phi->set_req(k, inputs[k]); 1215 } 1216 fixup = new_phi; 1217 } 1218 1219 } else { 1220 // Found the use just below the Catch. Make it use the clone. 1221 fixup = use_blk->get_node(n_clone_idx); 1222 } 1223 1224 return fixup; 1225 } 1226 1227 //--------------------------catch_cleanup_intra_block-------------------------- 1228 // Fix all input edges in use that reference "def". The use is in the same 1229 // block as the def and both have been cloned in each successor block. 1230 static void catch_cleanup_intra_block(Node *use, Node *def, Block *blk, int beg, int n_clone_idx) { 1231 1232 // Both the use and def have been cloned. For each successor block, 1233 // get the clone of the use, and make its input the clone of the def 1234 // found in that block. 1235 1236 uint use_idx = blk->find_node(use); 1237 uint offset_idx = use_idx - beg; 1238 for( uint k = 0; k < blk->_num_succs; k++ ) { 1239 // Get clone in each successor block 1240 Block *sb = blk->_succs[k]; 1241 Node *clone = sb->get_node(offset_idx+1); 1242 assert( clone->Opcode() == use->Opcode(), "" ); 1243 1244 // Make use-clone reference the def-clone 1245 catch_cleanup_fix_all_inputs(clone, def, sb->get_node(n_clone_idx)); 1246 } 1247 } 1248 1249 //------------------------------catch_cleanup_inter_block--------------------- 1250 // Fix all input edges in use that reference "def". The use is in a different 1251 // block than the def. 1252 void PhaseCFG::catch_cleanup_inter_block(Node *use, Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) { 1253 if( !use_blk ) return; // Can happen if the use is a precedence edge 1254 1255 Node *new_def = catch_cleanup_find_cloned_def(use_blk, def, def_blk, n_clone_idx); 1256 catch_cleanup_fix_all_inputs(use, def, new_def); 1257 } 1258 1259 //------------------------------call_catch_cleanup----------------------------- 1260 // If we inserted any instructions between a Call and his CatchNode, 1261 // clone the instructions on all paths below the Catch. 1262 void PhaseCFG::call_catch_cleanup(Block* block) { 1263 1264 // End of region to clone 1265 uint end = block->end_idx(); 1266 if( !block->get_node(end)->is_Catch() ) return; 1267 // Start of region to clone 1268 uint beg = end; 1269 while(!block->get_node(beg-1)->is_MachProj() || 1270 !block->get_node(beg-1)->in(0)->is_MachCall() ) { 1271 beg--; 1272 assert(beg > 0,"Catch cleanup walking beyond block boundary"); 1273 } 1274 // Range of inserted instructions is [beg, end) 1275 if( beg == end ) return; 1276 1277 // Clone along all Catch output paths. Clone area between the 'beg' and 1278 // 'end' indices. 1279 for( uint i = 0; i < block->_num_succs; i++ ) { 1280 Block *sb = block->_succs[i]; 1281 // Clone the entire area; ignoring the edge fixup for now. 1282 for( uint j = end; j > beg; j-- ) { 1283 // It is safe here to clone a node with anti_dependence 1284 // since clones dominate on each path. 1285 Node *clone = block->get_node(j-1)->clone(); 1286 sb->insert_node(clone, 1); 1287 map_node_to_block(clone, sb); 1288 } 1289 } 1290 1291 1292 // Fixup edges. Check the def-use info per cloned Node 1293 for(uint i2 = beg; i2 < end; i2++ ) { 1294 uint n_clone_idx = i2-beg+1; // Index of clone of n in each successor block 1295 Node *n = block->get_node(i2); // Node that got cloned 1296 // Need DU safe iterator because of edge manipulation in calls. 1297 Unique_Node_List *out = new Unique_Node_List(Thread::current()->resource_area()); 1298 for (DUIterator_Fast j1max, j1 = n->fast_outs(j1max); j1 < j1max; j1++) { 1299 out->push(n->fast_out(j1)); 1300 } 1301 uint max = out->size(); 1302 for (uint j = 0; j < max; j++) {// For all users 1303 Node *use = out->pop(); 1304 Block *buse = get_block_for_node(use); 1305 if( use->is_Phi() ) { 1306 for( uint k = 1; k < use->req(); k++ ) 1307 if( use->in(k) == n ) { 1308 Block* b = get_block_for_node(buse->pred(k)); 1309 Node *fixup = catch_cleanup_find_cloned_def(b, n, block, n_clone_idx); 1310 use->set_req(k, fixup); 1311 } 1312 } else { 1313 if (block == buse) { 1314 catch_cleanup_intra_block(use, n, block, beg, n_clone_idx); 1315 } else { 1316 catch_cleanup_inter_block(use, buse, n, block, n_clone_idx); 1317 } 1318 } 1319 } // End for all users 1320 1321 } // End of for all Nodes in cloned area 1322 1323 // Remove the now-dead cloned ops 1324 for(uint i3 = beg; i3 < end; i3++ ) { 1325 block->get_node(beg)->disconnect_inputs(NULL, C); 1326 block->remove_node(beg); 1327 } 1328 1329 // If the successor blocks have a CreateEx node, move it back to the top 1330 for(uint i4 = 0; i4 < block->_num_succs; i4++ ) { 1331 Block *sb = block->_succs[i4]; 1332 uint new_cnt = end - beg; 1333 // Remove any newly created, but dead, nodes. 1334 for( uint j = new_cnt; j > 0; j-- ) { 1335 Node *n = sb->get_node(j); 1336 if (n->outcnt() == 0 && 1337 (!n->is_Proj() || n->as_Proj()->in(0)->outcnt() == 1) ){ 1338 n->disconnect_inputs(NULL, C); 1339 sb->remove_node(j); 1340 new_cnt--; 1341 } 1342 } 1343 // If any newly created nodes remain, move the CreateEx node to the top 1344 if (new_cnt > 0) { 1345 Node *cex = sb->get_node(1+new_cnt); 1346 if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Op_CreateEx ) { 1347 sb->remove_node(1+new_cnt); 1348 sb->insert_node(cex, 1); 1349 } 1350 } 1351 } 1352 }