1 /* 2 * Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "c1/c1_InstructionPrinter.hpp" 27 #include "c1/c1_LIR.hpp" 28 #include "c1/c1_LIRAssembler.hpp" 29 #include "c1/c1_ValueStack.hpp" 30 #include "ci/ciInstance.hpp" 31 #include "runtime/sharedRuntime.hpp" 32 33 Register LIR_OprDesc::as_register() const { 34 return FrameMap::cpu_rnr2reg(cpu_regnr()); 35 } 36 37 Register LIR_OprDesc::as_register_lo() const { 38 return FrameMap::cpu_rnr2reg(cpu_regnrLo()); 39 } 40 41 Register LIR_OprDesc::as_register_hi() const { 42 return FrameMap::cpu_rnr2reg(cpu_regnrHi()); 43 } 44 45 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal(); 46 47 LIR_Opr LIR_OprFact::value_type(ValueType* type) { 48 ValueTag tag = type->tag(); 49 switch (tag) { 50 case metaDataTag : { 51 ClassConstant* c = type->as_ClassConstant(); 52 if (c != NULL && !c->value()->is_loaded()) { 53 return LIR_OprFact::metadataConst(NULL); 54 } else if (c != NULL) { 55 return LIR_OprFact::metadataConst(c->value()->constant_encoding()); 56 } else { 57 MethodConstant* m = type->as_MethodConstant(); 58 assert (m != NULL, "not a class or a method?"); 59 return LIR_OprFact::metadataConst(m->value()->constant_encoding()); 60 } 61 } 62 case objectTag : { 63 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding()); 64 } 65 case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value()); 66 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value()); 67 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value()); 68 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value()); 69 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value()); 70 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1); 71 } 72 } 73 74 75 LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) { 76 switch (type->tag()) { 77 case objectTag: return LIR_OprFact::oopConst(NULL); 78 case addressTag:return LIR_OprFact::addressConst(0); 79 case intTag: return LIR_OprFact::intConst(0); 80 case floatTag: return LIR_OprFact::floatConst(0.0); 81 case longTag: return LIR_OprFact::longConst(0); 82 case doubleTag: return LIR_OprFact::doubleConst(0.0); 83 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1); 84 } 85 return illegalOpr; 86 } 87 88 89 90 //--------------------------------------------------- 91 92 93 LIR_Address::Scale LIR_Address::scale(BasicType type) { 94 int elem_size = type2aelembytes(type); 95 switch (elem_size) { 96 case 1: return LIR_Address::times_1; 97 case 2: return LIR_Address::times_2; 98 case 4: return LIR_Address::times_4; 99 case 8: return LIR_Address::times_8; 100 } 101 ShouldNotReachHere(); 102 return LIR_Address::times_1; 103 } 104 105 //--------------------------------------------------- 106 107 char LIR_OprDesc::type_char(BasicType t) { 108 switch (t) { 109 case T_ARRAY: 110 case T_VALUETYPE: 111 t = T_OBJECT; 112 case T_BOOLEAN: 113 case T_CHAR: 114 case T_FLOAT: 115 case T_DOUBLE: 116 case T_BYTE: 117 case T_SHORT: 118 case T_INT: 119 case T_LONG: 120 case T_OBJECT: 121 case T_ADDRESS: 122 case T_VOID: 123 return ::type2char(t); 124 case T_METADATA: 125 return 'M'; 126 case T_ILLEGAL: 127 return '?'; 128 129 default: 130 ShouldNotReachHere(); 131 return '?'; 132 } 133 } 134 135 #ifndef PRODUCT 136 void LIR_OprDesc::validate_type() const { 137 138 #ifdef ASSERT 139 if (!is_pointer() && !is_illegal()) { 140 OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160 141 switch (as_BasicType(type_field())) { 142 case T_LONG: 143 assert((kindfield == cpu_register || kindfield == stack_value) && 144 size_field() == double_size, "must match"); 145 break; 146 case T_FLOAT: 147 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI) 148 assert((kindfield == fpu_register || kindfield == stack_value 149 ARM_ONLY(|| kindfield == cpu_register) 150 PPC32_ONLY(|| kindfield == cpu_register) ) && 151 size_field() == single_size, "must match"); 152 break; 153 case T_DOUBLE: 154 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI) 155 assert((kindfield == fpu_register || kindfield == stack_value 156 ARM_ONLY(|| kindfield == cpu_register) 157 PPC32_ONLY(|| kindfield == cpu_register) ) && 158 size_field() == double_size, "must match"); 159 break; 160 case T_BOOLEAN: 161 case T_CHAR: 162 case T_BYTE: 163 case T_SHORT: 164 case T_INT: 165 case T_ADDRESS: 166 case T_OBJECT: 167 case T_METADATA: 168 case T_ARRAY: 169 case T_VALUETYPE: 170 assert((kindfield == cpu_register || kindfield == stack_value) && 171 size_field() == single_size, "must match"); 172 break; 173 174 case T_ILLEGAL: 175 // XXX TKR also means unknown right now 176 // assert(is_illegal(), "must match"); 177 break; 178 179 default: 180 ShouldNotReachHere(); 181 } 182 } 183 #endif 184 185 } 186 #endif // PRODUCT 187 188 189 bool LIR_OprDesc::is_oop() const { 190 if (is_pointer()) { 191 return pointer()->is_oop_pointer(); 192 } else { 193 OprType t= type_field(); 194 assert(t != unknown_type, "not set"); 195 return t == object_type; 196 } 197 } 198 199 200 201 void LIR_Op2::verify() const { 202 #ifdef ASSERT 203 switch (code()) { 204 case lir_cmove: 205 case lir_xchg: 206 break; 207 208 default: 209 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(), 210 "can't produce oops from arith"); 211 } 212 213 if (TwoOperandLIRForm) { 214 215 #ifdef ASSERT 216 bool threeOperandForm = false; 217 #ifdef S390 218 // There are 3 operand shifts on S390 (see LIR_Assembler::shift_op()). 219 threeOperandForm = 220 code() == lir_shl || 221 ((code() == lir_shr || code() == lir_ushr) && (result_opr()->is_double_cpu() || in_opr1()->type() == T_OBJECT)); 222 #endif 223 #endif 224 225 switch (code()) { 226 case lir_add: 227 case lir_sub: 228 case lir_mul: 229 case lir_mul_strictfp: 230 case lir_div: 231 case lir_div_strictfp: 232 case lir_rem: 233 case lir_logic_and: 234 case lir_logic_or: 235 case lir_logic_xor: 236 case lir_shl: 237 case lir_shr: 238 assert(in_opr1() == result_opr() || threeOperandForm, "opr1 and result must match"); 239 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid"); 240 break; 241 242 // special handling for lir_ushr because of write barriers 243 case lir_ushr: 244 assert(in_opr1() == result_opr() || in_opr2()->is_constant() || threeOperandForm, "opr1 and result must match or shift count is constant"); 245 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid"); 246 break; 247 248 default: 249 break; 250 } 251 } 252 #endif 253 } 254 255 256 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block) 257 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) 258 , _cond(cond) 259 , _type(type) 260 , _label(block->label()) 261 , _block(block) 262 , _ublock(NULL) 263 , _stub(NULL) { 264 } 265 266 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) : 267 LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) 268 , _cond(cond) 269 , _type(type) 270 , _label(stub->entry()) 271 , _block(NULL) 272 , _ublock(NULL) 273 , _stub(stub) { 274 } 275 276 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock) 277 : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) 278 , _cond(cond) 279 , _type(type) 280 , _label(block->label()) 281 , _block(block) 282 , _ublock(ublock) 283 , _stub(NULL) 284 { 285 } 286 287 void LIR_OpBranch::change_block(BlockBegin* b) { 288 assert(_block != NULL, "must have old block"); 289 assert(_block->label() == label(), "must be equal"); 290 291 _block = b; 292 _label = b->label(); 293 } 294 295 void LIR_OpBranch::change_ublock(BlockBegin* b) { 296 assert(_ublock != NULL, "must have old block"); 297 _ublock = b; 298 } 299 300 void LIR_OpBranch::negate_cond() { 301 switch (_cond) { 302 case lir_cond_equal: _cond = lir_cond_notEqual; break; 303 case lir_cond_notEqual: _cond = lir_cond_equal; break; 304 case lir_cond_less: _cond = lir_cond_greaterEqual; break; 305 case lir_cond_lessEqual: _cond = lir_cond_greater; break; 306 case lir_cond_greaterEqual: _cond = lir_cond_less; break; 307 case lir_cond_greater: _cond = lir_cond_lessEqual; break; 308 default: ShouldNotReachHere(); 309 } 310 } 311 312 313 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass, 314 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, 315 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, 316 CodeStub* stub, bool need_null_check) 317 318 : LIR_Op(code, result, NULL) 319 , _object(object) 320 , _array(LIR_OprFact::illegalOpr) 321 , _klass(klass) 322 , _tmp1(tmp1) 323 , _tmp2(tmp2) 324 , _tmp3(tmp3) 325 , _fast_check(fast_check) 326 , _info_for_patch(info_for_patch) 327 , _info_for_exception(info_for_exception) 328 , _stub(stub) 329 , _profiled_method(NULL) 330 , _profiled_bci(-1) 331 , _should_profile(false) 332 , _need_null_check(need_null_check) 333 { 334 if (code == lir_checkcast) { 335 assert(info_for_exception != NULL, "checkcast throws exceptions"); 336 } else if (code == lir_instanceof) { 337 assert(info_for_exception == NULL, "instanceof throws no exceptions"); 338 } else { 339 ShouldNotReachHere(); 340 } 341 } 342 343 344 345 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception) 346 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) 347 , _object(object) 348 , _array(array) 349 , _klass(NULL) 350 , _tmp1(tmp1) 351 , _tmp2(tmp2) 352 , _tmp3(tmp3) 353 , _fast_check(false) 354 , _info_for_patch(NULL) 355 , _info_for_exception(info_for_exception) 356 , _stub(NULL) 357 , _profiled_method(NULL) 358 , _profiled_bci(-1) 359 , _should_profile(false) 360 , _need_null_check(true) 361 { 362 if (code == lir_store_check) { 363 _stub = new ArrayStoreExceptionStub(object, info_for_exception); 364 assert(info_for_exception != NULL, "store_check throws exceptions"); 365 } else { 366 ShouldNotReachHere(); 367 } 368 } 369 370 LIR_OpFlattenedStoreCheck::LIR_OpFlattenedStoreCheck(LIR_Opr object, ciKlass* element_klass, 371 LIR_Opr tmp1, LIR_Opr tmp2, 372 CodeEmitInfo* info_for_exception) 373 : LIR_Op(lir_flattened_store_check, LIR_OprFact::illegalOpr, NULL) 374 , _object(object) 375 , _element_klass(element_klass) 376 , _tmp1(tmp1) 377 , _tmp2(tmp2) 378 , _info_for_exception(info_for_exception) 379 { 380 _stub = new ArrayStoreExceptionStub(object, info_for_exception); 381 } 382 383 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, 384 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) 385 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info) 386 , _src(src) 387 , _src_pos(src_pos) 388 , _dst(dst) 389 , _dst_pos(dst_pos) 390 , _length(length) 391 , _tmp(tmp) 392 , _expected_type(expected_type) 393 , _flags(flags) { 394 _stub = new ArrayCopyStub(this); 395 } 396 397 LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res) 398 : LIR_Op(lir_updatecrc32, res, NULL) 399 , _crc(crc) 400 , _val(val) { 401 } 402 403 //-------------------verify-------------------------- 404 405 void LIR_Op1::verify() const { 406 switch(code()) { 407 case lir_move: 408 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be"); 409 break; 410 case lir_null_check: 411 assert(in_opr()->is_register(), "must be"); 412 break; 413 case lir_return: 414 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be"); 415 break; 416 default: 417 break; 418 } 419 } 420 421 void LIR_OpRTCall::verify() const { 422 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function"); 423 } 424 425 //-------------------visits-------------------------- 426 427 // complete rework of LIR instruction visitor. 428 // The virtual call for each instruction type is replaced by a big 429 // switch that adds the operands for each instruction 430 431 void LIR_OpVisitState::visit(LIR_Op* op) { 432 // copy information from the LIR_Op 433 reset(); 434 set_op(op); 435 436 switch (op->code()) { 437 438 // LIR_Op0 439 case lir_word_align: // result and info always invalid 440 case lir_backwardbranch_target: // result and info always invalid 441 case lir_build_frame: // result and info always invalid 442 case lir_fpop_raw: // result and info always invalid 443 case lir_24bit_FPU: // result and info always invalid 444 case lir_reset_FPU: // result and info always invalid 445 case lir_breakpoint: // result and info always invalid 446 case lir_membar: // result and info always invalid 447 case lir_membar_acquire: // result and info always invalid 448 case lir_membar_release: // result and info always invalid 449 case lir_membar_loadload: // result and info always invalid 450 case lir_membar_storestore: // result and info always invalid 451 case lir_membar_loadstore: // result and info always invalid 452 case lir_membar_storeload: // result and info always invalid 453 case lir_on_spin_wait: 454 { 455 assert(op->as_Op0() != NULL, "must be"); 456 assert(op->_info == NULL, "info not used by this instruction"); 457 assert(op->_result->is_illegal(), "not used"); 458 break; 459 } 460 461 case lir_nop: // may have info, result always invalid 462 case lir_std_entry: // may have result, info always invalid 463 case lir_osr_entry: // may have result, info always invalid 464 case lir_get_thread: // may have result, info always invalid 465 { 466 assert(op->as_Op0() != NULL, "must be"); 467 if (op->_info != NULL) do_info(op->_info); 468 if (op->_result->is_valid()) do_output(op->_result); 469 break; 470 } 471 472 473 // LIR_OpLabel 474 case lir_label: // result and info always invalid 475 { 476 assert(op->as_OpLabel() != NULL, "must be"); 477 assert(op->_info == NULL, "info not used by this instruction"); 478 assert(op->_result->is_illegal(), "not used"); 479 break; 480 } 481 482 483 // LIR_Op1 484 case lir_fxch: // input always valid, result and info always invalid 485 case lir_fld: // input always valid, result and info always invalid 486 case lir_ffree: // input always valid, result and info always invalid 487 case lir_push: // input always valid, result and info always invalid 488 case lir_pop: // input always valid, result and info always invalid 489 case lir_return: // input always valid, result and info always invalid 490 case lir_leal: // input and result always valid, info always invalid 491 case lir_monaddr: // input and result always valid, info always invalid 492 case lir_null_check: // input and info always valid, result always invalid 493 case lir_move: // input and result always valid, may have info 494 case lir_pack64: // input and result always valid 495 case lir_unpack64: // input and result always valid 496 { 497 assert(op->as_Op1() != NULL, "must be"); 498 LIR_Op1* op1 = (LIR_Op1*)op; 499 500 if (op1->_info) do_info(op1->_info); 501 if (op1->_opr->is_valid()) do_input(op1->_opr); 502 if (op1->_result->is_valid()) do_output(op1->_result); 503 504 break; 505 } 506 507 case lir_safepoint: 508 { 509 assert(op->as_Op1() != NULL, "must be"); 510 LIR_Op1* op1 = (LIR_Op1*)op; 511 512 assert(op1->_info != NULL, ""); do_info(op1->_info); 513 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register 514 assert(op1->_result->is_illegal(), "safepoint does not produce value"); 515 516 break; 517 } 518 519 // LIR_OpConvert; 520 case lir_convert: // input and result always valid, info always invalid 521 { 522 assert(op->as_OpConvert() != NULL, "must be"); 523 LIR_OpConvert* opConvert = (LIR_OpConvert*)op; 524 525 assert(opConvert->_info == NULL, "must be"); 526 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr); 527 if (opConvert->_result->is_valid()) do_output(opConvert->_result); 528 #ifdef PPC32 529 if (opConvert->_tmp1->is_valid()) do_temp(opConvert->_tmp1); 530 if (opConvert->_tmp2->is_valid()) do_temp(opConvert->_tmp2); 531 #endif 532 do_stub(opConvert->_stub); 533 534 break; 535 } 536 537 // LIR_OpBranch; 538 case lir_branch: // may have info, input and result register always invalid 539 case lir_cond_float_branch: // may have info, input and result register always invalid 540 { 541 assert(op->as_OpBranch() != NULL, "must be"); 542 LIR_OpBranch* opBranch = (LIR_OpBranch*)op; 543 544 if (opBranch->_info != NULL) do_info(opBranch->_info); 545 assert(opBranch->_result->is_illegal(), "not used"); 546 if (opBranch->_stub != NULL) opBranch->stub()->visit(this); 547 548 break; 549 } 550 551 552 // LIR_OpAllocObj 553 case lir_alloc_object: 554 { 555 assert(op->as_OpAllocObj() != NULL, "must be"); 556 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op; 557 558 if (opAllocObj->_info) do_info(opAllocObj->_info); 559 if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr); 560 do_temp(opAllocObj->_opr); 561 } 562 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1); 563 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2); 564 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3); 565 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4); 566 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result); 567 do_stub(opAllocObj->_stub); 568 break; 569 } 570 571 572 // LIR_OpRoundFP; 573 case lir_roundfp: { 574 assert(op->as_OpRoundFP() != NULL, "must be"); 575 LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op; 576 577 assert(op->_info == NULL, "info not used by this instruction"); 578 assert(opRoundFP->_tmp->is_illegal(), "not used"); 579 do_input(opRoundFP->_opr); 580 do_output(opRoundFP->_result); 581 582 break; 583 } 584 585 586 // LIR_Op2 587 case lir_cmp: 588 case lir_cmp_l2i: 589 case lir_ucmp_fd2i: 590 case lir_cmp_fd2i: 591 case lir_add: 592 case lir_sub: 593 case lir_mul: 594 case lir_div: 595 case lir_rem: 596 case lir_sqrt: 597 case lir_abs: 598 case lir_neg: 599 case lir_logic_and: 600 case lir_logic_or: 601 case lir_logic_xor: 602 case lir_shl: 603 case lir_shr: 604 case lir_ushr: 605 case lir_xadd: 606 case lir_xchg: 607 case lir_assert: 608 { 609 assert(op->as_Op2() != NULL, "must be"); 610 LIR_Op2* op2 = (LIR_Op2*)op; 611 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() && 612 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); 613 614 if (op2->_info) do_info(op2->_info); 615 if (op2->_opr1->is_valid()) do_input(op2->_opr1); 616 if (op2->_opr2->is_valid()) do_input(op2->_opr2); 617 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1); 618 if (op2->_result->is_valid()) do_output(op2->_result); 619 if (op->code() == lir_xchg || op->code() == lir_xadd) { 620 // on ARM and PPC, return value is loaded first so could 621 // destroy inputs. On other platforms that implement those 622 // (x86, sparc), the extra constrainsts are harmless. 623 if (op2->_opr1->is_valid()) do_temp(op2->_opr1); 624 if (op2->_opr2->is_valid()) do_temp(op2->_opr2); 625 } 626 627 break; 628 } 629 630 // special handling for cmove: right input operand must not be equal 631 // to the result operand, otherwise the backend fails 632 case lir_cmove: 633 { 634 assert(op->as_Op2() != NULL, "must be"); 635 LIR_Op2* op2 = (LIR_Op2*)op; 636 637 assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() && 638 op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); 639 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used"); 640 641 do_input(op2->_opr1); 642 do_input(op2->_opr2); 643 do_temp(op2->_opr2); 644 do_output(op2->_result); 645 646 break; 647 } 648 649 // vspecial handling for strict operations: register input operands 650 // as temp to guarantee that they do not overlap with other 651 // registers 652 case lir_mul_strictfp: 653 case lir_div_strictfp: 654 { 655 assert(op->as_Op2() != NULL, "must be"); 656 LIR_Op2* op2 = (LIR_Op2*)op; 657 658 assert(op2->_info == NULL, "not used"); 659 assert(op2->_opr1->is_valid(), "used"); 660 assert(op2->_opr2->is_valid(), "used"); 661 assert(op2->_result->is_valid(), "used"); 662 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() && 663 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); 664 665 do_input(op2->_opr1); do_temp(op2->_opr1); 666 do_input(op2->_opr2); do_temp(op2->_opr2); 667 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1); 668 do_output(op2->_result); 669 670 break; 671 } 672 673 case lir_throw: { 674 assert(op->as_Op2() != NULL, "must be"); 675 LIR_Op2* op2 = (LIR_Op2*)op; 676 677 if (op2->_info) do_info(op2->_info); 678 if (op2->_opr1->is_valid()) do_temp(op2->_opr1); 679 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter 680 assert(op2->_result->is_illegal(), "no result"); 681 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() && 682 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); 683 684 break; 685 } 686 687 case lir_unwind: { 688 assert(op->as_Op1() != NULL, "must be"); 689 LIR_Op1* op1 = (LIR_Op1*)op; 690 691 assert(op1->_info == NULL, "no info"); 692 assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr); 693 assert(op1->_result->is_illegal(), "no result"); 694 695 break; 696 } 697 698 // LIR_Op3 699 case lir_idiv: 700 case lir_irem: { 701 assert(op->as_Op3() != NULL, "must be"); 702 LIR_Op3* op3= (LIR_Op3*)op; 703 704 if (op3->_info) do_info(op3->_info); 705 if (op3->_opr1->is_valid()) do_input(op3->_opr1); 706 707 // second operand is input and temp, so ensure that second operand 708 // and third operand get not the same register 709 if (op3->_opr2->is_valid()) do_input(op3->_opr2); 710 if (op3->_opr2->is_valid()) do_temp(op3->_opr2); 711 if (op3->_opr3->is_valid()) do_temp(op3->_opr3); 712 713 if (op3->_result->is_valid()) do_output(op3->_result); 714 715 break; 716 } 717 718 case lir_fmad: 719 case lir_fmaf: { 720 assert(op->as_Op3() != NULL, "must be"); 721 LIR_Op3* op3= (LIR_Op3*)op; 722 assert(op3->_info == NULL, "no info"); 723 do_input(op3->_opr1); 724 do_input(op3->_opr2); 725 do_input(op3->_opr3); 726 do_output(op3->_result); 727 break; 728 } 729 730 // LIR_OpJavaCall 731 case lir_static_call: 732 case lir_optvirtual_call: 733 case lir_icvirtual_call: 734 case lir_virtual_call: 735 case lir_dynamic_call: { 736 LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall(); 737 assert(opJavaCall != NULL, "must be"); 738 739 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver); 740 741 // only visit register parameters 742 int n = opJavaCall->_arguments->length(); 743 for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) { 744 if (!opJavaCall->_arguments->at(i)->is_pointer()) { 745 do_input(*opJavaCall->_arguments->adr_at(i)); 746 } 747 } 748 749 if (opJavaCall->_info) do_info(opJavaCall->_info); 750 if (FrameMap::method_handle_invoke_SP_save_opr() != LIR_OprFact::illegalOpr && 751 opJavaCall->is_method_handle_invoke()) { 752 opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr(); 753 do_temp(opJavaCall->_method_handle_invoke_SP_save_opr); 754 } 755 do_call(); 756 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result); 757 758 break; 759 } 760 761 762 // LIR_OpRTCall 763 case lir_rtcall: { 764 assert(op->as_OpRTCall() != NULL, "must be"); 765 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op; 766 767 // only visit register parameters 768 int n = opRTCall->_arguments->length(); 769 for (int i = 0; i < n; i++) { 770 if (!opRTCall->_arguments->at(i)->is_pointer()) { 771 do_input(*opRTCall->_arguments->adr_at(i)); 772 } 773 } 774 if (opRTCall->_info) do_info(opRTCall->_info); 775 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp); 776 do_call(); 777 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result); 778 779 break; 780 } 781 782 783 // LIR_OpArrayCopy 784 case lir_arraycopy: { 785 assert(op->as_OpArrayCopy() != NULL, "must be"); 786 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op; 787 788 assert(opArrayCopy->_result->is_illegal(), "unused"); 789 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src); 790 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos); 791 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst); 792 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos); 793 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length); 794 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp); 795 if (opArrayCopy->_info) do_info(opArrayCopy->_info); 796 797 // the implementation of arraycopy always has a call into the runtime 798 do_call(); 799 800 break; 801 } 802 803 804 // LIR_OpUpdateCRC32 805 case lir_updatecrc32: { 806 assert(op->as_OpUpdateCRC32() != NULL, "must be"); 807 LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op; 808 809 assert(opUp->_crc->is_valid(), "used"); do_input(opUp->_crc); do_temp(opUp->_crc); 810 assert(opUp->_val->is_valid(), "used"); do_input(opUp->_val); do_temp(opUp->_val); 811 assert(opUp->_result->is_valid(), "used"); do_output(opUp->_result); 812 assert(opUp->_info == NULL, "no info for LIR_OpUpdateCRC32"); 813 814 break; 815 } 816 817 818 // LIR_OpLock 819 case lir_lock: 820 case lir_unlock: { 821 assert(op->as_OpLock() != NULL, "must be"); 822 LIR_OpLock* opLock = (LIR_OpLock*)op; 823 824 if (opLock->_info) do_info(opLock->_info); 825 826 // TODO: check if these operands really have to be temp 827 // (or if input is sufficient). This may have influence on the oop map! 828 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock); 829 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr); 830 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj); 831 832 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch); 833 assert(opLock->_result->is_illegal(), "unused"); 834 835 do_stub(opLock->_stub); 836 do_stub(opLock->_throw_imse_stub); 837 838 break; 839 } 840 841 842 // LIR_OpDelay 843 case lir_delay_slot: { 844 assert(op->as_OpDelay() != NULL, "must be"); 845 LIR_OpDelay* opDelay = (LIR_OpDelay*)op; 846 847 visit(opDelay->delay_op()); 848 break; 849 } 850 851 // LIR_OpTypeCheck 852 case lir_instanceof: 853 case lir_checkcast: 854 case lir_store_check: { 855 assert(op->as_OpTypeCheck() != NULL, "must be"); 856 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op; 857 858 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception); 859 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch); 860 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object); 861 if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) { 862 do_temp(opTypeCheck->_object); 863 } 864 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array); 865 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1); 866 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2); 867 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3); 868 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result); 869 do_stub(opTypeCheck->_stub); 870 break; 871 } 872 873 // LIR_OpFlattenedStoreCheck 874 case lir_flattened_store_check: { 875 assert(op->as_OpFlattenedStoreCheck() != NULL, "must be"); 876 LIR_OpFlattenedStoreCheck* opFlattenedStoreCheck = (LIR_OpFlattenedStoreCheck*)op; 877 878 if (opFlattenedStoreCheck->_info_for_exception) do_info(opFlattenedStoreCheck->_info_for_exception); 879 if (opFlattenedStoreCheck->_object->is_valid()) do_temp(opFlattenedStoreCheck->_object); 880 if (opFlattenedStoreCheck->_tmp1->is_valid()) do_temp(opFlattenedStoreCheck->_tmp1); 881 if (opFlattenedStoreCheck->_tmp2->is_valid()) do_temp(opFlattenedStoreCheck->_tmp2); 882 do_stub(opFlattenedStoreCheck->_stub); 883 break; 884 } 885 886 // LIR_OpCompareAndSwap 887 case lir_cas_long: 888 case lir_cas_obj: 889 case lir_cas_int: { 890 assert(op->as_OpCompareAndSwap() != NULL, "must be"); 891 LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op; 892 893 assert(opCompareAndSwap->_addr->is_valid(), "used"); 894 assert(opCompareAndSwap->_cmp_value->is_valid(), "used"); 895 assert(opCompareAndSwap->_new_value->is_valid(), "used"); 896 if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info); 897 do_input(opCompareAndSwap->_addr); 898 do_temp(opCompareAndSwap->_addr); 899 do_input(opCompareAndSwap->_cmp_value); 900 do_temp(opCompareAndSwap->_cmp_value); 901 do_input(opCompareAndSwap->_new_value); 902 do_temp(opCompareAndSwap->_new_value); 903 if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1); 904 if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2); 905 if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result); 906 907 break; 908 } 909 910 911 // LIR_OpAllocArray; 912 case lir_alloc_array: { 913 assert(op->as_OpAllocArray() != NULL, "must be"); 914 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op; 915 916 if (opAllocArray->_info) do_info(opAllocArray->_info); 917 if (opAllocArray->_klass->is_valid()) do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass); 918 if (opAllocArray->_len->is_valid()) do_input(opAllocArray->_len); do_temp(opAllocArray->_len); 919 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1); 920 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2); 921 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3); 922 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4); 923 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result); 924 do_stub(opAllocArray->_stub); 925 break; 926 } 927 928 // LIR_OpProfileCall: 929 case lir_profile_call: { 930 assert(op->as_OpProfileCall() != NULL, "must be"); 931 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op; 932 933 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv); 934 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo); 935 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1); 936 break; 937 } 938 939 // LIR_OpProfileType: 940 case lir_profile_type: { 941 assert(op->as_OpProfileType() != NULL, "must be"); 942 LIR_OpProfileType* opProfileType = (LIR_OpProfileType*)op; 943 944 do_input(opProfileType->_mdp); do_temp(opProfileType->_mdp); 945 do_input(opProfileType->_obj); 946 do_temp(opProfileType->_tmp); 947 break; 948 } 949 default: 950 op->visit(this); 951 } 952 } 953 954 void LIR_Op::visit(LIR_OpVisitState* state) { 955 ShouldNotReachHere(); 956 } 957 958 void LIR_OpVisitState::do_stub(CodeStub* stub) { 959 if (stub != NULL) { 960 stub->visit(this); 961 } 962 } 963 964 XHandlers* LIR_OpVisitState::all_xhandler() { 965 XHandlers* result = NULL; 966 967 int i; 968 for (i = 0; i < info_count(); i++) { 969 if (info_at(i)->exception_handlers() != NULL) { 970 result = info_at(i)->exception_handlers(); 971 break; 972 } 973 } 974 975 #ifdef ASSERT 976 for (i = 0; i < info_count(); i++) { 977 assert(info_at(i)->exception_handlers() == NULL || 978 info_at(i)->exception_handlers() == result, 979 "only one xhandler list allowed per LIR-operation"); 980 } 981 #endif 982 983 if (result != NULL) { 984 return result; 985 } else { 986 return new XHandlers(); 987 } 988 989 return result; 990 } 991 992 993 #ifdef ASSERT 994 bool LIR_OpVisitState::no_operands(LIR_Op* op) { 995 visit(op); 996 997 return opr_count(inputMode) == 0 && 998 opr_count(outputMode) == 0 && 999 opr_count(tempMode) == 0 && 1000 info_count() == 0 && 1001 !has_call() && 1002 !has_slow_case(); 1003 } 1004 #endif 1005 1006 //--------------------------------------------------- 1007 1008 1009 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) { 1010 masm->emit_call(this); 1011 } 1012 1013 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) { 1014 masm->emit_rtcall(this); 1015 } 1016 1017 void LIR_OpLabel::emit_code(LIR_Assembler* masm) { 1018 masm->emit_opLabel(this); 1019 } 1020 1021 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) { 1022 masm->emit_arraycopy(this); 1023 masm->append_code_stub(stub()); 1024 } 1025 1026 void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) { 1027 masm->emit_updatecrc32(this); 1028 } 1029 1030 void LIR_Op0::emit_code(LIR_Assembler* masm) { 1031 masm->emit_op0(this); 1032 } 1033 1034 void LIR_Op1::emit_code(LIR_Assembler* masm) { 1035 masm->emit_op1(this); 1036 } 1037 1038 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) { 1039 masm->emit_alloc_obj(this); 1040 masm->append_code_stub(stub()); 1041 } 1042 1043 void LIR_OpBranch::emit_code(LIR_Assembler* masm) { 1044 masm->emit_opBranch(this); 1045 if (stub()) { 1046 masm->append_code_stub(stub()); 1047 } 1048 } 1049 1050 void LIR_OpConvert::emit_code(LIR_Assembler* masm) { 1051 masm->emit_opConvert(this); 1052 if (stub() != NULL) { 1053 masm->append_code_stub(stub()); 1054 } 1055 } 1056 1057 void LIR_Op2::emit_code(LIR_Assembler* masm) { 1058 masm->emit_op2(this); 1059 } 1060 1061 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) { 1062 masm->emit_alloc_array(this); 1063 masm->append_code_stub(stub()); 1064 } 1065 1066 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) { 1067 masm->emit_opTypeCheck(this); 1068 if (stub()) { 1069 masm->append_code_stub(stub()); 1070 } 1071 } 1072 1073 void LIR_OpFlattenedStoreCheck::emit_code(LIR_Assembler* masm) { 1074 masm->emit_opFlattenedStoreCheck(this); 1075 if (stub()) { 1076 masm->append_code_stub(stub()); 1077 } 1078 } 1079 1080 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) { 1081 masm->emit_compare_and_swap(this); 1082 } 1083 1084 void LIR_Op3::emit_code(LIR_Assembler* masm) { 1085 masm->emit_op3(this); 1086 } 1087 1088 void LIR_OpLock::emit_code(LIR_Assembler* masm) { 1089 masm->emit_lock(this); 1090 if (stub()) { 1091 masm->append_code_stub(stub()); 1092 } 1093 if (throw_imse_stub()) { 1094 masm->append_code_stub(throw_imse_stub()); 1095 } 1096 } 1097 1098 #ifdef ASSERT 1099 void LIR_OpAssert::emit_code(LIR_Assembler* masm) { 1100 masm->emit_assert(this); 1101 } 1102 #endif 1103 1104 void LIR_OpDelay::emit_code(LIR_Assembler* masm) { 1105 masm->emit_delay(this); 1106 } 1107 1108 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) { 1109 masm->emit_profile_call(this); 1110 } 1111 1112 void LIR_OpProfileType::emit_code(LIR_Assembler* masm) { 1113 masm->emit_profile_type(this); 1114 } 1115 1116 // LIR_List 1117 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block) 1118 : _operations(8) 1119 , _compilation(compilation) 1120 #ifndef PRODUCT 1121 , _block(block) 1122 #endif 1123 #ifdef ASSERT 1124 , _file(NULL) 1125 , _line(0) 1126 #endif 1127 { } 1128 1129 1130 #ifdef ASSERT 1131 void LIR_List::set_file_and_line(const char * file, int line) { 1132 const char * f = strrchr(file, '/'); 1133 if (f == NULL) f = strrchr(file, '\\'); 1134 if (f == NULL) { 1135 f = file; 1136 } else { 1137 f++; 1138 } 1139 _file = f; 1140 _line = line; 1141 } 1142 #endif 1143 1144 1145 void LIR_List::append(LIR_InsertionBuffer* buffer) { 1146 assert(this == buffer->lir_list(), "wrong lir list"); 1147 const int n = _operations.length(); 1148 1149 if (buffer->number_of_ops() > 0) { 1150 // increase size of instructions list 1151 _operations.at_grow(n + buffer->number_of_ops() - 1, NULL); 1152 // insert ops from buffer into instructions list 1153 int op_index = buffer->number_of_ops() - 1; 1154 int ip_index = buffer->number_of_insertion_points() - 1; 1155 int from_index = n - 1; 1156 int to_index = _operations.length() - 1; 1157 for (; ip_index >= 0; ip_index --) { 1158 int index = buffer->index_at(ip_index); 1159 // make room after insertion point 1160 while (index < from_index) { 1161 _operations.at_put(to_index --, _operations.at(from_index --)); 1162 } 1163 // insert ops from buffer 1164 for (int i = buffer->count_at(ip_index); i > 0; i --) { 1165 _operations.at_put(to_index --, buffer->op_at(op_index --)); 1166 } 1167 } 1168 } 1169 1170 buffer->finish(); 1171 } 1172 1173 1174 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) { 1175 assert(reg->type() == T_OBJECT, "bad reg"); 1176 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info)); 1177 } 1178 1179 void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) { 1180 assert(reg->type() == T_METADATA, "bad reg"); 1181 append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info)); 1182 } 1183 1184 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1185 append(new LIR_Op1( 1186 lir_move, 1187 LIR_OprFact::address(addr), 1188 src, 1189 addr->type(), 1190 patch_code, 1191 info)); 1192 } 1193 1194 1195 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1196 append(new LIR_Op1( 1197 lir_move, 1198 LIR_OprFact::address(address), 1199 dst, 1200 address->type(), 1201 patch_code, 1202 info, lir_move_volatile)); 1203 } 1204 1205 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1206 append(new LIR_Op1( 1207 lir_move, 1208 LIR_OprFact::address(new LIR_Address(base, offset, type)), 1209 dst, 1210 type, 1211 patch_code, 1212 info, lir_move_volatile)); 1213 } 1214 1215 1216 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1217 append(new LIR_Op1( 1218 lir_move, 1219 LIR_OprFact::intConst(v), 1220 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)), 1221 type, 1222 patch_code, 1223 info)); 1224 } 1225 1226 1227 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1228 append(new LIR_Op1( 1229 lir_move, 1230 LIR_OprFact::oopConst(o), 1231 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)), 1232 type, 1233 patch_code, 1234 info)); 1235 } 1236 1237 1238 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1239 append(new LIR_Op1( 1240 lir_move, 1241 src, 1242 LIR_OprFact::address(addr), 1243 addr->type(), 1244 patch_code, 1245 info)); 1246 } 1247 1248 1249 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1250 append(new LIR_Op1( 1251 lir_move, 1252 src, 1253 LIR_OprFact::address(addr), 1254 addr->type(), 1255 patch_code, 1256 info, 1257 lir_move_volatile)); 1258 } 1259 1260 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1261 append(new LIR_Op1( 1262 lir_move, 1263 src, 1264 LIR_OprFact::address(new LIR_Address(base, offset, type)), 1265 type, 1266 patch_code, 1267 info, lir_move_volatile)); 1268 } 1269 1270 1271 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1272 append(new LIR_Op3( 1273 lir_idiv, 1274 left, 1275 right, 1276 tmp, 1277 res, 1278 info)); 1279 } 1280 1281 1282 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1283 append(new LIR_Op3( 1284 lir_idiv, 1285 left, 1286 LIR_OprFact::intConst(right), 1287 tmp, 1288 res, 1289 info)); 1290 } 1291 1292 1293 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1294 append(new LIR_Op3( 1295 lir_irem, 1296 left, 1297 right, 1298 tmp, 1299 res, 1300 info)); 1301 } 1302 1303 1304 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1305 append(new LIR_Op3( 1306 lir_irem, 1307 left, 1308 LIR_OprFact::intConst(right), 1309 tmp, 1310 res, 1311 info)); 1312 } 1313 1314 1315 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { 1316 append(new LIR_Op2( 1317 lir_cmp, 1318 condition, 1319 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)), 1320 LIR_OprFact::intConst(c), 1321 info)); 1322 } 1323 1324 1325 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) { 1326 append(new LIR_Op2( 1327 lir_cmp, 1328 condition, 1329 reg, 1330 LIR_OprFact::address(addr), 1331 info)); 1332 } 1333 1334 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, 1335 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) { 1336 append(new LIR_OpAllocObj( 1337 klass, 1338 dst, 1339 t1, 1340 t2, 1341 t3, 1342 t4, 1343 header_size, 1344 object_size, 1345 init_check, 1346 stub)); 1347 } 1348 1349 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) { 1350 append(new LIR_OpAllocArray( 1351 klass, 1352 len, 1353 dst, 1354 t1, 1355 t2, 1356 t3, 1357 t4, 1358 type, 1359 stub)); 1360 } 1361 1362 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { 1363 append(new LIR_Op2( 1364 lir_shl, 1365 value, 1366 count, 1367 dst, 1368 tmp)); 1369 } 1370 1371 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { 1372 append(new LIR_Op2( 1373 lir_shr, 1374 value, 1375 count, 1376 dst, 1377 tmp)); 1378 } 1379 1380 1381 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { 1382 append(new LIR_Op2( 1383 lir_ushr, 1384 value, 1385 count, 1386 dst, 1387 tmp)); 1388 } 1389 1390 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) { 1391 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i, 1392 left, 1393 right, 1394 dst)); 1395 } 1396 1397 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info, CodeStub* throw_imse_stub) { 1398 append(new LIR_OpLock( 1399 lir_lock, 1400 hdr, 1401 obj, 1402 lock, 1403 scratch, 1404 stub, 1405 info, 1406 throw_imse_stub)); 1407 } 1408 1409 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) { 1410 append(new LIR_OpLock( 1411 lir_unlock, 1412 hdr, 1413 obj, 1414 lock, 1415 scratch, 1416 stub, 1417 NULL)); 1418 } 1419 1420 1421 void check_LIR() { 1422 // cannot do the proper checking as PRODUCT and other modes return different results 1423 // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table"); 1424 } 1425 1426 1427 1428 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass, 1429 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, 1430 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub, 1431 ciMethod* profiled_method, int profiled_bci, bool is_never_null) { 1432 // If klass is non-nullable, LIRGenerator::do_CheckCast has already performed null-check 1433 // on the object. 1434 bool need_null_check = !is_never_null; 1435 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass, 1436 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub, 1437 need_null_check); 1438 if (profiled_method != NULL) { 1439 c->set_profiled_method(profiled_method); 1440 c->set_profiled_bci(profiled_bci); 1441 c->set_should_profile(true); 1442 } 1443 append(c); 1444 } 1445 1446 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) { 1447 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL); 1448 if (profiled_method != NULL) { 1449 c->set_profiled_method(profiled_method); 1450 c->set_profiled_bci(profiled_bci); 1451 c->set_should_profile(true); 1452 } 1453 append(c); 1454 } 1455 1456 1457 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, 1458 CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) { 1459 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception); 1460 if (profiled_method != NULL) { 1461 c->set_profiled_method(profiled_method); 1462 c->set_profiled_bci(profiled_bci); 1463 c->set_should_profile(true); 1464 } 1465 append(c); 1466 } 1467 1468 void LIR_List::null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null) { 1469 if (deoptimize_on_null) { 1470 // Emit an explicit null check and deoptimize if opr is null 1471 CodeStub* deopt = new DeoptimizeStub(info, Deoptimization::Reason_null_check, Deoptimization::Action_none); 1472 cmp(lir_cond_equal, opr, LIR_OprFact::oopConst(NULL)); 1473 branch(lir_cond_equal, T_OBJECT, deopt); 1474 } else { 1475 // Emit an implicit null check 1476 append(new LIR_Op1(lir_null_check, opr, info)); 1477 } 1478 } 1479 1480 void LIR_List::flattened_store_check(LIR_Opr object, ciKlass* element_klass, 1481 LIR_Opr tmp1, LIR_Opr tmp2, 1482 CodeEmitInfo* info_for_exception) { 1483 LIR_OpFlattenedStoreCheck* c = new LIR_OpFlattenedStoreCheck(object, element_klass, tmp1, tmp2, info_for_exception); 1484 append(c); 1485 } 1486 1487 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1488 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { 1489 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result)); 1490 } 1491 1492 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1493 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { 1494 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result)); 1495 } 1496 1497 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1498 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { 1499 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result)); 1500 } 1501 1502 1503 #ifdef PRODUCT 1504 1505 void print_LIR(BlockList* blocks) { 1506 } 1507 1508 #else 1509 // LIR_OprDesc 1510 void LIR_OprDesc::print() const { 1511 print(tty); 1512 } 1513 1514 void LIR_OprDesc::print(outputStream* out) const { 1515 if (is_illegal()) { 1516 return; 1517 } 1518 1519 out->print("["); 1520 if (is_pointer()) { 1521 pointer()->print_value_on(out); 1522 } else if (is_single_stack()) { 1523 out->print("stack:%d", single_stack_ix()); 1524 } else if (is_double_stack()) { 1525 out->print("dbl_stack:%d",double_stack_ix()); 1526 } else if (is_virtual()) { 1527 out->print("R%d", vreg_number()); 1528 } else if (is_single_cpu()) { 1529 out->print("%s", as_register()->name()); 1530 } else if (is_double_cpu()) { 1531 out->print("%s", as_register_hi()->name()); 1532 out->print("%s", as_register_lo()->name()); 1533 #if defined(X86) 1534 } else if (is_single_xmm()) { 1535 out->print("%s", as_xmm_float_reg()->name()); 1536 } else if (is_double_xmm()) { 1537 out->print("%s", as_xmm_double_reg()->name()); 1538 } else if (is_single_fpu()) { 1539 out->print("fpu%d", fpu_regnr()); 1540 } else if (is_double_fpu()) { 1541 out->print("fpu%d", fpu_regnrLo()); 1542 #elif defined(AARCH64) 1543 } else if (is_single_fpu()) { 1544 out->print("fpu%d", fpu_regnr()); 1545 } else if (is_double_fpu()) { 1546 out->print("fpu%d", fpu_regnrLo()); 1547 #elif defined(ARM) 1548 } else if (is_single_fpu()) { 1549 out->print("s%d", fpu_regnr()); 1550 } else if (is_double_fpu()) { 1551 out->print("d%d", fpu_regnrLo() >> 1); 1552 #else 1553 } else if (is_single_fpu()) { 1554 out->print("%s", as_float_reg()->name()); 1555 } else if (is_double_fpu()) { 1556 out->print("%s", as_double_reg()->name()); 1557 #endif 1558 1559 } else if (is_illegal()) { 1560 out->print("-"); 1561 } else { 1562 out->print("Unknown Operand"); 1563 } 1564 if (!is_illegal()) { 1565 out->print("|%c", type_char()); 1566 } 1567 if (is_register() && is_last_use()) { 1568 out->print("(last_use)"); 1569 } 1570 out->print("]"); 1571 } 1572 1573 1574 // LIR_Address 1575 void LIR_Const::print_value_on(outputStream* out) const { 1576 switch (type()) { 1577 case T_ADDRESS:out->print("address:%d",as_jint()); break; 1578 case T_INT: out->print("int:%d", as_jint()); break; 1579 case T_LONG: out->print("lng:" JLONG_FORMAT, as_jlong()); break; 1580 case T_FLOAT: out->print("flt:%f", as_jfloat()); break; 1581 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break; 1582 case T_OBJECT: out->print("obj:" INTPTR_FORMAT, p2i(as_jobject())); break; 1583 case T_METADATA: out->print("metadata:" INTPTR_FORMAT, p2i(as_metadata()));break; 1584 default: out->print("%3d:0x" UINT64_FORMAT_X, type(), (uint64_t)as_jlong()); break; 1585 } 1586 } 1587 1588 // LIR_Address 1589 void LIR_Address::print_value_on(outputStream* out) const { 1590 out->print("Base:"); _base->print(out); 1591 if (!_index->is_illegal()) { 1592 out->print(" Index:"); _index->print(out); 1593 switch (scale()) { 1594 case times_1: break; 1595 case times_2: out->print(" * 2"); break; 1596 case times_4: out->print(" * 4"); break; 1597 case times_8: out->print(" * 8"); break; 1598 } 1599 } 1600 out->print(" Disp: " INTX_FORMAT, _disp); 1601 } 1602 1603 // debug output of block header without InstructionPrinter 1604 // (because phi functions are not necessary for LIR) 1605 static void print_block(BlockBegin* x) { 1606 // print block id 1607 BlockEnd* end = x->end(); 1608 tty->print("B%d ", x->block_id()); 1609 1610 // print flags 1611 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std "); 1612 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr "); 1613 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex "); 1614 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr "); 1615 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb "); 1616 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh "); 1617 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le "); 1618 1619 // print block bci range 1620 tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci())); 1621 1622 // print predecessors and successors 1623 if (x->number_of_preds() > 0) { 1624 tty->print("preds: "); 1625 for (int i = 0; i < x->number_of_preds(); i ++) { 1626 tty->print("B%d ", x->pred_at(i)->block_id()); 1627 } 1628 } 1629 1630 if (x->number_of_sux() > 0) { 1631 tty->print("sux: "); 1632 for (int i = 0; i < x->number_of_sux(); i ++) { 1633 tty->print("B%d ", x->sux_at(i)->block_id()); 1634 } 1635 } 1636 1637 // print exception handlers 1638 if (x->number_of_exception_handlers() > 0) { 1639 tty->print("xhandler: "); 1640 for (int i = 0; i < x->number_of_exception_handlers(); i++) { 1641 tty->print("B%d ", x->exception_handler_at(i)->block_id()); 1642 } 1643 } 1644 1645 tty->cr(); 1646 } 1647 1648 void print_LIR(BlockList* blocks) { 1649 tty->print_cr("LIR:"); 1650 int i; 1651 for (i = 0; i < blocks->length(); i++) { 1652 BlockBegin* bb = blocks->at(i); 1653 print_block(bb); 1654 tty->print("__id_Instruction___________________________________________"); tty->cr(); 1655 bb->lir()->print_instructions(); 1656 } 1657 } 1658 1659 void LIR_List::print_instructions() { 1660 for (int i = 0; i < _operations.length(); i++) { 1661 _operations.at(i)->print(); tty->cr(); 1662 } 1663 tty->cr(); 1664 } 1665 1666 // LIR_Ops printing routines 1667 // LIR_Op 1668 void LIR_Op::print_on(outputStream* out) const { 1669 if (id() != -1 || PrintCFGToFile) { 1670 out->print("%4d ", id()); 1671 } else { 1672 out->print(" "); 1673 } 1674 out->print("%s ", name()); 1675 print_instr(out); 1676 if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci()); 1677 #ifdef ASSERT 1678 if (Verbose && _file != NULL) { 1679 out->print(" (%s:%d)", _file, _line); 1680 } 1681 #endif 1682 } 1683 1684 const char * LIR_Op::name() const { 1685 const char* s = NULL; 1686 switch(code()) { 1687 // LIR_Op0 1688 case lir_membar: s = "membar"; break; 1689 case lir_membar_acquire: s = "membar_acquire"; break; 1690 case lir_membar_release: s = "membar_release"; break; 1691 case lir_membar_loadload: s = "membar_loadload"; break; 1692 case lir_membar_storestore: s = "membar_storestore"; break; 1693 case lir_membar_loadstore: s = "membar_loadstore"; break; 1694 case lir_membar_storeload: s = "membar_storeload"; break; 1695 case lir_word_align: s = "word_align"; break; 1696 case lir_label: s = "label"; break; 1697 case lir_nop: s = "nop"; break; 1698 case lir_on_spin_wait: s = "on_spin_wait"; break; 1699 case lir_backwardbranch_target: s = "backbranch"; break; 1700 case lir_std_entry: s = "std_entry"; break; 1701 case lir_osr_entry: s = "osr_entry"; break; 1702 case lir_build_frame: s = "build_frm"; break; 1703 case lir_fpop_raw: s = "fpop_raw"; break; 1704 case lir_24bit_FPU: s = "24bit_FPU"; break; 1705 case lir_reset_FPU: s = "reset_FPU"; break; 1706 case lir_breakpoint: s = "breakpoint"; break; 1707 case lir_get_thread: s = "get_thread"; break; 1708 // LIR_Op1 1709 case lir_fxch: s = "fxch"; break; 1710 case lir_fld: s = "fld"; break; 1711 case lir_ffree: s = "ffree"; break; 1712 case lir_push: s = "push"; break; 1713 case lir_pop: s = "pop"; break; 1714 case lir_null_check: s = "null_check"; break; 1715 case lir_return: s = "return"; break; 1716 case lir_safepoint: s = "safepoint"; break; 1717 case lir_leal: s = "leal"; break; 1718 case lir_branch: s = "branch"; break; 1719 case lir_cond_float_branch: s = "flt_cond_br"; break; 1720 case lir_move: s = "move"; break; 1721 case lir_roundfp: s = "roundfp"; break; 1722 case lir_rtcall: s = "rtcall"; break; 1723 case lir_throw: s = "throw"; break; 1724 case lir_unwind: s = "unwind"; break; 1725 case lir_convert: s = "convert"; break; 1726 case lir_alloc_object: s = "alloc_obj"; break; 1727 case lir_monaddr: s = "mon_addr"; break; 1728 case lir_pack64: s = "pack64"; break; 1729 case lir_unpack64: s = "unpack64"; break; 1730 // LIR_Op2 1731 case lir_cmp: s = "cmp"; break; 1732 case lir_cmp_l2i: s = "cmp_l2i"; break; 1733 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break; 1734 case lir_cmp_fd2i: s = "comp_fd2i"; break; 1735 case lir_cmove: s = "cmove"; break; 1736 case lir_add: s = "add"; break; 1737 case lir_sub: s = "sub"; break; 1738 case lir_mul: s = "mul"; break; 1739 case lir_mul_strictfp: s = "mul_strictfp"; break; 1740 case lir_div: s = "div"; break; 1741 case lir_div_strictfp: s = "div_strictfp"; break; 1742 case lir_rem: s = "rem"; break; 1743 case lir_abs: s = "abs"; break; 1744 case lir_neg: s = "neg"; break; 1745 case lir_sqrt: s = "sqrt"; break; 1746 case lir_logic_and: s = "logic_and"; break; 1747 case lir_logic_or: s = "logic_or"; break; 1748 case lir_logic_xor: s = "logic_xor"; break; 1749 case lir_shl: s = "shift_left"; break; 1750 case lir_shr: s = "shift_right"; break; 1751 case lir_ushr: s = "ushift_right"; break; 1752 case lir_alloc_array: s = "alloc_array"; break; 1753 case lir_xadd: s = "xadd"; break; 1754 case lir_xchg: s = "xchg"; break; 1755 // LIR_Op3 1756 case lir_idiv: s = "idiv"; break; 1757 case lir_irem: s = "irem"; break; 1758 case lir_fmad: s = "fmad"; break; 1759 case lir_fmaf: s = "fmaf"; break; 1760 // LIR_OpJavaCall 1761 case lir_static_call: s = "static"; break; 1762 case lir_optvirtual_call: s = "optvirtual"; break; 1763 case lir_icvirtual_call: s = "icvirtual"; break; 1764 case lir_virtual_call: s = "virtual"; break; 1765 case lir_dynamic_call: s = "dynamic"; break; 1766 // LIR_OpArrayCopy 1767 case lir_arraycopy: s = "arraycopy"; break; 1768 // LIR_OpUpdateCRC32 1769 case lir_updatecrc32: s = "updatecrc32"; break; 1770 // LIR_OpLock 1771 case lir_lock: s = "lock"; break; 1772 case lir_unlock: s = "unlock"; break; 1773 // LIR_OpDelay 1774 case lir_delay_slot: s = "delay"; break; 1775 // LIR_OpTypeCheck 1776 case lir_instanceof: s = "instanceof"; break; 1777 case lir_checkcast: s = "checkcast"; break; 1778 case lir_store_check: s = "store_check"; break; 1779 // LIR_OpFlattenedStoreCheck 1780 case lir_flattened_store_check: s = "flattened_store_check"; break; 1781 // LIR_OpCompareAndSwap 1782 case lir_cas_long: s = "cas_long"; break; 1783 case lir_cas_obj: s = "cas_obj"; break; 1784 case lir_cas_int: s = "cas_int"; break; 1785 // LIR_OpProfileCall 1786 case lir_profile_call: s = "profile_call"; break; 1787 // LIR_OpProfileType 1788 case lir_profile_type: s = "profile_type"; break; 1789 // LIR_OpAssert 1790 #ifdef ASSERT 1791 case lir_assert: s = "assert"; break; 1792 #endif 1793 case lir_none: ShouldNotReachHere();break; 1794 default: s = "illegal_op"; break; 1795 } 1796 return s; 1797 } 1798 1799 // LIR_OpJavaCall 1800 void LIR_OpJavaCall::print_instr(outputStream* out) const { 1801 out->print("call: "); 1802 out->print("[addr: " INTPTR_FORMAT "]", p2i(address())); 1803 if (receiver()->is_valid()) { 1804 out->print(" [recv: "); receiver()->print(out); out->print("]"); 1805 } 1806 if (result_opr()->is_valid()) { 1807 out->print(" [result: "); result_opr()->print(out); out->print("]"); 1808 } 1809 } 1810 1811 // LIR_OpLabel 1812 void LIR_OpLabel::print_instr(outputStream* out) const { 1813 out->print("[label:" INTPTR_FORMAT "]", p2i(_label)); 1814 } 1815 1816 // LIR_OpArrayCopy 1817 void LIR_OpArrayCopy::print_instr(outputStream* out) const { 1818 src()->print(out); out->print(" "); 1819 src_pos()->print(out); out->print(" "); 1820 dst()->print(out); out->print(" "); 1821 dst_pos()->print(out); out->print(" "); 1822 length()->print(out); out->print(" "); 1823 tmp()->print(out); out->print(" "); 1824 } 1825 1826 // LIR_OpUpdateCRC32 1827 void LIR_OpUpdateCRC32::print_instr(outputStream* out) const { 1828 crc()->print(out); out->print(" "); 1829 val()->print(out); out->print(" "); 1830 result_opr()->print(out); out->print(" "); 1831 } 1832 1833 // LIR_OpCompareAndSwap 1834 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const { 1835 addr()->print(out); out->print(" "); 1836 cmp_value()->print(out); out->print(" "); 1837 new_value()->print(out); out->print(" "); 1838 tmp1()->print(out); out->print(" "); 1839 tmp2()->print(out); out->print(" "); 1840 1841 } 1842 1843 // LIR_Op0 1844 void LIR_Op0::print_instr(outputStream* out) const { 1845 result_opr()->print(out); 1846 } 1847 1848 // LIR_Op1 1849 const char * LIR_Op1::name() const { 1850 if (code() == lir_move) { 1851 switch (move_kind()) { 1852 case lir_move_normal: 1853 return "move"; 1854 case lir_move_unaligned: 1855 return "unaligned move"; 1856 case lir_move_volatile: 1857 return "volatile_move"; 1858 case lir_move_wide: 1859 return "wide_move"; 1860 default: 1861 ShouldNotReachHere(); 1862 return "illegal_op"; 1863 } 1864 } else { 1865 return LIR_Op::name(); 1866 } 1867 } 1868 1869 1870 void LIR_Op1::print_instr(outputStream* out) const { 1871 _opr->print(out); out->print(" "); 1872 result_opr()->print(out); out->print(" "); 1873 print_patch_code(out, patch_code()); 1874 } 1875 1876 1877 // LIR_Op1 1878 void LIR_OpRTCall::print_instr(outputStream* out) const { 1879 intx a = (intx)addr(); 1880 out->print("%s", Runtime1::name_for_address(addr())); 1881 out->print(" "); 1882 tmp()->print(out); 1883 } 1884 1885 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) { 1886 switch(code) { 1887 case lir_patch_none: break; 1888 case lir_patch_low: out->print("[patch_low]"); break; 1889 case lir_patch_high: out->print("[patch_high]"); break; 1890 case lir_patch_normal: out->print("[patch_normal]"); break; 1891 default: ShouldNotReachHere(); 1892 } 1893 } 1894 1895 // LIR_OpBranch 1896 void LIR_OpBranch::print_instr(outputStream* out) const { 1897 print_condition(out, cond()); out->print(" "); 1898 if (block() != NULL) { 1899 out->print("[B%d] ", block()->block_id()); 1900 } else if (stub() != NULL) { 1901 out->print("["); 1902 stub()->print_name(out); 1903 out->print(": " INTPTR_FORMAT "]", p2i(stub())); 1904 if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci()); 1905 } else { 1906 out->print("[label:" INTPTR_FORMAT "] ", p2i(label())); 1907 } 1908 if (ublock() != NULL) { 1909 out->print("unordered: [B%d] ", ublock()->block_id()); 1910 } 1911 } 1912 1913 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) { 1914 switch(cond) { 1915 case lir_cond_equal: out->print("[EQ]"); break; 1916 case lir_cond_notEqual: out->print("[NE]"); break; 1917 case lir_cond_less: out->print("[LT]"); break; 1918 case lir_cond_lessEqual: out->print("[LE]"); break; 1919 case lir_cond_greaterEqual: out->print("[GE]"); break; 1920 case lir_cond_greater: out->print("[GT]"); break; 1921 case lir_cond_belowEqual: out->print("[BE]"); break; 1922 case lir_cond_aboveEqual: out->print("[AE]"); break; 1923 case lir_cond_always: out->print("[AL]"); break; 1924 default: out->print("[%d]",cond); break; 1925 } 1926 } 1927 1928 // LIR_OpConvert 1929 void LIR_OpConvert::print_instr(outputStream* out) const { 1930 print_bytecode(out, bytecode()); 1931 in_opr()->print(out); out->print(" "); 1932 result_opr()->print(out); out->print(" "); 1933 #ifdef PPC32 1934 if(tmp1()->is_valid()) { 1935 tmp1()->print(out); out->print(" "); 1936 tmp2()->print(out); out->print(" "); 1937 } 1938 #endif 1939 } 1940 1941 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) { 1942 switch(code) { 1943 case Bytecodes::_d2f: out->print("[d2f] "); break; 1944 case Bytecodes::_d2i: out->print("[d2i] "); break; 1945 case Bytecodes::_d2l: out->print("[d2l] "); break; 1946 case Bytecodes::_f2d: out->print("[f2d] "); break; 1947 case Bytecodes::_f2i: out->print("[f2i] "); break; 1948 case Bytecodes::_f2l: out->print("[f2l] "); break; 1949 case Bytecodes::_i2b: out->print("[i2b] "); break; 1950 case Bytecodes::_i2c: out->print("[i2c] "); break; 1951 case Bytecodes::_i2d: out->print("[i2d] "); break; 1952 case Bytecodes::_i2f: out->print("[i2f] "); break; 1953 case Bytecodes::_i2l: out->print("[i2l] "); break; 1954 case Bytecodes::_i2s: out->print("[i2s] "); break; 1955 case Bytecodes::_l2i: out->print("[l2i] "); break; 1956 case Bytecodes::_l2f: out->print("[l2f] "); break; 1957 case Bytecodes::_l2d: out->print("[l2d] "); break; 1958 default: 1959 out->print("[?%d]",code); 1960 break; 1961 } 1962 } 1963 1964 void LIR_OpAllocObj::print_instr(outputStream* out) const { 1965 klass()->print(out); out->print(" "); 1966 obj()->print(out); out->print(" "); 1967 tmp1()->print(out); out->print(" "); 1968 tmp2()->print(out); out->print(" "); 1969 tmp3()->print(out); out->print(" "); 1970 tmp4()->print(out); out->print(" "); 1971 out->print("[hdr:%d]", header_size()); out->print(" "); 1972 out->print("[obj:%d]", object_size()); out->print(" "); 1973 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry())); 1974 } 1975 1976 void LIR_OpRoundFP::print_instr(outputStream* out) const { 1977 _opr->print(out); out->print(" "); 1978 tmp()->print(out); out->print(" "); 1979 result_opr()->print(out); out->print(" "); 1980 } 1981 1982 // LIR_Op2 1983 void LIR_Op2::print_instr(outputStream* out) const { 1984 if (code() == lir_cmove || code() == lir_cmp) { 1985 print_condition(out, condition()); out->print(" "); 1986 } 1987 in_opr1()->print(out); out->print(" "); 1988 in_opr2()->print(out); out->print(" "); 1989 if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out); out->print(" "); } 1990 if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out); out->print(" "); } 1991 if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out); out->print(" "); } 1992 if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out); out->print(" "); } 1993 if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out); out->print(" "); } 1994 result_opr()->print(out); 1995 } 1996 1997 void LIR_OpAllocArray::print_instr(outputStream* out) const { 1998 klass()->print(out); out->print(" "); 1999 len()->print(out); out->print(" "); 2000 obj()->print(out); out->print(" "); 2001 tmp1()->print(out); out->print(" "); 2002 tmp2()->print(out); out->print(" "); 2003 tmp3()->print(out); out->print(" "); 2004 tmp4()->print(out); out->print(" "); 2005 out->print("[type:0x%x]", type()); out->print(" "); 2006 out->print("[label:" INTPTR_FORMAT "]", p2i(stub()->entry())); 2007 } 2008 2009 2010 void LIR_OpTypeCheck::print_instr(outputStream* out) const { 2011 object()->print(out); out->print(" "); 2012 if (code() == lir_store_check) { 2013 array()->print(out); out->print(" "); 2014 } 2015 if (code() != lir_store_check) { 2016 klass()->print_name_on(out); out->print(" "); 2017 if (fast_check()) out->print("fast_check "); 2018 } 2019 tmp1()->print(out); out->print(" "); 2020 tmp2()->print(out); out->print(" "); 2021 tmp3()->print(out); out->print(" "); 2022 result_opr()->print(out); out->print(" "); 2023 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci()); 2024 } 2025 2026 void LIR_OpFlattenedStoreCheck::print_instr(outputStream* out) const { 2027 object()->print(out); out->print(" "); 2028 element_klass()->print_name_on(out); out->print(" "); 2029 tmp1()->print(out); out->print(" "); 2030 tmp2()->print(out); out->print(" "); 2031 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci()); 2032 } 2033 2034 2035 // LIR_Op3 2036 void LIR_Op3::print_instr(outputStream* out) const { 2037 in_opr1()->print(out); out->print(" "); 2038 in_opr2()->print(out); out->print(" "); 2039 in_opr3()->print(out); out->print(" "); 2040 result_opr()->print(out); 2041 } 2042 2043 2044 void LIR_OpLock::print_instr(outputStream* out) const { 2045 hdr_opr()->print(out); out->print(" "); 2046 obj_opr()->print(out); out->print(" "); 2047 lock_opr()->print(out); out->print(" "); 2048 if (_scratch->is_valid()) { 2049 _scratch->print(out); out->print(" "); 2050 } 2051 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry())); 2052 } 2053 2054 #ifdef ASSERT 2055 void LIR_OpAssert::print_instr(outputStream* out) const { 2056 print_condition(out, condition()); out->print(" "); 2057 in_opr1()->print(out); out->print(" "); 2058 in_opr2()->print(out); out->print(", \""); 2059 out->print("%s", msg()); out->print("\""); 2060 } 2061 #endif 2062 2063 2064 void LIR_OpDelay::print_instr(outputStream* out) const { 2065 _op->print_on(out); 2066 } 2067 2068 2069 // LIR_OpProfileCall 2070 void LIR_OpProfileCall::print_instr(outputStream* out) const { 2071 profiled_method()->name()->print_symbol_on(out); 2072 out->print("."); 2073 profiled_method()->holder()->name()->print_symbol_on(out); 2074 out->print(" @ %d ", profiled_bci()); 2075 mdo()->print(out); out->print(" "); 2076 recv()->print(out); out->print(" "); 2077 tmp1()->print(out); out->print(" "); 2078 } 2079 2080 // LIR_OpProfileType 2081 void LIR_OpProfileType::print_instr(outputStream* out) const { 2082 out->print("exact = "); 2083 if (exact_klass() == NULL) { 2084 out->print("unknown"); 2085 } else { 2086 exact_klass()->print_name_on(out); 2087 } 2088 out->print(" current = "); ciTypeEntries::print_ciklass(out, current_klass()); 2089 out->print(" "); 2090 mdp()->print(out); out->print(" "); 2091 obj()->print(out); out->print(" "); 2092 tmp()->print(out); out->print(" "); 2093 } 2094 2095 #endif // PRODUCT 2096 2097 // Implementation of LIR_InsertionBuffer 2098 2099 void LIR_InsertionBuffer::append(int index, LIR_Op* op) { 2100 assert(_index_and_count.length() % 2 == 0, "must have a count for each index"); 2101 2102 int i = number_of_insertion_points() - 1; 2103 if (i < 0 || index_at(i) < index) { 2104 append_new(index, 1); 2105 } else { 2106 assert(index_at(i) == index, "can append LIR_Ops in ascending order only"); 2107 assert(count_at(i) > 0, "check"); 2108 set_count_at(i, count_at(i) + 1); 2109 } 2110 _ops.push(op); 2111 2112 DEBUG_ONLY(verify()); 2113 } 2114 2115 #ifdef ASSERT 2116 void LIR_InsertionBuffer::verify() { 2117 int sum = 0; 2118 int prev_idx = -1; 2119 2120 for (int i = 0; i < number_of_insertion_points(); i++) { 2121 assert(prev_idx < index_at(i), "index must be ordered ascending"); 2122 sum += count_at(i); 2123 } 2124 assert(sum == number_of_ops(), "wrong total sum"); 2125 } 2126 #endif