1 /*
2 * Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef SHARE_OPTO_MACHNODE_HPP
26 #define SHARE_OPTO_MACHNODE_HPP
27
28 #include "opto/callnode.hpp"
29 #include "opto/matcher.hpp"
30 #include "opto/multnode.hpp"
31 #include "opto/node.hpp"
32 #include "opto/regmask.hpp"
33
34 class BiasedLockingCounters;
35 class BufferBlob;
36 class CodeBuffer;
37 class JVMState;
38 class MachCallDynamicJavaNode;
39 class MachCallJavaNode;
40 class MachCallLeafNode;
41 class MachCallNode;
42 class MachCallRuntimeNode;
43 class MachCallStaticJavaNode;
44 class MachEpilogNode;
45 class MachIfNode;
46 class MachNullCheckNode;
47 class MachOper;
48 class MachProjNode;
49 class MachPrologNode;
50 class MachReturnNode;
51 class MachSafePointNode;
52 class MachSpillCopyNode;
53 class Matcher;
54 class PhaseRegAlloc;
55 class RegMask;
56 class RTMLockingCounters;
57 class State;
58
59 //---------------------------MachOper------------------------------------------
60 class MachOper : public ResourceObj {
61 public:
62 // Allocate right next to the MachNodes in the same arena
63 void *operator new(size_t x) throw() {
64 Compile* C = Compile::current();
65 return C->node_arena()->Amalloc_D(x);
66 }
67
68 // Opcode
69 virtual uint opcode() const = 0;
70
71 // Number of input edges.
72 // Generally at least 1
73 virtual uint num_edges() const { return 1; }
74 // Array of Register masks
75 virtual const RegMask *in_RegMask(int index) const;
76
77 // Methods to output the encoding of the operand
78
79 // Negate conditional branches. Error for non-branch Nodes
80 virtual void negate();
81
82 // Return the value requested
83 // result register lookup, corresponding to int_format
84 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const;
85 // input register lookup, corresponding to ext_format
86 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const;
87
88 // helpers for MacroAssembler generation from ADLC
89 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const {
90 return ::as_Register(reg(ra_, node));
91 }
92 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const {
93 return ::as_Register(reg(ra_, node, idx));
94 }
95 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const {
96 return ::as_FloatRegister(reg(ra_, node));
97 }
98 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
99 return ::as_FloatRegister(reg(ra_, node, idx));
100 }
101
102 #if defined(IA32) || defined(AMD64)
103 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const {
104 return ::as_XMMRegister(reg(ra_, node));
105 }
106 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
107 return ::as_XMMRegister(reg(ra_, node, idx));
108 }
109 #endif
110 // CondRegister reg converter
111 #if defined(PPC64)
112 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node) const {
113 return ::as_ConditionRegister(reg(ra_, node));
114 }
115 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
116 return ::as_ConditionRegister(reg(ra_, node, idx));
117 }
118 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node) const {
119 return ::as_VectorRegister(reg(ra_, node));
120 }
121 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
122 return ::as_VectorRegister(reg(ra_, node, idx));
123 }
124 VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node) const {
125 return ::as_VectorSRegister(reg(ra_, node));
126 }
127 VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
128 return ::as_VectorSRegister(reg(ra_, node, idx));
129 }
130 #endif
131
132 virtual intptr_t constant() const;
133 virtual relocInfo::relocType constant_reloc() const;
134 virtual jdouble constantD() const;
135 virtual jfloat constantF() const;
136 virtual jlong constantL() const;
137 virtual TypeOopPtr *oop() const;
138 virtual int ccode() const;
139 // A zero, default, indicates this value is not needed.
140 // May need to lookup the base register, as done in int_ and ext_format
141 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
142 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
143 virtual int scale() const;
144 // Parameters needed to support MEMORY_INTERFACE access to stackSlot
145 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
146 // Check for PC-Relative displacement
147 virtual relocInfo::relocType disp_reloc() const;
148 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot
149 virtual int base_position() const; // base edge position, or -1
150 virtual int index_position() const; // index edge position, or -1
151
152 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
153 // Only returns non-null value for i486.ad's indOffset32X
154 virtual const TypePtr *disp_as_type() const { return NULL; }
155
156 // Return the label
157 virtual Label *label() const;
158
159 // Return the method's address
160 virtual intptr_t method() const;
161
162 // Hash and compare over operands are currently identical
163 virtual uint hash() const;
164 virtual uint cmp( const MachOper &oper ) const;
165
166 // Virtual clone, since I do not know how big the MachOper is.
167 virtual MachOper *clone() const = 0;
168
169 // Return ideal Type from simple operands. Fail for complex operands.
170 virtual const Type *type() const;
171
172 // Set an integer offset if we have one, or error otherwise
173 virtual void set_con( jint c0 ) { ShouldNotReachHere(); }
174
175 #ifndef PRODUCT
176 // Return name of operand
177 virtual const char *Name() const { return "???";}
178
179 // Methods to output the text version of the operand
180 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
181 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
182
183 virtual void dump_spec(outputStream *st) const; // Print per-operand info
184
185 // Check whether o is a valid oper.
186 static bool notAnOper(const MachOper *o) {
187 if (o == NULL) return true;
188 if (((intptr_t)o & 1) != 0) return true;
189 if (*(address*)o == badAddress) return true; // kill by Node::destruct
190 return false;
191 }
192 #endif // !PRODUCT
193 };
194
195 //------------------------------MachNode---------------------------------------
196 // Base type for all machine specific nodes. All node classes generated by the
197 // ADLC inherit from this class.
198 class MachNode : public Node {
199 public:
200 MachNode() : Node((uint)0), _num_opnds(0), _opnds(NULL) {
201 init_class_id(Class_Mach);
202 }
203 // Required boilerplate
204 virtual uint size_of() const { return sizeof(MachNode); }
205 virtual int Opcode() const; // Always equal to MachNode
206 virtual uint rule() const = 0; // Machine-specific opcode
207 // Number of inputs which come before the first operand.
208 // Generally at least 1, to skip the Control input
209 virtual uint oper_input_base() const { return 1; }
210 // Position of constant base node in node's inputs. -1 if
211 // no constant base node input.
212 virtual uint mach_constant_base_node_input() const { return (uint)-1; }
213
214 // Copy inputs and operands to new node of instruction.
215 // Called from cisc_version() and short_branch_version().
216 // !!!! The method's body is defined in ad_<arch>.cpp file.
217 void fill_new_machnode(MachNode *n) const;
218
219 // Return an equivalent instruction using memory for cisc_operand position
220 virtual MachNode *cisc_version(int offset);
221 // Modify this instruction's register mask to use stack version for cisc_operand
222 virtual void use_cisc_RegMask();
223
224 // Support for short branches
225 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
226
227 // Avoid back to back some instructions on some CPUs.
228 enum AvoidBackToBackFlag { AVOID_NONE = 0,
229 AVOID_BEFORE = Flag_avoid_back_to_back_before,
230 AVOID_AFTER = Flag_avoid_back_to_back_after,
231 AVOID_BEFORE_AND_AFTER = AVOID_BEFORE | AVOID_AFTER };
232
233 bool avoid_back_to_back(AvoidBackToBackFlag flag_value) const {
234 return (flags() & flag_value) == flag_value;
235 }
236
237 // instruction implemented with a call
238 bool has_call() const { return (flags() & Flag_has_call) != 0; }
239
240 // First index in _in[] corresponding to operand, or -1 if there is none
241 int operand_index(uint operand) const;
242 int operand_index(const MachOper *oper) const;
243
244 // Register class input is expected in
245 virtual const RegMask &in_RegMask(uint) const;
246
247 // cisc-spillable instructions redefine for use by in_RegMask
248 virtual const RegMask *cisc_RegMask() const { return NULL; }
249
250 // If this instruction is a 2-address instruction, then return the
251 // index of the input which must match the output. Not nessecary
252 // for instructions which bind the input and output register to the
253 // same singleton regiser (e.g., Intel IDIV which binds AX to be
254 // both an input and an output). It is nessecary when the input and
255 // output have choices - but they must use the same choice.
256 virtual uint two_adr( ) const { return 0; }
257
258 // Array of complex operand pointers. Each corresponds to zero or
259 // more leafs. Must be set by MachNode constructor to point to an
260 // internal array of MachOpers. The MachOper array is sized by
261 // specific MachNodes described in the ADL.
262 uint _num_opnds;
263 MachOper **_opnds;
264 uint num_opnds() const { return _num_opnds; }
265
266 // Emit bytes into cbuf
267 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
268 // Expand node after register allocation.
269 // Node is replaced by several nodes in the postalloc expand phase.
270 // Corresponding methods are generated for nodes if they specify
271 // postalloc_expand. See block.cpp for more documentation.
272 virtual bool requires_postalloc_expand() const { return false; }
273 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
274 // Size of instruction in bytes
275 virtual uint size(PhaseRegAlloc *ra_) const;
276 // Helper function that computes size by emitting code
277 virtual uint emit_size(PhaseRegAlloc *ra_) const;
278
279 // Return the alignment required (in units of relocInfo::addr_unit())
280 // for this instruction (must be a power of 2)
281 virtual int alignment_required() const { return 1; }
282
283 // Return the padding (in bytes) to be emitted before this
284 // instruction to properly align it.
285 virtual int compute_padding(int current_offset) const { return 0; }
286
287 // Return number of relocatable values contained in this instruction
288 virtual int reloc() const { return 0; }
289
290 // Return number of words used for double constants in this instruction
291 virtual int ins_num_consts() const { return 0; }
292
293 // Hash and compare over operands. Used to do GVN on machine Nodes.
294 virtual uint hash() const;
295 virtual uint cmp( const Node &n ) const;
296
297 // Expand method for MachNode, replaces nodes representing pseudo
298 // instructions with a set of nodes which represent real machine
299 // instructions and compute the same value.
300 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; }
301
302 // Bottom_type call; value comes from operand0
303 virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
304 virtual uint ideal_reg() const { const Type *t = _opnds[0]->type(); return t == TypeInt::CC ? Op_RegFlags : t->ideal_reg(); }
305
306 // If this is a memory op, return the base pointer and fixed offset.
307 // If there are no such, return NULL. If there are multiple addresses
308 // or the address is indeterminate (rare cases) then return (Node*)-1,
309 // which serves as node bottom.
310 // If the offset is not statically determined, set it to Type::OffsetBot.
311 // This method is free to ignore stack slots if that helps.
312 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1)
313 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
314 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
315
316 // Helper for get_base_and_disp: find the base and index input nodes.
317 // Returns the MachOper as determined by memory_operand(), for use, if
318 // needed by the caller. If (MachOper *)-1 is returned, base and index
319 // are set to NodeSentinel. If (MachOper *) NULL is returned, base and
320 // index are set to NULL.
321 const MachOper* memory_inputs(Node* &base, Node* &index) const;
322
323 // Helper for memory_inputs: Which operand carries the necessary info?
324 // By default, returns NULL, which means there is no such operand.
325 // If it returns (MachOper*)-1, this means there are multiple memories.
326 virtual const MachOper* memory_operand() const { return NULL; }
327
328 // Call "get_base_and_disp" to decide which category of memory is used here.
329 virtual const class TypePtr *adr_type() const;
330
331 // Apply peephole rule(s) to this instruction
332 virtual MachNode *peephole(Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted);
333
334 // Top-level ideal Opcode matched
335 virtual int ideal_Opcode() const { return Op_Node; }
336
337 // Adds the label for the case
338 virtual void add_case_label( int switch_val, Label* blockLabel);
339
340 // Set the absolute address for methods
341 virtual void method_set( intptr_t addr );
342
343 // Should we clone rather than spill this instruction?
344 bool rematerialize() const;
345
346 // Get the pipeline info
347 static const Pipeline *pipeline_class();
348 virtual const Pipeline *pipeline() const;
349
350 // Returns true if this node is a check that can be implemented with a trap.
351 virtual bool is_TrapBasedCheckNode() const { return false; }
352
353 #ifndef PRODUCT
354 virtual const char *Name() const = 0; // Machine-specific name
355 virtual void dump_spec(outputStream *st) const; // Print per-node info
356 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
357 #endif
358 };
359
360 //------------------------------MachIdealNode----------------------------
361 // Machine specific versions of nodes that must be defined by user.
362 // These are not converted by matcher from ideal nodes to machine nodes
363 // but are inserted into the code by the compiler.
364 class MachIdealNode : public MachNode {
365 public:
366 MachIdealNode( ) {}
367
368 // Define the following defaults for non-matched machine nodes
369 virtual uint oper_input_base() const { return 0; }
370 virtual uint rule() const { return 9999999; }
371 virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); }
372 };
373
374 //------------------------------MachTypeNode----------------------------
375 // Machine Nodes that need to retain a known Type.
376 class MachTypeNode : public MachNode {
377 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
378 public:
379 MachTypeNode( ) {}
380 const Type *_bottom_type;
381
382 virtual const class Type *bottom_type() const { return _bottom_type; }
383 #ifndef PRODUCT
384 virtual void dump_spec(outputStream *st) const;
385 #endif
386 };
387
388 //------------------------------MachBreakpointNode----------------------------
389 // Machine breakpoint or interrupt Node
390 class MachBreakpointNode : public MachIdealNode {
391 public:
392 MachBreakpointNode( ) {}
393 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
394 virtual uint size(PhaseRegAlloc *ra_) const;
395
396 #ifndef PRODUCT
397 virtual const char *Name() const { return "Breakpoint"; }
398 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
399 #endif
400 };
401
402 //------------------------------MachConstantBaseNode--------------------------
403 // Machine node that represents the base address of the constant table.
404 class MachConstantBaseNode : public MachIdealNode {
405 public:
406 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask().
407
408 public:
409 MachConstantBaseNode() : MachIdealNode() {
410 init_class_id(Class_MachConstantBase);
411 }
412 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; }
413 virtual uint ideal_reg() const { return Op_RegP; }
414 virtual uint oper_input_base() const { return 1; }
415
416 virtual bool requires_postalloc_expand() const;
417 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
418
419 virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const;
420 virtual uint size(PhaseRegAlloc* ra_) const;
421 virtual bool pinned() const { return UseRDPCForConstantTableBase; }
422
423 static const RegMask& static_out_RegMask() { return _out_RegMask; }
424 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); }
425
426 #ifndef PRODUCT
427 virtual const char* Name() const { return "MachConstantBaseNode"; }
428 virtual void format(PhaseRegAlloc*, outputStream* st) const;
429 #endif
430 };
431
432 //------------------------------MachConstantNode-------------------------------
433 // Machine node that holds a constant which is stored in the constant table.
434 class MachConstantNode : public MachTypeNode {
435 protected:
436 Compile::Constant _constant; // This node's constant.
437
438 public:
439 MachConstantNode() : MachTypeNode() {
440 init_class_id(Class_MachConstant);
441 }
442
443 virtual void eval_constant(Compile* C) {
444 #ifdef ASSERT
445 tty->print("missing MachConstantNode eval_constant function: ");
446 dump();
447 #endif
448 ShouldNotCallThis();
449 }
450
451 virtual const RegMask &in_RegMask(uint idx) const {
452 if (idx == mach_constant_base_node_input())
453 return MachConstantBaseNode::static_out_RegMask();
454 return MachNode::in_RegMask(idx);
455 }
456
457 // Input edge of MachConstantBaseNode.
458 virtual uint mach_constant_base_node_input() const { return req() - 1; }
459
460 int constant_offset();
461 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); }
462 // Unchecked version to avoid assertions in debug output.
463 int constant_offset_unchecked() const;
464 };
465
466 //------------------------------MachVEPNode-----------------------------------
467 // Machine Value Type Entry Point Node
468 class MachVEPNode : public MachIdealNode {
469 public:
470 MachVEPNode(Label* verified_entry, bool verified, bool receiver_only) :
471 _verified_entry(verified_entry),
472 _verified(verified),
473 _receiver_only(receiver_only) {}
474 virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const;
475 virtual uint size(PhaseRegAlloc* ra_) const;
476
477 #ifndef PRODUCT
478 virtual const char* Name() const { return "ValueType Entry-Point"; }
479 virtual void format(PhaseRegAlloc*, outputStream* st) const;
480 #endif
481 private:
482 Label* _verified_entry;
483 bool _verified;
484 bool _receiver_only;
485 };
486
487 //------------------------------MachUEPNode-----------------------------------
488 // Machine Unvalidated Entry Point Node
489 class MachUEPNode : public MachIdealNode {
490 public:
491 MachUEPNode( ) {}
492 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
493 virtual uint size(PhaseRegAlloc *ra_) const;
494
495 #ifndef PRODUCT
496 virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
497 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
498 #endif
499 };
500
501 //------------------------------MachPrologNode--------------------------------
502 // Machine function Prolog Node
503 class MachPrologNode : public MachIdealNode {
504 public:
505 MachPrologNode(Label* verified_entry) : _verified_entry(verified_entry) {
506 init_class_id(Class_MachProlog);
507 }
508 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
509 virtual uint size(PhaseRegAlloc *ra_) const;
510 virtual int reloc() const;
511
512 Label* _verified_entry;
513 #ifndef PRODUCT
514 virtual const char *Name() const { return "Prolog"; }
515 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
516 #endif
517 };
518
519 //------------------------------MachEpilogNode--------------------------------
520 // Machine function Epilog Node
521 class MachEpilogNode : public MachIdealNode {
522 public:
523 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
524 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
525 virtual uint size(PhaseRegAlloc *ra_) const;
526 virtual int reloc() const;
527 virtual const Pipeline *pipeline() const;
528
529 private:
530 bool _do_polling;
531
532 public:
533 bool do_polling() const { return _do_polling; }
534
535 // Offset of safepoint from the beginning of the node
536 int safepoint_offset() const;
537
538 #ifndef PRODUCT
539 virtual const char *Name() const { return "Epilog"; }
540 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
541 #endif
542 };
543
544 //------------------------------MachNopNode-----------------------------------
545 // Machine function Nop Node
546 class MachNopNode : public MachIdealNode {
547 private:
548 int _count;
549 public:
550 MachNopNode( ) : _count(1) {}
551 MachNopNode( int count ) : _count(count) {}
552 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
553 virtual uint size(PhaseRegAlloc *ra_) const;
554
555 virtual const class Type *bottom_type() const { return Type::CONTROL; }
556
557 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
558 virtual const Pipeline *pipeline() const;
559 #ifndef PRODUCT
560 virtual const char *Name() const { return "Nop"; }
561 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
562 virtual void dump_spec(outputStream *st) const { } // No per-operand info
563 #endif
564 };
565
566 //------------------------------MachSpillCopyNode------------------------------
567 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any
568 // location (stack or register).
569 class MachSpillCopyNode : public MachIdealNode {
570 public:
571 enum SpillType {
572 TwoAddress, // Inserted when coalescing of a two-address-instruction node and its input fails
573 PhiInput, // Inserted when coalescing of a phi node and its input fails
574 DebugUse, // Inserted as debug info spills to safepoints in non-frequent blocks
575 LoopPhiInput, // Pre-split compares of loop-phis
576 Definition, // An lrg marked as spilled will be spilled to memory right after its definition,
577 // if in high pressure region or the lrg is bound
578 RegToReg, // A register to register move
579 RegToMem, // A register to memory move
580 MemToReg, // A memory to register move
581 PhiLocationDifferToInputLocation, // When coalescing phi nodes in PhaseChaitin::Split(), a move spill is inserted if
582 // the phi and its input resides at different locations (i.e. reg or mem)
583 BasePointerToMem, // Spill base pointer to memory at safepoint
584 InputToRematerialization, // When rematerializing a node we stretch the inputs live ranges, and they might be
585 // stretched beyond a new definition point, therefore we split out new copies instead
586 CallUse, // Spill use at a call
587 Bound // An lrg marked as spill that is bound and needs to be spilled at a use
588 };
589 private:
590 const RegMask *_in; // RegMask for input
591 const RegMask *_out; // RegMask for output
592 const Type *_type;
593 const SpillType _spill_type;
594 public:
595 MachSpillCopyNode(SpillType spill_type, Node *n, const RegMask &in, const RegMask &out ) :
596 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()), _spill_type(spill_type) {
597 init_class_id(Class_MachSpillCopy);
598 init_flags(Flag_is_Copy);
599 add_req(NULL);
600 add_req(n);
601 }
602 virtual uint size_of() const { return sizeof(*this); }
603 void set_out_RegMask(const RegMask &out) { _out = &out; }
604 void set_in_RegMask(const RegMask &in) { _in = ∈ }
605 virtual const RegMask &out_RegMask() const { return *_out; }
606 virtual const RegMask &in_RegMask(uint) const { return *_in; }
607 virtual const class Type *bottom_type() const { return _type; }
608 virtual uint ideal_reg() const { return _type->ideal_reg(); }
609 virtual uint oper_input_base() const { return 1; }
610 uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
611
612 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
613 virtual uint size(PhaseRegAlloc *ra_) const;
614
615
616 #ifndef PRODUCT
617 static const char *spill_type(SpillType st) {
618 switch (st) {
619 case TwoAddress:
620 return "TwoAddressSpillCopy";
621 case PhiInput:
622 return "PhiInputSpillCopy";
623 case DebugUse:
624 return "DebugUseSpillCopy";
625 case LoopPhiInput:
626 return "LoopPhiInputSpillCopy";
627 case Definition:
628 return "DefinitionSpillCopy";
629 case RegToReg:
630 return "RegToRegSpillCopy";
631 case RegToMem:
632 return "RegToMemSpillCopy";
633 case MemToReg:
634 return "MemToRegSpillCopy";
635 case PhiLocationDifferToInputLocation:
636 return "PhiLocationDifferToInputLocationSpillCopy";
637 case BasePointerToMem:
638 return "BasePointerToMemSpillCopy";
639 case InputToRematerialization:
640 return "InputToRematerializationSpillCopy";
641 case CallUse:
642 return "CallUseSpillCopy";
643 case Bound:
644 return "BoundSpillCopy";
645 default:
646 assert(false, "Must have valid spill type");
647 return "MachSpillCopy";
648 }
649 }
650
651 virtual const char *Name() const {
652 return spill_type(_spill_type);
653 }
654
655 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
656 #endif
657 };
658
659 // MachMergeNode is similar to a PhiNode in a sense it merges multiple values,
660 // however it doesn't have a control input and is more like a MergeMem.
661 // It is inserted after the register allocation is done to ensure that nodes use single
662 // definition of a multidef lrg in a block.
663 class MachMergeNode : public MachIdealNode {
664 public:
665 MachMergeNode(Node *n1) {
666 init_class_id(Class_MachMerge);
667 add_req(NULL);
668 add_req(n1);
669 }
670 virtual const RegMask &out_RegMask() const { return in(1)->out_RegMask(); }
671 virtual const RegMask &in_RegMask(uint idx) const { return in(1)->in_RegMask(idx); }
672 virtual const class Type *bottom_type() const { return in(1)->bottom_type(); }
673 virtual uint ideal_reg() const { return bottom_type()->ideal_reg(); }
674 virtual uint oper_input_base() const { return 1; }
675 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const { }
676 virtual uint size(PhaseRegAlloc *ra_) const { return 0; }
677 #ifndef PRODUCT
678 virtual const char *Name() const { return "MachMerge"; }
679 #endif
680 };
681
682 //------------------------------MachBranchNode--------------------------------
683 // Abstract machine branch Node
684 class MachBranchNode : public MachIdealNode {
685 public:
686 MachBranchNode() : MachIdealNode() {
687 init_class_id(Class_MachBranch);
688 }
689 virtual void label_set(Label* label, uint block_num) = 0;
690 virtual void save_label(Label** label, uint* block_num) = 0;
691
692 // Support for short branches
693 virtual MachNode *short_branch_version() { return NULL; }
694
695 virtual bool pinned() const { return true; };
696 };
697
698 //------------------------------MachNullChkNode--------------------------------
699 // Machine-dependent null-pointer-check Node. Points a real MachNode that is
700 // also some kind of memory op. Turns the indicated MachNode into a
701 // conditional branch with good latency on the ptr-not-null path and awful
702 // latency on the pointer-is-null path.
703
704 class MachNullCheckNode : public MachBranchNode {
705 public:
706 const uint _vidx; // Index of memop being tested
707 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) {
708 init_class_id(Class_MachNullCheck);
709 add_req(ctrl);
710 add_req(memop);
711 }
712 virtual uint size_of() const { return sizeof(*this); }
713
714 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
715 virtual void label_set(Label* label, uint block_num);
716 virtual void save_label(Label** label, uint* block_num);
717 virtual void negate() { }
718 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
719 virtual uint ideal_reg() const { return NotAMachineReg; }
720 virtual const RegMask &in_RegMask(uint) const;
721 virtual const RegMask &out_RegMask() const { return RegMask::Empty; }
722 #ifndef PRODUCT
723 virtual const char *Name() const { return "NullCheck"; }
724 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
725 #endif
726 };
727
728 //------------------------------MachProjNode----------------------------------
729 // Machine-dependent Ideal projections (how is that for an oxymoron). Really
730 // just MachNodes made by the Ideal world that replicate simple projections
731 // but with machine-dependent input & output register masks. Generally
732 // produced as part of calling conventions. Normally I make MachNodes as part
733 // of the Matcher process, but the Matcher is ill suited to issues involving
734 // frame handling, so frame handling is all done in the Ideal world with
735 // occasional callbacks to the machine model for important info.
736 class MachProjNode : public ProjNode {
737 public:
738 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {
739 init_class_id(Class_MachProj);
740 }
741 RegMask _rout;
742 const uint _ideal_reg;
743 enum projType {
744 unmatched_proj = 0, // Projs for Control, I/O, memory not matched
745 fat_proj = 999 // Projs killing many regs, defined by _rout
746 };
747 virtual int Opcode() const;
748 virtual const Type *bottom_type() const;
749 virtual const TypePtr *adr_type() const;
750 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; }
751 virtual const RegMask &out_RegMask() const { return _rout; }
752 virtual uint ideal_reg() const { return _ideal_reg; }
753 // Need size_of() for virtual ProjNode::clone()
754 virtual uint size_of() const { return sizeof(MachProjNode); }
755 #ifndef PRODUCT
756 virtual void dump_spec(outputStream *st) const;
757 #endif
758 };
759
760 //------------------------------MachIfNode-------------------------------------
761 // Machine-specific versions of IfNodes
762 class MachIfNode : public MachBranchNode {
763 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
764 public:
765 float _prob; // Probability branch goes either way
766 float _fcnt; // Frequency counter
767 MachIfNode() : MachBranchNode() {
768 init_class_id(Class_MachIf);
769 }
770 // Negate conditional branches.
771 virtual void negate() = 0;
772 #ifndef PRODUCT
773 virtual void dump_spec(outputStream *st) const;
774 #endif
775 };
776
777 //------------------------------MachJumpNode-----------------------------------
778 // Machine-specific versions of JumpNodes
779 class MachJumpNode : public MachConstantNode {
780 public:
781 float* _probs;
782 MachJumpNode() : MachConstantNode() {
783 init_class_id(Class_MachJump);
784 }
785 };
786
787 //------------------------------MachGotoNode-----------------------------------
788 // Machine-specific versions of GotoNodes
789 class MachGotoNode : public MachBranchNode {
790 public:
791 MachGotoNode() : MachBranchNode() {
792 init_class_id(Class_MachGoto);
793 }
794 };
795
796 //------------------------------MachFastLockNode-------------------------------------
797 // Machine-specific versions of FastLockNodes
798 class MachFastLockNode : public MachNode {
799 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
800 public:
801 BiasedLockingCounters* _counters;
802 RTMLockingCounters* _rtm_counters; // RTM lock counters for inflated locks
803 RTMLockingCounters* _stack_rtm_counters; // RTM lock counters for stack locks
804 MachFastLockNode() : MachNode() {}
805 };
806
807 //------------------------------MachReturnNode--------------------------------
808 // Machine-specific versions of subroutine returns
809 class MachReturnNode : public MachNode {
810 virtual uint size_of() const; // Size is bigger
811 public:
812 RegMask *_in_rms; // Input register masks, set during allocation
813 ReallocMark _nesting; // assertion check for reallocations
814 const TypePtr* _adr_type; // memory effects of call or return
815 MachReturnNode() : MachNode() {
816 init_class_id(Class_MachReturn);
817 _adr_type = TypePtr::BOTTOM; // the default: all of memory
818 }
819
820 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
821
822 virtual const RegMask &in_RegMask(uint) const;
823 virtual bool pinned() const { return true; };
824 virtual const TypePtr *adr_type() const;
825 };
826
827 //------------------------------MachSafePointNode-----------------------------
828 // Machine-specific versions of safepoints
829 class MachSafePointNode : public MachReturnNode {
830 public:
831 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC
832 JVMState* _jvms; // Pointer to list of JVM State Objects
833 uint _jvmadj; // Extra delta to jvms indexes (mach. args)
834 OopMap* oop_map() const { return _oop_map; }
835 void set_oop_map(OopMap* om) { _oop_map = om; }
836
837 MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0) {
838 init_class_id(Class_MachSafePoint);
839 }
840
841 virtual JVMState* jvms() const { return _jvms; }
842 void set_jvms(JVMState* s) {
843 _jvms = s;
844 }
845 virtual const Type *bottom_type() const;
846
847 virtual const RegMask &in_RegMask(uint) const;
848
849 // Functionality from old debug nodes
850 Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
851 Node *frameptr () const { return in(TypeFunc::FramePtr); }
852
853 Node *local(const JVMState* jvms, uint idx) const {
854 assert(verify_jvms(jvms), "jvms must match");
855 return in(_jvmadj + jvms->locoff() + idx);
856 }
857 Node *stack(const JVMState* jvms, uint idx) const {
858 assert(verify_jvms(jvms), "jvms must match");
859 return in(_jvmadj + jvms->stkoff() + idx);
860 }
861 Node *monitor_obj(const JVMState* jvms, uint idx) const {
862 assert(verify_jvms(jvms), "jvms must match");
863 return in(_jvmadj + jvms->monitor_obj_offset(idx));
864 }
865 Node *monitor_box(const JVMState* jvms, uint idx) const {
866 assert(verify_jvms(jvms), "jvms must match");
867 return in(_jvmadj + jvms->monitor_box_offset(idx));
868 }
869 void set_local(const JVMState* jvms, uint idx, Node *c) {
870 assert(verify_jvms(jvms), "jvms must match");
871 set_req(_jvmadj + jvms->locoff() + idx, c);
872 }
873 void set_stack(const JVMState* jvms, uint idx, Node *c) {
874 assert(verify_jvms(jvms), "jvms must match");
875 set_req(_jvmadj + jvms->stkoff() + idx, c);
876 }
877 void set_monitor(const JVMState* jvms, uint idx, Node *c) {
878 assert(verify_jvms(jvms), "jvms must match");
879 set_req(_jvmadj + jvms->monoff() + idx, c);
880 }
881 };
882
883 //------------------------------MachCallNode----------------------------------
884 // Machine-specific versions of subroutine calls
885 class MachCallNode : public MachSafePointNode {
886 protected:
887 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash
888 virtual uint cmp( const Node &n ) const;
889 virtual uint size_of() const = 0; // Size is bigger
890 public:
891 const TypeFunc *_tf; // Function type
892 address _entry_point; // Address of the method being called
893 float _cnt; // Estimate of number of times called
894 uint _argsize; // Size of argument block on stack
895
896 const TypeFunc* tf() const { return _tf; }
897 const address entry_point() const { return _entry_point; }
898 const float cnt() const { return _cnt; }
899 uint argsize() const { return _argsize; }
900
901 void set_tf(const TypeFunc* tf) { _tf = tf; }
902 void set_entry_point(address p) { _entry_point = p; }
903 void set_cnt(float c) { _cnt = c; }
904 void set_argsize(int s) { _argsize = s; }
905
906 MachCallNode() : MachSafePointNode() {
907 init_class_id(Class_MachCall);
908 }
909
910 virtual const Type *bottom_type() const;
911 virtual bool pinned() const { return false; }
912 virtual const Type* Value(PhaseGVN* phase) const;
913 virtual const RegMask &in_RegMask(uint) const;
914 virtual int ret_addr_offset() { return 0; }
915
916 bool returns_long() const { return tf()->return_type() == T_LONG; }
917 bool return_value_is_used() const;
918
919 // Similar to cousin class CallNode::returns_pointer
920 bool returns_pointer() const;
921 bool returns_vt() const;
922
923 #ifndef PRODUCT
924 virtual void dump_spec(outputStream *st) const;
925 #endif
926 };
927
928 //------------------------------MachCallJavaNode------------------------------
929 // "Base" class for machine-specific versions of subroutine calls
930 class MachCallJavaNode : public MachCallNode {
931 protected:
932 virtual uint cmp( const Node &n ) const;
933 virtual uint size_of() const; // Size is bigger
934 public:
935 ciMethod* _method; // Method being direct called
936 bool _override_symbolic_info; // Override symbolic call site info from bytecode
937 int _bci; // Byte Code index of call byte code
938 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual
939 bool _method_handle_invoke; // Tells if the call has to preserve SP
940 MachCallJavaNode() : MachCallNode(), _override_symbolic_info(false) {
941 init_class_id(Class_MachCallJava);
942 }
943
944 virtual const RegMask &in_RegMask(uint) const;
945
946 int resolved_method_index(CodeBuffer &cbuf) const {
947 if (_override_symbolic_info) {
948 // Attach corresponding Method* to the call site, so VM can use it during resolution
949 // instead of querying symbolic info from bytecode.
950 assert(_method != NULL, "method should be set");
951 assert(_method->constant_encoding()->is_method(), "should point to a Method");
952 return cbuf.oop_recorder()->find_index(_method->constant_encoding());
953 }
954 return 0; // Use symbolic info from bytecode (resolved_method == NULL).
955 }
956
957 #ifndef PRODUCT
958 virtual void dump_spec(outputStream *st) const;
959 #endif
960 };
961
962 //------------------------------MachCallStaticJavaNode------------------------
963 // Machine-specific versions of monomorphic subroutine calls
964 class MachCallStaticJavaNode : public MachCallJavaNode {
965 virtual uint cmp( const Node &n ) const;
966 virtual uint size_of() const; // Size is bigger
967 public:
968 const char *_name; // Runtime wrapper name
969 MachCallStaticJavaNode() : MachCallJavaNode() {
970 init_class_id(Class_MachCallStaticJava);
971 }
972
973 // If this is an uncommon trap, return the request code, else zero.
974 int uncommon_trap_request() const;
975
976 virtual int ret_addr_offset();
977 #ifndef PRODUCT
978 virtual void dump_spec(outputStream *st) const;
979 void dump_trap_args(outputStream *st) const;
980 #endif
981 };
982
983 //------------------------------MachCallDynamicJavaNode------------------------
984 // Machine-specific versions of possibly megamorphic subroutine calls
985 class MachCallDynamicJavaNode : public MachCallJavaNode {
986 public:
987 int _vtable_index;
988 MachCallDynamicJavaNode() : MachCallJavaNode() {
989 init_class_id(Class_MachCallDynamicJava);
990 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized
991 }
992 virtual int ret_addr_offset();
993 #ifndef PRODUCT
994 virtual void dump_spec(outputStream *st) const;
995 #endif
996 };
997
998 //------------------------------MachCallRuntimeNode----------------------------
999 // Machine-specific versions of subroutine calls
1000 class MachCallRuntimeNode : public MachCallNode {
1001 virtual uint cmp( const Node &n ) const;
1002 virtual uint size_of() const; // Size is bigger
1003 public:
1004 const char *_name; // Printable name, if _method is NULL
1005 MachCallRuntimeNode() : MachCallNode() {
1006 init_class_id(Class_MachCallRuntime);
1007 }
1008 virtual int ret_addr_offset();
1009 #ifndef PRODUCT
1010 virtual void dump_spec(outputStream *st) const;
1011 #endif
1012 };
1013
1014 class MachCallLeafNode: public MachCallRuntimeNode {
1015 public:
1016 MachCallLeafNode() : MachCallRuntimeNode() {
1017 init_class_id(Class_MachCallLeaf);
1018 }
1019 };
1020
1021 //------------------------------MachHaltNode-----------------------------------
1022 // Machine-specific versions of halt nodes
1023 class MachHaltNode : public MachReturnNode {
1024 public:
1025 virtual JVMState* jvms() const;
1026 };
1027
1028 class MachMemBarNode : public MachNode {
1029 virtual uint size_of() const; // Size is bigger
1030 public:
1031 const TypePtr* _adr_type; // memory effects
1032 MachMemBarNode() : MachNode() {
1033 init_class_id(Class_MachMemBar);
1034 _adr_type = TypePtr::BOTTOM; // the default: all of memory
1035 }
1036
1037 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
1038 virtual const TypePtr *adr_type() const;
1039 };
1040
1041
1042 //------------------------------MachTempNode-----------------------------------
1043 // Node used by the adlc to construct inputs to represent temporary registers
1044 class MachTempNode : public MachNode {
1045 private:
1046 MachOper *_opnd_array[1];
1047
1048 public:
1049 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
1050 virtual uint rule() const { return 9999999; }
1051 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {}
1052
1053 MachTempNode(MachOper* oper) {
1054 init_class_id(Class_MachTemp);
1055 _num_opnds = 1;
1056 _opnds = _opnd_array;
1057 add_req(NULL);
1058 _opnds[0] = oper;
1059 }
1060 virtual uint size_of() const { return sizeof(MachTempNode); }
1061
1062 #ifndef PRODUCT
1063 virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
1064 virtual const char *Name() const { return "MachTemp";}
1065 #endif
1066 };
1067
1068
1069
1070 //------------------------------labelOper--------------------------------------
1071 // Machine-independent version of label operand
1072 class labelOper : public MachOper {
1073 private:
1074 virtual uint num_edges() const { return 0; }
1075 public:
1076 // Supported for fixed size branches
1077 Label* _label; // Label for branch(es)
1078
1079 uint _block_num;
1080
1081 labelOper() : _label(0), _block_num(0) {}
1082
1083 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
1084
1085 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
1086
1087 virtual MachOper *clone() const;
1088
1089 virtual Label *label() const { assert(_label != NULL, "need Label"); return _label; }
1090
1091 virtual uint opcode() const;
1092
1093 virtual uint hash() const;
1094 virtual uint cmp( const MachOper &oper ) const;
1095 #ifndef PRODUCT
1096 virtual const char *Name() const { return "Label";}
1097
1098 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1099 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1100 #endif
1101 };
1102
1103
1104 //------------------------------methodOper--------------------------------------
1105 // Machine-independent version of method operand
1106 class methodOper : public MachOper {
1107 private:
1108 virtual uint num_edges() const { return 0; }
1109 public:
1110 intptr_t _method; // Address of method
1111 methodOper() : _method(0) {}
1112 methodOper(intptr_t method) : _method(method) {}
1113
1114 virtual MachOper *clone() const;
1115
1116 virtual intptr_t method() const { return _method; }
1117
1118 virtual uint opcode() const;
1119
1120 virtual uint hash() const;
1121 virtual uint cmp( const MachOper &oper ) const;
1122 #ifndef PRODUCT
1123 virtual const char *Name() const { return "Method";}
1124
1125 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1126 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1127 #endif
1128 };
1129
1130 #endif // SHARE_OPTO_MACHNODE_HPP