1 /*
2 * Copyright (c) 2005, 2016, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_Compilation.hpp"
27 #include "c1/c1_FrameMap.hpp"
28 #include "c1/c1_Instruction.hpp"
29 #include "c1/c1_LIRAssembler.hpp"
30 #include "c1/c1_LIRGenerator.hpp"
31 #include "c1/c1_Runtime1.hpp"
32 #include "c1/c1_ValueStack.hpp"
33 #include "ci/ciArray.hpp"
34 #include "ci/ciObjArrayKlass.hpp"
35 #include "ci/ciTypeArrayKlass.hpp"
36 #include "runtime/sharedRuntime.hpp"
37 #include "runtime/stubRoutines.hpp"
38 #include "vmreg_x86.inline.hpp"
39
40 #ifdef ASSERT
41 #define __ gen()->lir(__FILE__, __LINE__)->
42 #else
43 #define __ gen()->lir()->
44 #endif
45
46 // Item will be loaded into a byte register; Intel only
47 void LIRItem::load_byte_item() {
48 load_item();
49 LIR_Opr res = result();
50
51 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
52 // make sure that it is a byte register
53 assert(!value()->type()->is_float() && !value()->type()->is_double(),
54 "can't load floats in byte register");
55 LIR_Opr reg = _gen->rlock_byte(T_BYTE);
56 __ move(res, reg);
57
58 _result = reg;
59 }
60 }
61
62
63 void LIRItem::load_nonconstant() {
64 LIR_Opr r = value()->operand();
65 if (r->is_constant()) {
66 _result = r;
67 } else {
68 load_item();
69 }
70 }
71
72 //--------------------------------------------------------------
73 // LIRGenerator
74 //--------------------------------------------------------------
75
76
77 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
78 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; }
79 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; }
80 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; }
81 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; }
82 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; }
83 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; }
84 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }
85
86
87 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
88 LIR_Opr opr;
89 switch (type->tag()) {
90 case intTag: opr = FrameMap::rax_opr; break;
91 case objectTag: opr = FrameMap::rax_oop_opr; break;
92 case longTag: opr = FrameMap::long0_opr; break;
93 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break;
94 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break;
95
96 case addressTag:
97 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
98 }
99
100 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
101 return opr;
102 }
103
104
105 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
106 LIR_Opr reg = new_register(T_INT);
107 set_vreg_flag(reg, LIRGenerator::byte_reg);
108 return reg;
109 }
110
111
112 //--------- loading items into registers --------------------------------
113
114
115 // i486 instructions can inline constants
116 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
117 if (type == T_SHORT || type == T_CHAR) {
118 // there is no immediate move of word values in asembler_i486.?pp
119 return false;
120 }
121 Constant* c = v->as_Constant();
122 if (c && c->state_before() == NULL) {
123 // constants of any type can be stored directly, except for
124 // unloaded object constants.
125 return true;
126 }
127 return false;
128 }
129
130
131 bool LIRGenerator::can_inline_as_constant(Value v) const {
132 if (v->type()->tag() == longTag) return false;
133 return v->type()->tag() != objectTag ||
134 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
135 }
136
137
138 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
139 if (c->type() == T_LONG) return false;
140 return c->type() != T_OBJECT || c->as_jobject() == NULL;
141 }
142
143
144 LIR_Opr LIRGenerator::safepoint_poll_register() {
145 return LIR_OprFact::illegalOpr;
146 }
147
148
149 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
150 int shift, int disp, BasicType type) {
151 assert(base->is_register(), "must be");
152 if (index->is_constant()) {
153 return new LIR_Address(base,
154 (index->as_constant_ptr()->as_jint() << shift) + disp,
155 type);
156 } else {
157 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
158 }
159 }
160
161
162 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
163 BasicType type, bool needs_card_mark) {
164 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
165
166 LIR_Address* addr;
167 if (index_opr->is_constant()) {
168 int elem_size = type2aelembytes(type);
169 addr = new LIR_Address(array_opr,
170 offset_in_bytes + index_opr->as_jint() * elem_size, type);
171 } else {
172 #ifdef _LP64
173 if (index_opr->type() == T_INT) {
174 LIR_Opr tmp = new_register(T_LONG);
175 __ convert(Bytecodes::_i2l, index_opr, tmp);
176 index_opr = tmp;
177 }
178 #endif // _LP64
179 addr = new LIR_Address(array_opr,
180 index_opr,
181 LIR_Address::scale(type),
182 offset_in_bytes, type);
183 }
184 if (needs_card_mark) {
185 // This store will need a precise card mark, so go ahead and
186 // compute the full adddres instead of computing once for the
187 // store and again for the card mark.
188 LIR_Opr tmp = new_pointer_register();
189 __ leal(LIR_OprFact::address(addr), tmp);
190 return new LIR_Address(tmp, type);
191 } else {
192 return addr;
193 }
194 }
195
196
197 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
198 LIR_Opr r = NULL;
199 if (type == T_LONG) {
200 r = LIR_OprFact::longConst(x);
201 } else if (type == T_INT) {
202 r = LIR_OprFact::intConst(x);
203 } else {
204 ShouldNotReachHere();
205 }
206 return r;
207 }
208
209 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
210 LIR_Opr pointer = new_pointer_register();
211 __ move(LIR_OprFact::intptrConst(counter), pointer);
212 LIR_Address* addr = new LIR_Address(pointer, type);
213 increment_counter(addr, step);
214 }
215
216
217 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
218 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
219 }
220
221 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
222 __ cmp_mem_int(condition, base, disp, c, info);
223 }
224
225
226 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
227 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
228 }
229
230
231 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
232 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
233 }
234
235
236 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
237 if (tmp->is_valid()) {
238 if (is_power_of_2(c + 1)) {
239 __ move(left, tmp);
240 __ shift_left(left, log2_intptr(c + 1), left);
241 __ sub(left, tmp, result);
242 return true;
243 } else if (is_power_of_2(c - 1)) {
244 __ move(left, tmp);
245 __ shift_left(left, log2_intptr(c - 1), left);
246 __ add(left, tmp, result);
247 return true;
248 }
249 }
250 return false;
251 }
252
253
254 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
255 BasicType type = item->type();
256 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
257 }
258
259 //----------------------------------------------------------------------
260 // visitor functions
261 //----------------------------------------------------------------------
262
263
264 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
265 assert(x->is_pinned(),"");
266 bool needs_range_check = x->compute_needs_range_check();
267 bool use_length = x->length() != NULL;
268 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
269 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
270 !get_jobject_constant(x->value())->is_null_object() ||
271 x->should_profile());
272
273 LIRItem array(x->array(), this);
274 LIRItem index(x->index(), this);
275 LIRItem value(x->value(), this);
276 LIRItem length(this);
277
278 array.load_item();
279 index.load_nonconstant();
280
281 if (use_length && needs_range_check) {
282 length.set_instruction(x->length());
283 length.load_item();
284
285 }
286 if (needs_store_check || x->check_boolean()) {
287 value.load_item();
288 } else {
289 value.load_for_store(x->elt_type());
290 }
291
292 set_no_result(x);
293
294 // the CodeEmitInfo must be duplicated for each different
295 // LIR-instruction because spilling can occur anywhere between two
296 // instructions and so the debug information must be different
297 CodeEmitInfo* range_check_info = state_for(x);
298 CodeEmitInfo* null_check_info = NULL;
299 if (x->needs_null_check()) {
300 null_check_info = new CodeEmitInfo(range_check_info);
301 }
302
303 // emit array address setup early so it schedules better
304 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
305
306 if (GenerateRangeChecks && needs_range_check) {
307 if (use_length) {
308 __ cmp(lir_cond_belowEqual, length.result(), index.result());
309 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
310 } else {
311 array_range_check(array.result(), index.result(), null_check_info, range_check_info);
312 // range_check also does the null check
313 null_check_info = NULL;
314 }
315 }
316
317 if (GenerateArrayStoreCheck && needs_store_check) {
318 LIR_Opr tmp1 = new_register(objectType);
319 LIR_Opr tmp2 = new_register(objectType);
320 LIR_Opr tmp3 = new_register(objectType);
321
322 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
323 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci());
324 }
325
326 if (obj_store) {
327 // Needs GC write barriers.
328 pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
329 true /* do_load */, false /* patch */, NULL);
330 __ move(value.result(), array_addr, null_check_info);
331 // Seems to be a precise
332 post_barrier(LIR_OprFact::address(array_addr), value.result());
333 } else {
334 LIR_Opr result = maybe_mask_boolean(x, array.result(), value.result(), null_check_info);
335 __ move(result, array_addr, null_check_info);
336 }
337 }
338
339
340 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
341 assert(x->is_pinned(),"");
342 LIRItem obj(x->obj(), this);
343 obj.load_item();
344
345 set_no_result(x);
346
347 // "lock" stores the address of the monitor stack slot, so this is not an oop
348 LIR_Opr lock = new_register(T_INT);
349 // Need a scratch register for biased locking on x86
350 LIR_Opr scratch = LIR_OprFact::illegalOpr;
351 if (UseBiasedLocking) {
352 scratch = new_register(T_INT);
353 }
354
355 CodeEmitInfo* info_for_exception = NULL;
356 if (x->needs_null_check()) {
357 info_for_exception = state_for(x);
358 }
359 // this CodeEmitInfo must not have the xhandlers because here the
360 // object is already locked (xhandlers expect object to be unlocked)
361 CodeEmitInfo* info = state_for(x, x->state(), true);
362 monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
363 x->monitor_no(), info_for_exception, info);
364 }
365
366
367 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
368 assert(x->is_pinned(),"");
369
370 LIRItem obj(x->obj(), this);
371 obj.dont_load_item();
372
373 LIR_Opr lock = new_register(T_INT);
374 LIR_Opr obj_temp = new_register(T_INT);
375 set_no_result(x);
376 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no(), state_for(x, x->state(), true));
377 }
378
379
380 // _ineg, _lneg, _fneg, _dneg
381 void LIRGenerator::do_NegateOp(NegateOp* x) {
382 LIRItem value(x->x(), this);
383 value.set_destroys_register();
384 value.load_item();
385 LIR_Opr reg = rlock(x);
386 __ negate(value.result(), reg);
387
388 set_result(x, round_item(reg));
389 }
390
391
392 // for _fadd, _fmul, _fsub, _fdiv, _frem
393 // _dadd, _dmul, _dsub, _ddiv, _drem
394 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
395 LIRItem left(x->x(), this);
396 LIRItem right(x->y(), this);
397 LIRItem* left_arg = &left;
398 LIRItem* right_arg = &right;
399 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
400 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
401 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
402 left.load_item();
403 } else {
404 left.dont_load_item();
405 }
406
407 // do not load right operand if it is a constant. only 0 and 1 are
408 // loaded because there are special instructions for loading them
409 // without memory access (not needed for SSE2 instructions)
410 bool must_load_right = false;
411 if (right.is_constant()) {
412 LIR_Const* c = right.result()->as_constant_ptr();
413 assert(c != NULL, "invalid constant");
414 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
415
416 if (c->type() == T_FLOAT) {
417 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
418 } else {
419 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
420 }
421 }
422
423 if (must_load_both) {
424 // frem and drem destroy also right operand, so move it to a new register
425 right.set_destroys_register();
426 right.load_item();
427 } else if (right.is_register() || must_load_right) {
428 right.load_item();
429 } else {
430 right.dont_load_item();
431 }
432 LIR_Opr reg = rlock(x);
433 LIR_Opr tmp = LIR_OprFact::illegalOpr;
434 if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) {
435 tmp = new_register(T_DOUBLE);
436 }
437
438 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
439 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
440 LIR_Opr fpu0, fpu1;
441 if (x->op() == Bytecodes::_frem) {
442 fpu0 = LIR_OprFact::single_fpu(0);
443 fpu1 = LIR_OprFact::single_fpu(1);
444 } else {
445 fpu0 = LIR_OprFact::double_fpu(0);
446 fpu1 = LIR_OprFact::double_fpu(1);
447 }
448 __ move(right.result(), fpu1); // order of left and right operand is important!
449 __ move(left.result(), fpu0);
450 __ rem (fpu0, fpu1, fpu0);
451 __ move(fpu0, reg);
452
453 } else {
454 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp);
455 }
456
457 set_result(x, round_item(reg));
458 }
459
460
461 // for _ladd, _lmul, _lsub, _ldiv, _lrem
462 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
463 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
464 // long division is implemented as a direct call into the runtime
465 LIRItem left(x->x(), this);
466 LIRItem right(x->y(), this);
467
468 // the check for division by zero destroys the right operand
469 right.set_destroys_register();
470
471 BasicTypeList signature(2);
472 signature.append(T_LONG);
473 signature.append(T_LONG);
474 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
475
476 // check for division by zero (destroys registers of right operand!)
477 CodeEmitInfo* info = state_for(x);
478
479 const LIR_Opr result_reg = result_register_for(x->type());
480 left.load_item_force(cc->at(1));
481 right.load_item();
482
483 __ move(right.result(), cc->at(0));
484
485 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
486 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
487
488 address entry = NULL;
489 switch (x->op()) {
490 case Bytecodes::_lrem:
491 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
492 break; // check if dividend is 0 is done elsewhere
493 case Bytecodes::_ldiv:
494 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
495 break; // check if dividend is 0 is done elsewhere
496 case Bytecodes::_lmul:
497 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
498 break;
499 default:
500 ShouldNotReachHere();
501 }
502
503 LIR_Opr result = rlock_result(x);
504 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
505 __ move(result_reg, result);
506 } else if (x->op() == Bytecodes::_lmul) {
507 // missing test if instr is commutative and if we should swap
508 LIRItem left(x->x(), this);
509 LIRItem right(x->y(), this);
510
511 // right register is destroyed by the long mul, so it must be
512 // copied to a new register.
513 right.set_destroys_register();
514
515 left.load_item();
516 right.load_item();
517
518 LIR_Opr reg = FrameMap::long0_opr;
519 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
520 LIR_Opr result = rlock_result(x);
521 __ move(reg, result);
522 } else {
523 // missing test if instr is commutative and if we should swap
524 LIRItem left(x->x(), this);
525 LIRItem right(x->y(), this);
526
527 left.load_item();
528 // don't load constants to save register
529 right.load_nonconstant();
530 rlock_result(x);
531 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
532 }
533 }
534
535
536
537 // for: _iadd, _imul, _isub, _idiv, _irem
538 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
539 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
540 // The requirements for division and modulo
541 // input : rax,: dividend min_int
542 // reg: divisor (may not be rax,/rdx) -1
543 //
544 // output: rax,: quotient (= rax, idiv reg) min_int
545 // rdx: remainder (= rax, irem reg) 0
546
547 // rax, and rdx will be destroyed
548
549 // Note: does this invalidate the spec ???
550 LIRItem right(x->y(), this);
551 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid
552
553 // call state_for before load_item_force because state_for may
554 // force the evaluation of other instructions that are needed for
555 // correct debug info. Otherwise the live range of the fix
556 // register might be too long.
557 CodeEmitInfo* info = state_for(x);
558
559 left.load_item_force(divInOpr());
560
561 right.load_item();
562
563 LIR_Opr result = rlock_result(x);
564 LIR_Opr result_reg;
565 if (x->op() == Bytecodes::_idiv) {
566 result_reg = divOutOpr();
567 } else {
568 result_reg = remOutOpr();
569 }
570
571 if (!ImplicitDiv0Checks) {
572 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
573 __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));
574 }
575 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
576 if (x->op() == Bytecodes::_irem) {
577 __ irem(left.result(), right.result(), result_reg, tmp, info);
578 } else if (x->op() == Bytecodes::_idiv) {
579 __ idiv(left.result(), right.result(), result_reg, tmp, info);
580 } else {
581 ShouldNotReachHere();
582 }
583
584 __ move(result_reg, result);
585 } else {
586 // missing test if instr is commutative and if we should swap
587 LIRItem left(x->x(), this);
588 LIRItem right(x->y(), this);
589 LIRItem* left_arg = &left;
590 LIRItem* right_arg = &right;
591 if (x->is_commutative() && left.is_stack() && right.is_register()) {
592 // swap them if left is real stack (or cached) and right is real register(not cached)
593 left_arg = &right;
594 right_arg = &left;
595 }
596
597 left_arg->load_item();
598
599 // do not need to load right, as we can handle stack and constants
600 if (x->op() == Bytecodes::_imul ) {
601 // check if we can use shift instead
602 bool use_constant = false;
603 bool use_tmp = false;
604 if (right_arg->is_constant()) {
605 int iconst = right_arg->get_jint_constant();
606 if (iconst > 0) {
607 if (is_power_of_2(iconst)) {
608 use_constant = true;
609 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
610 use_constant = true;
611 use_tmp = true;
612 }
613 }
614 }
615 if (use_constant) {
616 right_arg->dont_load_item();
617 } else {
618 right_arg->load_item();
619 }
620 LIR_Opr tmp = LIR_OprFact::illegalOpr;
621 if (use_tmp) {
622 tmp = new_register(T_INT);
623 }
624 rlock_result(x);
625
626 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
627 } else {
628 right_arg->dont_load_item();
629 rlock_result(x);
630 LIR_Opr tmp = LIR_OprFact::illegalOpr;
631 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
632 }
633 }
634 }
635
636
637 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
638 // when an operand with use count 1 is the left operand, then it is
639 // likely that no move for 2-operand-LIR-form is necessary
640 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
641 x->swap_operands();
642 }
643
644 ValueTag tag = x->type()->tag();
645 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
646 switch (tag) {
647 case floatTag:
648 case doubleTag: do_ArithmeticOp_FPU(x); return;
649 case longTag: do_ArithmeticOp_Long(x); return;
650 case intTag: do_ArithmeticOp_Int(x); return;
651 }
652 ShouldNotReachHere();
653 }
654
655
656 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
657 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
658 // count must always be in rcx
659 LIRItem value(x->x(), this);
660 LIRItem count(x->y(), this);
661
662 ValueTag elemType = x->type()->tag();
663 bool must_load_count = !count.is_constant() || elemType == longTag;
664 if (must_load_count) {
665 // count for long must be in register
666 count.load_item_force(shiftCountOpr());
667 } else {
668 count.dont_load_item();
669 }
670 value.load_item();
671 LIR_Opr reg = rlock_result(x);
672
673 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
674 }
675
676
677 // _iand, _land, _ior, _lor, _ixor, _lxor
678 void LIRGenerator::do_LogicOp(LogicOp* x) {
679 // when an operand with use count 1 is the left operand, then it is
680 // likely that no move for 2-operand-LIR-form is necessary
681 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
682 x->swap_operands();
683 }
684
685 LIRItem left(x->x(), this);
686 LIRItem right(x->y(), this);
687
688 left.load_item();
689 right.load_nonconstant();
690 LIR_Opr reg = rlock_result(x);
691
692 logic_op(x->op(), reg, left.result(), right.result());
693 }
694
695
696
697 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
698 void LIRGenerator::do_CompareOp(CompareOp* x) {
699 LIRItem left(x->x(), this);
700 LIRItem right(x->y(), this);
701 ValueTag tag = x->x()->type()->tag();
702 if (tag == longTag) {
703 left.set_destroys_register();
704 }
705 left.load_item();
706 right.load_item();
707 LIR_Opr reg = rlock_result(x);
708
709 if (x->x()->type()->is_float_kind()) {
710 Bytecodes::Code code = x->op();
711 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
712 } else if (x->x()->type()->tag() == longTag) {
713 __ lcmp2int(left.result(), right.result(), reg);
714 } else {
715 Unimplemented();
716 }
717 }
718
719
720 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
721 assert(x->number_of_arguments() == 4, "wrong type");
722 LIRItem obj (x->argument_at(0), this); // object
723 LIRItem offset(x->argument_at(1), this); // offset of field
724 LIRItem cmp (x->argument_at(2), this); // value to compare with field
725 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp
726
727 assert(obj.type()->tag() == objectTag, "invalid type");
728
729 // In 64bit the type can be long, sparc doesn't have this assert
730 // assert(offset.type()->tag() == intTag, "invalid type");
731
732 assert(cmp.type()->tag() == type->tag(), "invalid type");
733 assert(val.type()->tag() == type->tag(), "invalid type");
734
735 // get address of field
736 obj.load_item();
737 offset.load_nonconstant();
738
739 if (type == objectType) {
740 cmp.load_item_force(FrameMap::rax_oop_opr);
741 val.load_item();
742 } else if (type == intType) {
743 cmp.load_item_force(FrameMap::rax_opr);
744 val.load_item();
745 } else if (type == longType) {
746 cmp.load_item_force(FrameMap::long0_opr);
747 val.load_item_force(FrameMap::long1_opr);
748 } else {
749 ShouldNotReachHere();
750 }
751
752 LIR_Opr addr = new_pointer_register();
753 LIR_Address* a;
754 if(offset.result()->is_constant()) {
755 #ifdef _LP64
756 jlong c = offset.result()->as_jlong();
757 if ((jlong)((jint)c) == c) {
758 a = new LIR_Address(obj.result(),
759 (jint)c,
760 as_BasicType(type));
761 } else {
762 LIR_Opr tmp = new_register(T_LONG);
763 __ move(offset.result(), tmp);
764 a = new LIR_Address(obj.result(),
765 tmp,
766 as_BasicType(type));
767 }
768 #else
769 a = new LIR_Address(obj.result(),
770 offset.result()->as_jint(),
771 as_BasicType(type));
772 #endif
773 } else {
774 a = new LIR_Address(obj.result(),
775 offset.result(),
776 LIR_Address::times_1,
777 0,
778 as_BasicType(type));
779 }
780 __ leal(LIR_OprFact::address(a), addr);
781
782 if (type == objectType) { // Write-barrier needed for Object fields.
783 // Do the pre-write barrier, if any.
784 pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */,
785 true /* do_load */, false /* patch */, NULL);
786 }
787
788 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
789 if (type == objectType)
790 __ cas_obj(addr, cmp.result(), val.result(), ill, ill);
791 else if (type == intType)
792 __ cas_int(addr, cmp.result(), val.result(), ill, ill);
793 else if (type == longType)
794 __ cas_long(addr, cmp.result(), val.result(), ill, ill);
795 else {
796 ShouldNotReachHere();
797 }
798
799 // generate conditional move of boolean result
800 LIR_Opr result = rlock_result(x);
801 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
802 result, as_BasicType(type));
803 if (type == objectType) { // Write-barrier needed for Object fields.
804 // Seems to be precise
805 post_barrier(addr, val.result());
806 }
807 }
808
809
810 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
811 assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
812 LIRItem value(x->argument_at(0), this);
813
814 bool use_fpu = false;
815 if (UseSSE >= 2) {
816 switch(x->id()) {
817 case vmIntrinsics::_dsin:
818 case vmIntrinsics::_dcos:
819 case vmIntrinsics::_dtan:
820 case vmIntrinsics::_dlog:
821 case vmIntrinsics::_dlog10:
822 case vmIntrinsics::_dexp:
823 case vmIntrinsics::_dpow:
824 use_fpu = true;
825 }
826 } else {
827 value.set_destroys_register();
828 }
829
830 value.load_item();
831
832 LIR_Opr calc_input = value.result();
833 LIR_Opr calc_input2 = NULL;
834 if (x->id() == vmIntrinsics::_dpow) {
835 LIRItem extra_arg(x->argument_at(1), this);
836 if (UseSSE < 2) {
837 extra_arg.set_destroys_register();
838 }
839 extra_arg.load_item();
840 calc_input2 = extra_arg.result();
841 }
842 LIR_Opr calc_result = rlock_result(x);
843
844 // sin, cos, pow and exp need two free fpu stack slots, so register
845 // two temporary operands
846 LIR_Opr tmp1 = FrameMap::caller_save_fpu_reg_at(0);
847 LIR_Opr tmp2 = FrameMap::caller_save_fpu_reg_at(1);
848
849 if (use_fpu) {
850 LIR_Opr tmp = FrameMap::fpu0_double_opr;
851 int tmp_start = 1;
852 if (calc_input2 != NULL) {
853 __ move(calc_input2, tmp);
854 tmp_start = 2;
855 calc_input2 = tmp;
856 }
857 __ move(calc_input, tmp);
858
859 calc_input = tmp;
860 calc_result = tmp;
861
862 tmp1 = FrameMap::caller_save_fpu_reg_at(tmp_start);
863 tmp2 = FrameMap::caller_save_fpu_reg_at(tmp_start + 1);
864 }
865
866 switch(x->id()) {
867 case vmIntrinsics::_dabs: __ abs (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
868 case vmIntrinsics::_dsqrt: __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
869 case vmIntrinsics::_dsin: __ sin (calc_input, calc_result, tmp1, tmp2); break;
870 case vmIntrinsics::_dcos: __ cos (calc_input, calc_result, tmp1, tmp2); break;
871 case vmIntrinsics::_dtan: __ tan (calc_input, calc_result, tmp1, tmp2); break;
872 case vmIntrinsics::_dlog: __ log (calc_input, calc_result, tmp1); break;
873 case vmIntrinsics::_dlog10: __ log10(calc_input, calc_result, tmp1); break;
874 case vmIntrinsics::_dexp: __ exp (calc_input, calc_result, tmp1, tmp2, FrameMap::rax_opr, FrameMap::rcx_opr, FrameMap::rdx_opr); break;
875 case vmIntrinsics::_dpow: __ pow (calc_input, calc_input2, calc_result, tmp1, tmp2, FrameMap::rax_opr, FrameMap::rcx_opr, FrameMap::rdx_opr); break;
876 default: ShouldNotReachHere();
877 }
878
879 if (use_fpu) {
880 __ move(calc_result, x->operand());
881 }
882 }
883
884
885 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
886 assert(x->number_of_arguments() == 5, "wrong type");
887
888 // Make all state_for calls early since they can emit code
889 CodeEmitInfo* info = state_for(x, x->state());
890
891 LIRItem src(x->argument_at(0), this);
892 LIRItem src_pos(x->argument_at(1), this);
893 LIRItem dst(x->argument_at(2), this);
894 LIRItem dst_pos(x->argument_at(3), this);
895 LIRItem length(x->argument_at(4), this);
896
897 // operands for arraycopy must use fixed registers, otherwise
898 // LinearScan will fail allocation (because arraycopy always needs a
899 // call)
900
901 #ifndef _LP64
902 src.load_item_force (FrameMap::rcx_oop_opr);
903 src_pos.load_item_force (FrameMap::rdx_opr);
904 dst.load_item_force (FrameMap::rax_oop_opr);
905 dst_pos.load_item_force (FrameMap::rbx_opr);
906 length.load_item_force (FrameMap::rdi_opr);
907 LIR_Opr tmp = (FrameMap::rsi_opr);
908 #else
909
910 // The java calling convention will give us enough registers
911 // so that on the stub side the args will be perfect already.
912 // On the other slow/special case side we call C and the arg
913 // positions are not similar enough to pick one as the best.
914 // Also because the java calling convention is a "shifted" version
915 // of the C convention we can process the java args trivially into C
916 // args without worry of overwriting during the xfer
917
918 src.load_item_force (FrameMap::as_oop_opr(j_rarg0));
919 src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
920 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2));
921 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
922 length.load_item_force (FrameMap::as_opr(j_rarg4));
923
924 LIR_Opr tmp = FrameMap::as_opr(j_rarg5);
925 #endif // LP64
926
927 set_no_result(x);
928
929 int flags;
930 ciArrayKlass* expected_type;
931 arraycopy_helper(x, &flags, &expected_type);
932
933 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
934 }
935
936 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
937 assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support");
938 // Make all state_for calls early since they can emit code
939 LIR_Opr result = rlock_result(x);
940 int flags = 0;
941 switch (x->id()) {
942 case vmIntrinsics::_updateCRC32: {
943 LIRItem crc(x->argument_at(0), this);
944 LIRItem val(x->argument_at(1), this);
945 // val is destroyed by update_crc32
946 val.set_destroys_register();
947 crc.load_item();
948 val.load_item();
949 __ update_crc32(crc.result(), val.result(), result);
950 break;
951 }
952 case vmIntrinsics::_updateBytesCRC32:
953 case vmIntrinsics::_updateByteBufferCRC32: {
954 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
955
956 LIRItem crc(x->argument_at(0), this);
957 LIRItem buf(x->argument_at(1), this);
958 LIRItem off(x->argument_at(2), this);
959 LIRItem len(x->argument_at(3), this);
960 buf.load_item();
961 off.load_nonconstant();
962
963 LIR_Opr index = off.result();
964 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
965 if(off.result()->is_constant()) {
966 index = LIR_OprFact::illegalOpr;
967 offset += off.result()->as_jint();
968 }
969 LIR_Opr base_op = buf.result();
970
971 #ifndef _LP64
972 if (!is_updateBytes) { // long b raw address
973 base_op = new_register(T_INT);
974 __ convert(Bytecodes::_l2i, buf.result(), base_op);
975 }
976 #else
977 if (index->is_valid()) {
978 LIR_Opr tmp = new_register(T_LONG);
979 __ convert(Bytecodes::_i2l, index, tmp);
980 index = tmp;
981 }
982 #endif
983
984 LIR_Address* a = new LIR_Address(base_op,
985 index,
986 LIR_Address::times_1,
987 offset,
988 T_BYTE);
989 BasicTypeList signature(3);
990 signature.append(T_INT);
991 signature.append(T_ADDRESS);
992 signature.append(T_INT);
993 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
994 const LIR_Opr result_reg = result_register_for(x->type());
995
996 LIR_Opr addr = new_pointer_register();
997 __ leal(LIR_OprFact::address(a), addr);
998
999 crc.load_item_force(cc->at(0));
1000 __ move(addr, cc->at(1));
1001 len.load_item_force(cc->at(2));
1002
1003 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
1004 __ move(result_reg, result);
1005
1006 break;
1007 }
1008 default: {
1009 ShouldNotReachHere();
1010 }
1011 }
1012 }
1013
1014 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
1015 // _i2b, _i2c, _i2s
1016 LIR_Opr fixed_register_for(BasicType type) {
1017 switch (type) {
1018 case T_FLOAT: return FrameMap::fpu0_float_opr;
1019 case T_DOUBLE: return FrameMap::fpu0_double_opr;
1020 case T_INT: return FrameMap::rax_opr;
1021 case T_LONG: return FrameMap::long0_opr;
1022 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
1023 }
1024 }
1025
1026 void LIRGenerator::do_Convert(Convert* x) {
1027 // flags that vary for the different operations and different SSE-settings
1028 bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false;
1029
1030 switch (x->op()) {
1031 case Bytecodes::_i2l: // fall through
1032 case Bytecodes::_l2i: // fall through
1033 case Bytecodes::_i2b: // fall through
1034 case Bytecodes::_i2c: // fall through
1035 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
1036
1037 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break;
1038 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
1039 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break;
1040 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
1041 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1042 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1043 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
1044 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
1045 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
1046 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
1047 default: ShouldNotReachHere();
1048 }
1049
1050 LIRItem value(x->value(), this);
1051 value.load_item();
1052 LIR_Opr input = value.result();
1053 LIR_Opr result = rlock(x);
1054
1055 // arguments of lir_convert
1056 LIR_Opr conv_input = input;
1057 LIR_Opr conv_result = result;
1058 ConversionStub* stub = NULL;
1059
1060 if (fixed_input) {
1061 conv_input = fixed_register_for(input->type());
1062 __ move(input, conv_input);
1063 }
1064
1065 assert(fixed_result == false || round_result == false, "cannot set both");
1066 if (fixed_result) {
1067 conv_result = fixed_register_for(result->type());
1068 } else if (round_result) {
1069 result = new_register(result->type());
1070 set_vreg_flag(result, must_start_in_memory);
1071 }
1072
1073 if (needs_stub) {
1074 stub = new ConversionStub(x->op(), conv_input, conv_result);
1075 }
1076
1077 __ convert(x->op(), conv_input, conv_result, stub);
1078
1079 if (result != conv_result) {
1080 __ move(conv_result, result);
1081 }
1082
1083 assert(result->is_virtual(), "result must be virtual register");
1084 set_result(x, result);
1085 }
1086
1087
1088 void LIRGenerator::do_NewInstance(NewInstance* x) {
1089 print_if_not_loaded(x);
1090
1091 CodeEmitInfo* info = state_for(x, x->state());
1092 LIR_Opr reg = result_register_for(x->type());
1093 new_instance(reg, x->klass(), x->is_unresolved(),
1094 FrameMap::rcx_oop_opr,
1095 FrameMap::rdi_oop_opr,
1096 FrameMap::rsi_oop_opr,
1097 LIR_OprFact::illegalOpr,
1098 FrameMap::rdx_metadata_opr, info);
1099 LIR_Opr result = rlock_result(x);
1100 __ move(reg, result);
1101 }
1102
1103
1104 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1105 CodeEmitInfo* info = state_for(x, x->state());
1106
1107 LIRItem length(x->length(), this);
1108 length.load_item_force(FrameMap::rbx_opr);
1109
1110 LIR_Opr reg = result_register_for(x->type());
1111 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1112 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1113 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1114 LIR_Opr tmp4 = reg;
1115 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1116 LIR_Opr len = length.result();
1117 BasicType elem_type = x->elt_type();
1118
1119 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1120
1121 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1122 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1123
1124 LIR_Opr result = rlock_result(x);
1125 __ move(reg, result);
1126 }
1127
1128
1129 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1130 LIRItem length(x->length(), this);
1131 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1132 // and therefore provide the state before the parameters have been consumed
1133 CodeEmitInfo* patching_info = NULL;
1134 if (!x->klass()->is_loaded() || PatchALot) {
1135 patching_info = state_for(x, x->state_before());
1136 }
1137
1138 CodeEmitInfo* info = state_for(x, x->state());
1139
1140 const LIR_Opr reg = result_register_for(x->type());
1141 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1142 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1143 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1144 LIR_Opr tmp4 = reg;
1145 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1146
1147 length.load_item_force(FrameMap::rbx_opr);
1148 LIR_Opr len = length.result();
1149
1150 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1151 ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass());
1152 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1153 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1154 }
1155 klass2reg_with_patching(klass_reg, obj, patching_info);
1156 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1157
1158 LIR_Opr result = rlock_result(x);
1159 __ move(reg, result);
1160 }
1161
1162
1163 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1164 Values* dims = x->dims();
1165 int i = dims->length();
1166 LIRItemList* items = new LIRItemList(dims->length(), NULL);
1167 while (i-- > 0) {
1168 LIRItem* size = new LIRItem(dims->at(i), this);
1169 items->at_put(i, size);
1170 }
1171
1172 // Evaluate state_for early since it may emit code.
1173 CodeEmitInfo* patching_info = NULL;
1174 if (!x->klass()->is_loaded() || PatchALot) {
1175 patching_info = state_for(x, x->state_before());
1176
1177 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1178 // clone all handlers (NOTE: Usually this is handled transparently
1179 // by the CodeEmitInfo cloning logic in CodeStub constructors but
1180 // is done explicitly here because a stub isn't being used).
1181 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1182 }
1183 CodeEmitInfo* info = state_for(x, x->state());
1184
1185 i = dims->length();
1186 while (i-- > 0) {
1187 LIRItem* size = items->at(i);
1188 size->load_nonconstant();
1189
1190 store_stack_parameter(size->result(), in_ByteSize(i*4));
1191 }
1192
1193 LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
1194 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1195
1196 LIR_Opr rank = FrameMap::rbx_opr;
1197 __ move(LIR_OprFact::intConst(x->rank()), rank);
1198 LIR_Opr varargs = FrameMap::rcx_opr;
1199 __ move(FrameMap::rsp_opr, varargs);
1200 LIR_OprList* args = new LIR_OprList(3);
1201 args->append(klass_reg);
1202 args->append(rank);
1203 args->append(varargs);
1204 LIR_Opr reg = result_register_for(x->type());
1205 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1206 LIR_OprFact::illegalOpr,
1207 reg, args, info);
1208
1209 LIR_Opr result = rlock_result(x);
1210 __ move(reg, result);
1211 }
1212
1213
1214 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1215 // nothing to do for now
1216 }
1217
1218
1219 void LIRGenerator::do_CheckCast(CheckCast* x) {
1220 LIRItem obj(x->obj(), this);
1221
1222 CodeEmitInfo* patching_info = NULL;
1223 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
1224 // must do this before locking the destination register as an oop register,
1225 // and before the obj is loaded (the latter is for deoptimization)
1226 patching_info = state_for(x, x->state_before());
1227 }
1228 obj.load_item();
1229
1230 // info for exceptions
1231 CodeEmitInfo* info_for_exception = state_for(x);
1232
1233 CodeStub* stub;
1234 if (x->is_incompatible_class_change_check()) {
1235 assert(patching_info == NULL, "can't patch this");
1236 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1237 } else {
1238 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1239 }
1240 LIR_Opr reg = rlock_result(x);
1241 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1242 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1243 tmp3 = new_register(objectType);
1244 }
1245 __ checkcast(reg, obj.result(), x->klass(),
1246 new_register(objectType), new_register(objectType), tmp3,
1247 x->direct_compare(), info_for_exception, patching_info, stub,
1248 x->profiled_method(), x->profiled_bci());
1249 }
1250
1251
1252 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1253 LIRItem obj(x->obj(), this);
1254
1255 // result and test object may not be in same register
1256 LIR_Opr reg = rlock_result(x);
1257 CodeEmitInfo* patching_info = NULL;
1258 if ((!x->klass()->is_loaded() || PatchALot)) {
1259 // must do this before locking the destination register as an oop register
1260 patching_info = state_for(x, x->state_before());
1261 }
1262 obj.load_item();
1263 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1264 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1265 tmp3 = new_register(objectType);
1266 }
1267 __ instanceof(reg, obj.result(), x->klass(),
1268 new_register(objectType), new_register(objectType), tmp3,
1269 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1270 }
1271
1272
1273 void LIRGenerator::do_If(If* x) {
1274 assert(x->number_of_sux() == 2, "inconsistency");
1275 ValueTag tag = x->x()->type()->tag();
1276 bool is_safepoint = x->is_safepoint();
1277
1278 If::Condition cond = x->cond();
1279
1280 LIRItem xitem(x->x(), this);
1281 LIRItem yitem(x->y(), this);
1282 LIRItem* xin = &xitem;
1283 LIRItem* yin = &yitem;
1284
1285 if (tag == longTag) {
1286 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1287 // mirror for other conditions
1288 if (cond == If::gtr || cond == If::leq) {
1289 cond = Instruction::mirror(cond);
1290 xin = &yitem;
1291 yin = &xitem;
1292 }
1293 xin->set_destroys_register();
1294 }
1295 xin->load_item();
1296 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1297 // inline long zero
1298 yin->dont_load_item();
1299 } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
1300 // longs cannot handle constants at right side
1301 yin->load_item();
1302 } else {
1303 yin->dont_load_item();
1304 }
1305
1306 // add safepoint before generating condition code so it can be recomputed
1307 if (x->is_safepoint()) {
1308 // increment backedge counter if needed
1309 increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
1310 __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before()));
1311 }
1312 set_no_result(x);
1313
1314 LIR_Opr left = xin->result();
1315 LIR_Opr right = yin->result();
1316 __ cmp(lir_cond(cond), left, right);
1317 // Generate branch profiling. Profiling code doesn't kill flags.
1318 profile_branch(x, cond);
1319 move_to_phi(x->state());
1320 if (x->x()->type()->is_float_kind()) {
1321 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1322 } else {
1323 __ branch(lir_cond(cond), right->type(), x->tsux());
1324 }
1325 assert(x->default_sux() == x->fsux(), "wrong destination above");
1326 __ jump(x->default_sux());
1327 }
1328
1329
1330 LIR_Opr LIRGenerator::getThreadPointer() {
1331 #ifdef _LP64
1332 return FrameMap::as_pointer_opr(r15_thread);
1333 #else
1334 LIR_Opr result = new_register(T_INT);
1335 __ get_thread(result);
1336 return result;
1337 #endif //
1338 }
1339
1340 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1341 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1342 LIR_OprList* args = new LIR_OprList();
1343 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1344 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1345 }
1346
1347
1348 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1349 CodeEmitInfo* info) {
1350 if (address->type() == T_LONG) {
1351 address = new LIR_Address(address->base(),
1352 address->index(), address->scale(),
1353 address->disp(), T_DOUBLE);
1354 // Transfer the value atomically by using FP moves. This means
1355 // the value has to be moved between CPU and FPU registers. It
1356 // always has to be moved through spill slot since there's no
1357 // quick way to pack the value into an SSE register.
1358 LIR_Opr temp_double = new_register(T_DOUBLE);
1359 LIR_Opr spill = new_register(T_LONG);
1360 set_vreg_flag(spill, must_start_in_memory);
1361 __ move(value, spill);
1362 __ volatile_move(spill, temp_double, T_LONG);
1363 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1364 } else {
1365 __ store(value, address, info);
1366 }
1367 }
1368
1369
1370
1371 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1372 CodeEmitInfo* info) {
1373 if (address->type() == T_LONG) {
1374 address = new LIR_Address(address->base(),
1375 address->index(), address->scale(),
1376 address->disp(), T_DOUBLE);
1377 // Transfer the value atomically by using FP moves. This means
1378 // the value has to be moved between CPU and FPU registers. In
1379 // SSE0 and SSE1 mode it has to be moved through spill slot but in
1380 // SSE2+ mode it can be moved directly.
1381 LIR_Opr temp_double = new_register(T_DOUBLE);
1382 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1383 __ volatile_move(temp_double, result, T_LONG);
1384 if (UseSSE < 2) {
1385 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1386 set_vreg_flag(result, must_start_in_memory);
1387 }
1388 } else {
1389 __ load(address, result, info);
1390 }
1391 }
1392
1393 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
1394 BasicType type, bool is_volatile) {
1395 if (is_volatile && type == T_LONG) {
1396 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1397 LIR_Opr tmp = new_register(T_DOUBLE);
1398 __ load(addr, tmp);
1399 LIR_Opr spill = new_register(T_LONG);
1400 set_vreg_flag(spill, must_start_in_memory);
1401 __ move(tmp, spill);
1402 __ move(spill, dst);
1403 } else {
1404 LIR_Address* addr = new LIR_Address(src, offset, type);
1405 __ load(addr, dst);
1406 }
1407 }
1408
1409
1410 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1411 BasicType type, bool is_volatile) {
1412 if (is_volatile && type == T_LONG) {
1413 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1414 LIR_Opr tmp = new_register(T_DOUBLE);
1415 LIR_Opr spill = new_register(T_DOUBLE);
1416 set_vreg_flag(spill, must_start_in_memory);
1417 __ move(data, spill);
1418 __ move(spill, tmp);
1419 __ move(tmp, addr);
1420 } else {
1421 LIR_Address* addr = new LIR_Address(src, offset, type);
1422 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1423 if (is_obj) {
1424 // Do the pre-write barrier, if any.
1425 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1426 true /* do_load */, false /* patch */, NULL);
1427 __ move(data, addr);
1428 assert(src->is_register(), "must be register");
1429 // Seems to be a precise address
1430 post_barrier(LIR_OprFact::address(addr), data);
1431 } else {
1432 __ move(data, addr);
1433 }
1434 }
1435 }
1436
1437 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) {
1438 BasicType type = x->basic_type();
1439 LIRItem src(x->object(), this);
1440 LIRItem off(x->offset(), this);
1441 LIRItem value(x->value(), this);
1442
1443 src.load_item();
1444 value.load_item();
1445 off.load_nonconstant();
1446
1447 LIR_Opr dst = rlock_result(x, type);
1448 LIR_Opr data = value.result();
1449 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1450 LIR_Opr offset = off.result();
1451
1452 assert (type == T_INT || (!x->is_add() && is_obj) LP64_ONLY( || type == T_LONG ), "unexpected type");
1453 LIR_Address* addr;
1454 if (offset->is_constant()) {
1455 #ifdef _LP64
1456 jlong c = offset->as_jlong();
1457 if ((jlong)((jint)c) == c) {
1458 addr = new LIR_Address(src.result(), (jint)c, type);
1459 } else {
1460 LIR_Opr tmp = new_register(T_LONG);
1461 __ move(offset, tmp);
1462 addr = new LIR_Address(src.result(), tmp, type);
1463 }
1464 #else
1465 addr = new LIR_Address(src.result(), offset->as_jint(), type);
1466 #endif
1467 } else {
1468 addr = new LIR_Address(src.result(), offset, type);
1469 }
1470
1471 // Because we want a 2-arg form of xchg and xadd
1472 __ move(data, dst);
1473
1474 if (x->is_add()) {
1475 __ xadd(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr);
1476 } else {
1477 if (is_obj) {
1478 // Do the pre-write barrier, if any.
1479 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1480 true /* do_load */, false /* patch */, NULL);
1481 }
1482 __ xchg(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr);
1483 if (is_obj) {
1484 // Seems to be a precise address
1485 post_barrier(LIR_OprFact::address(addr), data);
1486 }
1487 }
1488 }