3429 // non-matching short branch variant of some
3430 // long branch?
3431
3432 //----------OPERANDS-----------------------------------------------------------
3433 // Operand definitions must precede instruction definitions for correct parsing
3434 // in the ADLC because operands constitute user defined types which are used in
3435 // instruction definitions.
3436
3437 //----------Simple Operands----------------------------------------------------
3438 // Immediate Operands
3439 // Integer Immediate: 32-bit
3440 operand immI() %{
3441 match(ConI);
3442
3443 op_cost(0);
3444 // formats are generated automatically for constants and base registers
3445 format %{ %}
3446 interface(CONST_INTER);
3447 %}
3448
3449 // Integer Immediate: 13-bit
3450 operand immI13() %{
3451 predicate(Assembler::is_simm13(n->get_int()));
3452 match(ConI);
3453 op_cost(0);
3454
3455 format %{ %}
3456 interface(CONST_INTER);
3457 %}
3458
3459 // Integer Immediate: 13-bit minus 7
3460 operand immI13m7() %{
3461 predicate((-4096 < n->get_int()) && ((n->get_int() + 7) <= 4095));
3462 match(ConI);
3463 op_cost(0);
3464
3465 format %{ %}
3466 interface(CONST_INTER);
3467 %}
3468
3469 // Unsigned (positive) Integer Immediate: 13-bit
3470 operand immU13() %{
3471 predicate((0 <= n->get_int()) && Assembler::is_simm13(n->get_int()));
3472 match(ConI);
3473 op_cost(0);
3474
3475 format %{ %}
3476 interface(CONST_INTER);
3477 %}
3478
3479 // Integer Immediate: 6-bit
3480 operand immU6() %{
3481 predicate(n->get_int() >= 0 && n->get_int() <= 63);
3482 match(ConI);
3483 op_cost(0);
3484 format %{ %}
3485 interface(CONST_INTER);
3486 %}
3487
3488 // Integer Immediate: 11-bit
5527 ins_cost(MEMORY_REF_COST);
5528
5529 size(4);
5530 format %{ "LDSB $mem,$dst\t! byte -> long" %}
5531 ins_encode %{
5532 __ ldsb($mem$$Address, $dst$$Register);
5533 %}
5534 ins_pipe(iload_mask_mem);
5535 %}
5536
5537 // Load Unsigned Byte (8bit UNsigned) into an int reg
5538 instruct loadUB(iRegI dst, memory mem) %{
5539 match(Set dst (LoadUB mem));
5540 ins_cost(MEMORY_REF_COST);
5541
5542 size(4);
5543 format %{ "LDUB $mem,$dst\t! ubyte" %}
5544 ins_encode %{
5545 __ ldub($mem$$Address, $dst$$Register);
5546 %}
5547 ins_pipe(iload_mask_mem);
5548 %}
5549
5550 // Load Unsigned Byte (8bit UNsigned) into a Long Register
5551 instruct loadUB2L(iRegL dst, memory mem) %{
5552 match(Set dst (ConvI2L (LoadUB mem)));
5553 ins_cost(MEMORY_REF_COST);
5554
5555 size(4);
5556 format %{ "LDUB $mem,$dst\t! ubyte -> long" %}
5557 ins_encode %{
5558 __ ldub($mem$$Address, $dst$$Register);
5559 %}
5560 ins_pipe(iload_mask_mem);
5561 %}
5562
5563 // Load Short (16bit signed)
5564 instruct loadS(iRegI dst, memory mem) %{
5565 match(Set dst (LoadS mem));
5566 ins_cost(MEMORY_REF_COST);
5567
5568 size(4);
5569 format %{ "LDSH $mem,$dst\t! short" %}
5570 ins_encode %{
5571 __ ldsh($mem$$Address, $dst$$Register);
5572 %}
5573 ins_pipe(iload_mask_mem);
5574 %}
5575
5576 // Load Short (16 bit signed) to Byte (8 bit signed)
5577 instruct loadS2B(iRegI dst, indOffset13m7 mem, immI_24 twentyfour) %{
5578 match(Set dst (RShiftI (LShiftI (LoadS mem) twentyfour) twentyfour));
5579 ins_cost(MEMORY_REF_COST);
5580
5593 ins_cost(MEMORY_REF_COST);
5594
5595 size(4);
5596 format %{ "LDSH $mem,$dst\t! short -> long" %}
5597 ins_encode %{
5598 __ ldsh($mem$$Address, $dst$$Register);
5599 %}
5600 ins_pipe(iload_mask_mem);
5601 %}
5602
5603 // Load Unsigned Short/Char (16bit UNsigned)
5604 instruct loadUS(iRegI dst, memory mem) %{
5605 match(Set dst (LoadUS mem));
5606 ins_cost(MEMORY_REF_COST);
5607
5608 size(4);
5609 format %{ "LDUH $mem,$dst\t! ushort/char" %}
5610 ins_encode %{
5611 __ lduh($mem$$Address, $dst$$Register);
5612 %}
5613 ins_pipe(iload_mask_mem);
5614 %}
5615
5616 // Load Unsigned Short/Char (16 bit UNsigned) to Byte (8 bit signed)
5617 instruct loadUS2B(iRegI dst, indOffset13m7 mem, immI_24 twentyfour) %{
5618 match(Set dst (RShiftI (LShiftI (LoadUS mem) twentyfour) twentyfour));
5619 ins_cost(MEMORY_REF_COST);
5620
5621 size(4);
5622 format %{ "LDSB $mem+1,$dst\t! ushort -> byte" %}
5623 ins_encode %{
5624 __ ldsb($mem$$Address, $dst$$Register, 1);
5625 %}
5626 ins_pipe(iload_mask_mem);
5627 %}
5628
5629 // Load Unsigned Short/Char (16bit UNsigned) into a Long Register
5630 instruct loadUS2L(iRegL dst, memory mem) %{
5631 match(Set dst (ConvI2L (LoadUS mem)));
5632 ins_cost(MEMORY_REF_COST);
5633
5634 size(4);
5635 format %{ "LDUH $mem,$dst\t! ushort/char -> long" %}
5636 ins_encode %{
5637 __ lduh($mem$$Address, $dst$$Register);
5638 %}
5639 ins_pipe(iload_mask_mem);
5640 %}
5641
5642 // Load Integer
5643 instruct loadI(iRegI dst, memory mem) %{
5644 match(Set dst (LoadI mem));
5645 ins_cost(MEMORY_REF_COST);
5646
5647 size(4);
5648 format %{ "LDUW $mem,$dst\t! int" %}
5649 ins_encode %{
5650 __ lduw($mem$$Address, $dst$$Register);
5651 %}
5652 ins_pipe(iload_mem);
5653 %}
5654
5655 // Load Integer to Byte (8 bit signed)
5656 instruct loadI2B(iRegI dst, indOffset13m7 mem, immI_24 twentyfour) %{
5657 match(Set dst (RShiftI (LShiftI (LoadI mem) twentyfour) twentyfour));
5658 ins_cost(MEMORY_REF_COST);
5659
5701
5702 size(4);
5703
5704 format %{ "LDUH $mem+2,$dst\t! int -> ushort/char" %}
5705 ins_encode %{
5706 __ lduh($mem$$Address, $dst$$Register, 2);
5707 %}
5708 ins_pipe(iload_mask_mem);
5709 %}
5710
5711 // Load Integer into a Long Register
5712 instruct loadI2L(iRegL dst, memory mem) %{
5713 match(Set dst (ConvI2L (LoadI mem)));
5714 ins_cost(MEMORY_REF_COST);
5715
5716 size(4);
5717 format %{ "LDSW $mem,$dst\t! int -> long" %}
5718 ins_encode %{
5719 __ ldsw($mem$$Address, $dst$$Register);
5720 %}
5721 ins_pipe(iload_mem);
5722 %}
5723
5724 // Load Unsigned Integer into a Long Register
5725 instruct loadUI2L(iRegL dst, memory mem) %{
5726 match(Set dst (LoadUI2L mem));
5727 ins_cost(MEMORY_REF_COST);
5728
5729 size(4);
5730 format %{ "LDUW $mem,$dst\t! uint -> long" %}
5731 ins_encode %{
5732 __ lduw($mem$$Address, $dst$$Register);
5733 %}
5734 ins_pipe(iload_mem);
5735 %}
5736
5737 // Load Long - aligned
5738 instruct loadL(iRegL dst, memory mem ) %{
5739 match(Set dst (LoadL mem));
5740 ins_cost(MEMORY_REF_COST);
|
3429 // non-matching short branch variant of some
3430 // long branch?
3431
3432 //----------OPERANDS-----------------------------------------------------------
3433 // Operand definitions must precede instruction definitions for correct parsing
3434 // in the ADLC because operands constitute user defined types which are used in
3435 // instruction definitions.
3436
3437 //----------Simple Operands----------------------------------------------------
3438 // Immediate Operands
3439 // Integer Immediate: 32-bit
3440 operand immI() %{
3441 match(ConI);
3442
3443 op_cost(0);
3444 // formats are generated automatically for constants and base registers
3445 format %{ %}
3446 interface(CONST_INTER);
3447 %}
3448
3449 // Integer Immediate: 8-bit
3450 operand immI8() %{
3451 predicate(Assembler::is_simm(n->get_int(), 8));
3452 match(ConI);
3453 op_cost(0);
3454 format %{ %}
3455 interface(CONST_INTER);
3456 %}
3457
3458 // Integer Immediate: 13-bit
3459 operand immI13() %{
3460 predicate(Assembler::is_simm13(n->get_int()));
3461 match(ConI);
3462 op_cost(0);
3463
3464 format %{ %}
3465 interface(CONST_INTER);
3466 %}
3467
3468 // Integer Immediate: 13-bit minus 7
3469 operand immI13m7() %{
3470 predicate((-4096 < n->get_int()) && ((n->get_int() + 7) <= 4095));
3471 match(ConI);
3472 op_cost(0);
3473
3474 format %{ %}
3475 interface(CONST_INTER);
3476 %}
3477
3478 // Integer Immediate: 16-bit
3479 operand immI16() %{
3480 predicate(Assembler::is_simm(n->get_int(), 16));
3481 match(ConI);
3482 op_cost(0);
3483 format %{ %}
3484 interface(CONST_INTER);
3485 %}
3486
3487 // Unsigned (positive) Integer Immediate: 13-bit
3488 operand immU13() %{
3489 predicate((0 <= n->get_int()) && Assembler::is_simm13(n->get_int()));
3490 match(ConI);
3491 op_cost(0);
3492
3493 format %{ %}
3494 interface(CONST_INTER);
3495 %}
3496
3497 // Integer Immediate: 6-bit
3498 operand immU6() %{
3499 predicate(n->get_int() >= 0 && n->get_int() <= 63);
3500 match(ConI);
3501 op_cost(0);
3502 format %{ %}
3503 interface(CONST_INTER);
3504 %}
3505
3506 // Integer Immediate: 11-bit
5545 ins_cost(MEMORY_REF_COST);
5546
5547 size(4);
5548 format %{ "LDSB $mem,$dst\t! byte -> long" %}
5549 ins_encode %{
5550 __ ldsb($mem$$Address, $dst$$Register);
5551 %}
5552 ins_pipe(iload_mask_mem);
5553 %}
5554
5555 // Load Unsigned Byte (8bit UNsigned) into an int reg
5556 instruct loadUB(iRegI dst, memory mem) %{
5557 match(Set dst (LoadUB mem));
5558 ins_cost(MEMORY_REF_COST);
5559
5560 size(4);
5561 format %{ "LDUB $mem,$dst\t! ubyte" %}
5562 ins_encode %{
5563 __ ldub($mem$$Address, $dst$$Register);
5564 %}
5565 ins_pipe(iload_mem);
5566 %}
5567
5568 // Load Unsigned Byte (8bit UNsigned) into a Long Register
5569 instruct loadUB2L(iRegL dst, memory mem) %{
5570 match(Set dst (ConvI2L (LoadUB mem)));
5571 ins_cost(MEMORY_REF_COST);
5572
5573 size(4);
5574 format %{ "LDUB $mem,$dst\t! ubyte -> long" %}
5575 ins_encode %{
5576 __ ldub($mem$$Address, $dst$$Register);
5577 %}
5578 ins_pipe(iload_mem);
5579 %}
5580
5581 // Load Unsigned Byte (8 bit UNsigned) with 8-bit mask into Long Register
5582 instruct loadUB2L_immI8(iRegL dst, memory mem, immI8 mask) %{
5583 match(Set dst (ConvI2L (AndI (LoadUB mem) mask)));
5584 ins_cost(MEMORY_REF_COST + DEFAULT_COST);
5585
5586 size(2*4);
5587 format %{ "LDUB $mem,$dst\t# ubyte & 8-bit mask -> long\n\t"
5588 "AND $dst,$mask,$dst" %}
5589 ins_encode %{
5590 __ ldub($mem$$Address, $dst$$Register);
5591 __ and3($dst$$Register, $mask$$constant, $dst$$Register);
5592 %}
5593 ins_pipe(iload_mem);
5594 %}
5595
5596 // Load Short (16bit signed)
5597 instruct loadS(iRegI dst, memory mem) %{
5598 match(Set dst (LoadS mem));
5599 ins_cost(MEMORY_REF_COST);
5600
5601 size(4);
5602 format %{ "LDSH $mem,$dst\t! short" %}
5603 ins_encode %{
5604 __ ldsh($mem$$Address, $dst$$Register);
5605 %}
5606 ins_pipe(iload_mask_mem);
5607 %}
5608
5609 // Load Short (16 bit signed) to Byte (8 bit signed)
5610 instruct loadS2B(iRegI dst, indOffset13m7 mem, immI_24 twentyfour) %{
5611 match(Set dst (RShiftI (LShiftI (LoadS mem) twentyfour) twentyfour));
5612 ins_cost(MEMORY_REF_COST);
5613
5626 ins_cost(MEMORY_REF_COST);
5627
5628 size(4);
5629 format %{ "LDSH $mem,$dst\t! short -> long" %}
5630 ins_encode %{
5631 __ ldsh($mem$$Address, $dst$$Register);
5632 %}
5633 ins_pipe(iload_mask_mem);
5634 %}
5635
5636 // Load Unsigned Short/Char (16bit UNsigned)
5637 instruct loadUS(iRegI dst, memory mem) %{
5638 match(Set dst (LoadUS mem));
5639 ins_cost(MEMORY_REF_COST);
5640
5641 size(4);
5642 format %{ "LDUH $mem,$dst\t! ushort/char" %}
5643 ins_encode %{
5644 __ lduh($mem$$Address, $dst$$Register);
5645 %}
5646 ins_pipe(iload_mem);
5647 %}
5648
5649 // Load Unsigned Short/Char (16 bit UNsigned) to Byte (8 bit signed)
5650 instruct loadUS2B(iRegI dst, indOffset13m7 mem, immI_24 twentyfour) %{
5651 match(Set dst (RShiftI (LShiftI (LoadUS mem) twentyfour) twentyfour));
5652 ins_cost(MEMORY_REF_COST);
5653
5654 size(4);
5655 format %{ "LDSB $mem+1,$dst\t! ushort -> byte" %}
5656 ins_encode %{
5657 __ ldsb($mem$$Address, $dst$$Register, 1);
5658 %}
5659 ins_pipe(iload_mask_mem);
5660 %}
5661
5662 // Load Unsigned Short/Char (16bit UNsigned) into a Long Register
5663 instruct loadUS2L(iRegL dst, memory mem) %{
5664 match(Set dst (ConvI2L (LoadUS mem)));
5665 ins_cost(MEMORY_REF_COST);
5666
5667 size(4);
5668 format %{ "LDUH $mem,$dst\t! ushort/char -> long" %}
5669 ins_encode %{
5670 __ lduh($mem$$Address, $dst$$Register);
5671 %}
5672 ins_pipe(iload_mem);
5673 %}
5674
5675 // Load Unsigned Short/Char (16bit UNsigned) with mask 0xFF into a Long Register
5676 instruct loadUS2L_immI_255(iRegL dst, indOffset13m7 mem, immI_255 mask) %{
5677 match(Set dst (ConvI2L (AndI (LoadUS mem) mask)));
5678 ins_cost(MEMORY_REF_COST);
5679
5680 size(4);
5681 format %{ "LDUB $mem+1,$dst\t! ushort/char & 0xFF -> long" %}
5682 ins_encode %{
5683 __ ldub($mem$$Address, $dst$$Register, 1); // LSB is index+1 on BE
5684 %}
5685 ins_pipe(iload_mem);
5686 %}
5687
5688 // Load Unsigned Short/Char (16bit UNsigned) with a 13-bit mask into a Long Register
5689 instruct loadUS2L_immI13(iRegL dst, memory mem, immI13 mask) %{
5690 match(Set dst (ConvI2L (AndI (LoadUS mem) mask)));
5691 ins_cost(MEMORY_REF_COST + DEFAULT_COST);
5692
5693 size(2*4);
5694 format %{ "LDUH $mem,$dst\t! ushort/char & 13-bit mask -> long\n\t"
5695 "AND $dst,$mask,$dst" %}
5696 ins_encode %{
5697 Register Rdst = $dst$$Register;
5698 __ lduh($mem$$Address, Rdst);
5699 __ and3(Rdst, $mask$$constant, Rdst);
5700 %}
5701 ins_pipe(iload_mem);
5702 %}
5703
5704 // Load Unsigned Short/Char (16bit UNsigned) with a 16-bit mask into a Long Register
5705 instruct loadUS2L_immI16(iRegL dst, memory mem, immI16 mask, iRegL tmp) %{
5706 match(Set dst (ConvI2L (AndI (LoadUS mem) mask)));
5707 effect(TEMP dst, TEMP tmp);
5708 ins_cost(MEMORY_REF_COST + 2*DEFAULT_COST);
5709
5710 size(3*4);
5711 format %{ "LDUH $mem,$dst\t! ushort/char & 16-bit mask -> long\n\t"
5712 "SET $mask,$tmp\n\t"
5713 "AND $dst,$tmp,$dst" %}
5714 ins_encode %{
5715 Register Rdst = $dst$$Register;
5716 Register Rtmp = $tmp$$Register;
5717 __ lduh($mem$$Address, Rdst);
5718 __ set($mask$$constant, Rtmp);
5719 __ and3(Rdst, Rtmp, Rdst);
5720 %}
5721 ins_pipe(iload_mem);
5722 %}
5723
5724 // Load Integer
5725 instruct loadI(iRegI dst, memory mem) %{
5726 match(Set dst (LoadI mem));
5727 ins_cost(MEMORY_REF_COST);
5728
5729 size(4);
5730 format %{ "LDUW $mem,$dst\t! int" %}
5731 ins_encode %{
5732 __ lduw($mem$$Address, $dst$$Register);
5733 %}
5734 ins_pipe(iload_mem);
5735 %}
5736
5737 // Load Integer to Byte (8 bit signed)
5738 instruct loadI2B(iRegI dst, indOffset13m7 mem, immI_24 twentyfour) %{
5739 match(Set dst (RShiftI (LShiftI (LoadI mem) twentyfour) twentyfour));
5740 ins_cost(MEMORY_REF_COST);
5741
5783
5784 size(4);
5785
5786 format %{ "LDUH $mem+2,$dst\t! int -> ushort/char" %}
5787 ins_encode %{
5788 __ lduh($mem$$Address, $dst$$Register, 2);
5789 %}
5790 ins_pipe(iload_mask_mem);
5791 %}
5792
5793 // Load Integer into a Long Register
5794 instruct loadI2L(iRegL dst, memory mem) %{
5795 match(Set dst (ConvI2L (LoadI mem)));
5796 ins_cost(MEMORY_REF_COST);
5797
5798 size(4);
5799 format %{ "LDSW $mem,$dst\t! int -> long" %}
5800 ins_encode %{
5801 __ ldsw($mem$$Address, $dst$$Register);
5802 %}
5803 ins_pipe(iload_mask_mem);
5804 %}
5805
5806 // Load Integer with mask 0xFF into a Long Register
5807 instruct loadI2L_immI_255(iRegL dst, indOffset13m7 mem, immI_255 mask) %{
5808 match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
5809 ins_cost(MEMORY_REF_COST);
5810
5811 size(4);
5812 format %{ "LDUB $mem+3,$dst\t! int & 0xFF -> long" %}
5813 ins_encode %{
5814 __ ldub($mem$$Address, $dst$$Register, 3); // LSB is index+3 on BE
5815 %}
5816 ins_pipe(iload_mem);
5817 %}
5818
5819 // Load Integer with mask 0xFFFF into a Long Register
5820 instruct loadI2L_immI_65535(iRegL dst, indOffset13m7 mem, immI_65535 mask) %{
5821 match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
5822 ins_cost(MEMORY_REF_COST);
5823
5824 size(4);
5825 format %{ "LDUH $mem+2,$dst\t! int & 0xFFFF -> long" %}
5826 ins_encode %{
5827 __ lduh($mem$$Address, $dst$$Register, 2); // LSW is index+2 on BE
5828 %}
5829 ins_pipe(iload_mem);
5830 %}
5831
5832 // Load Integer with a 13-bit mask into a Long Register
5833 instruct loadI2L_immI13(iRegL dst, memory mem, immI13 mask) %{
5834 match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
5835 ins_cost(MEMORY_REF_COST + DEFAULT_COST);
5836
5837 size(2*4);
5838 format %{ "LDUW $mem,$dst\t! int & 13-bit mask -> long\n\t"
5839 "AND $dst,$mask,$dst" %}
5840 ins_encode %{
5841 Register Rdst = $dst$$Register;
5842 __ lduw($mem$$Address, Rdst);
5843 __ and3(Rdst, $mask$$constant, Rdst);
5844 %}
5845 ins_pipe(iload_mem);
5846 %}
5847
5848 // Load Integer with a 32-bit mask into a Long Register
5849 instruct loadI2L_immI(iRegL dst, memory mem, immI mask, iRegL tmp) %{
5850 match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
5851 effect(TEMP dst, TEMP tmp);
5852 ins_cost(MEMORY_REF_COST + 2*DEFAULT_COST);
5853
5854 size(3*4);
5855 format %{ "LDUW $mem,$dst\t! int & 32-bit mask -> long\n\t"
5856 "SET $mask,$tmp\n\t"
5857 "AND $dst,$tmp,$dst" %}
5858 ins_encode %{
5859 Register Rdst = $dst$$Register;
5860 Register Rtmp = $tmp$$Register;
5861 __ lduw($mem$$Address, Rdst);
5862 __ set($mask$$constant, Rtmp);
5863 __ and3(Rdst, Rtmp, Rdst);
5864 %}
5865 ins_pipe(iload_mem);
5866 %}
5867
5868 // Load Unsigned Integer into a Long Register
5869 instruct loadUI2L(iRegL dst, memory mem) %{
5870 match(Set dst (LoadUI2L mem));
5871 ins_cost(MEMORY_REF_COST);
5872
5873 size(4);
5874 format %{ "LDUW $mem,$dst\t! uint -> long" %}
5875 ins_encode %{
5876 __ lduw($mem$$Address, $dst$$Register);
5877 %}
5878 ins_pipe(iload_mem);
5879 %}
5880
5881 // Load Long - aligned
5882 instruct loadL(iRegL dst, memory mem ) %{
5883 match(Set dst (LoadL mem));
5884 ins_cost(MEMORY_REF_COST);
|