*** old/src/cpu/x86/vm/x86_32.ad	Wed May 13 04:15:22 2009
--- new/src/cpu/x86/vm/x86_32.ad	Wed May 13 04:15:21 2009

*** 5247,5256 ****
--- 5247,5265 ----
  
    format %{ %}
    interface(CONST_INTER);
  %}
  
+ // Constant for short-wide masking
+ operand immI_65535() %{
+   predicate(n->get_int() == 65535);
+   match(ConI);
+ 
+   format %{ %}
+   interface(CONST_INTER);
+ %}
+ 
  // Register Operands
  // Integer Register
  operand eRegI() %{
    constraint(ALLOC_IN_RC(e_reg));
    match(RegI);

*** 6915,6940 ****
--- 6924,6965 ----
  
    ins_pipe(ialu_reg_mem);
  %}
  
  // Load Unsigned Byte (8 bit UNsigned) into Long Register
! instruct loadUB2L(eRegL dst, memory mem) %{
  %{
    match(Set dst (ConvI2L (LoadUB mem)));
  
    ins_cost(250);
    format %{ "MOVZX8 $dst.lo,$mem\t# ubyte -> long\n\t"
              "XOR    $dst.hi,$dst.hi" %}
  
    ins_encode %{
!     __ movzbl($dst$$Register, $mem$$Address);
!     __ xorl(HIGH_FROM_LOW($dst$$Register), HIGH_FROM_LOW($dst$$Register));
!     Register Rdst = $dst$$Register;
!     __ movzbl(Rdst, $mem$$Address);
+     __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
    %}
  
    ins_pipe(ialu_reg_mem);
  %}
  
+ // Load Unsigned Byte (8 bit UNsigned) with mask into Long Register
+ instruct loadUB2L_immI8(eRegL dst, memory mem, immI8 mask) %{
+   match(Set dst (ConvI2L (AndI (LoadUB mem) mask)));
+ 
+   format %{ "MOVZX8 $dst.lo,$mem\t# ubyte & 8-bit mask -> long\n\t"
+             "XOR    $dst.hi,$dst.hi\n\t"
+             "AND    $dst.lo,$mask" %}
+   ins_encode %{
+     Register Rdst = $dst$$Register;
+     __ movzbl(Rdst, $mem$$Address);
+     __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
+     __ andl(Rdst, $mask$$constant);
+   %}
+   ins_pipe(ialu_reg_mem);
+ %}
+ 
  // Load Short (16bit signed)
  instruct loadS(eRegI dst, memory mem) %{
    match(Set dst (LoadS mem));
  
    ins_cost(125);

*** 7017,7026 ****
--- 7042,7081 ----
    %}
  
    ins_pipe(ialu_reg_mem);
  %}
  
+ // Load Unsigned Short/Char (16 bit UNsigned) with mask 0xFF into Long Register
+ instruct loadUS2L_immI_255(eRegL dst, memory mem, immI_255 mask) %{
+   match(Set dst (ConvI2L (AndI (LoadUS mem) mask)));
+ 
+   format %{ "MOVZX8 $dst.lo,$mem\t# ushort/char & 0xFF -> long\n\t"
+             "XOR    $dst.hi,$dst.hi" %}
+   ins_encode %{
+     Register Rdst = $dst$$Register;
+     __ movzbl(Rdst, $mem$$Address);
+     __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
+   %}
+   ins_pipe(ialu_reg_mem);
+ %}
+ 
+ // Load Unsigned Short/Char (16 bit UNsigned) with a 16-bit mask into Long Register
+ instruct loadUS2L_immI16(eRegL dst, memory mem, immI16 mask) %{
+   match(Set dst (ConvI2L (AndI (LoadUS mem) mask)));
+ 
+   format %{ "MOVZX  $dst.lo, $mem\t# ushort/char & 16-bit mask -> long\n\t"
+             "XOR    $dst.hi,$dst.hi\n\t"
+             "AND    $dst.lo,$mask" %}
+   ins_encode %{
+     Register Rdst = $dst$$Register;
+     __ movzwl(Rdst, $mem$$Address);
+     __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
+     __ andl(Rdst, $mask$$constant);
+   %}
+   ins_pipe(ialu_reg_mem);
+ %}
+ 
  // Load Integer
  instruct loadI(eRegI dst, memory mem) %{
    match(Set dst (LoadI mem));
  
    ins_cost(125);

*** 7097,7106 ****
--- 7152,7205 ----
    %}
  
    ins_pipe(ialu_reg_mem);
  %}
  
+ // Load Integer with mask 0xFF into Long Register
+ instruct loadI2L_immI_255(eRegL dst, memory mem, immI_255 mask) %{
+   match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
+ 
+   format %{ "MOVZX8 $dst.lo,$mem\t# int & 0xFF -> long\n\t"
+             "XOR    $dst.hi,$dst.hi" %}
+   ins_encode %{
+     Register Rdst = $dst$$Register;
+     __ movzbl(Rdst, $mem$$Address);
+     __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
+   %}
+   ins_pipe(ialu_reg_mem);
+ %}
+ 
+ // Load Integer with mask 0xFFFF into Long Register
+ instruct loadI2L_immI_65535(eRegL dst, memory mem, immI_65535 mask) %{
+   match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
+ 
+   format %{ "MOVZX  $dst.lo,$mem\t# int & 0xFFFF -> long\n\t"
+             "XOR    $dst.hi,$dst.hi" %}
+   ins_encode %{
+     Register Rdst = $dst$$Register;
+     __ movzwl(Rdst, $mem$$Address);
+     __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
+   %}
+   ins_pipe(ialu_reg_mem);
+ %}
+ 
+ // Load Integer with 32-bit mask into Long Register
+ instruct loadI2L_immI(eRegL dst, memory mem, immI mask) %{
+   match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
+ 
+   format %{ "MOV    $dst.lo,$mem\t# int & 32-bit mask -> long\n\t"
+             "XOR    $dst.hi,$dst.hi\n\t"
+             "AND    $dst.lo,$mask" %}
+   ins_encode %{
+     Register Rdst = $dst$$Register;
+     __ movl(Rdst, $mem$$Address);
+     __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
+     __ andl(Rdst, $mask$$constant);
+   %}
+   ins_pipe(ialu_reg_mem);
+ %}
+ 
  // Load Unsigned Integer into Long Register
  instruct loadUI2L(eRegL dst, memory mem) %{
    match(Set dst (LoadUI2L mem));
  
    ins_cost(250);