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rev 1082 : [mq]: indy.compiler.patch
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--- old/src/share/vm/opto/machnode.cpp
+++ new/src/share/vm/opto/machnode.cpp
1 1 /*
2 2 * Copyright 1997-2009 Sun Microsystems, Inc. All Rights Reserved.
3 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 4 *
5 5 * This code is free software; you can redistribute it and/or modify it
6 6 * under the terms of the GNU General Public License version 2 only, as
7 7 * published by the Free Software Foundation.
8 8 *
9 9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 12 * version 2 for more details (a copy is included in the LICENSE file that
13 13 * accompanied this code).
14 14 *
15 15 * You should have received a copy of the GNU General Public License version
16 16 * 2 along with this work; if not, write to the Free Software Foundation,
17 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 18 *
19 19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20 20 * CA 95054 USA or visit www.sun.com if you need additional information or
21 21 * have any questions.
22 22 *
23 23 */
24 24
25 25 #include "incls/_precompiled.incl"
26 26 #include "incls/_machnode.cpp.incl"
27 27
28 28 //=============================================================================
29 29 // Return the value requested
30 30 // result register lookup, corresponding to int_format
31 31 int MachOper::reg(PhaseRegAlloc *ra_, const Node *node) const {
32 32 return (int)ra_->get_encode(node);
33 33 }
34 34 // input register lookup, corresponding to ext_format
35 35 int MachOper::reg(PhaseRegAlloc *ra_, const Node *node, int idx) const {
36 36 return (int)(ra_->get_encode(node->in(idx)));
37 37 }
38 38 intptr_t MachOper::constant() const { return 0x00; }
39 39 bool MachOper::constant_is_oop() const { return false; }
40 40 jdouble MachOper::constantD() const { ShouldNotReachHere(); return 0.0; }
41 41 jfloat MachOper::constantF() const { ShouldNotReachHere(); return 0.0; }
42 42 jlong MachOper::constantL() const { ShouldNotReachHere(); return CONST64(0) ; }
43 43 TypeOopPtr *MachOper::oop() const { return NULL; }
44 44 int MachOper::ccode() const { return 0x00; }
45 45 // A zero, default, indicates this value is not needed.
46 46 // May need to lookup the base register, as done in int_ and ext_format
47 47 int MachOper::base (PhaseRegAlloc *ra_, const Node *node, int idx) const { return 0x00; }
48 48 int MachOper::index(PhaseRegAlloc *ra_, const Node *node, int idx) const { return 0x00; }
49 49 int MachOper::scale() const { return 0x00; }
50 50 int MachOper::disp (PhaseRegAlloc *ra_, const Node *node, int idx) const { return 0x00; }
51 51 int MachOper::constant_disp() const { return 0; }
52 52 int MachOper::base_position() const { return -1; } // no base input
53 53 int MachOper::index_position() const { return -1; } // no index input
54 54 // Check for PC-Relative displacement
55 55 bool MachOper::disp_is_oop() const { return false; }
56 56 // Return the label
57 57 Label* MachOper::label() const { ShouldNotReachHere(); return 0; }
58 58 intptr_t MachOper::method() const { ShouldNotReachHere(); return 0; }
59 59
60 60
61 61 //------------------------------negate-----------------------------------------
62 62 // Negate conditional branches. Error for non-branch operands
63 63 void MachOper::negate() {
64 64 ShouldNotCallThis();
65 65 }
66 66
67 67 //-----------------------------type--------------------------------------------
68 68 const Type *MachOper::type() const {
69 69 return Type::BOTTOM;
70 70 }
71 71
72 72 //------------------------------in_RegMask-------------------------------------
73 73 const RegMask *MachOper::in_RegMask(int index) const {
74 74 ShouldNotReachHere();
75 75 return NULL;
76 76 }
77 77
78 78 //------------------------------dump_spec--------------------------------------
79 79 // Print any per-operand special info
80 80 #ifndef PRODUCT
81 81 void MachOper::dump_spec(outputStream *st) const { }
82 82 #endif
83 83
84 84 //------------------------------hash-------------------------------------------
85 85 // Print any per-operand special info
86 86 uint MachOper::hash() const {
87 87 ShouldNotCallThis();
88 88 return 5;
89 89 }
90 90
91 91 //------------------------------cmp--------------------------------------------
92 92 // Print any per-operand special info
93 93 uint MachOper::cmp( const MachOper &oper ) const {
94 94 ShouldNotCallThis();
95 95 return opcode() == oper.opcode();
96 96 }
97 97
98 98 //------------------------------hash-------------------------------------------
99 99 // Print any per-operand special info
100 100 uint labelOper::hash() const {
101 101 return _block_num;
102 102 }
103 103
104 104 //------------------------------cmp--------------------------------------------
105 105 // Print any per-operand special info
106 106 uint labelOper::cmp( const MachOper &oper ) const {
107 107 return (opcode() == oper.opcode()) && (_label == oper.label());
108 108 }
109 109
110 110 //------------------------------hash-------------------------------------------
111 111 // Print any per-operand special info
112 112 uint methodOper::hash() const {
113 113 return (uint)_method;
114 114 }
115 115
116 116 //------------------------------cmp--------------------------------------------
117 117 // Print any per-operand special info
118 118 uint methodOper::cmp( const MachOper &oper ) const {
119 119 return (opcode() == oper.opcode()) && (_method == oper.method());
120 120 }
121 121
122 122
123 123 //=============================================================================
124 124 //------------------------------MachNode---------------------------------------
125 125
126 126 //------------------------------emit-------------------------------------------
127 127 void MachNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {
128 128 #ifdef ASSERT
129 129 tty->print("missing MachNode emit function: ");
130 130 dump();
131 131 #endif
132 132 ShouldNotCallThis();
133 133 }
134 134
135 135 //------------------------------size-------------------------------------------
136 136 // Size of instruction in bytes
137 137 uint MachNode::size(PhaseRegAlloc *ra_) const {
138 138 // If a virtual was not defined for this specific instruction,
139 139 // Call the helper which finds the size by emitting the bits.
140 140 return MachNode::emit_size(ra_);
141 141 }
142 142
143 143 //------------------------------size-------------------------------------------
144 144 // Helper function that computes size by emitting code
145 145 uint MachNode::emit_size(PhaseRegAlloc *ra_) const {
146 146 // Emit into a trash buffer and count bytes emitted.
147 147 assert(ra_ == ra_->C->regalloc(), "sanity");
148 148 return ra_->C->scratch_emit_size(this);
149 149 }
150 150
151 151
152 152
153 153 //------------------------------hash-------------------------------------------
154 154 uint MachNode::hash() const {
155 155 uint no = num_opnds();
156 156 uint sum = rule();
157 157 for( uint i=0; i<no; i++ )
158 158 sum += _opnds[i]->hash();
159 159 return sum+Node::hash();
160 160 }
161 161
162 162 //-----------------------------cmp---------------------------------------------
163 163 uint MachNode::cmp( const Node &node ) const {
164 164 MachNode& n = *((Node&)node).as_Mach();
165 165 uint no = num_opnds();
166 166 if( no != n.num_opnds() ) return 0;
167 167 if( rule() != n.rule() ) return 0;
168 168 for( uint i=0; i<no; i++ ) // All operands must match
169 169 if( !_opnds[i]->cmp( *n._opnds[i] ) )
170 170 return 0; // mis-matched operands
171 171 return 1; // match
172 172 }
173 173
174 174 // Return an equivalent instruction using memory for cisc_operand position
175 175 MachNode *MachNode::cisc_version(int offset, Compile* C) {
176 176 ShouldNotCallThis();
177 177 return NULL;
178 178 }
179 179
180 180 void MachNode::use_cisc_RegMask() {
181 181 ShouldNotReachHere();
182 182 }
183 183
184 184
185 185 //-----------------------------in_RegMask--------------------------------------
186 186 const RegMask &MachNode::in_RegMask( uint idx ) const {
187 187 uint numopnds = num_opnds(); // Virtual call for number of operands
188 188 uint skipped = oper_input_base(); // Sum of leaves skipped so far
189 189 if( idx < skipped ) {
190 190 assert( ideal_Opcode() == Op_AddP, "expected base ptr here" );
191 191 assert( idx == 1, "expected base ptr here" );
192 192 // debug info can be anywhere
193 193 return *Compile::current()->matcher()->idealreg2spillmask[Op_RegP];
194 194 }
195 195 uint opcnt = 1; // First operand
196 196 uint num_edges = _opnds[1]->num_edges(); // leaves for first operand
197 197 while( idx >= skipped+num_edges ) {
198 198 skipped += num_edges;
199 199 opcnt++; // Bump operand count
200 200 assert( opcnt < numopnds, "Accessing non-existent operand" );
201 201 num_edges = _opnds[opcnt]->num_edges(); // leaves for next operand
202 202 }
203 203
204 204 const RegMask *rm = cisc_RegMask();
205 205 if( rm == NULL || (int)opcnt != cisc_operand() ) {
206 206 rm = _opnds[opcnt]->in_RegMask(idx-skipped);
207 207 }
208 208 return *rm;
209 209 }
210 210
211 211 //-----------------------------memory_inputs--------------------------------
212 212 const MachOper* MachNode::memory_inputs(Node* &base, Node* &index) const {
213 213 const MachOper* oper = memory_operand();
214 214
215 215 if (oper == (MachOper*)-1) {
216 216 base = NodeSentinel;
217 217 index = NodeSentinel;
218 218 } else {
219 219 base = NULL;
220 220 index = NULL;
221 221 if (oper != NULL) {
222 222 // It has a unique memory operand. Find its index.
223 223 int oper_idx = num_opnds();
224 224 while (--oper_idx >= 0) {
225 225 if (_opnds[oper_idx] == oper) break;
226 226 }
227 227 int oper_pos = operand_index(oper_idx);
228 228 int base_pos = oper->base_position();
229 229 if (base_pos >= 0) {
230 230 base = _in[oper_pos+base_pos];
231 231 }
232 232 int index_pos = oper->index_position();
233 233 if (index_pos >= 0) {
234 234 index = _in[oper_pos+index_pos];
235 235 }
236 236 }
237 237 }
238 238
239 239 return oper;
240 240 }
241 241
242 242 //-----------------------------get_base_and_disp----------------------------
243 243 const Node* MachNode::get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const {
244 244
245 245 // Find the memory inputs using our helper function
246 246 Node* base;
247 247 Node* index;
248 248 const MachOper* oper = memory_inputs(base, index);
249 249
250 250 if (oper == NULL) {
251 251 // Base has been set to NULL
252 252 offset = 0;
253 253 } else if (oper == (MachOper*)-1) {
254 254 // Base has been set to NodeSentinel
255 255 // There is not a unique memory use here. We will fall to AliasIdxBot.
256 256 offset = Type::OffsetBot;
257 257 } else {
258 258 // Base may be NULL, even if offset turns out to be != 0
259 259
260 260 intptr_t disp = oper->constant_disp();
261 261 int scale = oper->scale();
262 262 // Now we have collected every part of the ADLC MEMORY_INTER.
263 263 // See if it adds up to a base + offset.
264 264 if (index != NULL) {
265 265 const Type* t_index = index->bottom_type();
266 266 if (t_index->isa_narrowoop()) { // EncodeN, LoadN, LoadConN, LoadNKlass.
267 267 // Memory references through narrow oops have a
268 268 // funny base so grab the type from the index:
269 269 // [R12 + narrow_oop_reg<<3 + offset]
270 270 assert(base == NULL, "Memory references through narrow oops have no base");
271 271 offset = disp;
272 272 adr_type = t_index->make_ptr()->add_offset(offset);
273 273 return NULL;
274 274 } else if (!index->is_Con()) {
275 275 disp = Type::OffsetBot;
276 276 } else if (disp != Type::OffsetBot) {
277 277 const TypeX* ti = t_index->isa_intptr_t();
278 278 if (ti == NULL) {
279 279 disp = Type::OffsetBot; // a random constant??
280 280 } else {
281 281 disp += ti->get_con() << scale;
282 282 }
283 283 }
284 284 }
285 285 offset = disp;
286 286
287 287 // In i486.ad, indOffset32X uses base==RegI and disp==RegP,
288 288 // this will prevent alias analysis without the following support:
289 289 // Lookup the TypePtr used by indOffset32X, a compile-time constant oop,
290 290 // Add the offset determined by the "base", or use Type::OffsetBot.
291 291 if( adr_type == TYPE_PTR_SENTINAL ) {
292 292 const TypePtr *t_disp = oper->disp_as_type(); // only !NULL for indOffset32X
293 293 if (t_disp != NULL) {
294 294 offset = Type::OffsetBot;
295 295 const Type* t_base = base->bottom_type();
296 296 if (t_base->isa_intptr_t()) {
297 297 const TypeX *t_offset = t_base->is_intptr_t();
298 298 if( t_offset->is_con() ) {
299 299 offset = t_offset->get_con();
300 300 }
301 301 }
302 302 adr_type = t_disp->add_offset(offset);
303 303 } else if( base == NULL && offset != 0 && offset != Type::OffsetBot ) {
304 304 // Use ideal type if it is oop ptr.
305 305 const TypePtr *tp = oper->type()->isa_ptr();
306 306 if( tp != NULL) {
307 307 adr_type = tp;
308 308 }
309 309 }
310 310 }
311 311
312 312 }
313 313 return base;
314 314 }
315 315
316 316
317 317 //---------------------------------adr_type---------------------------------
318 318 const class TypePtr *MachNode::adr_type() const {
319 319 intptr_t offset = 0;
320 320 const TypePtr *adr_type = TYPE_PTR_SENTINAL; // attempt computing adr_type
321 321 const Node *base = get_base_and_disp(offset, adr_type);
322 322 if( adr_type != TYPE_PTR_SENTINAL ) {
323 323 return adr_type; // get_base_and_disp has the answer
324 324 }
325 325
326 326 // Direct addressing modes have no base node, simply an indirect
327 327 // offset, which is always to raw memory.
328 328 // %%%%% Someday we'd like to allow constant oop offsets which
329 329 // would let Intel load from static globals in 1 instruction.
330 330 // Currently Intel requires 2 instructions and a register temp.
331 331 if (base == NULL) {
332 332 // NULL base, zero offset means no memory at all (a null pointer!)
333 333 if (offset == 0) {
334 334 return NULL;
335 335 }
336 336 // NULL base, any offset means any pointer whatever
337 337 if (offset == Type::OffsetBot) {
338 338 return TypePtr::BOTTOM;
339 339 }
340 340 // %%% make offset be intptr_t
341 341 assert(!Universe::heap()->is_in_reserved((oop)offset), "must be a raw ptr");
342 342 return TypeRawPtr::BOTTOM;
343 343 }
344 344
345 345 // base of -1 with no particular offset means all of memory
346 346 if (base == NodeSentinel) return TypePtr::BOTTOM;
347 347
348 348 const Type* t = base->bottom_type();
349 349 if (UseCompressedOops && Universe::narrow_oop_shift() == 0) {
350 350 // 32-bit unscaled narrow oop can be the base of any address expression
351 351 t = t->make_ptr();
352 352 }
353 353 if (t->isa_intptr_t() && offset != 0 && offset != Type::OffsetBot) {
354 354 // We cannot assert that the offset does not look oop-ish here.
355 355 // Depending on the heap layout the cardmark base could land
356 356 // inside some oopish region. It definitely does for Win2K.
357 357 // The sum of cardmark-base plus shift-by-9-oop lands outside
358 358 // the oop-ish area but we can't assert for that statically.
359 359 return TypeRawPtr::BOTTOM;
360 360 }
361 361
362 362 const TypePtr *tp = t->isa_ptr();
363 363
364 364 // be conservative if we do not recognize the type
365 365 if (tp == NULL) {
366 366 assert(false, "this path may produce not optimal code");
367 367 return TypePtr::BOTTOM;
368 368 }
369 369 assert(tp->base() != Type::AnyPtr, "not a bare pointer");
370 370
371 371 return tp->add_offset(offset);
372 372 }
373 373
374 374
375 375 //-----------------------------operand_index---------------------------------
376 376 int MachNode::operand_index( uint operand ) const {
377 377 if( operand < 1 ) return -1;
378 378 assert(operand < num_opnds(), "oob");
379 379 if( _opnds[operand]->num_edges() == 0 ) return -1;
380 380
381 381 uint skipped = oper_input_base(); // Sum of leaves skipped so far
382 382 for (uint opcnt = 1; opcnt < operand; opcnt++) {
383 383 uint num_edges = _opnds[opcnt]->num_edges(); // leaves for operand
384 384 skipped += num_edges;
385 385 }
386 386 return skipped;
387 387 }
388 388
389 389
390 390 //------------------------------negate-----------------------------------------
391 391 // Negate conditional branches. Error for non-branch Nodes
392 392 void MachNode::negate() {
393 393 ShouldNotCallThis();
394 394 }
395 395
396 396 //------------------------------peephole---------------------------------------
397 397 // Apply peephole rule(s) to this instruction
398 398 MachNode *MachNode::peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C ) {
399 399 return NULL;
400 400 }
401 401
402 402 //------------------------------add_case_label---------------------------------
403 403 // Adds the label for the case
404 404 void MachNode::add_case_label( int index_num, Label* blockLabel) {
405 405 ShouldNotCallThis();
406 406 }
407 407
408 408 //------------------------------label_set--------------------------------------
409 409 // Set the Label for a LabelOper, if an operand for this instruction
410 410 void MachNode::label_set( Label& label, uint block_num ) {
411 411 ShouldNotCallThis();
412 412 }
413 413
414 414 //------------------------------method_set-------------------------------------
415 415 // Set the absolute address of a method
416 416 void MachNode::method_set( intptr_t addr ) {
417 417 ShouldNotCallThis();
418 418 }
419 419
420 420 //------------------------------rematerialize----------------------------------
421 421 bool MachNode::rematerialize() const {
422 422 // Temps are always rematerializable
423 423 if (is_MachTemp()) return true;
424 424
425 425 uint r = rule(); // Match rule
426 426 if( r < Matcher::_begin_rematerialize ||
427 427 r >= Matcher::_end_rematerialize )
428 428 return false;
429 429
430 430 // For 2-address instructions, the input live range is also the output
431 431 // live range. Remateralizing does not make progress on the that live range.
432 432 if( two_adr() ) return false;
433 433
434 434 // Check for rematerializing float constants, or not
435 435 if( !Matcher::rematerialize_float_constants ) {
436 436 int op = ideal_Opcode();
437 437 if( op == Op_ConF || op == Op_ConD )
438 438 return false;
439 439 }
440 440
441 441 // Defining flags - can't spill these! Must remateralize.
442 442 if( ideal_reg() == Op_RegFlags )
443 443 return true;
444 444
445 445 // Stretching lots of inputs - don't do it.
446 446 if( req() > 2 )
447 447 return false;
448 448
449 449 // Don't remateralize somebody with bound inputs - it stretches a
450 450 // fixed register lifetime.
451 451 uint idx = oper_input_base();
452 452 if( req() > idx ) {
453 453 const RegMask &rm = in_RegMask(idx);
454 454 if( rm.is_bound1() || rm.is_bound2() )
455 455 return false;
456 456 }
457 457
458 458 return true;
459 459 }
460 460
461 461 #ifndef PRODUCT
462 462 //------------------------------dump_spec--------------------------------------
463 463 // Print any per-operand special info
464 464 void MachNode::dump_spec(outputStream *st) const {
465 465 uint cnt = num_opnds();
466 466 for( uint i=0; i<cnt; i++ )
467 467 _opnds[i]->dump_spec(st);
468 468 const TypePtr *t = adr_type();
469 469 if( t ) {
470 470 Compile* C = Compile::current();
471 471 if( C->alias_type(t)->is_volatile() )
472 472 st->print(" Volatile!");
473 473 }
474 474 }
475 475
476 476 //------------------------------dump_format------------------------------------
477 477 // access to virtual
478 478 void MachNode::dump_format(PhaseRegAlloc *ra, outputStream *st) const {
479 479 format(ra, st); // access to virtual
480 480 }
481 481 #endif
482 482
483 483 //=============================================================================
484 484 #ifndef PRODUCT
485 485 void MachTypeNode::dump_spec(outputStream *st) const {
486 486 _bottom_type->dump_on(st);
487 487 }
488 488 #endif
489 489
490 490 //=============================================================================
491 491 #ifndef PRODUCT
492 492 void MachNullCheckNode::format( PhaseRegAlloc *ra_, outputStream *st ) const {
493 493 int reg = ra_->get_reg_first(in(1)->in(_vidx));
494 494 tty->print("%s %s", Name(), Matcher::regName[reg]);
495 495 }
496 496 #endif
497 497
498 498 void MachNullCheckNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {
499 499 // only emits entries in the null-pointer exception handler table
500 500 }
501 501
502 502 const RegMask &MachNullCheckNode::in_RegMask( uint idx ) const {
503 503 if( idx == 0 ) return RegMask::Empty;
504 504 else return in(1)->as_Mach()->out_RegMask();
505 505 }
506 506
507 507 //=============================================================================
508 508 const Type *MachProjNode::bottom_type() const {
509 509 if( _ideal_reg == fat_proj ) return Type::BOTTOM;
510 510 // Try the normal mechanism first
511 511 const Type *t = in(0)->bottom_type();
512 512 if( t->base() == Type::Tuple ) {
513 513 const TypeTuple *tt = t->is_tuple();
514 514 if (_con < tt->cnt())
515 515 return tt->field_at(_con);
516 516 }
517 517 // Else use generic type from ideal register set
518 518 assert((uint)_ideal_reg < (uint)_last_machine_leaf && Type::mreg2type[_ideal_reg], "in bounds");
519 519 return Type::mreg2type[_ideal_reg];
520 520 }
521 521
522 522 const TypePtr *MachProjNode::adr_type() const {
523 523 if (bottom_type() == Type::MEMORY) {
524 524 // in(0) might be a narrow MemBar; otherwise we will report TypePtr::BOTTOM
525 525 const TypePtr* adr_type = in(0)->adr_type();
526 526 #ifdef ASSERT
527 527 if (!is_error_reported() && !Node::in_dump())
528 528 assert(adr_type != NULL, "source must have adr_type");
529 529 #endif
530 530 return adr_type;
531 531 }
532 532 assert(bottom_type()->base() != Type::Memory, "no other memories?");
533 533 return NULL;
534 534 }
535 535
536 536 #ifndef PRODUCT
537 537 void MachProjNode::dump_spec(outputStream *st) const {
538 538 ProjNode::dump_spec(st);
539 539 switch (_ideal_reg) {
540 540 case unmatched_proj: st->print("/unmatched"); break;
541 541 case fat_proj: st->print("/fat"); if (WizardMode) _rout.dump(); break;
542 542 }
543 543 }
544 544 #endif
545 545
546 546 //=============================================================================
547 547 #ifndef PRODUCT
548 548 void MachIfNode::dump_spec(outputStream *st) const {
549 549 st->print("P=%f, C=%f",_prob, _fcnt);
550 550 }
551 551 #endif
552 552
553 553 //=============================================================================
554 554 uint MachReturnNode::size_of() const { return sizeof(*this); }
555 555
556 556 //------------------------------Registers--------------------------------------
557 557 const RegMask &MachReturnNode::in_RegMask( uint idx ) const {
558 558 return _in_rms[idx];
559 559 }
560 560
561 561 const TypePtr *MachReturnNode::adr_type() const {
562 562 // most returns and calls are assumed to consume & modify all of memory
563 563 // the matcher will copy non-wide adr_types from ideal originals
564 564 return _adr_type;
565 565 }
566 566
567 567 //=============================================================================
568 568 const Type *MachSafePointNode::bottom_type() const { return TypeTuple::MEMBAR; }
569 569
570 570 //------------------------------Registers--------------------------------------
571 571 const RegMask &MachSafePointNode::in_RegMask( uint idx ) const {
572 572 // Values in the domain use the users calling convention, embodied in the
573 573 // _in_rms array of RegMasks.
574 574 if( idx < TypeFunc::Parms ) return _in_rms[idx];
575 575
576 576 if (SafePointNode::needs_polling_address_input() &&
577 577 idx == TypeFunc::Parms &&
578 578 ideal_Opcode() == Op_SafePoint) {
579 579 return MachNode::in_RegMask(idx);
580 580 }
581 581
582 582 // Values outside the domain represent debug info
583 583 return *Compile::current()->matcher()->idealreg2spillmask[in(idx)->ideal_reg()];
584 584 }
585 585
586 586
587 587 //=============================================================================
588 588
589 589 uint MachCallNode::cmp( const Node &n ) const
590 590 { return _tf == ((MachCallNode&)n)._tf; }
591 591 const Type *MachCallNode::bottom_type() const { return tf()->range(); }
592 592 const Type *MachCallNode::Value(PhaseTransform *phase) const { return tf()->range(); }
593 593
594 594 #ifndef PRODUCT
595 595 void MachCallNode::dump_spec(outputStream *st) const {
596 596 st->print("# ");
597 597 tf()->dump_on(st);
598 598 if (_cnt != COUNT_UNKNOWN) st->print(" C=%f",_cnt);
599 599 if (jvms() != NULL) jvms()->dump_spec(st);
600 600 }
601 601 #endif
602 602
603 603
604 604 bool MachCallNode::return_value_is_used() const {
605 605 if (tf()->range()->cnt() == TypeFunc::Parms) {
606 606 // void return
607 607 return false;
608 608 }
609 609
610 610 // find the projection corresponding to the return value
611 611 for (DUIterator_Fast imax, i = fast_outs(imax); i < imax; i++) {
612 612 Node *use = fast_out(i);
613 613 if (!use->is_Proj()) continue;
614 614 if (use->as_Proj()->_con == TypeFunc::Parms) {
615 615 return true;
616 616 }
617 617 }
618 618 return false;
619 619 }
620 620
621 621
622 622 //------------------------------Registers--------------------------------------
623 623 const RegMask &MachCallNode::in_RegMask( uint idx ) const {
624 624 // Values in the domain use the users calling convention, embodied in the
625 625 // _in_rms array of RegMasks.
626 626 if (idx < tf()->domain()->cnt()) return _in_rms[idx];
627 627 // Values outside the domain represent debug info
628 628 return *Compile::current()->matcher()->idealreg2debugmask[in(idx)->ideal_reg()];
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629 629 }
630 630
631 631 //=============================================================================
632 632 uint MachCallJavaNode::size_of() const { return sizeof(*this); }
633 633 uint MachCallJavaNode::cmp( const Node &n ) const {
634 634 MachCallJavaNode &call = (MachCallJavaNode&)n;
635 635 return MachCallNode::cmp(call) && _method->equals(call._method);
636 636 }
637 637 #ifndef PRODUCT
638 638 void MachCallJavaNode::dump_spec(outputStream *st) const {
639 - if( _method ) {
639 + if (_method_handle_invoke)
640 + st->print("MethodHandle ");
641 + if (_method) {
640 642 _method->print_short_name(st);
641 643 st->print(" ");
642 644 }
643 645 MachCallNode::dump_spec(st);
644 646 }
645 647 #endif
646 648
649 +//------------------------------Registers--------------------------------------
650 +const RegMask &MachCallJavaNode::in_RegMask(uint idx) const {
651 + // Values in the domain use the users calling convention, embodied in the
652 + // _in_rms array of RegMasks.
653 + if (idx < tf()->domain()->cnt()) return _in_rms[idx];
654 + // Values outside the domain represent debug info
655 + Matcher* m = Compile::current()->matcher();
656 + RegMask** debugmask = _method_handle_invoke ? m->idealreg2mhdebugmask : m->idealreg2debugmask;
657 + return *debugmask[in(idx)->ideal_reg()];
658 +}
659 +
647 660 //=============================================================================
648 661 uint MachCallStaticJavaNode::size_of() const { return sizeof(*this); }
649 662 uint MachCallStaticJavaNode::cmp( const Node &n ) const {
650 663 MachCallStaticJavaNode &call = (MachCallStaticJavaNode&)n;
651 664 return MachCallJavaNode::cmp(call) && _name == call._name;
652 665 }
653 666
654 667 //----------------------------uncommon_trap_request----------------------------
655 668 // If this is an uncommon trap, return the request code, else zero.
656 669 int MachCallStaticJavaNode::uncommon_trap_request() const {
657 670 if (_name != NULL && !strcmp(_name, "uncommon_trap")) {
658 671 return CallStaticJavaNode::extract_uncommon_trap_request(this);
659 672 }
660 673 return 0;
661 674 }
662 675
663 676 #ifndef PRODUCT
664 677 // Helper for summarizing uncommon_trap arguments.
665 678 void MachCallStaticJavaNode::dump_trap_args(outputStream *st) const {
666 679 int trap_req = uncommon_trap_request();
667 680 if (trap_req != 0) {
668 681 char buf[100];
669 682 st->print("(%s)",
670 683 Deoptimization::format_trap_request(buf, sizeof(buf),
671 684 trap_req));
672 685 }
673 686 }
674 687
675 688 void MachCallStaticJavaNode::dump_spec(outputStream *st) const {
676 689 st->print("Static ");
677 690 if (_name != NULL) {
678 691 st->print("wrapper for: %s", _name );
679 692 dump_trap_args(st);
680 693 st->print(" ");
681 694 }
682 695 MachCallJavaNode::dump_spec(st);
683 696 }
684 697 #endif
685 698
686 699 //=============================================================================
687 700 #ifndef PRODUCT
688 701 void MachCallDynamicJavaNode::dump_spec(outputStream *st) const {
689 702 st->print("Dynamic ");
690 703 MachCallJavaNode::dump_spec(st);
691 704 }
692 705 #endif
693 706 //=============================================================================
694 707 uint MachCallRuntimeNode::size_of() const { return sizeof(*this); }
695 708 uint MachCallRuntimeNode::cmp( const Node &n ) const {
696 709 MachCallRuntimeNode &call = (MachCallRuntimeNode&)n;
697 710 return MachCallNode::cmp(call) && !strcmp(_name,call._name);
698 711 }
699 712 #ifndef PRODUCT
700 713 void MachCallRuntimeNode::dump_spec(outputStream *st) const {
701 714 st->print("%s ",_name);
702 715 MachCallNode::dump_spec(st);
703 716 }
704 717 #endif
705 718 //=============================================================================
706 719 // A shared JVMState for all HaltNodes. Indicates the start of debug info
707 720 // is at TypeFunc::Parms. Only required for SOE register spill handling -
708 721 // to indicate where the stack-slot-only debug info inputs begin.
709 722 // There is no other JVM state needed here.
710 723 JVMState jvms_for_throw(0);
711 724 JVMState *MachHaltNode::jvms() const {
712 725 return &jvms_for_throw;
713 726 }
714 727
715 728 //=============================================================================
716 729 #ifndef PRODUCT
717 730 void labelOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const {
718 731 st->print("B%d", _block_num);
719 732 }
720 733 #endif // PRODUCT
721 734
722 735 //=============================================================================
723 736 #ifndef PRODUCT
724 737 void methodOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const {
725 738 st->print(INTPTR_FORMAT, _method);
726 739 }
727 740 #endif // PRODUCT
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