1 /*
   2  * Copyright 1997-2007 Sun Microsystems, Inc.  All Rights Reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
  20  * CA 95054 USA or visit www.sun.com if you need additional information or
  21  * have any questions.
  22  *
  23  */
  24 
  25 class BufferBlob;
  26 class CodeBuffer;
  27 class JVMState;
  28 class MachCallDynamicJavaNode;
  29 class MachCallJavaNode;
  30 class MachCallLeafNode;
  31 class MachCallNode;
  32 class MachCallRuntimeNode;
  33 class MachCallStaticJavaNode;
  34 class MachEpilogNode;
  35 class MachIfNode;
  36 class MachNullCheckNode;
  37 class MachOper;
  38 class MachProjNode;
  39 class MachPrologNode;
  40 class MachReturnNode;
  41 class MachSafePointNode;
  42 class MachSpillCopyNode;
  43 class Matcher;
  44 class PhaseRegAlloc;
  45 class RegMask;
  46 class State;
  47 
  48 //---------------------------MachOper------------------------------------------
  49 class MachOper : public ResourceObj {
  50 public:
  51   // Allocate right next to the MachNodes in the same arena
  52   void *operator new( size_t x, Compile* C ) { return C->node_arena()->Amalloc_D(x); }
  53 
  54   // Opcode
  55   virtual uint opcode() const = 0;
  56 
  57   // Number of input edges.
  58   // Generally at least 1
  59   virtual uint num_edges() const { return 1; }
  60   // Array of Register masks
  61   virtual const RegMask *in_RegMask(int index) const;
  62 
  63   // Methods to output the encoding of the operand
  64 
  65   // Negate conditional branches.  Error for non-branch Nodes
  66   virtual void negate();
  67 
  68   // Return the value requested
  69   // result register lookup, corresponding to int_format
  70   virtual int  reg(PhaseRegAlloc *ra_, const Node *node)   const;
  71   // input register lookup, corresponding to ext_format
  72   virtual int  reg(PhaseRegAlloc *ra_, const Node *node, int idx)   const;
  73 
  74   // helpers for MacroAssembler generation from ADLC
  75   Register  as_Register(PhaseRegAlloc *ra_, const Node *node)   const {
  76     return ::as_Register(reg(ra_, node));
  77   }
  78   Register  as_Register(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
  79     return ::as_Register(reg(ra_, node, idx));
  80   }
  81   FloatRegister  as_FloatRegister(PhaseRegAlloc *ra_, const Node *node)   const {
  82     return ::as_FloatRegister(reg(ra_, node));
  83   }
  84   FloatRegister  as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
  85     return ::as_FloatRegister(reg(ra_, node, idx));
  86   }
  87 
  88 #if defined(IA32) || defined(AMD64)
  89   XMMRegister  as_XMMRegister(PhaseRegAlloc *ra_, const Node *node)   const {
  90     return ::as_XMMRegister(reg(ra_, node));
  91   }
  92   XMMRegister  as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
  93     return ::as_XMMRegister(reg(ra_, node, idx));
  94   }
  95 #endif
  96 
  97   virtual intptr_t  constant() const;
  98   virtual bool constant_is_oop() const;
  99   virtual jdouble constantD() const;
 100   virtual jfloat  constantF() const;
 101   virtual jlong   constantL() const;
 102   virtual TypeOopPtr *oop() const;
 103   virtual int  ccode() const;
 104   // A zero, default, indicates this value is not needed.
 105   // May need to lookup the base register, as done in int_ and ext_format
 106   virtual int  base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
 107   virtual int  index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
 108   virtual int  scale() const;
 109   // Parameters needed to support MEMORY_INTERFACE access to stackSlot
 110   virtual int  disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
 111   // Check for PC-Relative displacement
 112   virtual bool disp_is_oop() const;
 113   virtual int  constant_disp() const;   // usu. 0, may return Type::OffsetBot
 114   virtual int  base_position()  const;  // base edge position, or -1
 115   virtual int  index_position() const;  // index edge position, or -1
 116 
 117   // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
 118   // Only returns non-null value for i486.ad's indOffset32X
 119   virtual const TypePtr *disp_as_type() const { return NULL; }
 120 
 121   // Return the label
 122   virtual Label *label() const;
 123 
 124   // Return the method's address
 125   virtual intptr_t  method() const;
 126 
 127   // Hash and compare over operands are currently identical
 128   virtual uint  hash() const;
 129   virtual uint  cmp( const MachOper &oper ) const;
 130 
 131   // Virtual clone, since I do not know how big the MachOper is.
 132   virtual MachOper *clone(Compile* C) const = 0;
 133 
 134   // Return ideal Type from simple operands.  Fail for complex operands.
 135   virtual const Type *type() const;
 136 
 137   // Set an integer offset if we have one, or error otherwise
 138   virtual void set_con( jint c0 ) { ShouldNotReachHere();  }
 139 
 140 #ifndef PRODUCT
 141   // Return name of operand
 142   virtual const char    *Name() const { return "???";}
 143 
 144   // Methods to output the text version of the operand
 145   virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
 146   virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
 147 
 148   virtual void dump_spec(outputStream *st) const; // Print per-operand info
 149 #endif
 150 };
 151 
 152 //------------------------------MachNode---------------------------------------
 153 // Base type for all machine specific nodes.  All node classes generated by the
 154 // ADLC inherit from this class.
 155 class MachNode : public Node {
 156 public:
 157   MachNode() : Node((uint)0), _num_opnds(0), _opnds(NULL) {
 158     init_class_id(Class_Mach);
 159   }
 160   // Required boilerplate
 161   virtual uint size_of() const { return sizeof(MachNode); }
 162   virtual int  Opcode() const;          // Always equal to MachNode
 163   virtual uint rule() const = 0;        // Machine-specific opcode
 164   // Number of inputs which come before the first operand.
 165   // Generally at least 1, to skip the Control input
 166   virtual uint oper_input_base() const { return 1; }
 167 
 168   // Copy inputs and operands to new node of instruction.
 169   // Called from cisc_version() and short_branch_version().
 170   // !!!! The method's body is defined in ad_<arch>.cpp file.
 171   void fill_new_machnode(MachNode *n, Compile* C) const;
 172 
 173   // Return an equivalent instruction using memory for cisc_operand position
 174   virtual MachNode *cisc_version(int offset, Compile* C);
 175   // Modify this instruction's register mask to use stack version for cisc_operand
 176   virtual void use_cisc_RegMask();
 177 
 178   // Support for short branches
 179   virtual MachNode *short_branch_version(Compile* C) { return NULL; }
 180   bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
 181 
 182   // First index in _in[] corresponding to operand, or -1 if there is none
 183   int  operand_index(uint operand) const;
 184 
 185   // Register class input is expected in
 186   virtual const RegMask &in_RegMask(uint) const;
 187 
 188   // cisc-spillable instructions redefine for use by in_RegMask
 189   virtual const RegMask *cisc_RegMask() const { return NULL; }
 190 
 191   // If this instruction is a 2-address instruction, then return the
 192   // index of the input which must match the output.  Not nessecary
 193   // for instructions which bind the input and output register to the
 194   // same singleton regiser (e.g., Intel IDIV which binds AX to be
 195   // both an input and an output).  It is nessecary when the input and
 196   // output have choices - but they must use the same choice.
 197   virtual uint two_adr( ) const { return 0; }
 198 
 199   // Array of complex operand pointers.  Each corresponds to zero or
 200   // more leafs.  Must be set by MachNode constructor to point to an
 201   // internal array of MachOpers.  The MachOper array is sized by
 202   // specific MachNodes described in the ADL.
 203   uint _num_opnds;
 204   MachOper **_opnds;
 205   uint  num_opnds() const { return _num_opnds; }
 206 
 207   // Emit bytes into cbuf
 208   virtual void  emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 209   // Size of instruction in bytes
 210   virtual uint  size(PhaseRegAlloc *ra_) const;
 211   // Helper function that computes size by emitting code
 212   virtual uint  emit_size(PhaseRegAlloc *ra_) const;
 213 
 214   // Return the alignment required (in units of relocInfo::addr_unit())
 215   // for this instruction (must be a power of 2)
 216   virtual int   alignment_required() const { return 1; }
 217 
 218   // Return the padding (in bytes) to be emitted before this
 219   // instruction to properly align it.
 220   virtual int   compute_padding(int current_offset) const { return 0; }
 221 
 222   // Return number of relocatable values contained in this instruction
 223   virtual int   reloc() const { return 0; }
 224 
 225   // Return number of words used for double constants in this instruction
 226   virtual int   const_size() const { return 0; }
 227 
 228   // Hash and compare over operands.  Used to do GVN on machine Nodes.
 229   virtual uint  hash() const;
 230   virtual uint  cmp( const Node &n ) const;
 231 
 232   // Expand method for MachNode, replaces nodes representing pseudo
 233   // instructions with a set of nodes which represent real machine
 234   // instructions and compute the same value.
 235   virtual MachNode *Expand( State *, Node_List &proj_list ) { return this; }
 236 
 237   // Bottom_type call; value comes from operand0
 238   virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
 239   virtual uint ideal_reg() const { const Type *t = _opnds[0]->type(); return t == TypeInt::CC ? Op_RegFlags : Matcher::base2reg[t->base()]; }
 240 
 241   // If this is a memory op, return the base pointer and fixed offset.
 242   // If there are no such, return NULL.  If there are multiple addresses
 243   // or the address is indeterminate (rare cases) then return (Node*)-1,
 244   // which serves as node bottom.
 245   // If the offset is not statically determined, set it to Type::OffsetBot.
 246   // This method is free to ignore stack slots if that helps.
 247   #define TYPE_PTR_SENTINAL  ((const TypePtr*)-1)
 248   // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
 249   const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
 250 
 251   // Helper for get_base_and_disp: find the base and index input nodes.
 252   // Returns the MachOper as determined by memory_operand(), for use, if
 253   // needed by the caller. If (MachOper *)-1 is returned, base and index
 254   // are set to NodeSentinel. If (MachOper *) NULL is returned, base and
 255   // index are set to NULL.
 256   const MachOper* memory_inputs(Node* &base, Node* &index) const;
 257 
 258   // Helper for memory_inputs:  Which operand carries the necessary info?
 259   // By default, returns NULL, which means there is no such operand.
 260   // If it returns (MachOper*)-1, this means there are multiple memories.
 261   virtual const MachOper* memory_operand() const { return NULL; }
 262 
 263   // Call "get_base_and_disp" to decide which category of memory is used here.
 264   virtual const class TypePtr *adr_type() const;
 265 
 266   // Negate conditional branches.  Error for non-branch Nodes
 267   virtual void negate();
 268 
 269   // Apply peephole rule(s) to this instruction
 270   virtual MachNode *peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C );
 271 
 272   // Check for PC-Relative addressing
 273   bool is_pc_relative() const { return (flags() & Flag_is_pc_relative) != 0; }
 274 
 275   // Top-level ideal Opcode matched
 276   virtual int ideal_Opcode()     const { return Op_Node; }
 277 
 278   // Set the branch inside jump MachNodes.  Error for non-branch Nodes.
 279   virtual void label_set( Label& label, uint block_num );
 280 
 281   // Adds the label for the case
 282   virtual void add_case_label( int switch_val, Label* blockLabel);
 283 
 284   // Set the absolute address for methods
 285   virtual void method_set( intptr_t addr );
 286 
 287   // Should we clone rather than spill this instruction?
 288   bool rematerialize() const;
 289 
 290   // Get the pipeline info
 291   static const Pipeline *pipeline_class();
 292   virtual const Pipeline *pipeline() const;
 293 
 294 #ifndef PRODUCT
 295   virtual const char *Name() const = 0; // Machine-specific name
 296   virtual void dump_spec(outputStream *st) const; // Print per-node info
 297   void         dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
 298 #endif
 299 };
 300 
 301 //------------------------------MachIdealNode----------------------------
 302 // Machine specific versions of nodes that must be defined by user.
 303 // These are not converted by matcher from ideal nodes to machine nodes
 304 // but are inserted into the code by the compiler.
 305 class MachIdealNode : public MachNode {
 306 public:
 307   MachIdealNode( ) {}
 308 
 309   // Define the following defaults for non-matched machine nodes
 310   virtual uint oper_input_base() const { return 0; }
 311   virtual uint rule()            const { return 9999999; }
 312   virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); }
 313 };
 314 
 315 //------------------------------MachTypeNode----------------------------
 316 // Machine Nodes that need to retain a known Type.
 317 class MachTypeNode : public MachNode {
 318   virtual uint size_of() const { return sizeof(*this); } // Size is bigger
 319 public:
 320   const Type *_bottom_type;
 321 
 322   virtual const class Type *bottom_type() const { return _bottom_type; }
 323 #ifndef PRODUCT
 324   virtual void dump_spec(outputStream *st) const;
 325 #endif
 326 };
 327 
 328 //------------------------------MachBreakpointNode----------------------------
 329 // Machine breakpoint or interrupt Node
 330 class MachBreakpointNode : public MachIdealNode {
 331 public:
 332   MachBreakpointNode( ) {}
 333   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 334   virtual uint size(PhaseRegAlloc *ra_) const;
 335 
 336 #ifndef PRODUCT
 337   virtual const char *Name() const { return "Breakpoint"; }
 338   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 339 #endif
 340 };
 341 
 342 //------------------------------MachUEPNode-----------------------------------
 343 // Machine Unvalidated Entry Point Node
 344 class MachUEPNode : public MachIdealNode {
 345 public:
 346   MachUEPNode( ) {}
 347   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 348   virtual uint size(PhaseRegAlloc *ra_) const;
 349 
 350 #ifndef PRODUCT
 351   virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
 352   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 353 #endif
 354 };
 355 
 356 //------------------------------MachPrologNode--------------------------------
 357 // Machine function Prolog Node
 358 class MachPrologNode : public MachIdealNode {
 359 public:
 360   MachPrologNode( ) {}
 361   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 362   virtual uint size(PhaseRegAlloc *ra_) const;
 363   virtual int reloc() const;
 364 
 365 #ifndef PRODUCT
 366   virtual const char *Name() const { return "Prolog"; }
 367   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 368 #endif
 369 };
 370 
 371 //------------------------------MachEpilogNode--------------------------------
 372 // Machine function Epilog Node
 373 class MachEpilogNode : public MachIdealNode {
 374 public:
 375   MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
 376   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 377   virtual uint size(PhaseRegAlloc *ra_) const;
 378   virtual int reloc() const;
 379   virtual const Pipeline *pipeline() const;
 380 
 381 private:
 382   bool _do_polling;
 383 
 384 public:
 385   bool do_polling() const { return _do_polling; }
 386 
 387   // Offset of safepoint from the beginning of the node
 388   int safepoint_offset() const;
 389 
 390 #ifndef PRODUCT
 391   virtual const char *Name() const { return "Epilog"; }
 392   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 393 #endif
 394 };
 395 
 396 //------------------------------MachNopNode-----------------------------------
 397 // Machine function Nop Node
 398 class MachNopNode : public MachIdealNode {
 399 private:
 400   int _count;
 401 public:
 402   MachNopNode( ) : _count(1) {}
 403   MachNopNode( int count ) : _count(count) {}
 404   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 405   virtual uint size(PhaseRegAlloc *ra_) const;
 406 
 407   virtual const class Type *bottom_type() const { return Type::CONTROL; }
 408 
 409   virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
 410   virtual const Pipeline *pipeline() const;
 411 #ifndef PRODUCT
 412   virtual const char *Name() const { return "Nop"; }
 413   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 414   virtual void dump_spec(outputStream *st) const { } // No per-operand info
 415 #endif
 416 };
 417 
 418 //------------------------------MachSpillCopyNode------------------------------
 419 // Machine SpillCopy Node.  Copies 1 or 2 words from any location to any
 420 // location (stack or register).
 421 class MachSpillCopyNode : public MachIdealNode {
 422   const RegMask *_in;           // RegMask for input
 423   const RegMask *_out;          // RegMask for output
 424   const Type *_type;
 425 public:
 426   MachSpillCopyNode( Node *n, const RegMask &in, const RegMask &out ) :
 427     MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()) {
 428     init_class_id(Class_MachSpillCopy);
 429     init_flags(Flag_is_Copy);
 430     add_req(NULL);
 431     add_req(n);
 432   }
 433   virtual uint size_of() const { return sizeof(*this); }
 434   void set_out_RegMask(const RegMask &out) { _out = &out; }
 435   void set_in_RegMask(const RegMask &in) { _in = &in; }
 436   virtual const RegMask &out_RegMask() const { return *_out; }
 437   virtual const RegMask &in_RegMask(uint) const { return *_in; }
 438   virtual const class Type *bottom_type() const { return _type; }
 439   virtual uint ideal_reg() const { return Matcher::base2reg[_type->base()]; }
 440   virtual uint oper_input_base() const { return 1; }
 441   uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
 442 
 443   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 444   virtual uint size(PhaseRegAlloc *ra_) const;
 445 
 446 #ifndef PRODUCT
 447   virtual const char *Name() const { return "MachSpillCopy"; }
 448   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 449 #endif
 450 };
 451 
 452 //------------------------------MachNullChkNode--------------------------------
 453 // Machine-dependent null-pointer-check Node.  Points a real MachNode that is
 454 // also some kind of memory op.  Turns the indicated MachNode into a
 455 // conditional branch with good latency on the ptr-not-null path and awful
 456 // latency on the pointer-is-null path.
 457 
 458 class MachNullCheckNode : public MachIdealNode {
 459 public:
 460   const uint _vidx;             // Index of memop being tested
 461   MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachIdealNode(), _vidx(vidx) {
 462     init_class_id(Class_MachNullCheck);
 463     init_flags(Flag_is_Branch | Flag_is_pc_relative);
 464     add_req(ctrl);
 465     add_req(memop);
 466   }
 467 
 468   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 469   virtual bool pinned() const { return true; };
 470   virtual void negate() { }
 471   virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
 472   virtual uint ideal_reg() const { return NotAMachineReg; }
 473   virtual const RegMask &in_RegMask(uint) const;
 474   virtual const RegMask &out_RegMask() const { return RegMask::Empty; }
 475 #ifndef PRODUCT
 476   virtual const char *Name() const { return "NullCheck"; }
 477   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 478 #endif
 479 };
 480 
 481 //------------------------------MachProjNode----------------------------------
 482 // Machine-dependent Ideal projections (how is that for an oxymoron).  Really
 483 // just MachNodes made by the Ideal world that replicate simple projections
 484 // but with machine-dependent input & output register masks.  Generally
 485 // produced as part of calling conventions.  Normally I make MachNodes as part
 486 // of the Matcher process, but the Matcher is ill suited to issues involving
 487 // frame handling, so frame handling is all done in the Ideal world with
 488 // occasional callbacks to the machine model for important info.
 489 class MachProjNode : public ProjNode {
 490 public:
 491   MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {}
 492   RegMask _rout;
 493   const uint  _ideal_reg;
 494   enum projType {
 495     unmatched_proj = 0,         // Projs for Control, I/O, memory not matched
 496     fat_proj       = 999        // Projs killing many regs, defined by _rout
 497   };
 498   virtual int   Opcode() const;
 499   virtual const Type *bottom_type() const;
 500   virtual const TypePtr *adr_type() const;
 501   virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; }
 502   virtual const RegMask &out_RegMask() const { return _rout; }
 503   virtual uint  ideal_reg() const { return _ideal_reg; }
 504   // Need size_of() for virtual ProjNode::clone()
 505   virtual uint  size_of() const { return sizeof(MachProjNode); }
 506 #ifndef PRODUCT
 507   virtual void dump_spec(outputStream *st) const;
 508 #endif
 509 };
 510 
 511 //------------------------------MachIfNode-------------------------------------
 512 // Machine-specific versions of IfNodes
 513 class MachIfNode : public MachNode {
 514   virtual uint size_of() const { return sizeof(*this); } // Size is bigger
 515 public:
 516   float _prob;                  // Probability branch goes either way
 517   float _fcnt;                  // Frequency counter
 518   MachIfNode() : MachNode() {
 519     init_class_id(Class_MachIf);
 520   }
 521 #ifndef PRODUCT
 522   virtual void dump_spec(outputStream *st) const;
 523 #endif
 524 };
 525 
 526 //------------------------------MachFastLockNode-------------------------------------
 527 // Machine-specific versions of FastLockNodes
 528 class MachFastLockNode : public MachNode {
 529   virtual uint size_of() const { return sizeof(*this); } // Size is bigger
 530 public:
 531   BiasedLockingCounters* _counters;
 532 
 533   MachFastLockNode() : MachNode() {}
 534 };
 535 
 536 //------------------------------MachReturnNode--------------------------------
 537 // Machine-specific versions of subroutine returns
 538 class MachReturnNode : public MachNode {
 539   virtual uint size_of() const; // Size is bigger
 540 public:
 541   RegMask *_in_rms;             // Input register masks, set during allocation
 542   ReallocMark _nesting;         // assertion check for reallocations
 543   const TypePtr* _adr_type;     // memory effects of call or return
 544   MachReturnNode() : MachNode() {
 545     init_class_id(Class_MachReturn);
 546     _adr_type = TypePtr::BOTTOM; // the default: all of memory
 547   }
 548 
 549   void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
 550 
 551   virtual const RegMask &in_RegMask(uint) const;
 552   virtual bool pinned() const { return true; };
 553   virtual const TypePtr *adr_type() const;
 554 };
 555 
 556 //------------------------------MachSafePointNode-----------------------------
 557 // Machine-specific versions of safepoints
 558 class MachSafePointNode : public MachReturnNode {
 559 public:
 560   OopMap*         _oop_map;     // Array of OopMap info (8-bit char) for GC
 561   JVMState*       _jvms;        // Pointer to list of JVM State Objects
 562   uint            _jvmadj;      // Extra delta to jvms indexes (mach. args)
 563   OopMap*         oop_map() const { return _oop_map; }
 564   void            set_oop_map(OopMap* om) { _oop_map = om; }
 565 
 566   MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0) {
 567     init_class_id(Class_MachSafePoint);
 568     init_flags(Flag_is_safepoint_node);
 569   }
 570 
 571   virtual JVMState* jvms() const { return _jvms; }
 572   void set_jvms(JVMState* s) {
 573     _jvms = s;
 574   }
 575   bool is_safepoint_node() const { return (flags() & Flag_is_safepoint_node) != 0; }
 576   virtual const Type    *bottom_type() const;
 577 
 578   virtual const RegMask &in_RegMask(uint) const;
 579 
 580   // Functionality from old debug nodes
 581   Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
 582   Node *frameptr () const { return in(TypeFunc::FramePtr); }
 583 
 584   Node *local(const JVMState* jvms, uint idx) const {
 585     assert(verify_jvms(jvms), "jvms must match");
 586     return in(_jvmadj + jvms->locoff() + idx);
 587   }
 588   Node *stack(const JVMState* jvms, uint idx) const {
 589     assert(verify_jvms(jvms), "jvms must match");
 590     return in(_jvmadj + jvms->stkoff() + idx);
 591  }
 592   Node *monitor_obj(const JVMState* jvms, uint idx) const {
 593     assert(verify_jvms(jvms), "jvms must match");
 594     return in(_jvmadj + jvms->monitor_obj_offset(idx));
 595   }
 596   Node *monitor_box(const JVMState* jvms, uint idx) const {
 597     assert(verify_jvms(jvms), "jvms must match");
 598     return in(_jvmadj + jvms->monitor_box_offset(idx));
 599   }
 600   void  set_local(const JVMState* jvms, uint idx, Node *c) {
 601     assert(verify_jvms(jvms), "jvms must match");
 602     set_req(_jvmadj + jvms->locoff() + idx, c);
 603   }
 604   void  set_stack(const JVMState* jvms, uint idx, Node *c) {
 605     assert(verify_jvms(jvms), "jvms must match");
 606     set_req(_jvmadj + jvms->stkoff() + idx, c);
 607   }
 608   void  set_monitor(const JVMState* jvms, uint idx, Node *c) {
 609     assert(verify_jvms(jvms), "jvms must match");
 610     set_req(_jvmadj + jvms->monoff() + idx, c);
 611   }
 612 };
 613 
 614 //------------------------------MachCallNode----------------------------------
 615 // Machine-specific versions of subroutine calls
 616 class MachCallNode : public MachSafePointNode {
 617 protected:
 618   virtual uint hash() const { return NO_HASH; }  // CFG nodes do not hash
 619   virtual uint cmp( const Node &n ) const;
 620   virtual uint size_of() const = 0; // Size is bigger
 621 public:
 622   const TypeFunc *_tf;        // Function type
 623   address      _entry_point;  // Address of the method being called
 624   float        _cnt;          // Estimate of number of times called
 625   uint         _argsize;      // Size of argument block on stack
 626 
 627   const TypeFunc* tf()        const { return _tf; }
 628   const address entry_point() const { return _entry_point; }
 629   const float   cnt()         const { return _cnt; }
 630   uint argsize()              const { return _argsize; }
 631 
 632   void set_tf(const TypeFunc* tf) { _tf = tf; }
 633   void set_entry_point(address p) { _entry_point = p; }
 634   void set_cnt(float c)           { _cnt = c; }
 635   void set_argsize(int s)         { _argsize = s; }
 636 
 637   MachCallNode() : MachSafePointNode() {
 638     init_class_id(Class_MachCall);
 639     init_flags(Flag_is_Call);
 640   }
 641 
 642   virtual const Type *bottom_type() const;
 643   virtual bool  pinned() const { return false; }
 644   virtual const Type *Value( PhaseTransform *phase ) const;
 645   virtual const RegMask &in_RegMask(uint) const;
 646   virtual int ret_addr_offset() { return 0; }
 647 
 648   bool returns_long() const { return tf()->return_type() == T_LONG; }
 649   bool return_value_is_used() const;
 650 #ifndef PRODUCT
 651   virtual void dump_spec(outputStream *st) const;
 652 #endif
 653 };
 654 
 655 //------------------------------MachCallJavaNode------------------------------
 656 // "Base" class for machine-specific versions of subroutine calls
 657 class MachCallJavaNode : public MachCallNode {
 658 protected:
 659   virtual uint cmp( const Node &n ) const;
 660   virtual uint size_of() const; // Size is bigger
 661 public:
 662   ciMethod* _method;             // Method being direct called
 663   int        _bci;               // Byte Code index of call byte code
 664   bool       _optimized_virtual; // Tells if node is a static call or an optimized virtual
 665   MachCallJavaNode() : MachCallNode() {
 666     init_class_id(Class_MachCallJava);
 667   }
 668 #ifndef PRODUCT
 669   virtual void dump_spec(outputStream *st) const;
 670 #endif
 671 };
 672 
 673 //------------------------------MachCallStaticJavaNode------------------------
 674 // Machine-specific versions of monomorphic subroutine calls
 675 class MachCallStaticJavaNode : public MachCallJavaNode {
 676   virtual uint cmp( const Node &n ) const;
 677   virtual uint size_of() const; // Size is bigger
 678 public:
 679   const char *_name;            // Runtime wrapper name
 680   MachCallStaticJavaNode() : MachCallJavaNode() {
 681     init_class_id(Class_MachCallStaticJava);
 682   }
 683 
 684   // If this is an uncommon trap, return the request code, else zero.
 685   int uncommon_trap_request() const;
 686 
 687   virtual int ret_addr_offset();
 688 #ifndef PRODUCT
 689   virtual void dump_spec(outputStream *st) const;
 690   void dump_trap_args(outputStream *st) const;
 691 #endif
 692 };
 693 
 694 //------------------------------MachCallDynamicJavaNode------------------------
 695 // Machine-specific versions of possibly megamorphic subroutine calls
 696 class MachCallDynamicJavaNode : public MachCallJavaNode {
 697 public:
 698   int _vtable_index;
 699   MachCallDynamicJavaNode() : MachCallJavaNode() {
 700     init_class_id(Class_MachCallDynamicJava);
 701     DEBUG_ONLY(_vtable_index = -99);  // throw an assert if uninitialized
 702   }
 703   virtual int ret_addr_offset();
 704 #ifndef PRODUCT
 705   virtual void dump_spec(outputStream *st) const;
 706 #endif
 707 };
 708 
 709 //------------------------------MachCallRuntimeNode----------------------------
 710 // Machine-specific versions of subroutine calls
 711 class MachCallRuntimeNode : public MachCallNode {
 712   virtual uint cmp( const Node &n ) const;
 713   virtual uint size_of() const; // Size is bigger
 714 public:
 715   const char *_name;            // Printable name, if _method is NULL
 716   MachCallRuntimeNode() : MachCallNode() {
 717     init_class_id(Class_MachCallRuntime);
 718   }
 719   virtual int ret_addr_offset();
 720 #ifndef PRODUCT
 721   virtual void dump_spec(outputStream *st) const;
 722 #endif
 723 };
 724 
 725 class MachCallLeafNode: public MachCallRuntimeNode {
 726 public:
 727   MachCallLeafNode() : MachCallRuntimeNode() {
 728     init_class_id(Class_MachCallLeaf);
 729   }
 730 };
 731 
 732 //------------------------------MachHaltNode-----------------------------------
 733 // Machine-specific versions of halt nodes
 734 class MachHaltNode : public MachReturnNode {
 735 public:
 736   virtual JVMState* jvms() const;
 737 };
 738 
 739 
 740 //------------------------------MachTempNode-----------------------------------
 741 // Node used by the adlc to construct inputs to represent temporary registers
 742 class MachTempNode : public MachNode {
 743 private:
 744   MachOper *_opnd_array[1];
 745 
 746 public:
 747   virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
 748   virtual uint rule() const { return 9999999; }
 749   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {}
 750 
 751   MachTempNode(MachOper* oper) {
 752     init_class_id(Class_MachTemp);
 753     _num_opnds = 1;
 754     _opnds = _opnd_array;
 755     add_req(NULL);
 756     _opnds[0] = oper;
 757   }
 758   virtual uint size_of() const { return sizeof(MachTempNode); }
 759 
 760 #ifndef PRODUCT
 761   virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
 762   virtual const char *Name() const { return "MachTemp";}
 763 #endif
 764 };
 765 
 766 
 767 
 768 //------------------------------labelOper--------------------------------------
 769 // Machine-independent version of label operand
 770 class labelOper : public MachOper {
 771 private:
 772   virtual uint           num_edges() const { return 0; }
 773 public:
 774   // Supported for fixed size branches
 775   Label* _label;                // Label for branch(es)
 776 
 777   uint _block_num;
 778 
 779   labelOper() : _block_num(0), _label(0) {}
 780 
 781   labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
 782 
 783   labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
 784 
 785   virtual MachOper *clone(Compile* C) const;
 786 
 787   virtual Label *label() const { return _label; }
 788 
 789   virtual uint           opcode() const;
 790 
 791   virtual uint           hash()   const;
 792   virtual uint           cmp( const MachOper &oper ) const;
 793 #ifndef PRODUCT
 794   virtual const char    *Name()   const { return "Label";}
 795 
 796   virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
 797   virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
 798 #endif
 799 };
 800 
 801 
 802 //------------------------------methodOper--------------------------------------
 803 // Machine-independent version of method operand
 804 class methodOper : public MachOper {
 805 private:
 806   virtual uint           num_edges() const { return 0; }
 807 public:
 808   intptr_t _method;             // Address of method
 809   methodOper() :   _method(0) {}
 810   methodOper(intptr_t method) : _method(method)  {}
 811 
 812   virtual MachOper *clone(Compile* C) const;
 813 
 814   virtual intptr_t method() const { return _method; }
 815 
 816   virtual uint           opcode() const;
 817 
 818   virtual uint           hash()   const;
 819   virtual uint           cmp( const MachOper &oper ) const;
 820 #ifndef PRODUCT
 821   virtual const char    *Name()   const { return "Method";}
 822 
 823   virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
 824   virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
 825 #endif
 826 };