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rev 1081 : imported patch indy-cleanup-6893081.patch
rev 1082 : [mq]: indy.compiler.patch
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--- old/src/share/vm/opto/output.cpp
+++ new/src/share/vm/opto/output.cpp
1 1 /*
2 2 * Copyright 1998-2009 Sun Microsystems, Inc. All Rights Reserved.
3 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 4 *
5 5 * This code is free software; you can redistribute it and/or modify it
6 6 * under the terms of the GNU General Public License version 2 only, as
7 7 * published by the Free Software Foundation.
8 8 *
9 9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 12 * version 2 for more details (a copy is included in the LICENSE file that
13 13 * accompanied this code).
14 14 *
15 15 * You should have received a copy of the GNU General Public License version
16 16 * 2 along with this work; if not, write to the Free Software Foundation,
17 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 18 *
19 19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20 20 * CA 95054 USA or visit www.sun.com if you need additional information or
21 21 * have any questions.
22 22 *
23 23 */
24 24
25 25 #include "incls/_precompiled.incl"
26 26 #include "incls/_output.cpp.incl"
27 27
28 28 extern uint size_java_to_interp();
29 29 extern uint reloc_java_to_interp();
30 30 extern uint size_exception_handler();
31 31 extern uint size_deopt_handler();
32 32
33 33 #ifndef PRODUCT
34 34 #define DEBUG_ARG(x) , x
35 35 #else
36 36 #define DEBUG_ARG(x)
37 37 #endif
38 38
39 39 extern int emit_exception_handler(CodeBuffer &cbuf);
40 40 extern int emit_deopt_handler(CodeBuffer &cbuf);
41 41
42 42 //------------------------------Output-----------------------------------------
43 43 // Convert Nodes to instruction bits and pass off to the VM
44 44 void Compile::Output() {
45 45 // RootNode goes
46 46 assert( _cfg->_broot->_nodes.size() == 0, "" );
47 47
48 48 // Initialize the space for the BufferBlob used to find and verify
49 49 // instruction size in MachNode::emit_size()
50 50 init_scratch_buffer_blob();
51 51 if (failing()) return; // Out of memory
52 52
53 53 // The number of new nodes (mostly MachNop) is proportional to
54 54 // the number of java calls and inner loops which are aligned.
55 55 if ( C->check_node_count((NodeLimitFudgeFactor + C->java_calls()*3 +
56 56 C->inner_loops()*(OptoLoopAlignment-1)),
57 57 "out of nodes before code generation" ) ) {
58 58 return;
59 59 }
60 60 // Make sure I can find the Start Node
61 61 Block_Array& bbs = _cfg->_bbs;
62 62 Block *entry = _cfg->_blocks[1];
63 63 Block *broot = _cfg->_broot;
64 64
65 65 const StartNode *start = entry->_nodes[0]->as_Start();
66 66
67 67 // Replace StartNode with prolog
68 68 MachPrologNode *prolog = new (this) MachPrologNode();
69 69 entry->_nodes.map( 0, prolog );
70 70 bbs.map( prolog->_idx, entry );
71 71 bbs.map( start->_idx, NULL ); // start is no longer in any block
72 72
73 73 // Virtual methods need an unverified entry point
74 74
75 75 if( is_osr_compilation() ) {
76 76 if( PoisonOSREntry ) {
77 77 // TODO: Should use a ShouldNotReachHereNode...
78 78 _cfg->insert( broot, 0, new (this) MachBreakpointNode() );
79 79 }
80 80 } else {
81 81 if( _method && !_method->flags().is_static() ) {
82 82 // Insert unvalidated entry point
83 83 _cfg->insert( broot, 0, new (this) MachUEPNode() );
84 84 }
85 85
86 86 }
87 87
88 88
89 89 // Break before main entry point
90 90 if( (_method && _method->break_at_execute())
91 91 #ifndef PRODUCT
92 92 ||(OptoBreakpoint && is_method_compilation())
93 93 ||(OptoBreakpointOSR && is_osr_compilation())
94 94 ||(OptoBreakpointC2R && !_method)
95 95 #endif
96 96 ) {
97 97 // checking for _method means that OptoBreakpoint does not apply to
98 98 // runtime stubs or frame converters
99 99 _cfg->insert( entry, 1, new (this) MachBreakpointNode() );
100 100 }
101 101
102 102 // Insert epilogs before every return
103 103 for( uint i=0; i<_cfg->_num_blocks; i++ ) {
104 104 Block *b = _cfg->_blocks[i];
105 105 if( !b->is_connector() && b->non_connector_successor(0) == _cfg->_broot ) { // Found a program exit point?
106 106 Node *m = b->end();
107 107 if( m->is_Mach() && m->as_Mach()->ideal_Opcode() != Op_Halt ) {
108 108 MachEpilogNode *epilog = new (this) MachEpilogNode(m->as_Mach()->ideal_Opcode() == Op_Return);
109 109 b->add_inst( epilog );
110 110 bbs.map(epilog->_idx, b);
111 111 //_regalloc->set_bad(epilog->_idx); // Already initialized this way.
112 112 }
113 113 }
114 114 }
115 115
116 116 # ifdef ENABLE_ZAP_DEAD_LOCALS
117 117 if ( ZapDeadCompiledLocals ) Insert_zap_nodes();
118 118 # endif
119 119
120 120 ScheduleAndBundle();
121 121
122 122 #ifndef PRODUCT
123 123 if (trace_opto_output()) {
124 124 tty->print("\n---- After ScheduleAndBundle ----\n");
125 125 for (uint i = 0; i < _cfg->_num_blocks; i++) {
126 126 tty->print("\nBB#%03d:\n", i);
127 127 Block *bb = _cfg->_blocks[i];
128 128 for (uint j = 0; j < bb->_nodes.size(); j++) {
129 129 Node *n = bb->_nodes[j];
130 130 OptoReg::Name reg = _regalloc->get_reg_first(n);
131 131 tty->print(" %-6s ", reg >= 0 && reg < REG_COUNT ? Matcher::regName[reg] : "");
132 132 n->dump();
133 133 }
134 134 }
135 135 }
136 136 #endif
137 137
138 138 if (failing()) return;
139 139
140 140 BuildOopMaps();
141 141
142 142 if (failing()) return;
143 143
144 144 Fill_buffer();
145 145 }
146 146
147 147 bool Compile::need_stack_bang(int frame_size_in_bytes) const {
148 148 // Determine if we need to generate a stack overflow check.
149 149 // Do it if the method is not a stub function and
150 150 // has java calls or has frame size > vm_page_size/8.
151 151 return (stub_function() == NULL &&
152 152 (has_java_calls() || frame_size_in_bytes > os::vm_page_size()>>3));
153 153 }
154 154
155 155 bool Compile::need_register_stack_bang() const {
156 156 // Determine if we need to generate a register stack overflow check.
157 157 // This is only used on architectures which have split register
158 158 // and memory stacks (ie. IA64).
159 159 // Bang if the method is not a stub function and has java calls
160 160 return (stub_function() == NULL && has_java_calls());
161 161 }
162 162
163 163 # ifdef ENABLE_ZAP_DEAD_LOCALS
164 164
165 165
166 166 // In order to catch compiler oop-map bugs, we have implemented
167 167 // a debugging mode called ZapDeadCompilerLocals.
168 168 // This mode causes the compiler to insert a call to a runtime routine,
169 169 // "zap_dead_locals", right before each place in compiled code
170 170 // that could potentially be a gc-point (i.e., a safepoint or oop map point).
171 171 // The runtime routine checks that locations mapped as oops are really
172 172 // oops, that locations mapped as values do not look like oops,
173 173 // and that locations mapped as dead are not used later
174 174 // (by zapping them to an invalid address).
175 175
176 176 int Compile::_CompiledZap_count = 0;
177 177
178 178 void Compile::Insert_zap_nodes() {
179 179 bool skip = false;
180 180
181 181
182 182 // Dink with static counts because code code without the extra
183 183 // runtime calls is MUCH faster for debugging purposes
184 184
185 185 if ( CompileZapFirst == 0 ) ; // nothing special
186 186 else if ( CompileZapFirst > CompiledZap_count() ) skip = true;
187 187 else if ( CompileZapFirst == CompiledZap_count() )
188 188 warning("starting zap compilation after skipping");
189 189
190 190 if ( CompileZapLast == -1 ) ; // nothing special
191 191 else if ( CompileZapLast < CompiledZap_count() ) skip = true;
192 192 else if ( CompileZapLast == CompiledZap_count() )
193 193 warning("about to compile last zap");
194 194
195 195 ++_CompiledZap_count; // counts skipped zaps, too
196 196
197 197 if ( skip ) return;
198 198
199 199
200 200 if ( _method == NULL )
201 201 return; // no safepoints/oopmaps emitted for calls in stubs,so we don't care
202 202
203 203 // Insert call to zap runtime stub before every node with an oop map
204 204 for( uint i=0; i<_cfg->_num_blocks; i++ ) {
205 205 Block *b = _cfg->_blocks[i];
206 206 for ( uint j = 0; j < b->_nodes.size(); ++j ) {
207 207 Node *n = b->_nodes[j];
208 208
209 209 // Determining if we should insert a zap-a-lot node in output.
210 210 // We do that for all nodes that has oopmap info, except for calls
211 211 // to allocation. Calls to allocation passes in the old top-of-eden pointer
212 212 // and expect the C code to reset it. Hence, there can be no safepoints between
213 213 // the inlined-allocation and the call to new_Java, etc.
214 214 // We also cannot zap monitor calls, as they must hold the microlock
215 215 // during the call to Zap, which also wants to grab the microlock.
216 216 bool insert = n->is_MachSafePoint() && (n->as_MachSafePoint()->oop_map() != NULL);
217 217 if ( insert ) { // it is MachSafePoint
218 218 if ( !n->is_MachCall() ) {
219 219 insert = false;
220 220 } else if ( n->is_MachCall() ) {
221 221 MachCallNode* call = n->as_MachCall();
222 222 if (call->entry_point() == OptoRuntime::new_instance_Java() ||
223 223 call->entry_point() == OptoRuntime::new_array_Java() ||
224 224 call->entry_point() == OptoRuntime::multianewarray2_Java() ||
225 225 call->entry_point() == OptoRuntime::multianewarray3_Java() ||
226 226 call->entry_point() == OptoRuntime::multianewarray4_Java() ||
227 227 call->entry_point() == OptoRuntime::multianewarray5_Java() ||
228 228 call->entry_point() == OptoRuntime::slow_arraycopy_Java() ||
229 229 call->entry_point() == OptoRuntime::complete_monitor_locking_Java()
230 230 ) {
231 231 insert = false;
232 232 }
233 233 }
234 234 if (insert) {
235 235 Node *zap = call_zap_node(n->as_MachSafePoint(), i);
236 236 b->_nodes.insert( j, zap );
237 237 _cfg->_bbs.map( zap->_idx, b );
238 238 ++j;
239 239 }
240 240 }
241 241 }
242 242 }
243 243 }
244 244
245 245
246 246 Node* Compile::call_zap_node(MachSafePointNode* node_to_check, int block_no) {
247 247 const TypeFunc *tf = OptoRuntime::zap_dead_locals_Type();
248 248 CallStaticJavaNode* ideal_node =
249 249 new (this, tf->domain()->cnt()) CallStaticJavaNode( tf,
250 250 OptoRuntime::zap_dead_locals_stub(_method->flags().is_native()),
251 251 "call zap dead locals stub", 0, TypePtr::BOTTOM);
252 252 // We need to copy the OopMap from the site we're zapping at.
253 253 // We have to make a copy, because the zap site might not be
254 254 // a call site, and zap_dead is a call site.
255 255 OopMap* clone = node_to_check->oop_map()->deep_copy();
256 256
257 257 // Add the cloned OopMap to the zap node
258 258 ideal_node->set_oop_map(clone);
259 259 return _matcher->match_sfpt(ideal_node);
260 260 }
261 261
262 262 //------------------------------is_node_getting_a_safepoint--------------------
263 263 bool Compile::is_node_getting_a_safepoint( Node* n) {
264 264 // This code duplicates the logic prior to the call of add_safepoint
265 265 // below in this file.
266 266 if( n->is_MachSafePoint() ) return true;
267 267 return false;
268 268 }
269 269
270 270 # endif // ENABLE_ZAP_DEAD_LOCALS
271 271
272 272 //------------------------------compute_loop_first_inst_sizes------------------
273 273 // Compute the size of first NumberOfLoopInstrToAlign instructions at the top
274 274 // of a loop. When aligning a loop we need to provide enough instructions
275 275 // in cpu's fetch buffer to feed decoders. The loop alignment could be
276 276 // avoided if we have enough instructions in fetch buffer at the head of a loop.
277 277 // By default, the size is set to 999999 by Block's constructor so that
278 278 // a loop will be aligned if the size is not reset here.
279 279 //
280 280 // Note: Mach instructions could contain several HW instructions
281 281 // so the size is estimated only.
282 282 //
283 283 void Compile::compute_loop_first_inst_sizes() {
284 284 // The next condition is used to gate the loop alignment optimization.
285 285 // Don't aligned a loop if there are enough instructions at the head of a loop
286 286 // or alignment padding is larger then MaxLoopPad. By default, MaxLoopPad
287 287 // is equal to OptoLoopAlignment-1 except on new Intel cpus, where it is
288 288 // equal to 11 bytes which is the largest address NOP instruction.
289 289 if( MaxLoopPad < OptoLoopAlignment-1 ) {
290 290 uint last_block = _cfg->_num_blocks-1;
291 291 for( uint i=1; i <= last_block; i++ ) {
292 292 Block *b = _cfg->_blocks[i];
293 293 // Check the first loop's block which requires an alignment.
294 294 if( b->loop_alignment() > (uint)relocInfo::addr_unit() ) {
295 295 uint sum_size = 0;
296 296 uint inst_cnt = NumberOfLoopInstrToAlign;
297 297 inst_cnt = b->compute_first_inst_size(sum_size, inst_cnt, _regalloc);
298 298
299 299 // Check subsequent fallthrough blocks if the loop's first
300 300 // block(s) does not have enough instructions.
301 301 Block *nb = b;
302 302 while( inst_cnt > 0 &&
303 303 i < last_block &&
304 304 !_cfg->_blocks[i+1]->has_loop_alignment() &&
305 305 !nb->has_successor(b) ) {
306 306 i++;
307 307 nb = _cfg->_blocks[i];
308 308 inst_cnt = nb->compute_first_inst_size(sum_size, inst_cnt, _regalloc);
309 309 } // while( inst_cnt > 0 && i < last_block )
310 310
311 311 b->set_first_inst_size(sum_size);
312 312 } // f( b->head()->is_Loop() )
313 313 } // for( i <= last_block )
314 314 } // if( MaxLoopPad < OptoLoopAlignment-1 )
315 315 }
316 316
317 317 //----------------------Shorten_branches---------------------------------------
318 318 // The architecture description provides short branch variants for some long
319 319 // branch instructions. Replace eligible long branches with short branches.
320 320 void Compile::Shorten_branches(Label *labels, int& code_size, int& reloc_size, int& stub_size, int& const_size) {
321 321
322 322 // fill in the nop array for bundling computations
323 323 MachNode *_nop_list[Bundle::_nop_count];
324 324 Bundle::initialize_nops(_nop_list, this);
325 325
326 326 // ------------------
327 327 // Compute size of each block, method size, and relocation information size
328 328 uint *jmp_end = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks);
329 329 uint *blk_starts = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks+1);
330 330 DEBUG_ONLY( uint *jmp_target = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks); )
331 331 DEBUG_ONLY( uint *jmp_rule = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks); )
332 332 blk_starts[0] = 0;
333 333
334 334 // Initialize the sizes to 0
335 335 code_size = 0; // Size in bytes of generated code
336 336 stub_size = 0; // Size in bytes of all stub entries
337 337 // Size in bytes of all relocation entries, including those in local stubs.
338 338 // Start with 2-bytes of reloc info for the unvalidated entry point
339 339 reloc_size = 1; // Number of relocation entries
340 340 const_size = 0; // size of fp constants in words
341 341
342 342 // Make three passes. The first computes pessimistic blk_starts,
343 343 // relative jmp_end, reloc_size and const_size information.
344 344 // The second performs short branch substitution using the pessimistic
345 345 // sizing. The third inserts nops where needed.
346 346
347 347 Node *nj; // tmp
348 348
349 349 // Step one, perform a pessimistic sizing pass.
350 350 uint i;
351 351 uint min_offset_from_last_call = 1; // init to a positive value
352 352 uint nop_size = (new (this) MachNopNode())->size(_regalloc);
353 353 for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks
354 354 Block *b = _cfg->_blocks[i];
355 355
356 356 // Sum all instruction sizes to compute block size
357 357 uint last_inst = b->_nodes.size();
358 358 uint blk_size = 0;
359 359 for( uint j = 0; j<last_inst; j++ ) {
360 360 nj = b->_nodes[j];
361 361 uint inst_size = nj->size(_regalloc);
362 362 blk_size += inst_size;
363 363 // Handle machine instruction nodes
364 364 if( nj->is_Mach() ) {
365 365 MachNode *mach = nj->as_Mach();
366 366 blk_size += (mach->alignment_required() - 1) * relocInfo::addr_unit(); // assume worst case padding
367 367 reloc_size += mach->reloc();
368 368 const_size += mach->const_size();
369 369 if( mach->is_MachCall() ) {
370 370 MachCallNode *mcall = mach->as_MachCall();
371 371 // This destination address is NOT PC-relative
372 372
373 373 mcall->method_set((intptr_t)mcall->entry_point());
374 374
375 375 if( mcall->is_MachCallJava() && mcall->as_MachCallJava()->_method ) {
376 376 stub_size += size_java_to_interp();
377 377 reloc_size += reloc_java_to_interp();
378 378 }
379 379 } else if (mach->is_MachSafePoint()) {
380 380 // If call/safepoint are adjacent, account for possible
381 381 // nop to disambiguate the two safepoints.
382 382 if (min_offset_from_last_call == 0) {
383 383 blk_size += nop_size;
384 384 }
385 385 }
386 386 }
387 387 min_offset_from_last_call += inst_size;
388 388 // Remember end of call offset
389 389 if (nj->is_MachCall() && nj->as_MachCall()->is_safepoint_node()) {
390 390 min_offset_from_last_call = 0;
391 391 }
392 392 }
393 393
394 394 // During short branch replacement, we store the relative (to blk_starts)
395 395 // end of jump in jmp_end, rather than the absolute end of jump. This
396 396 // is so that we do not need to recompute sizes of all nodes when we compute
397 397 // correct blk_starts in our next sizing pass.
398 398 jmp_end[i] = blk_size;
399 399 DEBUG_ONLY( jmp_target[i] = 0; )
400 400
401 401 // When the next block starts a loop, we may insert pad NOP
402 402 // instructions. Since we cannot know our future alignment,
403 403 // assume the worst.
404 404 if( i<_cfg->_num_blocks-1 ) {
405 405 Block *nb = _cfg->_blocks[i+1];
406 406 int max_loop_pad = nb->code_alignment()-relocInfo::addr_unit();
407 407 if( max_loop_pad > 0 ) {
408 408 assert(is_power_of_2(max_loop_pad+relocInfo::addr_unit()), "");
409 409 blk_size += max_loop_pad;
410 410 }
411 411 }
412 412
413 413 // Save block size; update total method size
414 414 blk_starts[i+1] = blk_starts[i]+blk_size;
415 415 }
416 416
417 417 // Step two, replace eligible long jumps.
418 418
419 419 // Note: this will only get the long branches within short branch
420 420 // range. Another pass might detect more branches that became
421 421 // candidates because the shortening in the first pass exposed
422 422 // more opportunities. Unfortunately, this would require
423 423 // recomputing the starting and ending positions for the blocks
424 424 for( i=0; i<_cfg->_num_blocks; i++ ) {
425 425 Block *b = _cfg->_blocks[i];
426 426
427 427 int j;
428 428 // Find the branch; ignore trailing NOPs.
429 429 for( j = b->_nodes.size()-1; j>=0; j-- ) {
430 430 nj = b->_nodes[j];
431 431 if( !nj->is_Mach() || nj->as_Mach()->ideal_Opcode() != Op_Con )
432 432 break;
433 433 }
434 434
435 435 if (j >= 0) {
436 436 if( nj->is_Mach() && nj->as_Mach()->may_be_short_branch() ) {
437 437 MachNode *mach = nj->as_Mach();
438 438 // This requires the TRUE branch target be in succs[0]
439 439 uint bnum = b->non_connector_successor(0)->_pre_order;
440 440 uintptr_t target = blk_starts[bnum];
441 441 if( mach->is_pc_relative() ) {
442 442 int offset = target-(blk_starts[i] + jmp_end[i]);
443 443 if (_matcher->is_short_branch_offset(mach->rule(), offset)) {
444 444 // We've got a winner. Replace this branch.
445 445 MachNode* replacement = mach->short_branch_version(this);
446 446 b->_nodes.map(j, replacement);
447 447 mach->subsume_by(replacement);
448 448
449 449 // Update the jmp_end size to save time in our
450 450 // next pass.
451 451 jmp_end[i] -= (mach->size(_regalloc) - replacement->size(_regalloc));
452 452 DEBUG_ONLY( jmp_target[i] = bnum; );
453 453 DEBUG_ONLY( jmp_rule[i] = mach->rule(); );
454 454 }
455 455 } else {
456 456 #ifndef PRODUCT
457 457 mach->dump(3);
458 458 #endif
459 459 Unimplemented();
460 460 }
461 461 }
462 462 }
463 463 }
464 464
465 465 // Compute the size of first NumberOfLoopInstrToAlign instructions at head
466 466 // of a loop. It is used to determine the padding for loop alignment.
467 467 compute_loop_first_inst_sizes();
468 468
469 469 // Step 3, compute the offsets of all the labels
470 470 uint last_call_adr = max_uint;
471 471 for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks
472 472 // copy the offset of the beginning to the corresponding label
473 473 assert(labels[i].is_unused(), "cannot patch at this point");
474 474 labels[i].bind_loc(blk_starts[i], CodeBuffer::SECT_INSTS);
475 475
476 476 // insert padding for any instructions that need it
477 477 Block *b = _cfg->_blocks[i];
478 478 uint last_inst = b->_nodes.size();
479 479 uint adr = blk_starts[i];
480 480 for( uint j = 0; j<last_inst; j++ ) {
481 481 nj = b->_nodes[j];
482 482 if( nj->is_Mach() ) {
483 483 int padding = nj->as_Mach()->compute_padding(adr);
484 484 // If call/safepoint are adjacent insert a nop (5010568)
485 485 if (padding == 0 && nj->is_MachSafePoint() && !nj->is_MachCall() &&
486 486 adr == last_call_adr ) {
487 487 padding = nop_size;
488 488 }
489 489 if(padding > 0) {
490 490 assert((padding % nop_size) == 0, "padding is not a multiple of NOP size");
491 491 int nops_cnt = padding / nop_size;
492 492 MachNode *nop = new (this) MachNopNode(nops_cnt);
493 493 b->_nodes.insert(j++, nop);
494 494 _cfg->_bbs.map( nop->_idx, b );
495 495 adr += padding;
496 496 last_inst++;
497 497 }
498 498 }
499 499 adr += nj->size(_regalloc);
500 500
501 501 // Remember end of call offset
502 502 if (nj->is_MachCall() && nj->as_MachCall()->is_safepoint_node()) {
503 503 last_call_adr = adr;
504 504 }
505 505 }
506 506
507 507 if ( i != _cfg->_num_blocks-1) {
508 508 // Get the size of the block
509 509 uint blk_size = adr - blk_starts[i];
510 510
511 511 // When the next block is the top of a loop, we may insert pad NOP
512 512 // instructions.
513 513 Block *nb = _cfg->_blocks[i+1];
514 514 int current_offset = blk_starts[i] + blk_size;
515 515 current_offset += nb->alignment_padding(current_offset);
516 516 // Save block size; update total method size
517 517 blk_starts[i+1] = current_offset;
518 518 }
519 519 }
520 520
521 521 #ifdef ASSERT
522 522 for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks
523 523 if( jmp_target[i] != 0 ) {
524 524 int offset = blk_starts[jmp_target[i]]-(blk_starts[i] + jmp_end[i]);
525 525 if (!_matcher->is_short_branch_offset(jmp_rule[i], offset)) {
526 526 tty->print_cr("target (%d) - jmp_end(%d) = offset (%d), jmp_block B%d, target_block B%d", blk_starts[jmp_target[i]], blk_starts[i] + jmp_end[i], offset, i, jmp_target[i]);
527 527 }
528 528 assert(_matcher->is_short_branch_offset(jmp_rule[i], offset), "Displacement too large for short jmp");
529 529 }
530 530 }
531 531 #endif
532 532
533 533 // ------------------
534 534 // Compute size for code buffer
535 535 code_size = blk_starts[i-1] + jmp_end[i-1];
536 536
537 537 // Relocation records
538 538 reloc_size += 1; // Relo entry for exception handler
539 539
540 540 // Adjust reloc_size to number of record of relocation info
541 541 // Min is 2 bytes, max is probably 6 or 8, with a tax up to 25% for
542 542 // a relocation index.
543 543 // The CodeBuffer will expand the locs array if this estimate is too low.
544 544 reloc_size *= 10 / sizeof(relocInfo);
545 545
546 546 // Adjust const_size to number of bytes
547 547 const_size *= 2*jintSize; // both float and double take two words per entry
548 548
549 549 }
550 550
551 551 //------------------------------FillLocArray-----------------------------------
552 552 // Create a bit of debug info and append it to the array. The mapping is from
553 553 // Java local or expression stack to constant, register or stack-slot. For
554 554 // doubles, insert 2 mappings and return 1 (to tell the caller that the next
555 555 // entry has been taken care of and caller should skip it).
556 556 static LocationValue *new_loc_value( PhaseRegAlloc *ra, OptoReg::Name regnum, Location::Type l_type ) {
557 557 // This should never have accepted Bad before
558 558 assert(OptoReg::is_valid(regnum), "location must be valid");
559 559 return (OptoReg::is_reg(regnum))
560 560 ? new LocationValue(Location::new_reg_loc(l_type, OptoReg::as_VMReg(regnum)) )
561 561 : new LocationValue(Location::new_stk_loc(l_type, ra->reg2offset(regnum)));
562 562 }
563 563
564 564
565 565 ObjectValue*
566 566 Compile::sv_for_node_id(GrowableArray<ScopeValue*> *objs, int id) {
567 567 for (int i = 0; i < objs->length(); i++) {
568 568 assert(objs->at(i)->is_object(), "corrupt object cache");
569 569 ObjectValue* sv = (ObjectValue*) objs->at(i);
570 570 if (sv->id() == id) {
571 571 return sv;
572 572 }
573 573 }
574 574 // Otherwise..
575 575 return NULL;
576 576 }
577 577
578 578 void Compile::set_sv_for_object_node(GrowableArray<ScopeValue*> *objs,
579 579 ObjectValue* sv ) {
580 580 assert(sv_for_node_id(objs, sv->id()) == NULL, "Precondition");
581 581 objs->append(sv);
582 582 }
583 583
584 584
585 585 void Compile::FillLocArray( int idx, MachSafePointNode* sfpt, Node *local,
586 586 GrowableArray<ScopeValue*> *array,
587 587 GrowableArray<ScopeValue*> *objs ) {
588 588 assert( local, "use _top instead of null" );
589 589 if (array->length() != idx) {
590 590 assert(array->length() == idx + 1, "Unexpected array count");
591 591 // Old functionality:
592 592 // return
593 593 // New functionality:
594 594 // Assert if the local is not top. In product mode let the new node
595 595 // override the old entry.
596 596 assert(local == top(), "LocArray collision");
597 597 if (local == top()) {
598 598 return;
599 599 }
600 600 array->pop();
601 601 }
602 602 const Type *t = local->bottom_type();
603 603
604 604 // Is it a safepoint scalar object node?
605 605 if (local->is_SafePointScalarObject()) {
606 606 SafePointScalarObjectNode* spobj = local->as_SafePointScalarObject();
607 607
608 608 ObjectValue* sv = Compile::sv_for_node_id(objs, spobj->_idx);
609 609 if (sv == NULL) {
610 610 ciKlass* cik = t->is_oopptr()->klass();
611 611 assert(cik->is_instance_klass() ||
612 612 cik->is_array_klass(), "Not supported allocation.");
613 613 sv = new ObjectValue(spobj->_idx,
614 614 new ConstantOopWriteValue(cik->constant_encoding()));
615 615 Compile::set_sv_for_object_node(objs, sv);
616 616
617 617 uint first_ind = spobj->first_index();
618 618 for (uint i = 0; i < spobj->n_fields(); i++) {
619 619 Node* fld_node = sfpt->in(first_ind+i);
620 620 (void)FillLocArray(sv->field_values()->length(), sfpt, fld_node, sv->field_values(), objs);
621 621 }
622 622 }
623 623 array->append(sv);
624 624 return;
625 625 }
626 626
627 627 // Grab the register number for the local
628 628 OptoReg::Name regnum = _regalloc->get_reg_first(local);
629 629 if( OptoReg::is_valid(regnum) ) {// Got a register/stack?
630 630 // Record the double as two float registers.
631 631 // The register mask for such a value always specifies two adjacent
632 632 // float registers, with the lower register number even.
633 633 // Normally, the allocation of high and low words to these registers
634 634 // is irrelevant, because nearly all operations on register pairs
635 635 // (e.g., StoreD) treat them as a single unit.
636 636 // Here, we assume in addition that the words in these two registers
637 637 // stored "naturally" (by operations like StoreD and double stores
638 638 // within the interpreter) such that the lower-numbered register
639 639 // is written to the lower memory address. This may seem like
640 640 // a machine dependency, but it is not--it is a requirement on
641 641 // the author of the <arch>.ad file to ensure that, for every
642 642 // even/odd double-register pair to which a double may be allocated,
643 643 // the word in the even single-register is stored to the first
644 644 // memory word. (Note that register numbers are completely
645 645 // arbitrary, and are not tied to any machine-level encodings.)
646 646 #ifdef _LP64
647 647 if( t->base() == Type::DoubleBot || t->base() == Type::DoubleCon ) {
648 648 array->append(new ConstantIntValue(0));
649 649 array->append(new_loc_value( _regalloc, regnum, Location::dbl ));
650 650 } else if ( t->base() == Type::Long ) {
651 651 array->append(new ConstantIntValue(0));
652 652 array->append(new_loc_value( _regalloc, regnum, Location::lng ));
653 653 } else if ( t->base() == Type::RawPtr ) {
654 654 // jsr/ret return address which must be restored into a the full
655 655 // width 64-bit stack slot.
656 656 array->append(new_loc_value( _regalloc, regnum, Location::lng ));
657 657 }
658 658 #else //_LP64
659 659 #ifdef SPARC
660 660 if (t->base() == Type::Long && OptoReg::is_reg(regnum)) {
661 661 // For SPARC we have to swap high and low words for
662 662 // long values stored in a single-register (g0-g7).
663 663 array->append(new_loc_value( _regalloc, regnum , Location::normal ));
664 664 array->append(new_loc_value( _regalloc, OptoReg::add(regnum,1), Location::normal ));
665 665 } else
666 666 #endif //SPARC
667 667 if( t->base() == Type::DoubleBot || t->base() == Type::DoubleCon || t->base() == Type::Long ) {
668 668 // Repack the double/long as two jints.
669 669 // The convention the interpreter uses is that the second local
670 670 // holds the first raw word of the native double representation.
671 671 // This is actually reasonable, since locals and stack arrays
672 672 // grow downwards in all implementations.
673 673 // (If, on some machine, the interpreter's Java locals or stack
674 674 // were to grow upwards, the embedded doubles would be word-swapped.)
675 675 array->append(new_loc_value( _regalloc, OptoReg::add(regnum,1), Location::normal ));
676 676 array->append(new_loc_value( _regalloc, regnum , Location::normal ));
677 677 }
678 678 #endif //_LP64
679 679 else if( (t->base() == Type::FloatBot || t->base() == Type::FloatCon) &&
680 680 OptoReg::is_reg(regnum) ) {
681 681 array->append(new_loc_value( _regalloc, regnum, Matcher::float_in_double
682 682 ? Location::float_in_dbl : Location::normal ));
683 683 } else if( t->base() == Type::Int && OptoReg::is_reg(regnum) ) {
684 684 array->append(new_loc_value( _regalloc, regnum, Matcher::int_in_long
685 685 ? Location::int_in_long : Location::normal ));
686 686 } else if( t->base() == Type::NarrowOop ) {
687 687 array->append(new_loc_value( _regalloc, regnum, Location::narrowoop ));
688 688 } else {
689 689 array->append(new_loc_value( _regalloc, regnum, _regalloc->is_oop(local) ? Location::oop : Location::normal ));
690 690 }
691 691 return;
692 692 }
693 693
694 694 // No register. It must be constant data.
695 695 switch (t->base()) {
696 696 case Type::Half: // Second half of a double
697 697 ShouldNotReachHere(); // Caller should skip 2nd halves
698 698 break;
699 699 case Type::AnyPtr:
700 700 array->append(new ConstantOopWriteValue(NULL));
701 701 break;
702 702 case Type::AryPtr:
703 703 case Type::InstPtr:
704 704 case Type::KlassPtr: // fall through
705 705 array->append(new ConstantOopWriteValue(t->isa_oopptr()->const_oop()->constant_encoding()));
706 706 break;
707 707 case Type::NarrowOop:
708 708 if (t == TypeNarrowOop::NULL_PTR) {
709 709 array->append(new ConstantOopWriteValue(NULL));
710 710 } else {
711 711 array->append(new ConstantOopWriteValue(t->make_ptr()->isa_oopptr()->const_oop()->constant_encoding()));
712 712 }
713 713 break;
714 714 case Type::Int:
715 715 array->append(new ConstantIntValue(t->is_int()->get_con()));
716 716 break;
717 717 case Type::RawPtr:
718 718 // A return address (T_ADDRESS).
719 719 assert((intptr_t)t->is_ptr()->get_con() < (intptr_t)0x10000, "must be a valid BCI");
720 720 #ifdef _LP64
721 721 // Must be restored to the full-width 64-bit stack slot.
722 722 array->append(new ConstantLongValue(t->is_ptr()->get_con()));
723 723 #else
724 724 array->append(new ConstantIntValue(t->is_ptr()->get_con()));
725 725 #endif
726 726 break;
727 727 case Type::FloatCon: {
728 728 float f = t->is_float_constant()->getf();
729 729 array->append(new ConstantIntValue(jint_cast(f)));
730 730 break;
731 731 }
732 732 case Type::DoubleCon: {
733 733 jdouble d = t->is_double_constant()->getd();
734 734 #ifdef _LP64
735 735 array->append(new ConstantIntValue(0));
736 736 array->append(new ConstantDoubleValue(d));
737 737 #else
738 738 // Repack the double as two jints.
739 739 // The convention the interpreter uses is that the second local
740 740 // holds the first raw word of the native double representation.
741 741 // This is actually reasonable, since locals and stack arrays
742 742 // grow downwards in all implementations.
743 743 // (If, on some machine, the interpreter's Java locals or stack
744 744 // were to grow upwards, the embedded doubles would be word-swapped.)
745 745 jint *dp = (jint*)&d;
746 746 array->append(new ConstantIntValue(dp[1]));
747 747 array->append(new ConstantIntValue(dp[0]));
748 748 #endif
749 749 break;
750 750 }
751 751 case Type::Long: {
752 752 jlong d = t->is_long()->get_con();
753 753 #ifdef _LP64
754 754 array->append(new ConstantIntValue(0));
755 755 array->append(new ConstantLongValue(d));
756 756 #else
757 757 // Repack the long as two jints.
758 758 // The convention the interpreter uses is that the second local
759 759 // holds the first raw word of the native double representation.
760 760 // This is actually reasonable, since locals and stack arrays
761 761 // grow downwards in all implementations.
762 762 // (If, on some machine, the interpreter's Java locals or stack
763 763 // were to grow upwards, the embedded doubles would be word-swapped.)
764 764 jint *dp = (jint*)&d;
765 765 array->append(new ConstantIntValue(dp[1]));
766 766 array->append(new ConstantIntValue(dp[0]));
767 767 #endif
768 768 break;
769 769 }
770 770 case Type::Top: // Add an illegal value here
771 771 array->append(new LocationValue(Location()));
772 772 break;
773 773 default:
774 774 ShouldNotReachHere();
775 775 break;
776 776 }
777 777 }
778 778
779 779 // Determine if this node starts a bundle
780 780 bool Compile::starts_bundle(const Node *n) const {
781 781 return (_node_bundling_limit > n->_idx &&
782 782 _node_bundling_base[n->_idx].starts_bundle());
783 783 }
784 784
785 785 //--------------------------Process_OopMap_Node--------------------------------
786 786 void Compile::Process_OopMap_Node(MachNode *mach, int current_offset) {
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787 787
788 788 // Handle special safepoint nodes for synchronization
789 789 MachSafePointNode *sfn = mach->as_MachSafePoint();
790 790 MachCallNode *mcall;
791 791
792 792 #ifdef ENABLE_ZAP_DEAD_LOCALS
793 793 assert( is_node_getting_a_safepoint(mach), "logic does not match; false negative");
794 794 #endif
795 795
796 796 int safepoint_pc_offset = current_offset;
797 + bool is_method_handle_invoke = false;
797 798
798 799 // Add the safepoint in the DebugInfoRecorder
799 800 if( !mach->is_MachCall() ) {
800 801 mcall = NULL;
801 802 debug_info()->add_safepoint(safepoint_pc_offset, sfn->_oop_map);
802 803 } else {
803 804 mcall = mach->as_MachCall();
805 +
806 + // Is the call a MethodHandle call?
807 + if (mcall->is_MachCallJava())
808 + is_method_handle_invoke = mcall->as_MachCallJava()->_method_handle_invoke;
809 +
804 810 safepoint_pc_offset += mcall->ret_addr_offset();
805 811 debug_info()->add_safepoint(safepoint_pc_offset, mcall->_oop_map);
806 812 }
807 813
808 814 // Loop over the JVMState list to add scope information
809 815 // Do not skip safepoints with a NULL method, they need monitor info
810 816 JVMState* youngest_jvms = sfn->jvms();
811 817 int max_depth = youngest_jvms->depth();
812 818
813 819 // Allocate the object pool for scalar-replaced objects -- the map from
814 820 // small-integer keys (which can be recorded in the local and ostack
815 821 // arrays) to descriptions of the object state.
816 822 GrowableArray<ScopeValue*> *objs = new GrowableArray<ScopeValue*>();
817 823
818 824 // Visit scopes from oldest to youngest.
819 825 for (int depth = 1; depth <= max_depth; depth++) {
820 826 JVMState* jvms = youngest_jvms->of_depth(depth);
821 827 int idx;
822 828 ciMethod* method = jvms->has_method() ? jvms->method() : NULL;
823 829 // Safepoints that do not have method() set only provide oop-map and monitor info
824 830 // to support GC; these do not support deoptimization.
825 831 int num_locs = (method == NULL) ? 0 : jvms->loc_size();
826 832 int num_exps = (method == NULL) ? 0 : jvms->stk_size();
827 833 int num_mon = jvms->nof_monitors();
828 834 assert(method == NULL || jvms->bci() < 0 || num_locs == method->max_locals(),
829 835 "JVMS local count must match that of the method");
830 836
831 837 // Add Local and Expression Stack Information
832 838
833 839 // Insert locals into the locarray
834 840 GrowableArray<ScopeValue*> *locarray = new GrowableArray<ScopeValue*>(num_locs);
835 841 for( idx = 0; idx < num_locs; idx++ ) {
836 842 FillLocArray( idx, sfn, sfn->local(jvms, idx), locarray, objs );
837 843 }
838 844
839 845 // Insert expression stack entries into the exparray
840 846 GrowableArray<ScopeValue*> *exparray = new GrowableArray<ScopeValue*>(num_exps);
841 847 for( idx = 0; idx < num_exps; idx++ ) {
842 848 FillLocArray( idx, sfn, sfn->stack(jvms, idx), exparray, objs );
843 849 }
844 850
845 851 // Add in mappings of the monitors
846 852 assert( !method ||
847 853 !method->is_synchronized() ||
848 854 method->is_native() ||
849 855 num_mon > 0 ||
850 856 !GenerateSynchronizationCode,
851 857 "monitors must always exist for synchronized methods");
852 858
853 859 // Build the growable array of ScopeValues for exp stack
854 860 GrowableArray<MonitorValue*> *monarray = new GrowableArray<MonitorValue*>(num_mon);
855 861
856 862 // Loop over monitors and insert into array
857 863 for(idx = 0; idx < num_mon; idx++) {
858 864 // Grab the node that defines this monitor
859 865 Node* box_node = sfn->monitor_box(jvms, idx);
860 866 Node* obj_node = sfn->monitor_obj(jvms, idx);
861 867
862 868 // Create ScopeValue for object
863 869 ScopeValue *scval = NULL;
864 870
865 871 if( obj_node->is_SafePointScalarObject() ) {
866 872 SafePointScalarObjectNode* spobj = obj_node->as_SafePointScalarObject();
867 873 scval = Compile::sv_for_node_id(objs, spobj->_idx);
868 874 if (scval == NULL) {
869 875 const Type *t = obj_node->bottom_type();
870 876 ciKlass* cik = t->is_oopptr()->klass();
871 877 assert(cik->is_instance_klass() ||
872 878 cik->is_array_klass(), "Not supported allocation.");
873 879 ObjectValue* sv = new ObjectValue(spobj->_idx,
874 880 new ConstantOopWriteValue(cik->constant_encoding()));
875 881 Compile::set_sv_for_object_node(objs, sv);
876 882
877 883 uint first_ind = spobj->first_index();
878 884 for (uint i = 0; i < spobj->n_fields(); i++) {
879 885 Node* fld_node = sfn->in(first_ind+i);
880 886 (void)FillLocArray(sv->field_values()->length(), sfn, fld_node, sv->field_values(), objs);
881 887 }
882 888 scval = sv;
883 889 }
884 890 } else if( !obj_node->is_Con() ) {
885 891 OptoReg::Name obj_reg = _regalloc->get_reg_first(obj_node);
886 892 if( obj_node->bottom_type()->base() == Type::NarrowOop ) {
887 893 scval = new_loc_value( _regalloc, obj_reg, Location::narrowoop );
888 894 } else {
889 895 scval = new_loc_value( _regalloc, obj_reg, Location::oop );
890 896 }
891 897 } else {
892 898 const TypePtr *tp = obj_node->bottom_type()->make_ptr();
893 899 scval = new ConstantOopWriteValue(tp->is_instptr()->const_oop()->constant_encoding());
894 900 }
895 901
896 902 OptoReg::Name box_reg = BoxLockNode::stack_slot(box_node);
897 903 Location basic_lock = Location::new_stk_loc(Location::normal,_regalloc->reg2offset(box_reg));
898 904 while( !box_node->is_BoxLock() ) box_node = box_node->in(1);
899 905 monarray->append(new MonitorValue(scval, basic_lock, box_node->as_BoxLock()->is_eliminated()));
900 906 }
901 907
902 908 // We dump the object pool first, since deoptimization reads it in first.
903 909 debug_info()->dump_object_pool(objs);
904 910
905 911 // Build first class objects to pass to scope
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906 912 DebugToken *locvals = debug_info()->create_scope_values(locarray);
907 913 DebugToken *expvals = debug_info()->create_scope_values(exparray);
908 914 DebugToken *monvals = debug_info()->create_monitor_values(monarray);
909 915
910 916 // Make method available for all Safepoints
911 917 ciMethod* scope_method = method ? method : _method;
912 918 // Describe the scope here
913 919 assert(jvms->bci() >= InvocationEntryBci && jvms->bci() <= 0x10000, "must be a valid or entry BCI");
914 920 assert(!jvms->should_reexecute() || depth == max_depth, "reexecute allowed only for the youngest");
915 921 // Now we can describe the scope.
916 - bool is_method_handle_invoke = false;
917 922 debug_info()->describe_scope(safepoint_pc_offset, scope_method, jvms->bci(), jvms->should_reexecute(), is_method_handle_invoke, locvals, expvals, monvals);
918 923 } // End jvms loop
919 924
920 925 // Mark the end of the scope set.
921 926 debug_info()->end_safepoint(safepoint_pc_offset);
922 927 }
923 928
924 929
925 930
926 931 // A simplified version of Process_OopMap_Node, to handle non-safepoints.
927 932 class NonSafepointEmitter {
928 933 Compile* C;
929 934 JVMState* _pending_jvms;
930 935 int _pending_offset;
931 936
932 937 void emit_non_safepoint();
933 938
934 939 public:
935 940 NonSafepointEmitter(Compile* compile) {
936 941 this->C = compile;
937 942 _pending_jvms = NULL;
938 943 _pending_offset = 0;
939 944 }
940 945
941 946 void observe_instruction(Node* n, int pc_offset) {
942 947 if (!C->debug_info()->recording_non_safepoints()) return;
943 948
944 949 Node_Notes* nn = C->node_notes_at(n->_idx);
945 950 if (nn == NULL || nn->jvms() == NULL) return;
946 951 if (_pending_jvms != NULL &&
947 952 _pending_jvms->same_calls_as(nn->jvms())) {
948 953 // Repeated JVMS? Stretch it up here.
949 954 _pending_offset = pc_offset;
950 955 } else {
951 956 if (_pending_jvms != NULL &&
952 957 _pending_offset < pc_offset) {
953 958 emit_non_safepoint();
954 959 }
955 960 _pending_jvms = NULL;
956 961 if (pc_offset > C->debug_info()->last_pc_offset()) {
957 962 // This is the only way _pending_jvms can become non-NULL:
958 963 _pending_jvms = nn->jvms();
959 964 _pending_offset = pc_offset;
960 965 }
961 966 }
962 967 }
963 968
964 969 // Stay out of the way of real safepoints:
965 970 void observe_safepoint(JVMState* jvms, int pc_offset) {
966 971 if (_pending_jvms != NULL &&
967 972 !_pending_jvms->same_calls_as(jvms) &&
968 973 _pending_offset < pc_offset) {
969 974 emit_non_safepoint();
970 975 }
971 976 _pending_jvms = NULL;
972 977 }
973 978
974 979 void flush_at_end() {
975 980 if (_pending_jvms != NULL) {
976 981 emit_non_safepoint();
977 982 }
978 983 _pending_jvms = NULL;
979 984 }
980 985 };
981 986
982 987 void NonSafepointEmitter::emit_non_safepoint() {
983 988 JVMState* youngest_jvms = _pending_jvms;
984 989 int pc_offset = _pending_offset;
985 990
986 991 // Clear it now:
987 992 _pending_jvms = NULL;
988 993
989 994 DebugInformationRecorder* debug_info = C->debug_info();
990 995 assert(debug_info->recording_non_safepoints(), "sanity");
991 996
992 997 debug_info->add_non_safepoint(pc_offset);
993 998 int max_depth = youngest_jvms->depth();
994 999
995 1000 // Visit scopes from oldest to youngest.
996 1001 for (int depth = 1; depth <= max_depth; depth++) {
997 1002 JVMState* jvms = youngest_jvms->of_depth(depth);
998 1003 ciMethod* method = jvms->has_method() ? jvms->method() : NULL;
999 1004 assert(!jvms->should_reexecute() || depth==max_depth, "reexecute allowed only for the youngest");
1000 1005 debug_info->describe_scope(pc_offset, method, jvms->bci(), jvms->should_reexecute());
1001 1006 }
1002 1007
1003 1008 // Mark the end of the scope set.
1004 1009 debug_info->end_non_safepoint(pc_offset);
1005 1010 }
1006 1011
1007 1012
1008 1013
1009 1014 // helper for Fill_buffer bailout logic
1010 1015 static void turn_off_compiler(Compile* C) {
1011 1016 if (CodeCache::unallocated_capacity() >= CodeCacheMinimumFreeSpace*10) {
1012 1017 // Do not turn off compilation if a single giant method has
1013 1018 // blown the code cache size.
1014 1019 C->record_failure("excessive request to CodeCache");
1015 1020 } else {
1016 1021 // Let CompilerBroker disable further compilations.
1017 1022 C->record_failure("CodeCache is full");
1018 1023 }
1019 1024 }
1020 1025
1021 1026
1022 1027 //------------------------------Fill_buffer------------------------------------
1023 1028 void Compile::Fill_buffer() {
1024 1029
1025 1030 // Set the initially allocated size
1026 1031 int code_req = initial_code_capacity;
1027 1032 int locs_req = initial_locs_capacity;
1028 1033 int stub_req = TraceJumps ? initial_stub_capacity * 10 : initial_stub_capacity;
1029 1034 int const_req = initial_const_capacity;
1030 1035 bool labels_not_set = true;
1031 1036
1032 1037 int pad_req = NativeCall::instruction_size;
1033 1038 // The extra spacing after the code is necessary on some platforms.
1034 1039 // Sometimes we need to patch in a jump after the last instruction,
1035 1040 // if the nmethod has been deoptimized. (See 4932387, 4894843.)
1036 1041
1037 1042 uint i;
1038 1043 // Compute the byte offset where we can store the deopt pc.
1039 1044 if (fixed_slots() != 0) {
1040 1045 _orig_pc_slot_offset_in_bytes = _regalloc->reg2offset(OptoReg::stack2reg(_orig_pc_slot));
1041 1046 }
1042 1047
1043 1048 // Compute prolog code size
1044 1049 _method_size = 0;
1045 1050 _frame_slots = OptoReg::reg2stack(_matcher->_old_SP)+_regalloc->_framesize;
1046 1051 #ifdef IA64
1047 1052 if (save_argument_registers()) {
1048 1053 // 4815101: this is a stub with implicit and unknown precision fp args.
1049 1054 // The usual spill mechanism can only generate stfd's in this case, which
1050 1055 // doesn't work if the fp reg to spill contains a single-precision denorm.
1051 1056 // Instead, we hack around the normal spill mechanism using stfspill's and
1052 1057 // ldffill's in the MachProlog and MachEpilog emit methods. We allocate
1053 1058 // space here for the fp arg regs (f8-f15) we're going to thusly spill.
1054 1059 //
1055 1060 // If we ever implement 16-byte 'registers' == stack slots, we can
1056 1061 // get rid of this hack and have SpillCopy generate stfspill/ldffill
1057 1062 // instead of stfd/stfs/ldfd/ldfs.
1058 1063 _frame_slots += 8*(16/BytesPerInt);
1059 1064 }
1060 1065 #endif
1061 1066 assert( _frame_slots >= 0 && _frame_slots < 1000000, "sanity check" );
1062 1067
1063 1068 // Create an array of unused labels, one for each basic block
1064 1069 Label *blk_labels = NEW_RESOURCE_ARRAY(Label, _cfg->_num_blocks+1);
1065 1070
1066 1071 for( i=0; i <= _cfg->_num_blocks; i++ ) {
1067 1072 blk_labels[i].init();
1068 1073 }
1069 1074
1070 1075 // If this machine supports different size branch offsets, then pre-compute
1071 1076 // the length of the blocks
1072 1077 if( _matcher->is_short_branch_offset(-1, 0) ) {
1073 1078 Shorten_branches(blk_labels, code_req, locs_req, stub_req, const_req);
1074 1079 labels_not_set = false;
1075 1080 }
1076 1081
1077 1082 // nmethod and CodeBuffer count stubs & constants as part of method's code.
1078 1083 int exception_handler_req = size_exception_handler();
1079 1084 int deopt_handler_req = size_deopt_handler();
1080 1085 exception_handler_req += MAX_stubs_size; // add marginal slop for handler
1081 1086 deopt_handler_req += MAX_stubs_size; // add marginal slop for handler
1082 1087 stub_req += MAX_stubs_size; // ensure per-stub margin
1083 1088 code_req += MAX_inst_size; // ensure per-instruction margin
1084 1089 if (StressCodeBuffers)
1085 1090 code_req = const_req = stub_req = exception_handler_req = deopt_handler_req = 0x10; // force expansion
1086 1091 int total_req = code_req + pad_req + stub_req + exception_handler_req + deopt_handler_req + const_req;
1087 1092 CodeBuffer* cb = code_buffer();
1088 1093 cb->initialize(total_req, locs_req);
1089 1094
1090 1095 // Have we run out of code space?
1091 1096 if (cb->blob() == NULL) {
1092 1097 turn_off_compiler(this);
1093 1098 return;
1094 1099 }
1095 1100 // Configure the code buffer.
1096 1101 cb->initialize_consts_size(const_req);
1097 1102 cb->initialize_stubs_size(stub_req);
1098 1103 cb->initialize_oop_recorder(env()->oop_recorder());
1099 1104
1100 1105 // fill in the nop array for bundling computations
1101 1106 MachNode *_nop_list[Bundle::_nop_count];
1102 1107 Bundle::initialize_nops(_nop_list, this);
1103 1108
1104 1109 // Create oopmap set.
1105 1110 _oop_map_set = new OopMapSet();
1106 1111
1107 1112 // !!!!! This preserves old handling of oopmaps for now
1108 1113 debug_info()->set_oopmaps(_oop_map_set);
1109 1114
1110 1115 // Count and start of implicit null check instructions
1111 1116 uint inct_cnt = 0;
1112 1117 uint *inct_starts = NEW_RESOURCE_ARRAY(uint, _cfg->_num_blocks+1);
1113 1118
1114 1119 // Count and start of calls
1115 1120 uint *call_returns = NEW_RESOURCE_ARRAY(uint, _cfg->_num_blocks+1);
1116 1121
1117 1122 uint return_offset = 0;
1118 1123 int nop_size = (new (this) MachNopNode())->size(_regalloc);
1119 1124
1120 1125 int previous_offset = 0;
1121 1126 int current_offset = 0;
1122 1127 int last_call_offset = -1;
1123 1128
1124 1129 // Create an array of unused labels, one for each basic block, if printing is enabled
1125 1130 #ifndef PRODUCT
1126 1131 int *node_offsets = NULL;
1127 1132 uint node_offset_limit = unique();
1128 1133
1129 1134
1130 1135 if ( print_assembly() )
1131 1136 node_offsets = NEW_RESOURCE_ARRAY(int, node_offset_limit);
1132 1137 #endif
1133 1138
1134 1139 NonSafepointEmitter non_safepoints(this); // emit non-safepoints lazily
1135 1140
1136 1141 // ------------------
1137 1142 // Now fill in the code buffer
1138 1143 Node *delay_slot = NULL;
1139 1144
1140 1145 for( i=0; i < _cfg->_num_blocks; i++ ) {
1141 1146 Block *b = _cfg->_blocks[i];
1142 1147
1143 1148 Node *head = b->head();
1144 1149
1145 1150 // If this block needs to start aligned (i.e, can be reached other
1146 1151 // than by falling-thru from the previous block), then force the
1147 1152 // start of a new bundle.
1148 1153 if( Pipeline::requires_bundling() && starts_bundle(head) )
1149 1154 cb->flush_bundle(true);
1150 1155
1151 1156 // Define the label at the beginning of the basic block
1152 1157 if( labels_not_set )
1153 1158 MacroAssembler(cb).bind( blk_labels[b->_pre_order] );
1154 1159
1155 1160 else
1156 1161 assert( blk_labels[b->_pre_order].loc_pos() == cb->code_size(),
1157 1162 "label position does not match code offset" );
1158 1163
1159 1164 uint last_inst = b->_nodes.size();
1160 1165
1161 1166 // Emit block normally, except for last instruction.
1162 1167 // Emit means "dump code bits into code buffer".
1163 1168 for( uint j = 0; j<last_inst; j++ ) {
1164 1169
1165 1170 // Get the node
1166 1171 Node* n = b->_nodes[j];
1167 1172
1168 1173 // See if delay slots are supported
1169 1174 if (valid_bundle_info(n) &&
1170 1175 node_bundling(n)->used_in_unconditional_delay()) {
1171 1176 assert(delay_slot == NULL, "no use of delay slot node");
1172 1177 assert(n->size(_regalloc) == Pipeline::instr_unit_size(), "delay slot instruction wrong size");
1173 1178
1174 1179 delay_slot = n;
1175 1180 continue;
1176 1181 }
1177 1182
1178 1183 // If this starts a new instruction group, then flush the current one
1179 1184 // (but allow split bundles)
1180 1185 if( Pipeline::requires_bundling() && starts_bundle(n) )
1181 1186 cb->flush_bundle(false);
1182 1187
1183 1188 // The following logic is duplicated in the code ifdeffed for
1184 1189 // ENABLE_ZAP_DEAD_LOCALS which appears above in this file. It
1185 1190 // should be factored out. Or maybe dispersed to the nodes?
1186 1191
1187 1192 // Special handling for SafePoint/Call Nodes
1188 1193 bool is_mcall = false;
1189 1194 if( n->is_Mach() ) {
1190 1195 MachNode *mach = n->as_Mach();
1191 1196 is_mcall = n->is_MachCall();
1192 1197 bool is_sfn = n->is_MachSafePoint();
1193 1198
1194 1199 // If this requires all previous instructions be flushed, then do so
1195 1200 if( is_sfn || is_mcall || mach->alignment_required() != 1) {
1196 1201 cb->flush_bundle(true);
1197 1202 current_offset = cb->code_size();
1198 1203 }
1199 1204
1200 1205 // align the instruction if necessary
1201 1206 int padding = mach->compute_padding(current_offset);
1202 1207 // Make sure safepoint node for polling is distinct from a call's
1203 1208 // return by adding a nop if needed.
1204 1209 if (is_sfn && !is_mcall && padding == 0 && current_offset == last_call_offset ) {
1205 1210 padding = nop_size;
1206 1211 }
1207 1212 assert( labels_not_set || padding == 0, "instruction should already be aligned")
1208 1213
1209 1214 if(padding > 0) {
1210 1215 assert((padding % nop_size) == 0, "padding is not a multiple of NOP size");
1211 1216 int nops_cnt = padding / nop_size;
1212 1217 MachNode *nop = new (this) MachNopNode(nops_cnt);
1213 1218 b->_nodes.insert(j++, nop);
1214 1219 last_inst++;
1215 1220 _cfg->_bbs.map( nop->_idx, b );
1216 1221 nop->emit(*cb, _regalloc);
1217 1222 cb->flush_bundle(true);
1218 1223 current_offset = cb->code_size();
1219 1224 }
1220 1225
1221 1226 // Remember the start of the last call in a basic block
1222 1227 if (is_mcall) {
1223 1228 MachCallNode *mcall = mach->as_MachCall();
1224 1229
1225 1230 // This destination address is NOT PC-relative
1226 1231 mcall->method_set((intptr_t)mcall->entry_point());
1227 1232
1228 1233 // Save the return address
1229 1234 call_returns[b->_pre_order] = current_offset + mcall->ret_addr_offset();
1230 1235
1231 1236 if (!mcall->is_safepoint_node()) {
1232 1237 is_mcall = false;
1233 1238 is_sfn = false;
1234 1239 }
1235 1240 }
1236 1241
1237 1242 // sfn will be valid whenever mcall is valid now because of inheritance
1238 1243 if( is_sfn || is_mcall ) {
1239 1244
1240 1245 // Handle special safepoint nodes for synchronization
1241 1246 if( !is_mcall ) {
1242 1247 MachSafePointNode *sfn = mach->as_MachSafePoint();
1243 1248 // !!!!! Stubs only need an oopmap right now, so bail out
1244 1249 if( sfn->jvms()->method() == NULL) {
1245 1250 // Write the oopmap directly to the code blob??!!
1246 1251 # ifdef ENABLE_ZAP_DEAD_LOCALS
1247 1252 assert( !is_node_getting_a_safepoint(sfn), "logic does not match; false positive");
1248 1253 # endif
1249 1254 continue;
1250 1255 }
1251 1256 } // End synchronization
1252 1257
1253 1258 non_safepoints.observe_safepoint(mach->as_MachSafePoint()->jvms(),
1254 1259 current_offset);
1255 1260 Process_OopMap_Node(mach, current_offset);
1256 1261 } // End if safepoint
1257 1262
1258 1263 // If this is a null check, then add the start of the previous instruction to the list
1259 1264 else if( mach->is_MachNullCheck() ) {
1260 1265 inct_starts[inct_cnt++] = previous_offset;
1261 1266 }
1262 1267
1263 1268 // If this is a branch, then fill in the label with the target BB's label
1264 1269 else if ( mach->is_Branch() ) {
1265 1270
1266 1271 if ( mach->ideal_Opcode() == Op_Jump ) {
1267 1272 for (uint h = 0; h < b->_num_succs; h++ ) {
1268 1273 Block* succs_block = b->_succs[h];
1269 1274 for (uint j = 1; j < succs_block->num_preds(); j++) {
1270 1275 Node* jpn = succs_block->pred(j);
1271 1276 if ( jpn->is_JumpProj() && jpn->in(0) == mach ) {
1272 1277 uint block_num = succs_block->non_connector()->_pre_order;
1273 1278 Label *blkLabel = &blk_labels[block_num];
1274 1279 mach->add_case_label(jpn->as_JumpProj()->proj_no(), blkLabel);
1275 1280 }
1276 1281 }
1277 1282 }
1278 1283 } else {
1279 1284 // For Branchs
1280 1285 // This requires the TRUE branch target be in succs[0]
1281 1286 uint block_num = b->non_connector_successor(0)->_pre_order;
1282 1287 mach->label_set( blk_labels[block_num], block_num );
1283 1288 }
1284 1289 }
1285 1290
1286 1291 #ifdef ASSERT
1287 1292 // Check that oop-store precedes the card-mark
1288 1293 else if( mach->ideal_Opcode() == Op_StoreCM ) {
1289 1294 uint storeCM_idx = j;
1290 1295 Node *oop_store = mach->in(mach->_cnt); // First precedence edge
1291 1296 assert( oop_store != NULL, "storeCM expects a precedence edge");
1292 1297 uint i4;
1293 1298 for( i4 = 0; i4 < last_inst; ++i4 ) {
1294 1299 if( b->_nodes[i4] == oop_store ) break;
1295 1300 }
1296 1301 // Note: This test can provide a false failure if other precedence
1297 1302 // edges have been added to the storeCMNode.
1298 1303 assert( i4 == last_inst || i4 < storeCM_idx, "CM card-mark executes before oop-store");
1299 1304 }
1300 1305 #endif
1301 1306
1302 1307 else if( !n->is_Proj() ) {
1303 1308 // Remember the beginning of the previous instruction, in case
1304 1309 // it's followed by a flag-kill and a null-check. Happens on
1305 1310 // Intel all the time, with add-to-memory kind of opcodes.
1306 1311 previous_offset = current_offset;
1307 1312 }
1308 1313 }
1309 1314
1310 1315 // Verify that there is sufficient space remaining
1311 1316 cb->insts()->maybe_expand_to_ensure_remaining(MAX_inst_size);
1312 1317 if (cb->blob() == NULL) {
1313 1318 turn_off_compiler(this);
1314 1319 return;
1315 1320 }
1316 1321
1317 1322 // Save the offset for the listing
1318 1323 #ifndef PRODUCT
1319 1324 if( node_offsets && n->_idx < node_offset_limit )
1320 1325 node_offsets[n->_idx] = cb->code_size();
1321 1326 #endif
1322 1327
1323 1328 // "Normal" instruction case
1324 1329 n->emit(*cb, _regalloc);
1325 1330 current_offset = cb->code_size();
1326 1331 non_safepoints.observe_instruction(n, current_offset);
1327 1332
1328 1333 // mcall is last "call" that can be a safepoint
1329 1334 // record it so we can see if a poll will directly follow it
1330 1335 // in which case we'll need a pad to make the PcDesc sites unique
1331 1336 // see 5010568. This can be slightly inaccurate but conservative
1332 1337 // in the case that return address is not actually at current_offset.
1333 1338 // This is a small price to pay.
1334 1339
1335 1340 if (is_mcall) {
1336 1341 last_call_offset = current_offset;
1337 1342 }
1338 1343
1339 1344 // See if this instruction has a delay slot
1340 1345 if ( valid_bundle_info(n) && node_bundling(n)->use_unconditional_delay()) {
1341 1346 assert(delay_slot != NULL, "expecting delay slot node");
1342 1347
1343 1348 // Back up 1 instruction
1344 1349 cb->set_code_end(
1345 1350 cb->code_end()-Pipeline::instr_unit_size());
1346 1351
1347 1352 // Save the offset for the listing
1348 1353 #ifndef PRODUCT
1349 1354 if( node_offsets && delay_slot->_idx < node_offset_limit )
1350 1355 node_offsets[delay_slot->_idx] = cb->code_size();
1351 1356 #endif
1352 1357
1353 1358 // Support a SafePoint in the delay slot
1354 1359 if( delay_slot->is_MachSafePoint() ) {
1355 1360 MachNode *mach = delay_slot->as_Mach();
1356 1361 // !!!!! Stubs only need an oopmap right now, so bail out
1357 1362 if( !mach->is_MachCall() && mach->as_MachSafePoint()->jvms()->method() == NULL ) {
1358 1363 // Write the oopmap directly to the code blob??!!
1359 1364 # ifdef ENABLE_ZAP_DEAD_LOCALS
1360 1365 assert( !is_node_getting_a_safepoint(mach), "logic does not match; false positive");
1361 1366 # endif
1362 1367 delay_slot = NULL;
1363 1368 continue;
1364 1369 }
1365 1370
1366 1371 int adjusted_offset = current_offset - Pipeline::instr_unit_size();
1367 1372 non_safepoints.observe_safepoint(mach->as_MachSafePoint()->jvms(),
1368 1373 adjusted_offset);
1369 1374 // Generate an OopMap entry
1370 1375 Process_OopMap_Node(mach, adjusted_offset);
1371 1376 }
1372 1377
1373 1378 // Insert the delay slot instruction
1374 1379 delay_slot->emit(*cb, _regalloc);
1375 1380
1376 1381 // Don't reuse it
1377 1382 delay_slot = NULL;
1378 1383 }
1379 1384
1380 1385 } // End for all instructions in block
1381 1386
1382 1387 // If the next block is the top of a loop, pad this block out to align
1383 1388 // the loop top a little. Helps prevent pipe stalls at loop back branches.
1384 1389 if( i<_cfg->_num_blocks-1 ) {
1385 1390 Block *nb = _cfg->_blocks[i+1];
1386 1391 uint padding = nb->alignment_padding(current_offset);
1387 1392 if( padding > 0 ) {
1388 1393 MachNode *nop = new (this) MachNopNode(padding / nop_size);
1389 1394 b->_nodes.insert( b->_nodes.size(), nop );
1390 1395 _cfg->_bbs.map( nop->_idx, b );
1391 1396 nop->emit(*cb, _regalloc);
1392 1397 current_offset = cb->code_size();
1393 1398 }
1394 1399 }
1395 1400
1396 1401 } // End of for all blocks
1397 1402
1398 1403 non_safepoints.flush_at_end();
1399 1404
1400 1405 // Offset too large?
1401 1406 if (failing()) return;
1402 1407
1403 1408 // Define a pseudo-label at the end of the code
1404 1409 MacroAssembler(cb).bind( blk_labels[_cfg->_num_blocks] );
1405 1410
1406 1411 // Compute the size of the first block
1407 1412 _first_block_size = blk_labels[1].loc_pos() - blk_labels[0].loc_pos();
1408 1413
1409 1414 assert(cb->code_size() < 500000, "method is unreasonably large");
1410 1415
1411 1416 // ------------------
1412 1417
1413 1418 #ifndef PRODUCT
1414 1419 // Information on the size of the method, without the extraneous code
1415 1420 Scheduling::increment_method_size(cb->code_size());
1416 1421 #endif
1417 1422
1418 1423 // ------------------
1419 1424 // Fill in exception table entries.
1420 1425 FillExceptionTables(inct_cnt, call_returns, inct_starts, blk_labels);
1421 1426
1422 1427 // Only java methods have exception handlers and deopt handlers
1423 1428 if (_method) {
1424 1429 // Emit the exception handler code.
1425 1430 _code_offsets.set_value(CodeOffsets::Exceptions, emit_exception_handler(*cb));
1426 1431 // Emit the deopt handler code.
1427 1432 _code_offsets.set_value(CodeOffsets::Deopt, emit_deopt_handler(*cb));
1428 1433 }
1429 1434
1430 1435 // One last check for failed CodeBuffer::expand:
1431 1436 if (cb->blob() == NULL) {
1432 1437 turn_off_compiler(this);
1433 1438 return;
1434 1439 }
1435 1440
1436 1441 #ifndef PRODUCT
1437 1442 // Dump the assembly code, including basic-block numbers
1438 1443 if (print_assembly()) {
1439 1444 ttyLocker ttyl; // keep the following output all in one block
1440 1445 if (!VMThread::should_terminate()) { // test this under the tty lock
1441 1446 // This output goes directly to the tty, not the compiler log.
1442 1447 // To enable tools to match it up with the compilation activity,
1443 1448 // be sure to tag this tty output with the compile ID.
1444 1449 if (xtty != NULL) {
1445 1450 xtty->head("opto_assembly compile_id='%d'%s", compile_id(),
1446 1451 is_osr_compilation() ? " compile_kind='osr'" :
1447 1452 "");
1448 1453 }
1449 1454 if (method() != NULL) {
1450 1455 method()->print_oop();
1451 1456 print_codes();
1452 1457 }
1453 1458 dump_asm(node_offsets, node_offset_limit);
1454 1459 if (xtty != NULL) {
1455 1460 xtty->tail("opto_assembly");
1456 1461 }
1457 1462 }
1458 1463 }
1459 1464 #endif
1460 1465
1461 1466 }
1462 1467
1463 1468 void Compile::FillExceptionTables(uint cnt, uint *call_returns, uint *inct_starts, Label *blk_labels) {
1464 1469 _inc_table.set_size(cnt);
1465 1470
1466 1471 uint inct_cnt = 0;
1467 1472 for( uint i=0; i<_cfg->_num_blocks; i++ ) {
1468 1473 Block *b = _cfg->_blocks[i];
1469 1474 Node *n = NULL;
1470 1475 int j;
1471 1476
1472 1477 // Find the branch; ignore trailing NOPs.
1473 1478 for( j = b->_nodes.size()-1; j>=0; j-- ) {
1474 1479 n = b->_nodes[j];
1475 1480 if( !n->is_Mach() || n->as_Mach()->ideal_Opcode() != Op_Con )
1476 1481 break;
1477 1482 }
1478 1483
1479 1484 // If we didn't find anything, continue
1480 1485 if( j < 0 ) continue;
1481 1486
1482 1487 // Compute ExceptionHandlerTable subtable entry and add it
1483 1488 // (skip empty blocks)
1484 1489 if( n->is_Catch() ) {
1485 1490
1486 1491 // Get the offset of the return from the call
1487 1492 uint call_return = call_returns[b->_pre_order];
1488 1493 #ifdef ASSERT
1489 1494 assert( call_return > 0, "no call seen for this basic block" );
1490 1495 while( b->_nodes[--j]->Opcode() == Op_MachProj ) ;
1491 1496 assert( b->_nodes[j]->is_Call(), "CatchProj must follow call" );
1492 1497 #endif
1493 1498 // last instruction is a CatchNode, find it's CatchProjNodes
1494 1499 int nof_succs = b->_num_succs;
1495 1500 // allocate space
1496 1501 GrowableArray<intptr_t> handler_bcis(nof_succs);
1497 1502 GrowableArray<intptr_t> handler_pcos(nof_succs);
1498 1503 // iterate through all successors
1499 1504 for (int j = 0; j < nof_succs; j++) {
1500 1505 Block* s = b->_succs[j];
1501 1506 bool found_p = false;
1502 1507 for( uint k = 1; k < s->num_preds(); k++ ) {
1503 1508 Node *pk = s->pred(k);
1504 1509 if( pk->is_CatchProj() && pk->in(0) == n ) {
1505 1510 const CatchProjNode* p = pk->as_CatchProj();
1506 1511 found_p = true;
1507 1512 // add the corresponding handler bci & pco information
1508 1513 if( p->_con != CatchProjNode::fall_through_index ) {
1509 1514 // p leads to an exception handler (and is not fall through)
1510 1515 assert(s == _cfg->_blocks[s->_pre_order],"bad numbering");
1511 1516 // no duplicates, please
1512 1517 if( !handler_bcis.contains(p->handler_bci()) ) {
1513 1518 uint block_num = s->non_connector()->_pre_order;
1514 1519 handler_bcis.append(p->handler_bci());
1515 1520 handler_pcos.append(blk_labels[block_num].loc_pos());
1516 1521 }
1517 1522 }
1518 1523 }
1519 1524 }
1520 1525 assert(found_p, "no matching predecessor found");
1521 1526 // Note: Due to empty block removal, one block may have
1522 1527 // several CatchProj inputs, from the same Catch.
1523 1528 }
1524 1529
1525 1530 // Set the offset of the return from the call
1526 1531 _handler_table.add_subtable(call_return, &handler_bcis, NULL, &handler_pcos);
1527 1532 continue;
1528 1533 }
1529 1534
1530 1535 // Handle implicit null exception table updates
1531 1536 if( n->is_MachNullCheck() ) {
1532 1537 uint block_num = b->non_connector_successor(0)->_pre_order;
1533 1538 _inc_table.append( inct_starts[inct_cnt++], blk_labels[block_num].loc_pos() );
1534 1539 continue;
1535 1540 }
1536 1541 } // End of for all blocks fill in exception table entries
1537 1542 }
1538 1543
1539 1544 // Static Variables
1540 1545 #ifndef PRODUCT
1541 1546 uint Scheduling::_total_nop_size = 0;
1542 1547 uint Scheduling::_total_method_size = 0;
1543 1548 uint Scheduling::_total_branches = 0;
1544 1549 uint Scheduling::_total_unconditional_delays = 0;
1545 1550 uint Scheduling::_total_instructions_per_bundle[Pipeline::_max_instrs_per_cycle+1];
1546 1551 #endif
1547 1552
1548 1553 // Initializer for class Scheduling
1549 1554
1550 1555 Scheduling::Scheduling(Arena *arena, Compile &compile)
1551 1556 : _arena(arena),
1552 1557 _cfg(compile.cfg()),
1553 1558 _bbs(compile.cfg()->_bbs),
1554 1559 _regalloc(compile.regalloc()),
1555 1560 _reg_node(arena),
1556 1561 _bundle_instr_count(0),
1557 1562 _bundle_cycle_number(0),
1558 1563 _scheduled(arena),
1559 1564 _available(arena),
1560 1565 _next_node(NULL),
1561 1566 _bundle_use(0, 0, resource_count, &_bundle_use_elements[0]),
1562 1567 _pinch_free_list(arena)
1563 1568 #ifndef PRODUCT
1564 1569 , _branches(0)
1565 1570 , _unconditional_delays(0)
1566 1571 #endif
1567 1572 {
1568 1573 // Create a MachNopNode
1569 1574 _nop = new (&compile) MachNopNode();
1570 1575
1571 1576 // Now that the nops are in the array, save the count
1572 1577 // (but allow entries for the nops)
1573 1578 _node_bundling_limit = compile.unique();
1574 1579 uint node_max = _regalloc->node_regs_max_index();
1575 1580
1576 1581 compile.set_node_bundling_limit(_node_bundling_limit);
1577 1582
1578 1583 // This one is persistent within the Compile class
1579 1584 _node_bundling_base = NEW_ARENA_ARRAY(compile.comp_arena(), Bundle, node_max);
1580 1585
1581 1586 // Allocate space for fixed-size arrays
1582 1587 _node_latency = NEW_ARENA_ARRAY(arena, unsigned short, node_max);
1583 1588 _uses = NEW_ARENA_ARRAY(arena, short, node_max);
1584 1589 _current_latency = NEW_ARENA_ARRAY(arena, unsigned short, node_max);
1585 1590
1586 1591 // Clear the arrays
1587 1592 memset(_node_bundling_base, 0, node_max * sizeof(Bundle));
1588 1593 memset(_node_latency, 0, node_max * sizeof(unsigned short));
1589 1594 memset(_uses, 0, node_max * sizeof(short));
1590 1595 memset(_current_latency, 0, node_max * sizeof(unsigned short));
1591 1596
1592 1597 // Clear the bundling information
1593 1598 memcpy(_bundle_use_elements,
1594 1599 Pipeline_Use::elaborated_elements,
1595 1600 sizeof(Pipeline_Use::elaborated_elements));
1596 1601
1597 1602 // Get the last node
1598 1603 Block *bb = _cfg->_blocks[_cfg->_blocks.size()-1];
1599 1604
1600 1605 _next_node = bb->_nodes[bb->_nodes.size()-1];
1601 1606 }
1602 1607
1603 1608 #ifndef PRODUCT
1604 1609 // Scheduling destructor
1605 1610 Scheduling::~Scheduling() {
1606 1611 _total_branches += _branches;
1607 1612 _total_unconditional_delays += _unconditional_delays;
1608 1613 }
1609 1614 #endif
1610 1615
1611 1616 // Step ahead "i" cycles
1612 1617 void Scheduling::step(uint i) {
1613 1618
1614 1619 Bundle *bundle = node_bundling(_next_node);
1615 1620 bundle->set_starts_bundle();
1616 1621
1617 1622 // Update the bundle record, but leave the flags information alone
1618 1623 if (_bundle_instr_count > 0) {
1619 1624 bundle->set_instr_count(_bundle_instr_count);
1620 1625 bundle->set_resources_used(_bundle_use.resourcesUsed());
1621 1626 }
1622 1627
1623 1628 // Update the state information
1624 1629 _bundle_instr_count = 0;
1625 1630 _bundle_cycle_number += i;
1626 1631 _bundle_use.step(i);
1627 1632 }
1628 1633
1629 1634 void Scheduling::step_and_clear() {
1630 1635 Bundle *bundle = node_bundling(_next_node);
1631 1636 bundle->set_starts_bundle();
1632 1637
1633 1638 // Update the bundle record
1634 1639 if (_bundle_instr_count > 0) {
1635 1640 bundle->set_instr_count(_bundle_instr_count);
1636 1641 bundle->set_resources_used(_bundle_use.resourcesUsed());
1637 1642
1638 1643 _bundle_cycle_number += 1;
1639 1644 }
1640 1645
1641 1646 // Clear the bundling information
1642 1647 _bundle_instr_count = 0;
1643 1648 _bundle_use.reset();
1644 1649
1645 1650 memcpy(_bundle_use_elements,
1646 1651 Pipeline_Use::elaborated_elements,
1647 1652 sizeof(Pipeline_Use::elaborated_elements));
1648 1653 }
1649 1654
1650 1655 //------------------------------ScheduleAndBundle------------------------------
1651 1656 // Perform instruction scheduling and bundling over the sequence of
1652 1657 // instructions in backwards order.
1653 1658 void Compile::ScheduleAndBundle() {
1654 1659
1655 1660 // Don't optimize this if it isn't a method
1656 1661 if (!_method)
1657 1662 return;
1658 1663
1659 1664 // Don't optimize this if scheduling is disabled
1660 1665 if (!do_scheduling())
1661 1666 return;
1662 1667
1663 1668 NOT_PRODUCT( TracePhase t2("isched", &_t_instrSched, TimeCompiler); )
1664 1669
1665 1670 // Create a data structure for all the scheduling information
1666 1671 Scheduling scheduling(Thread::current()->resource_area(), *this);
1667 1672
1668 1673 // Walk backwards over each basic block, computing the needed alignment
1669 1674 // Walk over all the basic blocks
1670 1675 scheduling.DoScheduling();
1671 1676 }
1672 1677
1673 1678 //------------------------------ComputeLocalLatenciesForward-------------------
1674 1679 // Compute the latency of all the instructions. This is fairly simple,
1675 1680 // because we already have a legal ordering. Walk over the instructions
1676 1681 // from first to last, and compute the latency of the instruction based
1677 1682 // on the latency of the preceding instruction(s).
1678 1683 void Scheduling::ComputeLocalLatenciesForward(const Block *bb) {
1679 1684 #ifndef PRODUCT
1680 1685 if (_cfg->C->trace_opto_output())
1681 1686 tty->print("# -> ComputeLocalLatenciesForward\n");
1682 1687 #endif
1683 1688
1684 1689 // Walk over all the schedulable instructions
1685 1690 for( uint j=_bb_start; j < _bb_end; j++ ) {
1686 1691
1687 1692 // This is a kludge, forcing all latency calculations to start at 1.
1688 1693 // Used to allow latency 0 to force an instruction to the beginning
1689 1694 // of the bb
1690 1695 uint latency = 1;
1691 1696 Node *use = bb->_nodes[j];
1692 1697 uint nlen = use->len();
1693 1698
1694 1699 // Walk over all the inputs
1695 1700 for ( uint k=0; k < nlen; k++ ) {
1696 1701 Node *def = use->in(k);
1697 1702 if (!def)
1698 1703 continue;
1699 1704
1700 1705 uint l = _node_latency[def->_idx] + use->latency(k);
1701 1706 if (latency < l)
1702 1707 latency = l;
1703 1708 }
1704 1709
1705 1710 _node_latency[use->_idx] = latency;
1706 1711
1707 1712 #ifndef PRODUCT
1708 1713 if (_cfg->C->trace_opto_output()) {
1709 1714 tty->print("# latency %4d: ", latency);
1710 1715 use->dump();
1711 1716 }
1712 1717 #endif
1713 1718 }
1714 1719
1715 1720 #ifndef PRODUCT
1716 1721 if (_cfg->C->trace_opto_output())
1717 1722 tty->print("# <- ComputeLocalLatenciesForward\n");
1718 1723 #endif
1719 1724
1720 1725 } // end ComputeLocalLatenciesForward
1721 1726
1722 1727 // See if this node fits into the present instruction bundle
1723 1728 bool Scheduling::NodeFitsInBundle(Node *n) {
1724 1729 uint n_idx = n->_idx;
1725 1730
1726 1731 // If this is the unconditional delay instruction, then it fits
1727 1732 if (n == _unconditional_delay_slot) {
1728 1733 #ifndef PRODUCT
1729 1734 if (_cfg->C->trace_opto_output())
1730 1735 tty->print("# NodeFitsInBundle [%4d]: TRUE; is in unconditional delay slot\n", n->_idx);
1731 1736 #endif
1732 1737 return (true);
1733 1738 }
1734 1739
1735 1740 // If the node cannot be scheduled this cycle, skip it
1736 1741 if (_current_latency[n_idx] > _bundle_cycle_number) {
1737 1742 #ifndef PRODUCT
1738 1743 if (_cfg->C->trace_opto_output())
1739 1744 tty->print("# NodeFitsInBundle [%4d]: FALSE; latency %4d > %d\n",
1740 1745 n->_idx, _current_latency[n_idx], _bundle_cycle_number);
1741 1746 #endif
1742 1747 return (false);
1743 1748 }
1744 1749
1745 1750 const Pipeline *node_pipeline = n->pipeline();
1746 1751
1747 1752 uint instruction_count = node_pipeline->instructionCount();
1748 1753 if (node_pipeline->mayHaveNoCode() && n->size(_regalloc) == 0)
1749 1754 instruction_count = 0;
1750 1755 else if (node_pipeline->hasBranchDelay() && !_unconditional_delay_slot)
1751 1756 instruction_count++;
1752 1757
1753 1758 if (_bundle_instr_count + instruction_count > Pipeline::_max_instrs_per_cycle) {
1754 1759 #ifndef PRODUCT
1755 1760 if (_cfg->C->trace_opto_output())
1756 1761 tty->print("# NodeFitsInBundle [%4d]: FALSE; too many instructions: %d > %d\n",
1757 1762 n->_idx, _bundle_instr_count + instruction_count, Pipeline::_max_instrs_per_cycle);
1758 1763 #endif
1759 1764 return (false);
1760 1765 }
1761 1766
1762 1767 // Don't allow non-machine nodes to be handled this way
1763 1768 if (!n->is_Mach() && instruction_count == 0)
1764 1769 return (false);
1765 1770
1766 1771 // See if there is any overlap
1767 1772 uint delay = _bundle_use.full_latency(0, node_pipeline->resourceUse());
1768 1773
1769 1774 if (delay > 0) {
1770 1775 #ifndef PRODUCT
1771 1776 if (_cfg->C->trace_opto_output())
1772 1777 tty->print("# NodeFitsInBundle [%4d]: FALSE; functional units overlap\n", n_idx);
1773 1778 #endif
1774 1779 return false;
1775 1780 }
1776 1781
1777 1782 #ifndef PRODUCT
1778 1783 if (_cfg->C->trace_opto_output())
1779 1784 tty->print("# NodeFitsInBundle [%4d]: TRUE\n", n_idx);
1780 1785 #endif
1781 1786
1782 1787 return true;
1783 1788 }
1784 1789
1785 1790 Node * Scheduling::ChooseNodeToBundle() {
1786 1791 uint siz = _available.size();
1787 1792
1788 1793 if (siz == 0) {
1789 1794
1790 1795 #ifndef PRODUCT
1791 1796 if (_cfg->C->trace_opto_output())
1792 1797 tty->print("# ChooseNodeToBundle: NULL\n");
1793 1798 #endif
1794 1799 return (NULL);
1795 1800 }
1796 1801
1797 1802 // Fast path, if only 1 instruction in the bundle
1798 1803 if (siz == 1) {
1799 1804 #ifndef PRODUCT
1800 1805 if (_cfg->C->trace_opto_output()) {
1801 1806 tty->print("# ChooseNodeToBundle (only 1): ");
1802 1807 _available[0]->dump();
1803 1808 }
1804 1809 #endif
1805 1810 return (_available[0]);
1806 1811 }
1807 1812
1808 1813 // Don't bother, if the bundle is already full
1809 1814 if (_bundle_instr_count < Pipeline::_max_instrs_per_cycle) {
1810 1815 for ( uint i = 0; i < siz; i++ ) {
1811 1816 Node *n = _available[i];
1812 1817
1813 1818 // Skip projections, we'll handle them another way
1814 1819 if (n->is_Proj())
1815 1820 continue;
1816 1821
1817 1822 // This presupposed that instructions are inserted into the
1818 1823 // available list in a legality order; i.e. instructions that
1819 1824 // must be inserted first are at the head of the list
1820 1825 if (NodeFitsInBundle(n)) {
1821 1826 #ifndef PRODUCT
1822 1827 if (_cfg->C->trace_opto_output()) {
1823 1828 tty->print("# ChooseNodeToBundle: ");
1824 1829 n->dump();
1825 1830 }
1826 1831 #endif
1827 1832 return (n);
1828 1833 }
1829 1834 }
1830 1835 }
1831 1836
1832 1837 // Nothing fits in this bundle, choose the highest priority
1833 1838 #ifndef PRODUCT
1834 1839 if (_cfg->C->trace_opto_output()) {
1835 1840 tty->print("# ChooseNodeToBundle: ");
1836 1841 _available[0]->dump();
1837 1842 }
1838 1843 #endif
1839 1844
1840 1845 return _available[0];
1841 1846 }
1842 1847
1843 1848 //------------------------------AddNodeToAvailableList-------------------------
1844 1849 void Scheduling::AddNodeToAvailableList(Node *n) {
1845 1850 assert( !n->is_Proj(), "projections never directly made available" );
1846 1851 #ifndef PRODUCT
1847 1852 if (_cfg->C->trace_opto_output()) {
1848 1853 tty->print("# AddNodeToAvailableList: ");
1849 1854 n->dump();
1850 1855 }
1851 1856 #endif
1852 1857
1853 1858 int latency = _current_latency[n->_idx];
1854 1859
1855 1860 // Insert in latency order (insertion sort)
1856 1861 uint i;
1857 1862 for ( i=0; i < _available.size(); i++ )
1858 1863 if (_current_latency[_available[i]->_idx] > latency)
1859 1864 break;
1860 1865
1861 1866 // Special Check for compares following branches
1862 1867 if( n->is_Mach() && _scheduled.size() > 0 ) {
1863 1868 int op = n->as_Mach()->ideal_Opcode();
1864 1869 Node *last = _scheduled[0];
1865 1870 if( last->is_MachIf() && last->in(1) == n &&
1866 1871 ( op == Op_CmpI ||
1867 1872 op == Op_CmpU ||
1868 1873 op == Op_CmpP ||
1869 1874 op == Op_CmpF ||
1870 1875 op == Op_CmpD ||
1871 1876 op == Op_CmpL ) ) {
1872 1877
1873 1878 // Recalculate position, moving to front of same latency
1874 1879 for ( i=0 ; i < _available.size(); i++ )
1875 1880 if (_current_latency[_available[i]->_idx] >= latency)
1876 1881 break;
1877 1882 }
1878 1883 }
1879 1884
1880 1885 // Insert the node in the available list
1881 1886 _available.insert(i, n);
1882 1887
1883 1888 #ifndef PRODUCT
1884 1889 if (_cfg->C->trace_opto_output())
1885 1890 dump_available();
1886 1891 #endif
1887 1892 }
1888 1893
1889 1894 //------------------------------DecrementUseCounts-----------------------------
1890 1895 void Scheduling::DecrementUseCounts(Node *n, const Block *bb) {
1891 1896 for ( uint i=0; i < n->len(); i++ ) {
1892 1897 Node *def = n->in(i);
1893 1898 if (!def) continue;
1894 1899 if( def->is_Proj() ) // If this is a machine projection, then
1895 1900 def = def->in(0); // propagate usage thru to the base instruction
1896 1901
1897 1902 if( _bbs[def->_idx] != bb ) // Ignore if not block-local
1898 1903 continue;
1899 1904
1900 1905 // Compute the latency
1901 1906 uint l = _bundle_cycle_number + n->latency(i);
1902 1907 if (_current_latency[def->_idx] < l)
1903 1908 _current_latency[def->_idx] = l;
1904 1909
1905 1910 // If this does not have uses then schedule it
1906 1911 if ((--_uses[def->_idx]) == 0)
1907 1912 AddNodeToAvailableList(def);
1908 1913 }
1909 1914 }
1910 1915
1911 1916 //------------------------------AddNodeToBundle--------------------------------
1912 1917 void Scheduling::AddNodeToBundle(Node *n, const Block *bb) {
1913 1918 #ifndef PRODUCT
1914 1919 if (_cfg->C->trace_opto_output()) {
1915 1920 tty->print("# AddNodeToBundle: ");
1916 1921 n->dump();
1917 1922 }
1918 1923 #endif
1919 1924
1920 1925 // Remove this from the available list
1921 1926 uint i;
1922 1927 for (i = 0; i < _available.size(); i++)
1923 1928 if (_available[i] == n)
1924 1929 break;
1925 1930 assert(i < _available.size(), "entry in _available list not found");
1926 1931 _available.remove(i);
1927 1932
1928 1933 // See if this fits in the current bundle
1929 1934 const Pipeline *node_pipeline = n->pipeline();
1930 1935 const Pipeline_Use& node_usage = node_pipeline->resourceUse();
1931 1936
1932 1937 // Check for instructions to be placed in the delay slot. We
1933 1938 // do this before we actually schedule the current instruction,
1934 1939 // because the delay slot follows the current instruction.
1935 1940 if (Pipeline::_branch_has_delay_slot &&
1936 1941 node_pipeline->hasBranchDelay() &&
1937 1942 !_unconditional_delay_slot) {
1938 1943
1939 1944 uint siz = _available.size();
1940 1945
1941 1946 // Conditional branches can support an instruction that
1942 1947 // is unconditionally executed and not dependent by the
1943 1948 // branch, OR a conditionally executed instruction if
1944 1949 // the branch is taken. In practice, this means that
1945 1950 // the first instruction at the branch target is
1946 1951 // copied to the delay slot, and the branch goes to
1947 1952 // the instruction after that at the branch target
1948 1953 if ( n->is_Mach() && n->is_Branch() ) {
1949 1954
1950 1955 assert( !n->is_MachNullCheck(), "should not look for delay slot for Null Check" );
1951 1956 assert( !n->is_Catch(), "should not look for delay slot for Catch" );
1952 1957
1953 1958 #ifndef PRODUCT
1954 1959 _branches++;
1955 1960 #endif
1956 1961
1957 1962 // At least 1 instruction is on the available list
1958 1963 // that is not dependent on the branch
1959 1964 for (uint i = 0; i < siz; i++) {
1960 1965 Node *d = _available[i];
1961 1966 const Pipeline *avail_pipeline = d->pipeline();
1962 1967
1963 1968 // Don't allow safepoints in the branch shadow, that will
1964 1969 // cause a number of difficulties
1965 1970 if ( avail_pipeline->instructionCount() == 1 &&
1966 1971 !avail_pipeline->hasMultipleBundles() &&
1967 1972 !avail_pipeline->hasBranchDelay() &&
1968 1973 Pipeline::instr_has_unit_size() &&
1969 1974 d->size(_regalloc) == Pipeline::instr_unit_size() &&
1970 1975 NodeFitsInBundle(d) &&
1971 1976 !node_bundling(d)->used_in_delay()) {
1972 1977
1973 1978 if (d->is_Mach() && !d->is_MachSafePoint()) {
1974 1979 // A node that fits in the delay slot was found, so we need to
1975 1980 // set the appropriate bits in the bundle pipeline information so
1976 1981 // that it correctly indicates resource usage. Later, when we
1977 1982 // attempt to add this instruction to the bundle, we will skip
1978 1983 // setting the resource usage.
1979 1984 _unconditional_delay_slot = d;
1980 1985 node_bundling(n)->set_use_unconditional_delay();
1981 1986 node_bundling(d)->set_used_in_unconditional_delay();
1982 1987 _bundle_use.add_usage(avail_pipeline->resourceUse());
1983 1988 _current_latency[d->_idx] = _bundle_cycle_number;
1984 1989 _next_node = d;
1985 1990 ++_bundle_instr_count;
1986 1991 #ifndef PRODUCT
1987 1992 _unconditional_delays++;
1988 1993 #endif
1989 1994 break;
1990 1995 }
1991 1996 }
1992 1997 }
1993 1998 }
1994 1999
1995 2000 // No delay slot, add a nop to the usage
1996 2001 if (!_unconditional_delay_slot) {
1997 2002 // See if adding an instruction in the delay slot will overflow
1998 2003 // the bundle.
1999 2004 if (!NodeFitsInBundle(_nop)) {
2000 2005 #ifndef PRODUCT
2001 2006 if (_cfg->C->trace_opto_output())
2002 2007 tty->print("# *** STEP(1 instruction for delay slot) ***\n");
2003 2008 #endif
2004 2009 step(1);
2005 2010 }
2006 2011
2007 2012 _bundle_use.add_usage(_nop->pipeline()->resourceUse());
2008 2013 _next_node = _nop;
2009 2014 ++_bundle_instr_count;
2010 2015 }
2011 2016
2012 2017 // See if the instruction in the delay slot requires a
2013 2018 // step of the bundles
2014 2019 if (!NodeFitsInBundle(n)) {
2015 2020 #ifndef PRODUCT
2016 2021 if (_cfg->C->trace_opto_output())
2017 2022 tty->print("# *** STEP(branch won't fit) ***\n");
2018 2023 #endif
2019 2024 // Update the state information
2020 2025 _bundle_instr_count = 0;
2021 2026 _bundle_cycle_number += 1;
2022 2027 _bundle_use.step(1);
2023 2028 }
2024 2029 }
2025 2030
2026 2031 // Get the number of instructions
2027 2032 uint instruction_count = node_pipeline->instructionCount();
2028 2033 if (node_pipeline->mayHaveNoCode() && n->size(_regalloc) == 0)
2029 2034 instruction_count = 0;
2030 2035
2031 2036 // Compute the latency information
2032 2037 uint delay = 0;
2033 2038
2034 2039 if (instruction_count > 0 || !node_pipeline->mayHaveNoCode()) {
2035 2040 int relative_latency = _current_latency[n->_idx] - _bundle_cycle_number;
2036 2041 if (relative_latency < 0)
2037 2042 relative_latency = 0;
2038 2043
2039 2044 delay = _bundle_use.full_latency(relative_latency, node_usage);
2040 2045
2041 2046 // Does not fit in this bundle, start a new one
2042 2047 if (delay > 0) {
2043 2048 step(delay);
2044 2049
2045 2050 #ifndef PRODUCT
2046 2051 if (_cfg->C->trace_opto_output())
2047 2052 tty->print("# *** STEP(%d) ***\n", delay);
2048 2053 #endif
2049 2054 }
2050 2055 }
2051 2056
2052 2057 // If this was placed in the delay slot, ignore it
2053 2058 if (n != _unconditional_delay_slot) {
2054 2059
2055 2060 if (delay == 0) {
2056 2061 if (node_pipeline->hasMultipleBundles()) {
2057 2062 #ifndef PRODUCT
2058 2063 if (_cfg->C->trace_opto_output())
2059 2064 tty->print("# *** STEP(multiple instructions) ***\n");
2060 2065 #endif
2061 2066 step(1);
2062 2067 }
2063 2068
2064 2069 else if (instruction_count + _bundle_instr_count > Pipeline::_max_instrs_per_cycle) {
2065 2070 #ifndef PRODUCT
2066 2071 if (_cfg->C->trace_opto_output())
2067 2072 tty->print("# *** STEP(%d >= %d instructions) ***\n",
2068 2073 instruction_count + _bundle_instr_count,
2069 2074 Pipeline::_max_instrs_per_cycle);
2070 2075 #endif
2071 2076 step(1);
2072 2077 }
2073 2078 }
2074 2079
2075 2080 if (node_pipeline->hasBranchDelay() && !_unconditional_delay_slot)
2076 2081 _bundle_instr_count++;
2077 2082
2078 2083 // Set the node's latency
2079 2084 _current_latency[n->_idx] = _bundle_cycle_number;
2080 2085
2081 2086 // Now merge the functional unit information
2082 2087 if (instruction_count > 0 || !node_pipeline->mayHaveNoCode())
2083 2088 _bundle_use.add_usage(node_usage);
2084 2089
2085 2090 // Increment the number of instructions in this bundle
2086 2091 _bundle_instr_count += instruction_count;
2087 2092
2088 2093 // Remember this node for later
2089 2094 if (n->is_Mach())
2090 2095 _next_node = n;
2091 2096 }
2092 2097
2093 2098 // It's possible to have a BoxLock in the graph and in the _bbs mapping but
2094 2099 // not in the bb->_nodes array. This happens for debug-info-only BoxLocks.
2095 2100 // 'Schedule' them (basically ignore in the schedule) but do not insert them
2096 2101 // into the block. All other scheduled nodes get put in the schedule here.
2097 2102 int op = n->Opcode();
2098 2103 if( (op == Op_Node && n->req() == 0) || // anti-dependence node OR
2099 2104 (op != Op_Node && // Not an unused antidepedence node and
2100 2105 // not an unallocated boxlock
2101 2106 (OptoReg::is_valid(_regalloc->get_reg_first(n)) || op != Op_BoxLock)) ) {
2102 2107
2103 2108 // Push any trailing projections
2104 2109 if( bb->_nodes[bb->_nodes.size()-1] != n ) {
2105 2110 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
2106 2111 Node *foi = n->fast_out(i);
2107 2112 if( foi->is_Proj() )
2108 2113 _scheduled.push(foi);
2109 2114 }
2110 2115 }
2111 2116
2112 2117 // Put the instruction in the schedule list
2113 2118 _scheduled.push(n);
2114 2119 }
2115 2120
2116 2121 #ifndef PRODUCT
2117 2122 if (_cfg->C->trace_opto_output())
2118 2123 dump_available();
2119 2124 #endif
2120 2125
2121 2126 // Walk all the definitions, decrementing use counts, and
2122 2127 // if a definition has a 0 use count, place it in the available list.
2123 2128 DecrementUseCounts(n,bb);
2124 2129 }
2125 2130
2126 2131 //------------------------------ComputeUseCount--------------------------------
2127 2132 // This method sets the use count within a basic block. We will ignore all
2128 2133 // uses outside the current basic block. As we are doing a backwards walk,
2129 2134 // any node we reach that has a use count of 0 may be scheduled. This also
2130 2135 // avoids the problem of cyclic references from phi nodes, as long as phi
2131 2136 // nodes are at the front of the basic block. This method also initializes
2132 2137 // the available list to the set of instructions that have no uses within this
2133 2138 // basic block.
2134 2139 void Scheduling::ComputeUseCount(const Block *bb) {
2135 2140 #ifndef PRODUCT
2136 2141 if (_cfg->C->trace_opto_output())
2137 2142 tty->print("# -> ComputeUseCount\n");
2138 2143 #endif
2139 2144
2140 2145 // Clear the list of available and scheduled instructions, just in case
2141 2146 _available.clear();
2142 2147 _scheduled.clear();
2143 2148
2144 2149 // No delay slot specified
2145 2150 _unconditional_delay_slot = NULL;
2146 2151
2147 2152 #ifdef ASSERT
2148 2153 for( uint i=0; i < bb->_nodes.size(); i++ )
2149 2154 assert( _uses[bb->_nodes[i]->_idx] == 0, "_use array not clean" );
2150 2155 #endif
2151 2156
2152 2157 // Force the _uses count to never go to zero for unscheduable pieces
2153 2158 // of the block
2154 2159 for( uint k = 0; k < _bb_start; k++ )
2155 2160 _uses[bb->_nodes[k]->_idx] = 1;
2156 2161 for( uint l = _bb_end; l < bb->_nodes.size(); l++ )
2157 2162 _uses[bb->_nodes[l]->_idx] = 1;
2158 2163
2159 2164 // Iterate backwards over the instructions in the block. Don't count the
2160 2165 // branch projections at end or the block header instructions.
2161 2166 for( uint j = _bb_end-1; j >= _bb_start; j-- ) {
2162 2167 Node *n = bb->_nodes[j];
2163 2168 if( n->is_Proj() ) continue; // Projections handled another way
2164 2169
2165 2170 // Account for all uses
2166 2171 for ( uint k = 0; k < n->len(); k++ ) {
2167 2172 Node *inp = n->in(k);
2168 2173 if (!inp) continue;
2169 2174 assert(inp != n, "no cycles allowed" );
2170 2175 if( _bbs[inp->_idx] == bb ) { // Block-local use?
2171 2176 if( inp->is_Proj() ) // Skip through Proj's
2172 2177 inp = inp->in(0);
2173 2178 ++_uses[inp->_idx]; // Count 1 block-local use
2174 2179 }
2175 2180 }
2176 2181
2177 2182 // If this instruction has a 0 use count, then it is available
2178 2183 if (!_uses[n->_idx]) {
2179 2184 _current_latency[n->_idx] = _bundle_cycle_number;
2180 2185 AddNodeToAvailableList(n);
2181 2186 }
2182 2187
2183 2188 #ifndef PRODUCT
2184 2189 if (_cfg->C->trace_opto_output()) {
2185 2190 tty->print("# uses: %3d: ", _uses[n->_idx]);
2186 2191 n->dump();
2187 2192 }
2188 2193 #endif
2189 2194 }
2190 2195
2191 2196 #ifndef PRODUCT
2192 2197 if (_cfg->C->trace_opto_output())
2193 2198 tty->print("# <- ComputeUseCount\n");
2194 2199 #endif
2195 2200 }
2196 2201
2197 2202 // This routine performs scheduling on each basic block in reverse order,
2198 2203 // using instruction latencies and taking into account function unit
2199 2204 // availability.
2200 2205 void Scheduling::DoScheduling() {
2201 2206 #ifndef PRODUCT
2202 2207 if (_cfg->C->trace_opto_output())
2203 2208 tty->print("# -> DoScheduling\n");
2204 2209 #endif
2205 2210
2206 2211 Block *succ_bb = NULL;
2207 2212 Block *bb;
2208 2213
2209 2214 // Walk over all the basic blocks in reverse order
2210 2215 for( int i=_cfg->_num_blocks-1; i >= 0; succ_bb = bb, i-- ) {
2211 2216 bb = _cfg->_blocks[i];
2212 2217
2213 2218 #ifndef PRODUCT
2214 2219 if (_cfg->C->trace_opto_output()) {
2215 2220 tty->print("# Schedule BB#%03d (initial)\n", i);
2216 2221 for (uint j = 0; j < bb->_nodes.size(); j++)
2217 2222 bb->_nodes[j]->dump();
2218 2223 }
2219 2224 #endif
2220 2225
2221 2226 // On the head node, skip processing
2222 2227 if( bb == _cfg->_broot )
2223 2228 continue;
2224 2229
2225 2230 // Skip empty, connector blocks
2226 2231 if (bb->is_connector())
2227 2232 continue;
2228 2233
2229 2234 // If the following block is not the sole successor of
2230 2235 // this one, then reset the pipeline information
2231 2236 if (bb->_num_succs != 1 || bb->non_connector_successor(0) != succ_bb) {
2232 2237 #ifndef PRODUCT
2233 2238 if (_cfg->C->trace_opto_output()) {
2234 2239 tty->print("*** bundle start of next BB, node %d, for %d instructions\n",
2235 2240 _next_node->_idx, _bundle_instr_count);
2236 2241 }
2237 2242 #endif
2238 2243 step_and_clear();
2239 2244 }
2240 2245
2241 2246 // Leave untouched the starting instruction, any Phis, a CreateEx node
2242 2247 // or Top. bb->_nodes[_bb_start] is the first schedulable instruction.
2243 2248 _bb_end = bb->_nodes.size()-1;
2244 2249 for( _bb_start=1; _bb_start <= _bb_end; _bb_start++ ) {
2245 2250 Node *n = bb->_nodes[_bb_start];
2246 2251 // Things not matched, like Phinodes and ProjNodes don't get scheduled.
2247 2252 // Also, MachIdealNodes do not get scheduled
2248 2253 if( !n->is_Mach() ) continue; // Skip non-machine nodes
2249 2254 MachNode *mach = n->as_Mach();
2250 2255 int iop = mach->ideal_Opcode();
2251 2256 if( iop == Op_CreateEx ) continue; // CreateEx is pinned
2252 2257 if( iop == Op_Con ) continue; // Do not schedule Top
2253 2258 if( iop == Op_Node && // Do not schedule PhiNodes, ProjNodes
2254 2259 mach->pipeline() == MachNode::pipeline_class() &&
2255 2260 !n->is_SpillCopy() ) // Breakpoints, Prolog, etc
2256 2261 continue;
2257 2262 break; // Funny loop structure to be sure...
2258 2263 }
2259 2264 // Compute last "interesting" instruction in block - last instruction we
2260 2265 // might schedule. _bb_end points just after last schedulable inst. We
2261 2266 // normally schedule conditional branches (despite them being forced last
2262 2267 // in the block), because they have delay slots we can fill. Calls all
2263 2268 // have their delay slots filled in the template expansions, so we don't
2264 2269 // bother scheduling them.
2265 2270 Node *last = bb->_nodes[_bb_end];
2266 2271 if( last->is_Catch() ||
2267 2272 // Exclude unreachable path case when Halt node is in a separate block.
2268 2273 (_bb_end > 1 && last->is_Mach() && last->as_Mach()->ideal_Opcode() == Op_Halt) ) {
2269 2274 // There must be a prior call. Skip it.
2270 2275 while( !bb->_nodes[--_bb_end]->is_Call() ) {
2271 2276 assert( bb->_nodes[_bb_end]->is_Proj(), "skipping projections after expected call" );
2272 2277 }
2273 2278 } else if( last->is_MachNullCheck() ) {
2274 2279 // Backup so the last null-checked memory instruction is
2275 2280 // outside the schedulable range. Skip over the nullcheck,
2276 2281 // projection, and the memory nodes.
2277 2282 Node *mem = last->in(1);
2278 2283 do {
2279 2284 _bb_end--;
2280 2285 } while (mem != bb->_nodes[_bb_end]);
2281 2286 } else {
2282 2287 // Set _bb_end to point after last schedulable inst.
2283 2288 _bb_end++;
2284 2289 }
2285 2290
2286 2291 assert( _bb_start <= _bb_end, "inverted block ends" );
2287 2292
2288 2293 // Compute the register antidependencies for the basic block
2289 2294 ComputeRegisterAntidependencies(bb);
2290 2295 if (_cfg->C->failing()) return; // too many D-U pinch points
2291 2296
2292 2297 // Compute intra-bb latencies for the nodes
2293 2298 ComputeLocalLatenciesForward(bb);
2294 2299
2295 2300 // Compute the usage within the block, and set the list of all nodes
2296 2301 // in the block that have no uses within the block.
2297 2302 ComputeUseCount(bb);
2298 2303
2299 2304 // Schedule the remaining instructions in the block
2300 2305 while ( _available.size() > 0 ) {
2301 2306 Node *n = ChooseNodeToBundle();
2302 2307 AddNodeToBundle(n,bb);
2303 2308 }
2304 2309
2305 2310 assert( _scheduled.size() == _bb_end - _bb_start, "wrong number of instructions" );
2306 2311 #ifdef ASSERT
2307 2312 for( uint l = _bb_start; l < _bb_end; l++ ) {
2308 2313 Node *n = bb->_nodes[l];
2309 2314 uint m;
2310 2315 for( m = 0; m < _bb_end-_bb_start; m++ )
2311 2316 if( _scheduled[m] == n )
2312 2317 break;
2313 2318 assert( m < _bb_end-_bb_start, "instruction missing in schedule" );
2314 2319 }
2315 2320 #endif
2316 2321
2317 2322 // Now copy the instructions (in reverse order) back to the block
2318 2323 for ( uint k = _bb_start; k < _bb_end; k++ )
2319 2324 bb->_nodes.map(k, _scheduled[_bb_end-k-1]);
2320 2325
2321 2326 #ifndef PRODUCT
2322 2327 if (_cfg->C->trace_opto_output()) {
2323 2328 tty->print("# Schedule BB#%03d (final)\n", i);
2324 2329 uint current = 0;
2325 2330 for (uint j = 0; j < bb->_nodes.size(); j++) {
2326 2331 Node *n = bb->_nodes[j];
2327 2332 if( valid_bundle_info(n) ) {
2328 2333 Bundle *bundle = node_bundling(n);
2329 2334 if (bundle->instr_count() > 0 || bundle->flags() > 0) {
2330 2335 tty->print("*** Bundle: ");
2331 2336 bundle->dump();
2332 2337 }
2333 2338 n->dump();
2334 2339 }
2335 2340 }
2336 2341 }
2337 2342 #endif
2338 2343 #ifdef ASSERT
2339 2344 verify_good_schedule(bb,"after block local scheduling");
2340 2345 #endif
2341 2346 }
2342 2347
2343 2348 #ifndef PRODUCT
2344 2349 if (_cfg->C->trace_opto_output())
2345 2350 tty->print("# <- DoScheduling\n");
2346 2351 #endif
2347 2352
2348 2353 // Record final node-bundling array location
2349 2354 _regalloc->C->set_node_bundling_base(_node_bundling_base);
2350 2355
2351 2356 } // end DoScheduling
2352 2357
2353 2358 //------------------------------verify_good_schedule---------------------------
2354 2359 // Verify that no live-range used in the block is killed in the block by a
2355 2360 // wrong DEF. This doesn't verify live-ranges that span blocks.
2356 2361
2357 2362 // Check for edge existence. Used to avoid adding redundant precedence edges.
2358 2363 static bool edge_from_to( Node *from, Node *to ) {
2359 2364 for( uint i=0; i<from->len(); i++ )
2360 2365 if( from->in(i) == to )
2361 2366 return true;
2362 2367 return false;
2363 2368 }
2364 2369
2365 2370 #ifdef ASSERT
2366 2371 //------------------------------verify_do_def----------------------------------
2367 2372 void Scheduling::verify_do_def( Node *n, OptoReg::Name def, const char *msg ) {
2368 2373 // Check for bad kills
2369 2374 if( OptoReg::is_valid(def) ) { // Ignore stores & control flow
2370 2375 Node *prior_use = _reg_node[def];
2371 2376 if( prior_use && !edge_from_to(prior_use,n) ) {
2372 2377 tty->print("%s = ",OptoReg::as_VMReg(def)->name());
2373 2378 n->dump();
2374 2379 tty->print_cr("...");
2375 2380 prior_use->dump();
2376 2381 assert_msg(edge_from_to(prior_use,n),msg);
2377 2382 }
2378 2383 _reg_node.map(def,NULL); // Kill live USEs
2379 2384 }
2380 2385 }
2381 2386
2382 2387 //------------------------------verify_good_schedule---------------------------
2383 2388 void Scheduling::verify_good_schedule( Block *b, const char *msg ) {
2384 2389
2385 2390 // Zap to something reasonable for the verify code
2386 2391 _reg_node.clear();
2387 2392
2388 2393 // Walk over the block backwards. Check to make sure each DEF doesn't
2389 2394 // kill a live value (other than the one it's supposed to). Add each
2390 2395 // USE to the live set.
2391 2396 for( uint i = b->_nodes.size()-1; i >= _bb_start; i-- ) {
2392 2397 Node *n = b->_nodes[i];
2393 2398 int n_op = n->Opcode();
2394 2399 if( n_op == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) {
2395 2400 // Fat-proj kills a slew of registers
2396 2401 RegMask rm = n->out_RegMask();// Make local copy
2397 2402 while( rm.is_NotEmpty() ) {
2398 2403 OptoReg::Name kill = rm.find_first_elem();
2399 2404 rm.Remove(kill);
2400 2405 verify_do_def( n, kill, msg );
2401 2406 }
2402 2407 } else if( n_op != Op_Node ) { // Avoid brand new antidependence nodes
2403 2408 // Get DEF'd registers the normal way
2404 2409 verify_do_def( n, _regalloc->get_reg_first(n), msg );
2405 2410 verify_do_def( n, _regalloc->get_reg_second(n), msg );
2406 2411 }
2407 2412
2408 2413 // Now make all USEs live
2409 2414 for( uint i=1; i<n->req(); i++ ) {
2410 2415 Node *def = n->in(i);
2411 2416 assert(def != 0, "input edge required");
2412 2417 OptoReg::Name reg_lo = _regalloc->get_reg_first(def);
2413 2418 OptoReg::Name reg_hi = _regalloc->get_reg_second(def);
2414 2419 if( OptoReg::is_valid(reg_lo) ) {
2415 2420 assert_msg(!_reg_node[reg_lo] || edge_from_to(_reg_node[reg_lo],def), msg );
2416 2421 _reg_node.map(reg_lo,n);
2417 2422 }
2418 2423 if( OptoReg::is_valid(reg_hi) ) {
2419 2424 assert_msg(!_reg_node[reg_hi] || edge_from_to(_reg_node[reg_hi],def), msg );
2420 2425 _reg_node.map(reg_hi,n);
2421 2426 }
2422 2427 }
2423 2428
2424 2429 }
2425 2430
2426 2431 // Zap to something reasonable for the Antidependence code
2427 2432 _reg_node.clear();
2428 2433 }
2429 2434 #endif
2430 2435
2431 2436 // Conditionally add precedence edges. Avoid putting edges on Projs.
2432 2437 static void add_prec_edge_from_to( Node *from, Node *to ) {
2433 2438 if( from->is_Proj() ) { // Put precedence edge on Proj's input
2434 2439 assert( from->req() == 1 && (from->len() == 1 || from->in(1)==0), "no precedence edges on projections" );
2435 2440 from = from->in(0);
2436 2441 }
2437 2442 if( from != to && // No cycles (for things like LD L0,[L0+4] )
2438 2443 !edge_from_to( from, to ) ) // Avoid duplicate edge
2439 2444 from->add_prec(to);
2440 2445 }
2441 2446
2442 2447 //------------------------------anti_do_def------------------------------------
2443 2448 void Scheduling::anti_do_def( Block *b, Node *def, OptoReg::Name def_reg, int is_def ) {
2444 2449 if( !OptoReg::is_valid(def_reg) ) // Ignore stores & control flow
2445 2450 return;
2446 2451
2447 2452 Node *pinch = _reg_node[def_reg]; // Get pinch point
2448 2453 if( !pinch || _bbs[pinch->_idx] != b || // No pinch-point yet?
2449 2454 is_def ) { // Check for a true def (not a kill)
2450 2455 _reg_node.map(def_reg,def); // Record def/kill as the optimistic pinch-point
2451 2456 return;
2452 2457 }
2453 2458
2454 2459 Node *kill = def; // Rename 'def' to more descriptive 'kill'
2455 2460 debug_only( def = (Node*)0xdeadbeef; )
2456 2461
2457 2462 // After some number of kills there _may_ be a later def
2458 2463 Node *later_def = NULL;
2459 2464
2460 2465 // Finding a kill requires a real pinch-point.
2461 2466 // Check for not already having a pinch-point.
2462 2467 // Pinch points are Op_Node's.
2463 2468 if( pinch->Opcode() != Op_Node ) { // Or later-def/kill as pinch-point?
2464 2469 later_def = pinch; // Must be def/kill as optimistic pinch-point
2465 2470 if ( _pinch_free_list.size() > 0) {
2466 2471 pinch = _pinch_free_list.pop();
2467 2472 } else {
2468 2473 pinch = new (_cfg->C, 1) Node(1); // Pinch point to-be
2469 2474 }
2470 2475 if (pinch->_idx >= _regalloc->node_regs_max_index()) {
2471 2476 _cfg->C->record_method_not_compilable("too many D-U pinch points");
2472 2477 return;
2473 2478 }
2474 2479 _bbs.map(pinch->_idx,b); // Pretend it's valid in this block (lazy init)
2475 2480 _reg_node.map(def_reg,pinch); // Record pinch-point
2476 2481 //_regalloc->set_bad(pinch->_idx); // Already initialized this way.
2477 2482 if( later_def->outcnt() == 0 || later_def->ideal_reg() == MachProjNode::fat_proj ) { // Distinguish def from kill
2478 2483 pinch->init_req(0, _cfg->C->top()); // set not NULL for the next call
2479 2484 add_prec_edge_from_to(later_def,pinch); // Add edge from kill to pinch
2480 2485 later_def = NULL; // and no later def
2481 2486 }
2482 2487 pinch->set_req(0,later_def); // Hook later def so we can find it
2483 2488 } else { // Else have valid pinch point
2484 2489 if( pinch->in(0) ) // If there is a later-def
2485 2490 later_def = pinch->in(0); // Get it
2486 2491 }
2487 2492
2488 2493 // Add output-dependence edge from later def to kill
2489 2494 if( later_def ) // If there is some original def
2490 2495 add_prec_edge_from_to(later_def,kill); // Add edge from def to kill
2491 2496
2492 2497 // See if current kill is also a use, and so is forced to be the pinch-point.
2493 2498 if( pinch->Opcode() == Op_Node ) {
2494 2499 Node *uses = kill->is_Proj() ? kill->in(0) : kill;
2495 2500 for( uint i=1; i<uses->req(); i++ ) {
2496 2501 if( _regalloc->get_reg_first(uses->in(i)) == def_reg ||
2497 2502 _regalloc->get_reg_second(uses->in(i)) == def_reg ) {
2498 2503 // Yes, found a use/kill pinch-point
2499 2504 pinch->set_req(0,NULL); //
2500 2505 pinch->replace_by(kill); // Move anti-dep edges up
2501 2506 pinch = kill;
2502 2507 _reg_node.map(def_reg,pinch);
2503 2508 return;
2504 2509 }
2505 2510 }
2506 2511 }
2507 2512
2508 2513 // Add edge from kill to pinch-point
2509 2514 add_prec_edge_from_to(kill,pinch);
2510 2515 }
2511 2516
2512 2517 //------------------------------anti_do_use------------------------------------
2513 2518 void Scheduling::anti_do_use( Block *b, Node *use, OptoReg::Name use_reg ) {
2514 2519 if( !OptoReg::is_valid(use_reg) ) // Ignore stores & control flow
2515 2520 return;
2516 2521 Node *pinch = _reg_node[use_reg]; // Get pinch point
2517 2522 // Check for no later def_reg/kill in block
2518 2523 if( pinch && _bbs[pinch->_idx] == b &&
2519 2524 // Use has to be block-local as well
2520 2525 _bbs[use->_idx] == b ) {
2521 2526 if( pinch->Opcode() == Op_Node && // Real pinch-point (not optimistic?)
2522 2527 pinch->req() == 1 ) { // pinch not yet in block?
2523 2528 pinch->del_req(0); // yank pointer to later-def, also set flag
2524 2529 // Insert the pinch-point in the block just after the last use
2525 2530 b->_nodes.insert(b->find_node(use)+1,pinch);
2526 2531 _bb_end++; // Increase size scheduled region in block
2527 2532 }
2528 2533
2529 2534 add_prec_edge_from_to(pinch,use);
2530 2535 }
2531 2536 }
2532 2537
2533 2538 //------------------------------ComputeRegisterAntidependences-----------------
2534 2539 // We insert antidependences between the reads and following write of
2535 2540 // allocated registers to prevent illegal code motion. Hopefully, the
2536 2541 // number of added references should be fairly small, especially as we
2537 2542 // are only adding references within the current basic block.
2538 2543 void Scheduling::ComputeRegisterAntidependencies(Block *b) {
2539 2544
2540 2545 #ifdef ASSERT
2541 2546 verify_good_schedule(b,"before block local scheduling");
2542 2547 #endif
2543 2548
2544 2549 // A valid schedule, for each register independently, is an endless cycle
2545 2550 // of: a def, then some uses (connected to the def by true dependencies),
2546 2551 // then some kills (defs with no uses), finally the cycle repeats with a new
2547 2552 // def. The uses are allowed to float relative to each other, as are the
2548 2553 // kills. No use is allowed to slide past a kill (or def). This requires
2549 2554 // antidependencies between all uses of a single def and all kills that
2550 2555 // follow, up to the next def. More edges are redundant, because later defs
2551 2556 // & kills are already serialized with true or antidependencies. To keep
2552 2557 // the edge count down, we add a 'pinch point' node if there's more than
2553 2558 // one use or more than one kill/def.
2554 2559
2555 2560 // We add dependencies in one bottom-up pass.
2556 2561
2557 2562 // For each instruction we handle it's DEFs/KILLs, then it's USEs.
2558 2563
2559 2564 // For each DEF/KILL, we check to see if there's a prior DEF/KILL for this
2560 2565 // register. If not, we record the DEF/KILL in _reg_node, the
2561 2566 // register-to-def mapping. If there is a prior DEF/KILL, we insert a
2562 2567 // "pinch point", a new Node that's in the graph but not in the block.
2563 2568 // We put edges from the prior and current DEF/KILLs to the pinch point.
2564 2569 // We put the pinch point in _reg_node. If there's already a pinch point
2565 2570 // we merely add an edge from the current DEF/KILL to the pinch point.
2566 2571
2567 2572 // After doing the DEF/KILLs, we handle USEs. For each used register, we
2568 2573 // put an edge from the pinch point to the USE.
2569 2574
2570 2575 // To be expedient, the _reg_node array is pre-allocated for the whole
2571 2576 // compilation. _reg_node is lazily initialized; it either contains a NULL,
2572 2577 // or a valid def/kill/pinch-point, or a leftover node from some prior
2573 2578 // block. Leftover node from some prior block is treated like a NULL (no
2574 2579 // prior def, so no anti-dependence needed). Valid def is distinguished by
2575 2580 // it being in the current block.
2576 2581 bool fat_proj_seen = false;
2577 2582 uint last_safept = _bb_end-1;
2578 2583 Node* end_node = (_bb_end-1 >= _bb_start) ? b->_nodes[last_safept] : NULL;
2579 2584 Node* last_safept_node = end_node;
2580 2585 for( uint i = _bb_end-1; i >= _bb_start; i-- ) {
2581 2586 Node *n = b->_nodes[i];
2582 2587 int is_def = n->outcnt(); // def if some uses prior to adding precedence edges
2583 2588 if( n->Opcode() == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) {
2584 2589 // Fat-proj kills a slew of registers
2585 2590 // This can add edges to 'n' and obscure whether or not it was a def,
2586 2591 // hence the is_def flag.
2587 2592 fat_proj_seen = true;
2588 2593 RegMask rm = n->out_RegMask();// Make local copy
2589 2594 while( rm.is_NotEmpty() ) {
2590 2595 OptoReg::Name kill = rm.find_first_elem();
2591 2596 rm.Remove(kill);
2592 2597 anti_do_def( b, n, kill, is_def );
2593 2598 }
2594 2599 } else {
2595 2600 // Get DEF'd registers the normal way
2596 2601 anti_do_def( b, n, _regalloc->get_reg_first(n), is_def );
2597 2602 anti_do_def( b, n, _regalloc->get_reg_second(n), is_def );
2598 2603 }
2599 2604
2600 2605 // Check each register used by this instruction for a following DEF/KILL
2601 2606 // that must occur afterward and requires an anti-dependence edge.
2602 2607 for( uint j=0; j<n->req(); j++ ) {
2603 2608 Node *def = n->in(j);
2604 2609 if( def ) {
2605 2610 assert( def->Opcode() != Op_MachProj || def->ideal_reg() != MachProjNode::fat_proj, "" );
2606 2611 anti_do_use( b, n, _regalloc->get_reg_first(def) );
2607 2612 anti_do_use( b, n, _regalloc->get_reg_second(def) );
2608 2613 }
2609 2614 }
2610 2615 // Do not allow defs of new derived values to float above GC
2611 2616 // points unless the base is definitely available at the GC point.
2612 2617
2613 2618 Node *m = b->_nodes[i];
2614 2619
2615 2620 // Add precedence edge from following safepoint to use of derived pointer
2616 2621 if( last_safept_node != end_node &&
2617 2622 m != last_safept_node) {
2618 2623 for (uint k = 1; k < m->req(); k++) {
2619 2624 const Type *t = m->in(k)->bottom_type();
2620 2625 if( t->isa_oop_ptr() &&
2621 2626 t->is_ptr()->offset() != 0 ) {
2622 2627 last_safept_node->add_prec( m );
2623 2628 break;
2624 2629 }
2625 2630 }
2626 2631 }
2627 2632
2628 2633 if( n->jvms() ) { // Precedence edge from derived to safept
2629 2634 // Check if last_safept_node was moved by pinch-point insertion in anti_do_use()
2630 2635 if( b->_nodes[last_safept] != last_safept_node ) {
2631 2636 last_safept = b->find_node(last_safept_node);
2632 2637 }
2633 2638 for( uint j=last_safept; j > i; j-- ) {
2634 2639 Node *mach = b->_nodes[j];
2635 2640 if( mach->is_Mach() && mach->as_Mach()->ideal_Opcode() == Op_AddP )
2636 2641 mach->add_prec( n );
2637 2642 }
2638 2643 last_safept = i;
2639 2644 last_safept_node = m;
2640 2645 }
2641 2646 }
2642 2647
2643 2648 if (fat_proj_seen) {
2644 2649 // Garbage collect pinch nodes that were not consumed.
2645 2650 // They are usually created by a fat kill MachProj for a call.
2646 2651 garbage_collect_pinch_nodes();
2647 2652 }
2648 2653 }
2649 2654
2650 2655 //------------------------------garbage_collect_pinch_nodes-------------------------------
2651 2656
2652 2657 // Garbage collect pinch nodes for reuse by other blocks.
2653 2658 //
2654 2659 // The block scheduler's insertion of anti-dependence
2655 2660 // edges creates many pinch nodes when the block contains
2656 2661 // 2 or more Calls. A pinch node is used to prevent a
2657 2662 // combinatorial explosion of edges. If a set of kills for a
2658 2663 // register is anti-dependent on a set of uses (or defs), rather
2659 2664 // than adding an edge in the graph between each pair of kill
2660 2665 // and use (or def), a pinch is inserted between them:
2661 2666 //
2662 2667 // use1 use2 use3
2663 2668 // \ | /
2664 2669 // \ | /
2665 2670 // pinch
2666 2671 // / | \
2667 2672 // / | \
2668 2673 // kill1 kill2 kill3
2669 2674 //
2670 2675 // One pinch node is created per register killed when
2671 2676 // the second call is encountered during a backwards pass
2672 2677 // over the block. Most of these pinch nodes are never
2673 2678 // wired into the graph because the register is never
2674 2679 // used or def'ed in the block.
2675 2680 //
2676 2681 void Scheduling::garbage_collect_pinch_nodes() {
2677 2682 #ifndef PRODUCT
2678 2683 if (_cfg->C->trace_opto_output()) tty->print("Reclaimed pinch nodes:");
2679 2684 #endif
2680 2685 int trace_cnt = 0;
2681 2686 for (uint k = 0; k < _reg_node.Size(); k++) {
2682 2687 Node* pinch = _reg_node[k];
2683 2688 if (pinch != NULL && pinch->Opcode() == Op_Node &&
2684 2689 // no predecence input edges
2685 2690 (pinch->req() == pinch->len() || pinch->in(pinch->req()) == NULL) ) {
2686 2691 cleanup_pinch(pinch);
2687 2692 _pinch_free_list.push(pinch);
2688 2693 _reg_node.map(k, NULL);
2689 2694 #ifndef PRODUCT
2690 2695 if (_cfg->C->trace_opto_output()) {
2691 2696 trace_cnt++;
2692 2697 if (trace_cnt > 40) {
2693 2698 tty->print("\n");
2694 2699 trace_cnt = 0;
2695 2700 }
2696 2701 tty->print(" %d", pinch->_idx);
2697 2702 }
2698 2703 #endif
2699 2704 }
2700 2705 }
2701 2706 #ifndef PRODUCT
2702 2707 if (_cfg->C->trace_opto_output()) tty->print("\n");
2703 2708 #endif
2704 2709 }
2705 2710
2706 2711 // Clean up a pinch node for reuse.
2707 2712 void Scheduling::cleanup_pinch( Node *pinch ) {
2708 2713 assert (pinch && pinch->Opcode() == Op_Node && pinch->req() == 1, "just checking");
2709 2714
2710 2715 for (DUIterator_Last imin, i = pinch->last_outs(imin); i >= imin; ) {
2711 2716 Node* use = pinch->last_out(i);
2712 2717 uint uses_found = 0;
2713 2718 for (uint j = use->req(); j < use->len(); j++) {
2714 2719 if (use->in(j) == pinch) {
2715 2720 use->rm_prec(j);
2716 2721 uses_found++;
2717 2722 }
2718 2723 }
2719 2724 assert(uses_found > 0, "must be a precedence edge");
2720 2725 i -= uses_found; // we deleted 1 or more copies of this edge
2721 2726 }
2722 2727 // May have a later_def entry
2723 2728 pinch->set_req(0, NULL);
2724 2729 }
2725 2730
2726 2731 //------------------------------print_statistics-------------------------------
2727 2732 #ifndef PRODUCT
2728 2733
2729 2734 void Scheduling::dump_available() const {
2730 2735 tty->print("#Availist ");
2731 2736 for (uint i = 0; i < _available.size(); i++)
2732 2737 tty->print(" N%d/l%d", _available[i]->_idx,_current_latency[_available[i]->_idx]);
2733 2738 tty->cr();
2734 2739 }
2735 2740
2736 2741 // Print Scheduling Statistics
2737 2742 void Scheduling::print_statistics() {
2738 2743 // Print the size added by nops for bundling
2739 2744 tty->print("Nops added %d bytes to total of %d bytes",
2740 2745 _total_nop_size, _total_method_size);
2741 2746 if (_total_method_size > 0)
2742 2747 tty->print(", for %.2f%%",
2743 2748 ((double)_total_nop_size) / ((double) _total_method_size) * 100.0);
2744 2749 tty->print("\n");
2745 2750
2746 2751 // Print the number of branch shadows filled
2747 2752 if (Pipeline::_branch_has_delay_slot) {
2748 2753 tty->print("Of %d branches, %d had unconditional delay slots filled",
2749 2754 _total_branches, _total_unconditional_delays);
2750 2755 if (_total_branches > 0)
2751 2756 tty->print(", for %.2f%%",
2752 2757 ((double)_total_unconditional_delays) / ((double)_total_branches) * 100.0);
2753 2758 tty->print("\n");
2754 2759 }
2755 2760
2756 2761 uint total_instructions = 0, total_bundles = 0;
2757 2762
2758 2763 for (uint i = 1; i <= Pipeline::_max_instrs_per_cycle; i++) {
2759 2764 uint bundle_count = _total_instructions_per_bundle[i];
2760 2765 total_instructions += bundle_count * i;
2761 2766 total_bundles += bundle_count;
2762 2767 }
2763 2768
2764 2769 if (total_bundles > 0)
2765 2770 tty->print("Average ILP (excluding nops) is %.2f\n",
2766 2771 ((double)total_instructions) / ((double)total_bundles));
2767 2772 }
2768 2773 #endif
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