1 /*
2 * Copyright 1997-2010 Sun Microsystems, Inc. All Rights Reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20 * CA 95054 USA or visit www.sun.com if you need additional information or
21 * have any questions.
22 *
23 */
24
25 #include "incls/_precompiled.incl"
26 #include "incls/_interp_masm_sparc.cpp.incl"
27
28 #ifndef CC_INTERP
29 #ifndef FAST_DISPATCH
30 #define FAST_DISPATCH 1
31 #endif
32 #undef FAST_DISPATCH
33
34 // Implementation of InterpreterMacroAssembler
35
36 // This file specializes the assember with interpreter-specific macros
37
38 const Address InterpreterMacroAssembler::l_tmp(FP, (frame::interpreter_frame_l_scratch_fp_offset * wordSize) + STACK_BIAS);
39 const Address InterpreterMacroAssembler::d_tmp(FP, (frame::interpreter_frame_d_scratch_fp_offset * wordSize) + STACK_BIAS);
40
41 #else // CC_INTERP
42 #ifndef STATE
43 #define STATE(field_name) Lstate, in_bytes(byte_offset_of(BytecodeInterpreter, field_name))
44 #endif // STATE
45
46 #endif // CC_INTERP
47
48 void InterpreterMacroAssembler::compute_extra_locals_size_in_bytes(Register args_size, Register locals_size, Register delta) {
49 // Note: this algorithm is also used by C1's OSR entry sequence.
50 // Any changes should also be applied to CodeEmitter::emit_osr_entry().
51 assert_different_registers(args_size, locals_size);
52 // max_locals*2 for TAGS. Assumes that args_size has already been adjusted.
53 if (TaggedStackInterpreter) sll(locals_size, 1, locals_size);
54 subcc(locals_size, args_size, delta);// extra space for non-arguments locals in words
55 // Use br/mov combination because it works on both V8 and V9 and is
56 // faster.
57 Label skip_move;
58 br(Assembler::negative, true, Assembler::pt, skip_move);
59 delayed()->mov(G0, delta);
60 bind(skip_move);
61 round_to(delta, WordsPerLong); // make multiple of 2 (SP must be 2-word aligned)
62 sll(delta, LogBytesPerWord, delta); // extra space for locals in bytes
63 }
64
65 #ifndef CC_INTERP
66
67 // Dispatch code executed in the prolog of a bytecode which does not do it's
68 // own dispatch. The dispatch address is computed and placed in IdispatchAddress
69 void InterpreterMacroAssembler::dispatch_prolog(TosState state, int bcp_incr) {
70 assert_not_delayed();
71 #ifdef FAST_DISPATCH
72 // FAST_DISPATCH and ProfileInterpreter are mutually exclusive since
73 // they both use I2.
74 assert(!ProfileInterpreter, "FAST_DISPATCH and +ProfileInterpreter are mutually exclusive");
75 ldub(Lbcp, bcp_incr, Lbyte_code); // load next bytecode
76 add(Lbyte_code, Interpreter::distance_from_dispatch_table(state), Lbyte_code);
77 // add offset to correct dispatch table
78 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
79 ld_ptr(IdispatchTables, Lbyte_code, IdispatchAddress);// get entry addr
80 #else
81 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
82 // dispatch table to use
83 AddressLiteral tbl(Interpreter::dispatch_table(state));
84 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
85 set(tbl, G3_scratch); // compute addr of table
86 ld_ptr(G3_scratch, Lbyte_code, IdispatchAddress); // get entry addr
87 #endif
88 }
89
90
91 // Dispatch code executed in the epilog of a bytecode which does not do it's
92 // own dispatch. The dispatch address in IdispatchAddress is used for the
93 // dispatch.
94 void InterpreterMacroAssembler::dispatch_epilog(TosState state, int bcp_incr) {
95 assert_not_delayed();
96 verify_FPU(1, state);
97 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
98 jmp( IdispatchAddress, 0 );
99 if (bcp_incr != 0) delayed()->inc(Lbcp, bcp_incr);
100 else delayed()->nop();
101 }
102
103
104 void InterpreterMacroAssembler::dispatch_next(TosState state, int bcp_incr) {
105 // %%%% consider branching to a single shared dispatch stub (for each bcp_incr)
106 assert_not_delayed();
107 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
108 dispatch_Lbyte_code(state, Interpreter::dispatch_table(state), bcp_incr);
109 }
110
111
112 void InterpreterMacroAssembler::dispatch_next_noverify_oop(TosState state, int bcp_incr) {
113 // %%%% consider branching to a single shared dispatch stub (for each bcp_incr)
114 assert_not_delayed();
115 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
116 dispatch_Lbyte_code(state, Interpreter::dispatch_table(state), bcp_incr, false);
117 }
118
119
120 void InterpreterMacroAssembler::dispatch_via(TosState state, address* table) {
121 // load current bytecode
122 assert_not_delayed();
123 ldub( Lbcp, 0, Lbyte_code); // load next bytecode
124 dispatch_base(state, table);
125 }
126
127
128 void InterpreterMacroAssembler::call_VM_leaf_base(
129 Register java_thread,
130 address entry_point,
131 int number_of_arguments
132 ) {
133 if (!java_thread->is_valid())
134 java_thread = L7_thread_cache;
135 // super call
136 MacroAssembler::call_VM_leaf_base(java_thread, entry_point, number_of_arguments);
137 }
138
139
140 void InterpreterMacroAssembler::call_VM_base(
141 Register oop_result,
142 Register java_thread,
143 Register last_java_sp,
144 address entry_point,
145 int number_of_arguments,
146 bool check_exception
147 ) {
148 if (!java_thread->is_valid())
149 java_thread = L7_thread_cache;
150 // See class ThreadInVMfromInterpreter, which assumes that the interpreter
151 // takes responsibility for setting its own thread-state on call-out.
152 // However, ThreadInVMfromInterpreter resets the state to "in_Java".
153
154 //save_bcp(); // save bcp
155 MacroAssembler::call_VM_base(oop_result, java_thread, last_java_sp, entry_point, number_of_arguments, check_exception);
156 //restore_bcp(); // restore bcp
157 //restore_locals(); // restore locals pointer
158 }
159
160
161 void InterpreterMacroAssembler::check_and_handle_popframe(Register scratch_reg) {
162 if (JvmtiExport::can_pop_frame()) {
163 Label L;
164
165 // Check the "pending popframe condition" flag in the current thread
166 ld(G2_thread, JavaThread::popframe_condition_offset(), scratch_reg);
167
168 // Initiate popframe handling only if it is not already being processed. If the flag
169 // has the popframe_processing bit set, it means that this code is called *during* popframe
170 // handling - we don't want to reenter.
171 btst(JavaThread::popframe_pending_bit, scratch_reg);
172 br(zero, false, pt, L);
173 delayed()->nop();
174 btst(JavaThread::popframe_processing_bit, scratch_reg);
175 br(notZero, false, pt, L);
176 delayed()->nop();
177
178 // Call Interpreter::remove_activation_preserving_args_entry() to get the
179 // address of the same-named entrypoint in the generated interpreter code.
180 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, Interpreter::remove_activation_preserving_args_entry));
181
182 // Jump to Interpreter::_remove_activation_preserving_args_entry
183 jmpl(O0, G0, G0);
184 delayed()->nop();
185 bind(L);
186 }
187 }
188
189
190 void InterpreterMacroAssembler::load_earlyret_value(TosState state) {
191 Register thr_state = G4_scratch;
192 ld_ptr(G2_thread, JavaThread::jvmti_thread_state_offset(), thr_state);
193 const Address tos_addr(thr_state, JvmtiThreadState::earlyret_tos_offset());
194 const Address oop_addr(thr_state, JvmtiThreadState::earlyret_oop_offset());
195 const Address val_addr(thr_state, JvmtiThreadState::earlyret_value_offset());
196 switch (state) {
197 case ltos: ld_long(val_addr, Otos_l); break;
198 case atos: ld_ptr(oop_addr, Otos_l);
199 st_ptr(G0, oop_addr); break;
200 case btos: // fall through
201 case ctos: // fall through
202 case stos: // fall through
203 case itos: ld(val_addr, Otos_l1); break;
204 case ftos: ldf(FloatRegisterImpl::S, val_addr, Ftos_f); break;
205 case dtos: ldf(FloatRegisterImpl::D, val_addr, Ftos_d); break;
206 case vtos: /* nothing to do */ break;
207 default : ShouldNotReachHere();
208 }
209 // Clean up tos value in the jvmti thread state
210 or3(G0, ilgl, G3_scratch);
211 stw(G3_scratch, tos_addr);
212 st_long(G0, val_addr);
213 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
214 }
215
216
217 void InterpreterMacroAssembler::check_and_handle_earlyret(Register scratch_reg) {
218 if (JvmtiExport::can_force_early_return()) {
219 Label L;
220 Register thr_state = G3_scratch;
221 ld_ptr(G2_thread, JavaThread::jvmti_thread_state_offset(), thr_state);
222 tst(thr_state);
223 br(zero, false, pt, L); // if (thread->jvmti_thread_state() == NULL) exit;
224 delayed()->nop();
225
226 // Initiate earlyret handling only if it is not already being processed.
227 // If the flag has the earlyret_processing bit set, it means that this code
228 // is called *during* earlyret handling - we don't want to reenter.
229 ld(thr_state, JvmtiThreadState::earlyret_state_offset(), G4_scratch);
230 cmp(G4_scratch, JvmtiThreadState::earlyret_pending);
231 br(Assembler::notEqual, false, pt, L);
232 delayed()->nop();
233
234 // Call Interpreter::remove_activation_early_entry() to get the address of the
235 // same-named entrypoint in the generated interpreter code
236 ld(thr_state, JvmtiThreadState::earlyret_tos_offset(), Otos_l1);
237 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, Interpreter::remove_activation_early_entry), Otos_l1);
238
239 // Jump to Interpreter::_remove_activation_early_entry
240 jmpl(O0, G0, G0);
241 delayed()->nop();
242 bind(L);
243 }
244 }
245
246
247 void InterpreterMacroAssembler::super_call_VM_leaf(Register thread_cache, address entry_point, Register arg_1, Register arg_2) {
248 mov(arg_1, O0);
249 mov(arg_2, O1);
250 MacroAssembler::call_VM_leaf_base(thread_cache, entry_point, 2);
251 }
252 #endif /* CC_INTERP */
253
254
255 #ifndef CC_INTERP
256
257 void InterpreterMacroAssembler::dispatch_base(TosState state, address* table) {
258 assert_not_delayed();
259 dispatch_Lbyte_code(state, table);
260 }
261
262
263 void InterpreterMacroAssembler::dispatch_normal(TosState state) {
264 dispatch_base(state, Interpreter::normal_table(state));
265 }
266
267
268 void InterpreterMacroAssembler::dispatch_only(TosState state) {
269 dispatch_base(state, Interpreter::dispatch_table(state));
270 }
271
272
273 // common code to dispatch and dispatch_only
274 // dispatch value in Lbyte_code and increment Lbcp
275
276 void InterpreterMacroAssembler::dispatch_Lbyte_code(TosState state, address* table, int bcp_incr, bool verify) {
277 verify_FPU(1, state);
278 // %%%%% maybe implement +VerifyActivationFrameSize here
279 //verify_thread(); //too slow; we will just verify on method entry & exit
280 if (verify) interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
281 #ifdef FAST_DISPATCH
282 if (table == Interpreter::dispatch_table(state)) {
283 // use IdispatchTables
284 add(Lbyte_code, Interpreter::distance_from_dispatch_table(state), Lbyte_code);
285 // add offset to correct dispatch table
286 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
287 ld_ptr(IdispatchTables, Lbyte_code, G3_scratch); // get entry addr
288 } else {
289 #endif
290 // dispatch table to use
291 AddressLiteral tbl(table);
292 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
293 set(tbl, G3_scratch); // compute addr of table
294 ld_ptr(G3_scratch, Lbyte_code, G3_scratch); // get entry addr
295 #ifdef FAST_DISPATCH
296 }
297 #endif
298 jmp( G3_scratch, 0 );
299 if (bcp_incr != 0) delayed()->inc(Lbcp, bcp_incr);
300 else delayed()->nop();
301 }
302
303
304 // Helpers for expression stack
305
306 // Longs and doubles are Category 2 computational types in the
307 // JVM specification (section 3.11.1) and take 2 expression stack or
308 // local slots.
309 // Aligning them on 32 bit with tagged stacks is hard because the code generated
310 // for the dup* bytecodes depends on what types are already on the stack.
311 // If the types are split into the two stack/local slots, that is much easier
312 // (and we can use 0 for non-reference tags).
313
314 // Known good alignment in _LP64 but unknown otherwise
315 void InterpreterMacroAssembler::load_unaligned_double(Register r1, int offset, FloatRegister d) {
316 assert_not_delayed();
317
318 #ifdef _LP64
319 ldf(FloatRegisterImpl::D, r1, offset, d);
320 #else
321 ldf(FloatRegisterImpl::S, r1, offset, d);
322 ldf(FloatRegisterImpl::S, r1, offset + Interpreter::stackElementSize(), d->successor());
323 #endif
324 }
325
326 // Known good alignment in _LP64 but unknown otherwise
327 void InterpreterMacroAssembler::store_unaligned_double(FloatRegister d, Register r1, int offset) {
328 assert_not_delayed();
329
330 #ifdef _LP64
331 stf(FloatRegisterImpl::D, d, r1, offset);
332 // store something more useful here
333 debug_only(stx(G0, r1, offset+Interpreter::stackElementSize());)
334 #else
335 stf(FloatRegisterImpl::S, d, r1, offset);
336 stf(FloatRegisterImpl::S, d->successor(), r1, offset + Interpreter::stackElementSize());
337 #endif
338 }
339
340
341 // Known good alignment in _LP64 but unknown otherwise
342 void InterpreterMacroAssembler::load_unaligned_long(Register r1, int offset, Register rd) {
343 assert_not_delayed();
344 #ifdef _LP64
345 ldx(r1, offset, rd);
346 #else
347 ld(r1, offset, rd);
348 ld(r1, offset + Interpreter::stackElementSize(), rd->successor());
349 #endif
350 }
351
352 // Known good alignment in _LP64 but unknown otherwise
353 void InterpreterMacroAssembler::store_unaligned_long(Register l, Register r1, int offset) {
354 assert_not_delayed();
355
356 #ifdef _LP64
357 stx(l, r1, offset);
358 // store something more useful here
359 debug_only(stx(G0, r1, offset+Interpreter::stackElementSize());)
360 #else
361 st(l, r1, offset);
362 st(l->successor(), r1, offset + Interpreter::stackElementSize());
363 #endif
364 }
365
366 #ifdef ASSERT
367 void InterpreterMacroAssembler::verify_stack_tag(frame::Tag t,
368 Register r,
369 Register scratch) {
370 if (TaggedStackInterpreter) {
371 Label ok, long_ok;
372 ld_ptr(Lesp, Interpreter::expr_tag_offset_in_bytes(0), r);
373 if (t == frame::TagCategory2) {
374 cmp(r, G0);
375 brx(Assembler::equal, false, Assembler::pt, long_ok);
376 delayed()->ld_ptr(Lesp, Interpreter::expr_tag_offset_in_bytes(1), r);
377 stop("stack long/double tag value bad");
378 bind(long_ok);
379 cmp(r, G0);
380 } else if (t == frame::TagValue) {
381 cmp(r, G0);
382 } else {
383 assert_different_registers(r, scratch);
384 mov(t, scratch);
385 cmp(r, scratch);
386 }
387 brx(Assembler::equal, false, Assembler::pt, ok);
388 delayed()->nop();
389 // Also compare if the stack value is zero, then the tag might
390 // not have been set coming from deopt.
391 ld_ptr(Lesp, Interpreter::expr_offset_in_bytes(0), r);
392 cmp(r, G0);
393 brx(Assembler::equal, false, Assembler::pt, ok);
394 delayed()->nop();
395 stop("Stack tag value is bad");
396 bind(ok);
397 }
398 }
399 #endif // ASSERT
400
401 void InterpreterMacroAssembler::pop_i(Register r) {
402 assert_not_delayed();
403 // Uses destination register r for scratch
404 debug_only(verify_stack_tag(frame::TagValue, r));
405 ld(Lesp, Interpreter::expr_offset_in_bytes(0), r);
406 inc(Lesp, Interpreter::stackElementSize());
407 debug_only(verify_esp(Lesp));
408 }
409
410 void InterpreterMacroAssembler::pop_ptr(Register r, Register scratch) {
411 assert_not_delayed();
412 // Uses destination register r for scratch
413 debug_only(verify_stack_tag(frame::TagReference, r, scratch));
414 ld_ptr(Lesp, Interpreter::expr_offset_in_bytes(0), r);
415 inc(Lesp, Interpreter::stackElementSize());
416 debug_only(verify_esp(Lesp));
417 }
418
419 void InterpreterMacroAssembler::pop_l(Register r) {
420 assert_not_delayed();
421 // Uses destination register r for scratch
422 debug_only(verify_stack_tag(frame::TagCategory2, r));
423 load_unaligned_long(Lesp, Interpreter::expr_offset_in_bytes(0), r);
424 inc(Lesp, 2*Interpreter::stackElementSize());
425 debug_only(verify_esp(Lesp));
426 }
427
428
429 void InterpreterMacroAssembler::pop_f(FloatRegister f, Register scratch) {
430 assert_not_delayed();
431 debug_only(verify_stack_tag(frame::TagValue, scratch));
432 ldf(FloatRegisterImpl::S, Lesp, Interpreter::expr_offset_in_bytes(0), f);
433 inc(Lesp, Interpreter::stackElementSize());
434 debug_only(verify_esp(Lesp));
435 }
436
437
438 void InterpreterMacroAssembler::pop_d(FloatRegister f, Register scratch) {
439 assert_not_delayed();
440 debug_only(verify_stack_tag(frame::TagCategory2, scratch));
441 load_unaligned_double(Lesp, Interpreter::expr_offset_in_bytes(0), f);
442 inc(Lesp, 2*Interpreter::stackElementSize());
443 debug_only(verify_esp(Lesp));
444 }
445
446
447 // (Note use register first, then decrement so dec can be done during store stall)
448 void InterpreterMacroAssembler::tag_stack(Register r) {
449 if (TaggedStackInterpreter) {
450 st_ptr(r, Lesp, Interpreter::tag_offset_in_bytes());
451 }
452 }
453
454 void InterpreterMacroAssembler::tag_stack(frame::Tag t, Register r) {
455 if (TaggedStackInterpreter) {
456 assert (frame::TagValue == 0, "TagValue must be zero");
457 if (t == frame::TagValue) {
458 st_ptr(G0, Lesp, Interpreter::tag_offset_in_bytes());
459 } else if (t == frame::TagCategory2) {
460 st_ptr(G0, Lesp, Interpreter::tag_offset_in_bytes());
461 // Tag next slot down too
462 st_ptr(G0, Lesp, -Interpreter::stackElementSize() + Interpreter::tag_offset_in_bytes());
463 } else {
464 assert_different_registers(r, O3);
465 mov(t, O3);
466 st_ptr(O3, Lesp, Interpreter::tag_offset_in_bytes());
467 }
468 }
469 }
470
471 void InterpreterMacroAssembler::push_i(Register r) {
472 assert_not_delayed();
473 debug_only(verify_esp(Lesp));
474 tag_stack(frame::TagValue, r);
475 st( r, Lesp, Interpreter::value_offset_in_bytes());
476 dec( Lesp, Interpreter::stackElementSize());
477 }
478
479 void InterpreterMacroAssembler::push_ptr(Register r) {
480 assert_not_delayed();
481 tag_stack(frame::TagReference, r);
482 st_ptr( r, Lesp, Interpreter::value_offset_in_bytes());
483 dec( Lesp, Interpreter::stackElementSize());
484 }
485
486 void InterpreterMacroAssembler::push_ptr(Register r, Register tag) {
487 assert_not_delayed();
488 tag_stack(tag);
489 st_ptr(r, Lesp, Interpreter::value_offset_in_bytes());
490 dec( Lesp, Interpreter::stackElementSize());
491 }
492
493 // remember: our convention for longs in SPARC is:
494 // O0 (Otos_l1) has high-order part in first word,
495 // O1 (Otos_l2) has low-order part in second word
496
497 void InterpreterMacroAssembler::push_l(Register r) {
498 assert_not_delayed();
499 debug_only(verify_esp(Lesp));
500 tag_stack(frame::TagCategory2, r);
501 // Longs are in stored in memory-correct order, even if unaligned.
502 // and may be separated by stack tags.
503 int offset = -Interpreter::stackElementSize() + Interpreter::value_offset_in_bytes();
504 store_unaligned_long(r, Lesp, offset);
505 dec(Lesp, 2 * Interpreter::stackElementSize());
506 }
507
508
509 void InterpreterMacroAssembler::push_f(FloatRegister f) {
510 assert_not_delayed();
511 debug_only(verify_esp(Lesp));
512 tag_stack(frame::TagValue, Otos_i);
513 stf(FloatRegisterImpl::S, f, Lesp, Interpreter::value_offset_in_bytes());
514 dec(Lesp, Interpreter::stackElementSize());
515 }
516
517
518 void InterpreterMacroAssembler::push_d(FloatRegister d) {
519 assert_not_delayed();
520 debug_only(verify_esp(Lesp));
521 tag_stack(frame::TagCategory2, Otos_i);
522 // Longs are in stored in memory-correct order, even if unaligned.
523 // and may be separated by stack tags.
524 int offset = -Interpreter::stackElementSize() + Interpreter::value_offset_in_bytes();
525 store_unaligned_double(d, Lesp, offset);
526 dec(Lesp, 2 * Interpreter::stackElementSize());
527 }
528
529
530 void InterpreterMacroAssembler::push(TosState state) {
531 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
532 switch (state) {
533 case atos: push_ptr(); break;
534 case btos: push_i(); break;
535 case ctos:
536 case stos: push_i(); break;
537 case itos: push_i(); break;
538 case ltos: push_l(); break;
539 case ftos: push_f(); break;
540 case dtos: push_d(); break;
541 case vtos: /* nothing to do */ break;
542 default : ShouldNotReachHere();
543 }
544 }
545
546
547 void InterpreterMacroAssembler::pop(TosState state) {
548 switch (state) {
549 case atos: pop_ptr(); break;
550 case btos: pop_i(); break;
551 case ctos:
552 case stos: pop_i(); break;
553 case itos: pop_i(); break;
554 case ltos: pop_l(); break;
555 case ftos: pop_f(); break;
556 case dtos: pop_d(); break;
557 case vtos: /* nothing to do */ break;
558 default : ShouldNotReachHere();
559 }
560 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
561 }
562
563
564 // Tagged stack helpers for swap and dup
565 void InterpreterMacroAssembler::load_ptr_and_tag(int n, Register val,
566 Register tag) {
567 ld_ptr(Lesp, Interpreter::expr_offset_in_bytes(n), val);
568 if (TaggedStackInterpreter) {
569 ld_ptr(Lesp, Interpreter::expr_tag_offset_in_bytes(n), tag);
570 }
571 }
572 void InterpreterMacroAssembler::store_ptr_and_tag(int n, Register val,
573 Register tag) {
574 st_ptr(val, Lesp, Interpreter::expr_offset_in_bytes(n));
575 if (TaggedStackInterpreter) {
576 st_ptr(tag, Lesp, Interpreter::expr_tag_offset_in_bytes(n));
577 }
578 }
579
580
581 void InterpreterMacroAssembler::load_receiver(Register param_count,
582 Register recv) {
583
584 sll(param_count, Interpreter::logStackElementSize(), param_count);
585 if (TaggedStackInterpreter) {
586 add(param_count, Interpreter::value_offset_in_bytes(), param_count); // get obj address
587 }
588 ld_ptr(Lesp, param_count, recv); // gets receiver Oop
589 }
590
591 void InterpreterMacroAssembler::empty_expression_stack() {
592 // Reset Lesp.
593 sub( Lmonitors, wordSize, Lesp );
594
595 // Reset SP by subtracting more space from Lesp.
596 Label done;
597 verify_oop(Lmethod);
598 assert(G4_scratch != Gframe_size, "Only you can prevent register aliasing!");
599
600 // A native does not need to do this, since its callee does not change SP.
601 ld(Lmethod, methodOopDesc::access_flags_offset(), Gframe_size); // Load access flags.
602 btst(JVM_ACC_NATIVE, Gframe_size);
603 br(Assembler::notZero, false, Assembler::pt, done);
604 delayed()->nop();
605
606 // Compute max expression stack+register save area
607 lduh(Lmethod, in_bytes(methodOopDesc::max_stack_offset()), Gframe_size); // Load max stack.
608 if (TaggedStackInterpreter) sll ( Gframe_size, 1, Gframe_size); // max_stack * 2 for TAGS
609 add( Gframe_size, frame::memory_parameter_word_sp_offset, Gframe_size );
610
611 //
612 // now set up a stack frame with the size computed above
613 //
614 //round_to( Gframe_size, WordsPerLong ); // -- moved down to the "and" below
615 sll( Gframe_size, LogBytesPerWord, Gframe_size );
616 sub( Lesp, Gframe_size, Gframe_size );
617 and3( Gframe_size, -(2 * wordSize), Gframe_size ); // align SP (downwards) to an 8/16-byte boundary
618 debug_only(verify_sp(Gframe_size, G4_scratch));
619 #ifdef _LP64
620 sub(Gframe_size, STACK_BIAS, Gframe_size );
621 #endif
622 mov(Gframe_size, SP);
623
624 bind(done);
625 }
626
627
628 #ifdef ASSERT
629 void InterpreterMacroAssembler::verify_sp(Register Rsp, Register Rtemp) {
630 Label Bad, OK;
631
632 // Saved SP must be aligned.
633 #ifdef _LP64
634 btst(2*BytesPerWord-1, Rsp);
635 #else
636 btst(LongAlignmentMask, Rsp);
637 #endif
638 br(Assembler::notZero, false, Assembler::pn, Bad);
639 delayed()->nop();
640
641 // Saved SP, plus register window size, must not be above FP.
642 add(Rsp, frame::register_save_words * wordSize, Rtemp);
643 #ifdef _LP64
644 sub(Rtemp, STACK_BIAS, Rtemp); // Bias Rtemp before cmp to FP
645 #endif
646 cmp(Rtemp, FP);
647 brx(Assembler::greaterUnsigned, false, Assembler::pn, Bad);
648 delayed()->nop();
649
650 // Saved SP must not be ridiculously below current SP.
651 size_t maxstack = MAX2(JavaThread::stack_size_at_create(), (size_t) 4*K*K);
652 set(maxstack, Rtemp);
653 sub(SP, Rtemp, Rtemp);
654 #ifdef _LP64
655 add(Rtemp, STACK_BIAS, Rtemp); // Unbias Rtemp before cmp to Rsp
656 #endif
657 cmp(Rsp, Rtemp);
658 brx(Assembler::lessUnsigned, false, Assembler::pn, Bad);
659 delayed()->nop();
660
661 br(Assembler::always, false, Assembler::pn, OK);
662 delayed()->nop();
663
664 bind(Bad);
665 stop("on return to interpreted call, restored SP is corrupted");
666
667 bind(OK);
668 }
669
670
671 void InterpreterMacroAssembler::verify_esp(Register Resp) {
672 // about to read or write Resp[0]
673 // make sure it is not in the monitors or the register save area
674 Label OK1, OK2;
675
676 cmp(Resp, Lmonitors);
677 brx(Assembler::lessUnsigned, true, Assembler::pt, OK1);
678 delayed()->sub(Resp, frame::memory_parameter_word_sp_offset * wordSize, Resp);
679 stop("too many pops: Lesp points into monitor area");
680 bind(OK1);
681 #ifdef _LP64
682 sub(Resp, STACK_BIAS, Resp);
683 #endif
684 cmp(Resp, SP);
685 brx(Assembler::greaterEqualUnsigned, false, Assembler::pt, OK2);
686 delayed()->add(Resp, STACK_BIAS + frame::memory_parameter_word_sp_offset * wordSize, Resp);
687 stop("too many pushes: Lesp points into register window");
688 bind(OK2);
689 }
690 #endif // ASSERT
691
692 // Load compiled (i2c) or interpreter entry when calling from interpreted and
693 // do the call. Centralized so that all interpreter calls will do the same actions.
694 // If jvmti single stepping is on for a thread we must not call compiled code.
695 void InterpreterMacroAssembler::call_from_interpreter(Register target, Register scratch, Register Rret) {
696
697 // Assume we want to go compiled if available
698
699 ld_ptr(G5_method, in_bytes(methodOopDesc::from_interpreted_offset()), target);
700
701 if (JvmtiExport::can_post_interpreter_events()) {
702 // JVMTI events, such as single-stepping, are implemented partly by avoiding running
703 // compiled code in threads for which the event is enabled. Check here for
704 // interp_only_mode if these events CAN be enabled.
705 verify_thread();
706 Label skip_compiled_code;
707
708 const Address interp_only(G2_thread, JavaThread::interp_only_mode_offset());
709 ld(interp_only, scratch);
710 tst(scratch);
711 br(Assembler::notZero, true, Assembler::pn, skip_compiled_code);
712 delayed()->ld_ptr(G5_method, in_bytes(methodOopDesc::interpreter_entry_offset()), target);
713 bind(skip_compiled_code);
714 }
715
716 // the i2c_adapters need methodOop in G5_method (right? %%%)
717 // do the call
718 #ifdef ASSERT
719 {
720 Label ok;
721 br_notnull(target, false, Assembler::pt, ok);
722 delayed()->nop();
723 stop("null entry point");
724 bind(ok);
725 }
726 #endif // ASSERT
727
728 // Adjust Rret first so Llast_SP can be same as Rret
729 add(Rret, -frame::pc_return_offset, O7);
730 add(Lesp, BytesPerWord, Gargs); // setup parameter pointer
731 // Record SP so we can remove any stack space allocated by adapter transition
732 jmp(target, 0);
733 delayed()->mov(SP, Llast_SP);
734 }
735
736 void InterpreterMacroAssembler::if_cmp(Condition cc, bool ptr_compare) {
737 assert_not_delayed();
738
739 Label not_taken;
740 if (ptr_compare) brx(cc, false, Assembler::pn, not_taken);
741 else br (cc, false, Assembler::pn, not_taken);
742 delayed()->nop();
743
744 TemplateTable::branch(false,false);
745
746 bind(not_taken);
747
748 profile_not_taken_branch(G3_scratch);
749 }
750
751
752 void InterpreterMacroAssembler::get_2_byte_integer_at_bcp(
753 int bcp_offset,
754 Register Rtmp,
755 Register Rdst,
756 signedOrNot is_signed,
757 setCCOrNot should_set_CC ) {
758 assert(Rtmp != Rdst, "need separate temp register");
759 assert_not_delayed();
760 switch (is_signed) {
761 default: ShouldNotReachHere();
762
763 case Signed: ldsb( Lbcp, bcp_offset, Rdst ); break; // high byte
764 case Unsigned: ldub( Lbcp, bcp_offset, Rdst ); break; // high byte
765 }
766 ldub( Lbcp, bcp_offset + 1, Rtmp ); // low byte
767 sll( Rdst, BitsPerByte, Rdst);
768 switch (should_set_CC ) {
769 default: ShouldNotReachHere();
770
771 case set_CC: orcc( Rdst, Rtmp, Rdst ); break;
772 case dont_set_CC: or3( Rdst, Rtmp, Rdst ); break;
773 }
774 }
775
776
777 void InterpreterMacroAssembler::get_4_byte_integer_at_bcp(
778 int bcp_offset,
779 Register Rtmp,
780 Register Rdst,
781 setCCOrNot should_set_CC ) {
782 assert(Rtmp != Rdst, "need separate temp register");
783 assert_not_delayed();
784 add( Lbcp, bcp_offset, Rtmp);
785 andcc( Rtmp, 3, G0);
786 Label aligned;
787 switch (should_set_CC ) {
788 default: ShouldNotReachHere();
789
790 case set_CC: break;
791 case dont_set_CC: break;
792 }
793
794 br(Assembler::zero, true, Assembler::pn, aligned);
795 #ifdef _LP64
796 delayed()->ldsw(Rtmp, 0, Rdst);
797 #else
798 delayed()->ld(Rtmp, 0, Rdst);
799 #endif
800
801 ldub(Lbcp, bcp_offset + 3, Rdst);
802 ldub(Lbcp, bcp_offset + 2, Rtmp); sll(Rtmp, 8, Rtmp); or3(Rtmp, Rdst, Rdst);
803 ldub(Lbcp, bcp_offset + 1, Rtmp); sll(Rtmp, 16, Rtmp); or3(Rtmp, Rdst, Rdst);
804 #ifdef _LP64
805 ldsb(Lbcp, bcp_offset + 0, Rtmp); sll(Rtmp, 24, Rtmp);
806 #else
807 // Unsigned load is faster than signed on some implementations
808 ldub(Lbcp, bcp_offset + 0, Rtmp); sll(Rtmp, 24, Rtmp);
809 #endif
810 or3(Rtmp, Rdst, Rdst );
811
812 bind(aligned);
813 if (should_set_CC == set_CC) tst(Rdst);
814 }
815
816
817 void InterpreterMacroAssembler::get_cache_index_at_bcp(Register cache, Register tmp,
818 int bcp_offset, bool giant_index) {
819 assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
820 if (!giant_index) {
821 get_2_byte_integer_at_bcp(bcp_offset, cache, tmp, Unsigned);
822 } else {
823 assert(EnableInvokeDynamic, "giant index used only for EnableInvokeDynamic");
824 get_4_byte_integer_at_bcp(bcp_offset, cache, tmp);
825 assert(constantPoolCacheOopDesc::decode_secondary_index(~123) == 123, "else change next line");
826 xor3(tmp, -1, tmp); // convert to plain index
827 }
828 }
829
830
831 void InterpreterMacroAssembler::get_cache_and_index_at_bcp(Register cache, Register tmp,
832 int bcp_offset, bool giant_index) {
833 assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
834 assert_different_registers(cache, tmp);
835 assert_not_delayed();
836 get_cache_index_at_bcp(cache, tmp, bcp_offset, giant_index);
837 // convert from field index to ConstantPoolCacheEntry index and from
838 // word index to byte offset
839 sll(tmp, exact_log2(in_words(ConstantPoolCacheEntry::size()) * BytesPerWord), tmp);
840 add(LcpoolCache, tmp, cache);
841 }
842
843
844 void InterpreterMacroAssembler::get_cache_entry_pointer_at_bcp(Register cache, Register tmp,
845 int bcp_offset, bool giant_index) {
846 assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
847 assert_different_registers(cache, tmp);
848 assert_not_delayed();
849 assert(!giant_index,"NYI");
850 get_2_byte_integer_at_bcp(bcp_offset, cache, tmp, Unsigned);
851 // convert from field index to ConstantPoolCacheEntry index
852 // and from word index to byte offset
853 sll(tmp, exact_log2(in_words(ConstantPoolCacheEntry::size()) * BytesPerWord), tmp);
854 // skip past the header
855 add(tmp, in_bytes(constantPoolCacheOopDesc::base_offset()), tmp);
856 // construct pointer to cache entry
857 add(LcpoolCache, tmp, cache);
858 }
859
860
861 // Generate a subtype check: branch to ok_is_subtype if sub_klass is
862 // a subtype of super_klass. Blows registers Rsuper_klass, Rsub_klass, tmp1, tmp2.
863 void InterpreterMacroAssembler::gen_subtype_check(Register Rsub_klass,
864 Register Rsuper_klass,
865 Register Rtmp1,
866 Register Rtmp2,
867 Register Rtmp3,
868 Label &ok_is_subtype ) {
869 Label not_subtype;
870
871 // Profile the not-null value's klass.
872 profile_typecheck(Rsub_klass, Rtmp1);
873
874 check_klass_subtype_fast_path(Rsub_klass, Rsuper_klass,
875 Rtmp1, Rtmp2,
876 &ok_is_subtype, ¬_subtype, NULL);
877
878 check_klass_subtype_slow_path(Rsub_klass, Rsuper_klass,
879 Rtmp1, Rtmp2, Rtmp3, /*hack:*/ noreg,
880 &ok_is_subtype, NULL);
881
882 bind(not_subtype);
883 profile_typecheck_failed(Rtmp1);
884 }
885
886 // Separate these two to allow for delay slot in middle
887 // These are used to do a test and full jump to exception-throwing code.
888
889 // %%%%% Could possibly reoptimize this by testing to see if could use
890 // a single conditional branch (i.e. if span is small enough.
891 // If you go that route, than get rid of the split and give up
892 // on the delay-slot hack.
893
894 void InterpreterMacroAssembler::throw_if_not_1_icc( Condition ok_condition,
895 Label& ok ) {
896 assert_not_delayed();
897 br(ok_condition, true, pt, ok);
898 // DELAY SLOT
899 }
900
901 void InterpreterMacroAssembler::throw_if_not_1_xcc( Condition ok_condition,
902 Label& ok ) {
903 assert_not_delayed();
904 bp( ok_condition, true, Assembler::xcc, pt, ok);
905 // DELAY SLOT
906 }
907
908 void InterpreterMacroAssembler::throw_if_not_1_x( Condition ok_condition,
909 Label& ok ) {
910 assert_not_delayed();
911 brx(ok_condition, true, pt, ok);
912 // DELAY SLOT
913 }
914
915 void InterpreterMacroAssembler::throw_if_not_2( address throw_entry_point,
916 Register Rscratch,
917 Label& ok ) {
918 assert(throw_entry_point != NULL, "entry point must be generated by now");
919 AddressLiteral dest(throw_entry_point);
920 jump_to(dest, Rscratch);
921 delayed()->nop();
922 bind(ok);
923 }
924
925
926 // And if you cannot use the delay slot, here is a shorthand:
927
928 void InterpreterMacroAssembler::throw_if_not_icc( Condition ok_condition,
929 address throw_entry_point,
930 Register Rscratch ) {
931 Label ok;
932 if (ok_condition != never) {
933 throw_if_not_1_icc( ok_condition, ok);
934 delayed()->nop();
935 }
936 throw_if_not_2( throw_entry_point, Rscratch, ok);
937 }
938 void InterpreterMacroAssembler::throw_if_not_xcc( Condition ok_condition,
939 address throw_entry_point,
940 Register Rscratch ) {
941 Label ok;
942 if (ok_condition != never) {
943 throw_if_not_1_xcc( ok_condition, ok);
944 delayed()->nop();
945 }
946 throw_if_not_2( throw_entry_point, Rscratch, ok);
947 }
948 void InterpreterMacroAssembler::throw_if_not_x( Condition ok_condition,
949 address throw_entry_point,
950 Register Rscratch ) {
951 Label ok;
952 if (ok_condition != never) {
953 throw_if_not_1_x( ok_condition, ok);
954 delayed()->nop();
955 }
956 throw_if_not_2( throw_entry_point, Rscratch, ok);
957 }
958
959 // Check that index is in range for array, then shift index by index_shift, and put arrayOop + shifted_index into res
960 // Note: res is still shy of address by array offset into object.
961
962 void InterpreterMacroAssembler::index_check_without_pop(Register array, Register index, int index_shift, Register tmp, Register res) {
963 assert_not_delayed();
964
965 verify_oop(array);
966 #ifdef _LP64
967 // sign extend since tos (index) can be a 32bit value
968 sra(index, G0, index);
969 #endif // _LP64
970
971 // check array
972 Label ptr_ok;
973 tst(array);
974 throw_if_not_1_x( notZero, ptr_ok );
975 delayed()->ld( array, arrayOopDesc::length_offset_in_bytes(), tmp ); // check index
976 throw_if_not_2( Interpreter::_throw_NullPointerException_entry, G3_scratch, ptr_ok);
977
978 Label index_ok;
979 cmp(index, tmp);
980 throw_if_not_1_icc( lessUnsigned, index_ok );
981 if (index_shift > 0) delayed()->sll(index, index_shift, index);
982 else delayed()->add(array, index, res); // addr - const offset in index
983 // convention: move aberrant index into G3_scratch for exception message
984 mov(index, G3_scratch);
985 throw_if_not_2( Interpreter::_throw_ArrayIndexOutOfBoundsException_entry, G4_scratch, index_ok);
986
987 // add offset if didn't do it in delay slot
988 if (index_shift > 0) add(array, index, res); // addr - const offset in index
989 }
990
991
992 void InterpreterMacroAssembler::index_check(Register array, Register index, int index_shift, Register tmp, Register res) {
993 assert_not_delayed();
994
995 // pop array
996 pop_ptr(array);
997
998 // check array
999 index_check_without_pop(array, index, index_shift, tmp, res);
1000 }
1001
1002
1003 void InterpreterMacroAssembler::get_constant_pool(Register Rdst) {
1004 ld_ptr(Lmethod, in_bytes(methodOopDesc::constants_offset()), Rdst);
1005 }
1006
1007
1008 void InterpreterMacroAssembler::get_constant_pool_cache(Register Rdst) {
1009 get_constant_pool(Rdst);
1010 ld_ptr(Rdst, constantPoolOopDesc::cache_offset_in_bytes(), Rdst);
1011 }
1012
1013
1014 void InterpreterMacroAssembler::get_cpool_and_tags(Register Rcpool, Register Rtags) {
1015 get_constant_pool(Rcpool);
1016 ld_ptr(Rcpool, constantPoolOopDesc::tags_offset_in_bytes(), Rtags);
1017 }
1018
1019
1020 // unlock if synchronized method
1021 //
1022 // Unlock the receiver if this is a synchronized method.
1023 // Unlock any Java monitors from syncronized blocks.
1024 //
1025 // If there are locked Java monitors
1026 // If throw_monitor_exception
1027 // throws IllegalMonitorStateException
1028 // Else if install_monitor_exception
1029 // installs IllegalMonitorStateException
1030 // Else
1031 // no error processing
1032 void InterpreterMacroAssembler::unlock_if_synchronized_method(TosState state,
1033 bool throw_monitor_exception,
1034 bool install_monitor_exception) {
1035 Label unlocked, unlock, no_unlock;
1036
1037 // get the value of _do_not_unlock_if_synchronized into G1_scratch
1038 const Address do_not_unlock_if_synchronized(G2_thread,
1039 JavaThread::do_not_unlock_if_synchronized_offset());
1040 ldbool(do_not_unlock_if_synchronized, G1_scratch);
1041 stbool(G0, do_not_unlock_if_synchronized); // reset the flag
1042
1043 // check if synchronized method
1044 const Address access_flags(Lmethod, methodOopDesc::access_flags_offset());
1045 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
1046 push(state); // save tos
1047 ld(access_flags, G3_scratch); // Load access flags.
1048 btst(JVM_ACC_SYNCHRONIZED, G3_scratch);
1049 br(zero, false, pt, unlocked);
1050 delayed()->nop();
1051
1052 // Don't unlock anything if the _do_not_unlock_if_synchronized flag
1053 // is set.
1054 tstbool(G1_scratch);
1055 br(Assembler::notZero, false, pn, no_unlock);
1056 delayed()->nop();
1057
1058 // BasicObjectLock will be first in list, since this is a synchronized method. However, need
1059 // to check that the object has not been unlocked by an explicit monitorexit bytecode.
1060
1061 //Intel: if (throw_monitor_exception) ... else ...
1062 // Entry already unlocked, need to throw exception
1063 //...
1064
1065 // pass top-most monitor elem
1066 add( top_most_monitor(), O1 );
1067
1068 ld_ptr(O1, BasicObjectLock::obj_offset_in_bytes(), G3_scratch);
1069 br_notnull(G3_scratch, false, pt, unlock);
1070 delayed()->nop();
1071
1072 if (throw_monitor_exception) {
1073 // Entry already unlocked need to throw an exception
1074 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_illegal_monitor_state_exception));
1075 should_not_reach_here();
1076 } else {
1077 // Monitor already unlocked during a stack unroll.
1078 // If requested, install an illegal_monitor_state_exception.
1079 // Continue with stack unrolling.
1080 if (install_monitor_exception) {
1081 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::new_illegal_monitor_state_exception));
1082 }
1083 ba(false, unlocked);
1084 delayed()->nop();
1085 }
1086
1087 bind(unlock);
1088
1089 unlock_object(O1);
1090
1091 bind(unlocked);
1092
1093 // I0, I1: Might contain return value
1094
1095 // Check that all monitors are unlocked
1096 { Label loop, exception, entry, restart;
1097
1098 Register Rmptr = O0;
1099 Register Rtemp = O1;
1100 Register Rlimit = Lmonitors;
1101 const jint delta = frame::interpreter_frame_monitor_size() * wordSize;
1102 assert( (delta & LongAlignmentMask) == 0,
1103 "sizeof BasicObjectLock must be even number of doublewords");
1104
1105 #ifdef ASSERT
1106 add(top_most_monitor(), Rmptr, delta);
1107 { Label L;
1108 // ensure that Rmptr starts out above (or at) Rlimit
1109 cmp(Rmptr, Rlimit);
1110 brx(Assembler::greaterEqualUnsigned, false, pn, L);
1111 delayed()->nop();
1112 stop("monitor stack has negative size");
1113 bind(L);
1114 }
1115 #endif
1116 bind(restart);
1117 ba(false, entry);
1118 delayed()->
1119 add(top_most_monitor(), Rmptr, delta); // points to current entry, starting with bottom-most entry
1120
1121 // Entry is still locked, need to throw exception
1122 bind(exception);
1123 if (throw_monitor_exception) {
1124 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_illegal_monitor_state_exception));
1125 should_not_reach_here();
1126 } else {
1127 // Stack unrolling. Unlock object and if requested, install illegal_monitor_exception.
1128 // Unlock does not block, so don't have to worry about the frame
1129 unlock_object(Rmptr);
1130 if (install_monitor_exception) {
1131 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::new_illegal_monitor_state_exception));
1132 }
1133 ba(false, restart);
1134 delayed()->nop();
1135 }
1136
1137 bind(loop);
1138 cmp(Rtemp, G0); // check if current entry is used
1139 brx(Assembler::notEqual, false, pn, exception);
1140 delayed()->
1141 dec(Rmptr, delta); // otherwise advance to next entry
1142 #ifdef ASSERT
1143 { Label L;
1144 // ensure that Rmptr has not somehow stepped below Rlimit
1145 cmp(Rmptr, Rlimit);
1146 brx(Assembler::greaterEqualUnsigned, false, pn, L);
1147 delayed()->nop();
1148 stop("ran off the end of the monitor stack");
1149 bind(L);
1150 }
1151 #endif
1152 bind(entry);
1153 cmp(Rmptr, Rlimit); // check if bottom reached
1154 brx(Assembler::notEqual, true, pn, loop); // if not at bottom then check this entry
1155 delayed()->
1156 ld_ptr(Rmptr, BasicObjectLock::obj_offset_in_bytes() - delta, Rtemp);
1157 }
1158
1159 bind(no_unlock);
1160 pop(state);
1161 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
1162 }
1163
1164
1165 // remove activation
1166 //
1167 // Unlock the receiver if this is a synchronized method.
1168 // Unlock any Java monitors from syncronized blocks.
1169 // Remove the activation from the stack.
1170 //
1171 // If there are locked Java monitors
1172 // If throw_monitor_exception
1173 // throws IllegalMonitorStateException
1174 // Else if install_monitor_exception
1175 // installs IllegalMonitorStateException
1176 // Else
1177 // no error processing
1178 void InterpreterMacroAssembler::remove_activation(TosState state,
1179 bool throw_monitor_exception,
1180 bool install_monitor_exception) {
1181
1182 unlock_if_synchronized_method(state, throw_monitor_exception, install_monitor_exception);
1183
1184 // save result (push state before jvmti call and pop it afterwards) and notify jvmti
1185 notify_method_exit(false, state, NotifyJVMTI);
1186
1187 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
1188 verify_oop(Lmethod);
1189 verify_thread();
1190
1191 // return tos
1192 assert(Otos_l1 == Otos_i, "adjust code below");
1193 switch (state) {
1194 #ifdef _LP64
1195 case ltos: mov(Otos_l, Otos_l->after_save()); break; // O0 -> I0
1196 #else
1197 case ltos: mov(Otos_l2, Otos_l2->after_save()); // fall through // O1 -> I1
1198 #endif
1199 case btos: // fall through
1200 case ctos:
1201 case stos: // fall through
1202 case atos: // fall through
1203 case itos: mov(Otos_l1, Otos_l1->after_save()); break; // O0 -> I0
1204 case ftos: // fall through
1205 case dtos: // fall through
1206 case vtos: /* nothing to do */ break;
1207 default : ShouldNotReachHere();
1208 }
1209
1210 #if defined(COMPILER2) && !defined(_LP64)
1211 if (state == ltos) {
1212 // C2 expects long results in G1 we can't tell if we're returning to interpreted
1213 // or compiled so just be safe use G1 and O0/O1
1214
1215 // Shift bits into high (msb) of G1
1216 sllx(Otos_l1->after_save(), 32, G1);
1217 // Zero extend low bits
1218 srl (Otos_l2->after_save(), 0, Otos_l2->after_save());
1219 or3 (Otos_l2->after_save(), G1, G1);
1220 }
1221 #endif /* COMPILER2 */
1222
1223 }
1224 #endif /* CC_INTERP */
1225
1226
1227 // Lock object
1228 //
1229 // Argument - lock_reg points to the BasicObjectLock to be used for locking,
1230 // it must be initialized with the object to lock
1231 void InterpreterMacroAssembler::lock_object(Register lock_reg, Register Object) {
1232 if (UseHeavyMonitors) {
1233 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorenter), lock_reg);
1234 }
1235 else {
1236 Register obj_reg = Object;
1237 Register mark_reg = G4_scratch;
1238 Register temp_reg = G1_scratch;
1239 Address lock_addr(lock_reg, BasicObjectLock::lock_offset_in_bytes());
1240 Address mark_addr(obj_reg, oopDesc::mark_offset_in_bytes());
1241 Label done;
1242
1243 Label slow_case;
1244
1245 assert_different_registers(lock_reg, obj_reg, mark_reg, temp_reg);
1246
1247 // load markOop from object into mark_reg
1248 ld_ptr(mark_addr, mark_reg);
1249
1250 if (UseBiasedLocking) {
1251 biased_locking_enter(obj_reg, mark_reg, temp_reg, done, &slow_case);
1252 }
1253
1254 // get the address of basicLock on stack that will be stored in the object
1255 // we need a temporary register here as we do not want to clobber lock_reg
1256 // (cas clobbers the destination register)
1257 mov(lock_reg, temp_reg);
1258 // set mark reg to be (markOop of object | UNLOCK_VALUE)
1259 or3(mark_reg, markOopDesc::unlocked_value, mark_reg);
1260 // initialize the box (Must happen before we update the object mark!)
1261 st_ptr(mark_reg, lock_addr, BasicLock::displaced_header_offset_in_bytes());
1262 // compare and exchange object_addr, markOop | 1, stack address of basicLock
1263 assert(mark_addr.disp() == 0, "cas must take a zero displacement");
1264 casx_under_lock(mark_addr.base(), mark_reg, temp_reg,
1265 (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
1266
1267 // if the compare and exchange succeeded we are done (we saw an unlocked object)
1268 cmp(mark_reg, temp_reg);
1269 brx(Assembler::equal, true, Assembler::pt, done);
1270 delayed()->nop();
1271
1272 // We did not see an unlocked object so try the fast recursive case
1273
1274 // Check if owner is self by comparing the value in the markOop of object
1275 // with the stack pointer
1276 sub(temp_reg, SP, temp_reg);
1277 #ifdef _LP64
1278 sub(temp_reg, STACK_BIAS, temp_reg);
1279 #endif
1280 assert(os::vm_page_size() > 0xfff, "page size too small - change the constant");
1281
1282 // Composite "andcc" test:
1283 // (a) %sp -vs- markword proximity check, and,
1284 // (b) verify mark word LSBs == 0 (Stack-locked).
1285 //
1286 // FFFFF003/FFFFFFFFFFFF003 is (markOopDesc::lock_mask_in_place | -os::vm_page_size())
1287 // Note that the page size used for %sp proximity testing is arbitrary and is
1288 // unrelated to the actual MMU page size. We use a 'logical' page size of
1289 // 4096 bytes. F..FFF003 is designed to fit conveniently in the SIMM13 immediate
1290 // field of the andcc instruction.
1291 andcc (temp_reg, 0xFFFFF003, G0) ;
1292
1293 // if condition is true we are done and hence we can store 0 in the displaced
1294 // header indicating it is a recursive lock and be done
1295 brx(Assembler::zero, true, Assembler::pt, done);
1296 delayed()->st_ptr(G0, lock_addr, BasicLock::displaced_header_offset_in_bytes());
1297
1298 // none of the above fast optimizations worked so we have to get into the
1299 // slow case of monitor enter
1300 bind(slow_case);
1301 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorenter), lock_reg);
1302
1303 bind(done);
1304 }
1305 }
1306
1307 // Unlocks an object. Used in monitorexit bytecode and remove_activation.
1308 //
1309 // Argument - lock_reg points to the BasicObjectLock for lock
1310 // Throw IllegalMonitorException if object is not locked by current thread
1311 void InterpreterMacroAssembler::unlock_object(Register lock_reg) {
1312 if (UseHeavyMonitors) {
1313 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorexit), lock_reg);
1314 } else {
1315 Register obj_reg = G3_scratch;
1316 Register mark_reg = G4_scratch;
1317 Register displaced_header_reg = G1_scratch;
1318 Address lockobj_addr(lock_reg, BasicObjectLock::obj_offset_in_bytes());
1319 Address mark_addr(obj_reg, oopDesc::mark_offset_in_bytes());
1320 Label done;
1321
1322 if (UseBiasedLocking) {
1323 // load the object out of the BasicObjectLock
1324 ld_ptr(lockobj_addr, obj_reg);
1325 biased_locking_exit(mark_addr, mark_reg, done, true);
1326 st_ptr(G0, lockobj_addr); // free entry
1327 }
1328
1329 // Test first if we are in the fast recursive case
1330 Address lock_addr(lock_reg, BasicObjectLock::lock_offset_in_bytes() + BasicLock::displaced_header_offset_in_bytes());
1331 ld_ptr(lock_addr, displaced_header_reg);
1332 br_null(displaced_header_reg, true, Assembler::pn, done);
1333 delayed()->st_ptr(G0, lockobj_addr); // free entry
1334
1335 // See if it is still a light weight lock, if so we just unlock
1336 // the object and we are done
1337
1338 if (!UseBiasedLocking) {
1339 // load the object out of the BasicObjectLock
1340 ld_ptr(lockobj_addr, obj_reg);
1341 }
1342
1343 // we have the displaced header in displaced_header_reg
1344 // we expect to see the stack address of the basicLock in case the
1345 // lock is still a light weight lock (lock_reg)
1346 assert(mark_addr.disp() == 0, "cas must take a zero displacement");
1347 casx_under_lock(mark_addr.base(), lock_reg, displaced_header_reg,
1348 (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
1349 cmp(lock_reg, displaced_header_reg);
1350 brx(Assembler::equal, true, Assembler::pn, done);
1351 delayed()->st_ptr(G0, lockobj_addr); // free entry
1352
1353 // The lock has been converted into a heavy lock and hence
1354 // we need to get into the slow case
1355
1356 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorexit), lock_reg);
1357
1358 bind(done);
1359 }
1360 }
1361
1362 #ifndef CC_INTERP
1363
1364 // Get the method data pointer from the methodOop and set the
1365 // specified register to its value.
1366
1367 void InterpreterMacroAssembler::set_method_data_pointer_offset(Register Roff) {
1368 assert(ProfileInterpreter, "must be profiling interpreter");
1369 Label get_continue;
1370
1371 ld_ptr(Lmethod, in_bytes(methodOopDesc::method_data_offset()), ImethodDataPtr);
1372 test_method_data_pointer(get_continue);
1373 add(ImethodDataPtr, in_bytes(methodDataOopDesc::data_offset()), ImethodDataPtr);
1374 if (Roff != noreg)
1375 // Roff contains a method data index ("mdi"). It defaults to zero.
1376 add(ImethodDataPtr, Roff, ImethodDataPtr);
1377 bind(get_continue);
1378 }
1379
1380 // Set the method data pointer for the current bcp.
1381
1382 void InterpreterMacroAssembler::set_method_data_pointer_for_bcp() {
1383 assert(ProfileInterpreter, "must be profiling interpreter");
1384 Label zero_continue;
1385
1386 // Test MDO to avoid the call if it is NULL.
1387 ld_ptr(Lmethod, methodOopDesc::method_data_offset(), ImethodDataPtr);
1388 test_method_data_pointer(zero_continue);
1389 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::bcp_to_di), Lmethod, Lbcp);
1390 set_method_data_pointer_offset(O0);
1391 bind(zero_continue);
1392 }
1393
1394 // Test ImethodDataPtr. If it is null, continue at the specified label
1395
1396 void InterpreterMacroAssembler::test_method_data_pointer(Label& zero_continue) {
1397 assert(ProfileInterpreter, "must be profiling interpreter");
1398 #ifdef _LP64
1399 bpr(Assembler::rc_z, false, Assembler::pn, ImethodDataPtr, zero_continue);
1400 #else
1401 tst(ImethodDataPtr);
1402 br(Assembler::zero, false, Assembler::pn, zero_continue);
1403 #endif
1404 delayed()->nop();
1405 }
1406
1407 void InterpreterMacroAssembler::verify_method_data_pointer() {
1408 assert(ProfileInterpreter, "must be profiling interpreter");
1409 #ifdef ASSERT
1410 Label verify_continue;
1411 test_method_data_pointer(verify_continue);
1412
1413 // If the mdp is valid, it will point to a DataLayout header which is
1414 // consistent with the bcp. The converse is highly probable also.
1415 lduh(ImethodDataPtr, in_bytes(DataLayout::bci_offset()), G3_scratch);
1416 ld_ptr(Lmethod, methodOopDesc::const_offset(), O5);
1417 add(G3_scratch, in_bytes(constMethodOopDesc::codes_offset()), G3_scratch);
1418 add(G3_scratch, O5, G3_scratch);
1419 cmp(Lbcp, G3_scratch);
1420 brx(Assembler::equal, false, Assembler::pt, verify_continue);
1421
1422 Register temp_reg = O5;
1423 delayed()->mov(ImethodDataPtr, temp_reg);
1424 // %%% should use call_VM_leaf here?
1425 //call_VM_leaf(noreg, ..., Lmethod, Lbcp, ImethodDataPtr);
1426 save_frame_and_mov(sizeof(jdouble) / wordSize, Lmethod, O0, Lbcp, O1);
1427 Address d_save(FP, -sizeof(jdouble) + STACK_BIAS);
1428 stf(FloatRegisterImpl::D, Ftos_d, d_save);
1429 mov(temp_reg->after_save(), O2);
1430 save_thread(L7_thread_cache);
1431 call(CAST_FROM_FN_PTR(address, InterpreterRuntime::verify_mdp), relocInfo::none);
1432 delayed()->nop();
1433 restore_thread(L7_thread_cache);
1434 ldf(FloatRegisterImpl::D, d_save, Ftos_d);
1435 restore();
1436 bind(verify_continue);
1437 #endif // ASSERT
1438 }
1439
1440 void InterpreterMacroAssembler::test_invocation_counter_for_mdp(Register invocation_count,
1441 Register cur_bcp,
1442 Register Rtmp,
1443 Label &profile_continue) {
1444 assert(ProfileInterpreter, "must be profiling interpreter");
1445 // Control will flow to "profile_continue" if the counter is less than the
1446 // limit or if we call profile_method()
1447
1448 Label done;
1449
1450 // if no method data exists, and the counter is high enough, make one
1451 #ifdef _LP64
1452 bpr(Assembler::rc_nz, false, Assembler::pn, ImethodDataPtr, done);
1453 #else
1454 tst(ImethodDataPtr);
1455 br(Assembler::notZero, false, Assembler::pn, done);
1456 #endif
1457
1458 // Test to see if we should create a method data oop
1459 AddressLiteral profile_limit((address) &InvocationCounter::InterpreterProfileLimit);
1460 #ifdef _LP64
1461 delayed()->nop();
1462 sethi(profile_limit, Rtmp);
1463 #else
1464 delayed()->sethi(profile_limit, Rtmp);
1465 #endif
1466 ld(Rtmp, profile_limit.low10(), Rtmp);
1467 cmp(invocation_count, Rtmp);
1468 br(Assembler::lessUnsigned, false, Assembler::pn, profile_continue);
1469 delayed()->nop();
1470
1471 // Build it now.
1472 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::profile_method), cur_bcp);
1473 set_method_data_pointer_offset(O0);
1474 ba(false, profile_continue);
1475 delayed()->nop();
1476 bind(done);
1477 }
1478
1479 // Store a value at some constant offset from the method data pointer.
1480
1481 void InterpreterMacroAssembler::set_mdp_data_at(int constant, Register value) {
1482 assert(ProfileInterpreter, "must be profiling interpreter");
1483 st_ptr(value, ImethodDataPtr, constant);
1484 }
1485
1486 void InterpreterMacroAssembler::increment_mdp_data_at(Address counter,
1487 Register bumped_count,
1488 bool decrement) {
1489 assert(ProfileInterpreter, "must be profiling interpreter");
1490
1491 // Load the counter.
1492 ld_ptr(counter, bumped_count);
1493
1494 if (decrement) {
1495 // Decrement the register. Set condition codes.
1496 subcc(bumped_count, DataLayout::counter_increment, bumped_count);
1497
1498 // If the decrement causes the counter to overflow, stay negative
1499 Label L;
1500 brx(Assembler::negative, true, Assembler::pn, L);
1501
1502 // Store the decremented counter, if it is still negative.
1503 delayed()->st_ptr(bumped_count, counter);
1504 bind(L);
1505 } else {
1506 // Increment the register. Set carry flag.
1507 addcc(bumped_count, DataLayout::counter_increment, bumped_count);
1508
1509 // If the increment causes the counter to overflow, pull back by 1.
1510 assert(DataLayout::counter_increment == 1, "subc works");
1511 subc(bumped_count, G0, bumped_count);
1512
1513 // Store the incremented counter.
1514 st_ptr(bumped_count, counter);
1515 }
1516 }
1517
1518 // Increment the value at some constant offset from the method data pointer.
1519
1520 void InterpreterMacroAssembler::increment_mdp_data_at(int constant,
1521 Register bumped_count,
1522 bool decrement) {
1523 // Locate the counter at a fixed offset from the mdp:
1524 Address counter(ImethodDataPtr, constant);
1525 increment_mdp_data_at(counter, bumped_count, decrement);
1526 }
1527
1528 // Increment the value at some non-fixed (reg + constant) offset from
1529 // the method data pointer.
1530
1531 void InterpreterMacroAssembler::increment_mdp_data_at(Register reg,
1532 int constant,
1533 Register bumped_count,
1534 Register scratch2,
1535 bool decrement) {
1536 // Add the constant to reg to get the offset.
1537 add(ImethodDataPtr, reg, scratch2);
1538 Address counter(scratch2, constant);
1539 increment_mdp_data_at(counter, bumped_count, decrement);
1540 }
1541
1542 // Set a flag value at the current method data pointer position.
1543 // Updates a single byte of the header, to avoid races with other header bits.
1544
1545 void InterpreterMacroAssembler::set_mdp_flag_at(int flag_constant,
1546 Register scratch) {
1547 assert(ProfileInterpreter, "must be profiling interpreter");
1548 // Load the data header
1549 ldub(ImethodDataPtr, in_bytes(DataLayout::flags_offset()), scratch);
1550
1551 // Set the flag
1552 or3(scratch, flag_constant, scratch);
1553
1554 // Store the modified header.
1555 stb(scratch, ImethodDataPtr, in_bytes(DataLayout::flags_offset()));
1556 }
1557
1558 // Test the location at some offset from the method data pointer.
1559 // If it is not equal to value, branch to the not_equal_continue Label.
1560 // Set condition codes to match the nullness of the loaded value.
1561
1562 void InterpreterMacroAssembler::test_mdp_data_at(int offset,
1563 Register value,
1564 Label& not_equal_continue,
1565 Register scratch) {
1566 assert(ProfileInterpreter, "must be profiling interpreter");
1567 ld_ptr(ImethodDataPtr, offset, scratch);
1568 cmp(value, scratch);
1569 brx(Assembler::notEqual, false, Assembler::pn, not_equal_continue);
1570 delayed()->tst(scratch);
1571 }
1572
1573 // Update the method data pointer by the displacement located at some fixed
1574 // offset from the method data pointer.
1575
1576 void InterpreterMacroAssembler::update_mdp_by_offset(int offset_of_disp,
1577 Register scratch) {
1578 assert(ProfileInterpreter, "must be profiling interpreter");
1579 ld_ptr(ImethodDataPtr, offset_of_disp, scratch);
1580 add(ImethodDataPtr, scratch, ImethodDataPtr);
1581 }
1582
1583 // Update the method data pointer by the displacement located at the
1584 // offset (reg + offset_of_disp).
1585
1586 void InterpreterMacroAssembler::update_mdp_by_offset(Register reg,
1587 int offset_of_disp,
1588 Register scratch) {
1589 assert(ProfileInterpreter, "must be profiling interpreter");
1590 add(reg, offset_of_disp, scratch);
1591 ld_ptr(ImethodDataPtr, scratch, scratch);
1592 add(ImethodDataPtr, scratch, ImethodDataPtr);
1593 }
1594
1595 // Update the method data pointer by a simple constant displacement.
1596
1597 void InterpreterMacroAssembler::update_mdp_by_constant(int constant) {
1598 assert(ProfileInterpreter, "must be profiling interpreter");
1599 add(ImethodDataPtr, constant, ImethodDataPtr);
1600 }
1601
1602 // Update the method data pointer for a _ret bytecode whose target
1603 // was not among our cached targets.
1604
1605 void InterpreterMacroAssembler::update_mdp_for_ret(TosState state,
1606 Register return_bci) {
1607 assert(ProfileInterpreter, "must be profiling interpreter");
1608 push(state);
1609 st_ptr(return_bci, l_tmp); // protect return_bci, in case it is volatile
1610 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::update_mdp_for_ret), return_bci);
1611 ld_ptr(l_tmp, return_bci);
1612 pop(state);
1613 }
1614
1615 // Count a taken branch in the bytecodes.
1616
1617 void InterpreterMacroAssembler::profile_taken_branch(Register scratch, Register bumped_count) {
1618 if (ProfileInterpreter) {
1619 Label profile_continue;
1620
1621 // If no method data exists, go to profile_continue.
1622 test_method_data_pointer(profile_continue);
1623
1624 // We are taking a branch. Increment the taken count.
1625 increment_mdp_data_at(in_bytes(JumpData::taken_offset()), bumped_count);
1626
1627 // The method data pointer needs to be updated to reflect the new target.
1628 update_mdp_by_offset(in_bytes(JumpData::displacement_offset()), scratch);
1629 bind (profile_continue);
1630 }
1631 }
1632
1633
1634 // Count a not-taken branch in the bytecodes.
1635
1636 void InterpreterMacroAssembler::profile_not_taken_branch(Register scratch) {
1637 if (ProfileInterpreter) {
1638 Label profile_continue;
1639
1640 // If no method data exists, go to profile_continue.
1641 test_method_data_pointer(profile_continue);
1642
1643 // We are taking a branch. Increment the not taken count.
1644 increment_mdp_data_at(in_bytes(BranchData::not_taken_offset()), scratch);
1645
1646 // The method data pointer needs to be updated to correspond to the
1647 // next bytecode.
1648 update_mdp_by_constant(in_bytes(BranchData::branch_data_size()));
1649 bind (profile_continue);
1650 }
1651 }
1652
1653
1654 // Count a non-virtual call in the bytecodes.
1655
1656 void InterpreterMacroAssembler::profile_call(Register scratch) {
1657 if (ProfileInterpreter) {
1658 Label profile_continue;
1659
1660 // If no method data exists, go to profile_continue.
1661 test_method_data_pointer(profile_continue);
1662
1663 // We are making a call. Increment the count.
1664 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1665
1666 // The method data pointer needs to be updated to reflect the new target.
1667 update_mdp_by_constant(in_bytes(CounterData::counter_data_size()));
1668 bind (profile_continue);
1669 }
1670 }
1671
1672
1673 // Count a final call in the bytecodes.
1674
1675 void InterpreterMacroAssembler::profile_final_call(Register scratch) {
1676 if (ProfileInterpreter) {
1677 Label profile_continue;
1678
1679 // If no method data exists, go to profile_continue.
1680 test_method_data_pointer(profile_continue);
1681
1682 // We are making a call. Increment the count.
1683 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1684
1685 // The method data pointer needs to be updated to reflect the new target.
1686 update_mdp_by_constant(in_bytes(VirtualCallData::virtual_call_data_size()));
1687 bind (profile_continue);
1688 }
1689 }
1690
1691
1692 // Count a virtual call in the bytecodes.
1693
1694 void InterpreterMacroAssembler::profile_virtual_call(Register receiver,
1695 Register scratch,
1696 bool receiver_can_be_null) {
1697 if (ProfileInterpreter) {
1698 Label profile_continue;
1699
1700 // If no method data exists, go to profile_continue.
1701 test_method_data_pointer(profile_continue);
1702
1703
1704 Label skip_receiver_profile;
1705 if (receiver_can_be_null) {
1706 Label not_null;
1707 tst(receiver);
1708 brx(Assembler::notZero, false, Assembler::pt, not_null);
1709 delayed()->nop();
1710 // We are making a call. Increment the count for null receiver.
1711 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1712 ba(false, skip_receiver_profile);
1713 delayed()->nop();
1714 bind(not_null);
1715 }
1716
1717 // Record the receiver type.
1718 record_klass_in_profile(receiver, scratch, true);
1719 bind(skip_receiver_profile);
1720
1721 // The method data pointer needs to be updated to reflect the new target.
1722 update_mdp_by_constant(in_bytes(VirtualCallData::virtual_call_data_size()));
1723 bind (profile_continue);
1724 }
1725 }
1726
1727 void InterpreterMacroAssembler::record_klass_in_profile_helper(
1728 Register receiver, Register scratch,
1729 int start_row, Label& done, bool is_virtual_call) {
1730 if (TypeProfileWidth == 0) {
1731 if (is_virtual_call) {
1732 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1733 }
1734 return;
1735 }
1736
1737 int last_row = VirtualCallData::row_limit() - 1;
1738 assert(start_row <= last_row, "must be work left to do");
1739 // Test this row for both the receiver and for null.
1740 // Take any of three different outcomes:
1741 // 1. found receiver => increment count and goto done
1742 // 2. found null => keep looking for case 1, maybe allocate this cell
1743 // 3. found something else => keep looking for cases 1 and 2
1744 // Case 3 is handled by a recursive call.
1745 for (int row = start_row; row <= last_row; row++) {
1746 Label next_test;
1747 bool test_for_null_also = (row == start_row);
1748
1749 // See if the receiver is receiver[n].
1750 int recvr_offset = in_bytes(VirtualCallData::receiver_offset(row));
1751 test_mdp_data_at(recvr_offset, receiver, next_test, scratch);
1752 // delayed()->tst(scratch);
1753
1754 // The receiver is receiver[n]. Increment count[n].
1755 int count_offset = in_bytes(VirtualCallData::receiver_count_offset(row));
1756 increment_mdp_data_at(count_offset, scratch);
1757 ba(false, done);
1758 delayed()->nop();
1759 bind(next_test);
1760
1761 if (test_for_null_also) {
1762 Label found_null;
1763 // Failed the equality check on receiver[n]... Test for null.
1764 if (start_row == last_row) {
1765 // The only thing left to do is handle the null case.
1766 if (is_virtual_call) {
1767 brx(Assembler::zero, false, Assembler::pn, found_null);
1768 delayed()->nop();
1769 // Receiver did not match any saved receiver and there is no empty row for it.
1770 // Increment total counter to indicate polymorphic case.
1771 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1772 ba(false, done);
1773 delayed()->nop();
1774 bind(found_null);
1775 } else {
1776 brx(Assembler::notZero, false, Assembler::pt, done);
1777 delayed()->nop();
1778 }
1779 break;
1780 }
1781 // Since null is rare, make it be the branch-taken case.
1782 brx(Assembler::zero, false, Assembler::pn, found_null);
1783 delayed()->nop();
1784
1785 // Put all the "Case 3" tests here.
1786 record_klass_in_profile_helper(receiver, scratch, start_row + 1, done, is_virtual_call);
1787
1788 // Found a null. Keep searching for a matching receiver,
1789 // but remember that this is an empty (unused) slot.
1790 bind(found_null);
1791 }
1792 }
1793
1794 // In the fall-through case, we found no matching receiver, but we
1795 // observed the receiver[start_row] is NULL.
1796
1797 // Fill in the receiver field and increment the count.
1798 int recvr_offset = in_bytes(VirtualCallData::receiver_offset(start_row));
1799 set_mdp_data_at(recvr_offset, receiver);
1800 int count_offset = in_bytes(VirtualCallData::receiver_count_offset(start_row));
1801 mov(DataLayout::counter_increment, scratch);
1802 set_mdp_data_at(count_offset, scratch);
1803 if (start_row > 0) {
1804 ba(false, done);
1805 delayed()->nop();
1806 }
1807 }
1808
1809 void InterpreterMacroAssembler::record_klass_in_profile(Register receiver,
1810 Register scratch, bool is_virtual_call) {
1811 assert(ProfileInterpreter, "must be profiling");
1812 Label done;
1813
1814 record_klass_in_profile_helper(receiver, scratch, 0, done, is_virtual_call);
1815
1816 bind (done);
1817 }
1818
1819
1820 // Count a ret in the bytecodes.
1821
1822 void InterpreterMacroAssembler::profile_ret(TosState state,
1823 Register return_bci,
1824 Register scratch) {
1825 if (ProfileInterpreter) {
1826 Label profile_continue;
1827 uint row;
1828
1829 // If no method data exists, go to profile_continue.
1830 test_method_data_pointer(profile_continue);
1831
1832 // Update the total ret count.
1833 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1834
1835 for (row = 0; row < RetData::row_limit(); row++) {
1836 Label next_test;
1837
1838 // See if return_bci is equal to bci[n]:
1839 test_mdp_data_at(in_bytes(RetData::bci_offset(row)),
1840 return_bci, next_test, scratch);
1841
1842 // return_bci is equal to bci[n]. Increment the count.
1843 increment_mdp_data_at(in_bytes(RetData::bci_count_offset(row)), scratch);
1844
1845 // The method data pointer needs to be updated to reflect the new target.
1846 update_mdp_by_offset(in_bytes(RetData::bci_displacement_offset(row)), scratch);
1847 ba(false, profile_continue);
1848 delayed()->nop();
1849 bind(next_test);
1850 }
1851
1852 update_mdp_for_ret(state, return_bci);
1853
1854 bind (profile_continue);
1855 }
1856 }
1857
1858 // Profile an unexpected null in the bytecodes.
1859 void InterpreterMacroAssembler::profile_null_seen(Register scratch) {
1860 if (ProfileInterpreter) {
1861 Label profile_continue;
1862
1863 // If no method data exists, go to profile_continue.
1864 test_method_data_pointer(profile_continue);
1865
1866 set_mdp_flag_at(BitData::null_seen_byte_constant(), scratch);
1867
1868 // The method data pointer needs to be updated.
1869 int mdp_delta = in_bytes(BitData::bit_data_size());
1870 if (TypeProfileCasts) {
1871 mdp_delta = in_bytes(VirtualCallData::virtual_call_data_size());
1872 }
1873 update_mdp_by_constant(mdp_delta);
1874
1875 bind (profile_continue);
1876 }
1877 }
1878
1879 void InterpreterMacroAssembler::profile_typecheck(Register klass,
1880 Register scratch) {
1881 if (ProfileInterpreter) {
1882 Label profile_continue;
1883
1884 // If no method data exists, go to profile_continue.
1885 test_method_data_pointer(profile_continue);
1886
1887 int mdp_delta = in_bytes(BitData::bit_data_size());
1888 if (TypeProfileCasts) {
1889 mdp_delta = in_bytes(VirtualCallData::virtual_call_data_size());
1890
1891 // Record the object type.
1892 record_klass_in_profile(klass, scratch, false);
1893 }
1894
1895 // The method data pointer needs to be updated.
1896 update_mdp_by_constant(mdp_delta);
1897
1898 bind (profile_continue);
1899 }
1900 }
1901
1902 void InterpreterMacroAssembler::profile_typecheck_failed(Register scratch) {
1903 if (ProfileInterpreter && TypeProfileCasts) {
1904 Label profile_continue;
1905
1906 // If no method data exists, go to profile_continue.
1907 test_method_data_pointer(profile_continue);
1908
1909 int count_offset = in_bytes(CounterData::count_offset());
1910 // Back up the address, since we have already bumped the mdp.
1911 count_offset -= in_bytes(VirtualCallData::virtual_call_data_size());
1912
1913 // *Decrement* the counter. We expect to see zero or small negatives.
1914 increment_mdp_data_at(count_offset, scratch, true);
1915
1916 bind (profile_continue);
1917 }
1918 }
1919
1920 // Count the default case of a switch construct.
1921
1922 void InterpreterMacroAssembler::profile_switch_default(Register scratch) {
1923 if (ProfileInterpreter) {
1924 Label profile_continue;
1925
1926 // If no method data exists, go to profile_continue.
1927 test_method_data_pointer(profile_continue);
1928
1929 // Update the default case count
1930 increment_mdp_data_at(in_bytes(MultiBranchData::default_count_offset()),
1931 scratch);
1932
1933 // The method data pointer needs to be updated.
1934 update_mdp_by_offset(
1935 in_bytes(MultiBranchData::default_displacement_offset()),
1936 scratch);
1937
1938 bind (profile_continue);
1939 }
1940 }
1941
1942 // Count the index'th case of a switch construct.
1943
1944 void InterpreterMacroAssembler::profile_switch_case(Register index,
1945 Register scratch,
1946 Register scratch2,
1947 Register scratch3) {
1948 if (ProfileInterpreter) {
1949 Label profile_continue;
1950
1951 // If no method data exists, go to profile_continue.
1952 test_method_data_pointer(profile_continue);
1953
1954 // Build the base (index * per_case_size_in_bytes()) + case_array_offset_in_bytes()
1955 set(in_bytes(MultiBranchData::per_case_size()), scratch);
1956 smul(index, scratch, scratch);
1957 add(scratch, in_bytes(MultiBranchData::case_array_offset()), scratch);
1958
1959 // Update the case count
1960 increment_mdp_data_at(scratch,
1961 in_bytes(MultiBranchData::relative_count_offset()),
1962 scratch2,
1963 scratch3);
1964
1965 // The method data pointer needs to be updated.
1966 update_mdp_by_offset(scratch,
1967 in_bytes(MultiBranchData::relative_displacement_offset()),
1968 scratch2);
1969
1970 bind (profile_continue);
1971 }
1972 }
1973
1974 // add a InterpMonitorElem to stack (see frame_sparc.hpp)
1975
1976 void InterpreterMacroAssembler::add_monitor_to_stack( bool stack_is_empty,
1977 Register Rtemp,
1978 Register Rtemp2 ) {
1979
1980 Register Rlimit = Lmonitors;
1981 const jint delta = frame::interpreter_frame_monitor_size() * wordSize;
1982 assert( (delta & LongAlignmentMask) == 0,
1983 "sizeof BasicObjectLock must be even number of doublewords");
1984
1985 sub( SP, delta, SP);
1986 sub( Lesp, delta, Lesp);
1987 sub( Lmonitors, delta, Lmonitors);
1988
1989 if (!stack_is_empty) {
1990
1991 // must copy stack contents down
1992
1993 Label start_copying, next;
1994
1995 // untested("monitor stack expansion");
1996 compute_stack_base(Rtemp);
1997 ba( false, start_copying );
1998 delayed()->cmp( Rtemp, Rlimit); // done? duplicated below
1999
2000 // note: must copy from low memory upwards
2001 // On entry to loop,
2002 // Rtemp points to new base of stack, Lesp points to new end of stack (1 past TOS)
2003 // Loop mutates Rtemp
2004
2005 bind( next);
2006
2007 st_ptr(Rtemp2, Rtemp, 0);
2008 inc(Rtemp, wordSize);
2009 cmp(Rtemp, Rlimit); // are we done? (duplicated above)
2010
2011 bind( start_copying );
2012
2013 brx( notEqual, true, pn, next );
2014 delayed()->ld_ptr( Rtemp, delta, Rtemp2 );
2015
2016 // done copying stack
2017 }
2018 }
2019
2020 // Locals
2021 #ifdef ASSERT
2022 void InterpreterMacroAssembler::verify_local_tag(frame::Tag t,
2023 Register base,
2024 Register scratch,
2025 int n) {
2026 if (TaggedStackInterpreter) {
2027 Label ok, long_ok;
2028 // Use dst for scratch
2029 assert_different_registers(base, scratch);
2030 ld_ptr(base, Interpreter::local_tag_offset_in_bytes(n), scratch);
2031 if (t == frame::TagCategory2) {
2032 cmp(scratch, G0);
2033 brx(Assembler::equal, false, Assembler::pt, long_ok);
2034 delayed()->ld_ptr(base, Interpreter::local_tag_offset_in_bytes(n+1), scratch);
2035 stop("local long/double tag value bad");
2036 bind(long_ok);
2037 // compare second half tag
2038 cmp(scratch, G0);
2039 } else if (t == frame::TagValue) {
2040 cmp(scratch, G0);
2041 } else {
2042 assert_different_registers(O3, base, scratch);
2043 mov(t, O3);
2044 cmp(scratch, O3);
2045 }
2046 brx(Assembler::equal, false, Assembler::pt, ok);
2047 delayed()->nop();
2048 // Also compare if the local value is zero, then the tag might
2049 // not have been set coming from deopt.
2050 ld_ptr(base, Interpreter::local_offset_in_bytes(n), scratch);
2051 cmp(scratch, G0);
2052 brx(Assembler::equal, false, Assembler::pt, ok);
2053 delayed()->nop();
2054 stop("Local tag value is bad");
2055 bind(ok);
2056 }
2057 }
2058 #endif // ASSERT
2059
2060 void InterpreterMacroAssembler::access_local_ptr( Register index, Register dst ) {
2061 assert_not_delayed();
2062 sll(index, Interpreter::logStackElementSize(), index);
2063 sub(Llocals, index, index);
2064 debug_only(verify_local_tag(frame::TagReference, index, dst));
2065 ld_ptr(index, Interpreter::value_offset_in_bytes(), dst);
2066 // Note: index must hold the effective address--the iinc template uses it
2067 }
2068
2069 // Just like access_local_ptr but the tag is a returnAddress
2070 void InterpreterMacroAssembler::access_local_returnAddress(Register index,
2071 Register dst ) {
2072 assert_not_delayed();
2073 sll(index, Interpreter::logStackElementSize(), index);
2074 sub(Llocals, index, index);
2075 debug_only(verify_local_tag(frame::TagValue, index, dst));
2076 ld_ptr(index, Interpreter::value_offset_in_bytes(), dst);
2077 }
2078
2079 void InterpreterMacroAssembler::access_local_int( Register index, Register dst ) {
2080 assert_not_delayed();
2081 sll(index, Interpreter::logStackElementSize(), index);
2082 sub(Llocals, index, index);
2083 debug_only(verify_local_tag(frame::TagValue, index, dst));
2084 ld(index, Interpreter::value_offset_in_bytes(), dst);
2085 // Note: index must hold the effective address--the iinc template uses it
2086 }
2087
2088
2089 void InterpreterMacroAssembler::access_local_long( Register index, Register dst ) {
2090 assert_not_delayed();
2091 sll(index, Interpreter::logStackElementSize(), index);
2092 sub(Llocals, index, index);
2093 debug_only(verify_local_tag(frame::TagCategory2, index, dst));
2094 // First half stored at index n+1 (which grows down from Llocals[n])
2095 load_unaligned_long(index, Interpreter::local_offset_in_bytes(1), dst);
2096 }
2097
2098
2099 void InterpreterMacroAssembler::access_local_float( Register index, FloatRegister dst ) {
2100 assert_not_delayed();
2101 sll(index, Interpreter::logStackElementSize(), index);
2102 sub(Llocals, index, index);
2103 debug_only(verify_local_tag(frame::TagValue, index, G1_scratch));
2104 ldf(FloatRegisterImpl::S, index, Interpreter::value_offset_in_bytes(), dst);
2105 }
2106
2107
2108 void InterpreterMacroAssembler::access_local_double( Register index, FloatRegister dst ) {
2109 assert_not_delayed();
2110 sll(index, Interpreter::logStackElementSize(), index);
2111 sub(Llocals, index, index);
2112 debug_only(verify_local_tag(frame::TagCategory2, index, G1_scratch));
2113 load_unaligned_double(index, Interpreter::local_offset_in_bytes(1), dst);
2114 }
2115
2116
2117 #ifdef ASSERT
2118 void InterpreterMacroAssembler::check_for_regarea_stomp(Register Rindex, int offset, Register Rlimit, Register Rscratch, Register Rscratch1) {
2119 Label L;
2120
2121 assert(Rindex != Rscratch, "Registers cannot be same");
2122 assert(Rindex != Rscratch1, "Registers cannot be same");
2123 assert(Rlimit != Rscratch, "Registers cannot be same");
2124 assert(Rlimit != Rscratch1, "Registers cannot be same");
2125 assert(Rscratch1 != Rscratch, "Registers cannot be same");
2126
2127 // untested("reg area corruption");
2128 add(Rindex, offset, Rscratch);
2129 add(Rlimit, 64 + STACK_BIAS, Rscratch1);
2130 cmp(Rscratch, Rscratch1);
2131 brx(Assembler::greaterEqualUnsigned, false, pn, L);
2132 delayed()->nop();
2133 stop("regsave area is being clobbered");
2134 bind(L);
2135 }
2136 #endif // ASSERT
2137
2138 void InterpreterMacroAssembler::tag_local(frame::Tag t,
2139 Register base,
2140 Register src,
2141 int n) {
2142 if (TaggedStackInterpreter) {
2143 // have to store zero because local slots can be reused (rats!)
2144 if (t == frame::TagValue) {
2145 st_ptr(G0, base, Interpreter::local_tag_offset_in_bytes(n));
2146 } else if (t == frame::TagCategory2) {
2147 st_ptr(G0, base, Interpreter::local_tag_offset_in_bytes(n));
2148 st_ptr(G0, base, Interpreter::local_tag_offset_in_bytes(n+1));
2149 } else {
2150 // assert that we don't stomp the value in 'src'
2151 // O3 is arbitrary because it's not used.
2152 assert_different_registers(src, base, O3);
2153 mov( t, O3);
2154 st_ptr(O3, base, Interpreter::local_tag_offset_in_bytes(n));
2155 }
2156 }
2157 }
2158
2159
2160 void InterpreterMacroAssembler::store_local_int( Register index, Register src ) {
2161 assert_not_delayed();
2162 sll(index, Interpreter::logStackElementSize(), index);
2163 sub(Llocals, index, index);
2164 debug_only(check_for_regarea_stomp(index, Interpreter::value_offset_in_bytes(), FP, G1_scratch, G4_scratch);)
2165 tag_local(frame::TagValue, index, src);
2166 st(src, index, Interpreter::value_offset_in_bytes());
2167 }
2168
2169 void InterpreterMacroAssembler::store_local_ptr( Register index, Register src,
2170 Register tag ) {
2171 assert_not_delayed();
2172 sll(index, Interpreter::logStackElementSize(), index);
2173 sub(Llocals, index, index);
2174 #ifdef ASSERT
2175 check_for_regarea_stomp(index, Interpreter::value_offset_in_bytes(), FP, G1_scratch, G4_scratch);
2176 #endif
2177 st_ptr(src, index, Interpreter::value_offset_in_bytes());
2178 // Store tag register directly
2179 if (TaggedStackInterpreter) {
2180 st_ptr(tag, index, Interpreter::tag_offset_in_bytes());
2181 }
2182 }
2183
2184
2185
2186 void InterpreterMacroAssembler::store_local_ptr( int n, Register src,
2187 Register tag ) {
2188 st_ptr(src, Llocals, Interpreter::local_offset_in_bytes(n));
2189 if (TaggedStackInterpreter) {
2190 st_ptr(tag, Llocals, Interpreter::local_tag_offset_in_bytes(n));
2191 }
2192 }
2193
2194 void InterpreterMacroAssembler::store_local_long( Register index, Register src ) {
2195 assert_not_delayed();
2196 sll(index, Interpreter::logStackElementSize(), index);
2197 sub(Llocals, index, index);
2198 #ifdef ASSERT
2199 check_for_regarea_stomp(index, Interpreter::local_offset_in_bytes(1), FP, G1_scratch, G4_scratch);
2200 #endif
2201 tag_local(frame::TagCategory2, index, src);
2202 store_unaligned_long(src, index, Interpreter::local_offset_in_bytes(1)); // which is n+1
2203 }
2204
2205
2206 void InterpreterMacroAssembler::store_local_float( Register index, FloatRegister src ) {
2207 assert_not_delayed();
2208 sll(index, Interpreter::logStackElementSize(), index);
2209 sub(Llocals, index, index);
2210 #ifdef ASSERT
2211 check_for_regarea_stomp(index, Interpreter::value_offset_in_bytes(), FP, G1_scratch, G4_scratch);
2212 #endif
2213 tag_local(frame::TagValue, index, G1_scratch);
2214 stf(FloatRegisterImpl::S, src, index, Interpreter::value_offset_in_bytes());
2215 }
2216
2217
2218 void InterpreterMacroAssembler::store_local_double( Register index, FloatRegister src ) {
2219 assert_not_delayed();
2220 sll(index, Interpreter::logStackElementSize(), index);
2221 sub(Llocals, index, index);
2222 #ifdef ASSERT
2223 check_for_regarea_stomp(index, Interpreter::local_offset_in_bytes(1), FP, G1_scratch, G4_scratch);
2224 #endif
2225 tag_local(frame::TagCategory2, index, G1_scratch);
2226 store_unaligned_double(src, index, Interpreter::local_offset_in_bytes(1));
2227 }
2228
2229
2230 int InterpreterMacroAssembler::top_most_monitor_byte_offset() {
2231 const jint delta = frame::interpreter_frame_monitor_size() * wordSize;
2232 int rounded_vm_local_words = ::round_to(frame::interpreter_frame_vm_local_words, WordsPerLong);
2233 return ((-rounded_vm_local_words * wordSize) - delta ) + STACK_BIAS;
2234 }
2235
2236
2237 Address InterpreterMacroAssembler::top_most_monitor() {
2238 return Address(FP, top_most_monitor_byte_offset());
2239 }
2240
2241
2242 void InterpreterMacroAssembler::compute_stack_base( Register Rdest ) {
2243 add( Lesp, wordSize, Rdest );
2244 }
2245
2246 #endif /* CC_INTERP */
2247
2248 void InterpreterMacroAssembler::increment_invocation_counter( Register Rtmp, Register Rtmp2 ) {
2249 assert(UseCompiler, "incrementing must be useful");
2250 #ifdef CC_INTERP
2251 Address inv_counter(G5_method, methodOopDesc::invocation_counter_offset() +
2252 InvocationCounter::counter_offset());
2253 Address be_counter (G5_method, methodOopDesc::backedge_counter_offset() +
2254 InvocationCounter::counter_offset());
2255 #else
2256 Address inv_counter(Lmethod, methodOopDesc::invocation_counter_offset() +
2257 InvocationCounter::counter_offset());
2258 Address be_counter (Lmethod, methodOopDesc::backedge_counter_offset() +
2259 InvocationCounter::counter_offset());
2260 #endif /* CC_INTERP */
2261 int delta = InvocationCounter::count_increment;
2262
2263 // Load each counter in a register
2264 ld( inv_counter, Rtmp );
2265 ld( be_counter, Rtmp2 );
2266
2267 assert( is_simm13( delta ), " delta too large.");
2268
2269 // Add the delta to the invocation counter and store the result
2270 add( Rtmp, delta, Rtmp );
2271
2272 // Mask the backedge counter
2273 and3( Rtmp2, InvocationCounter::count_mask_value, Rtmp2 );
2274
2275 // Store value
2276 st( Rtmp, inv_counter);
2277
2278 // Add invocation counter + backedge counter
2279 add( Rtmp, Rtmp2, Rtmp);
2280
2281 // Note that this macro must leave the backedge_count + invocation_count in Rtmp!
2282 }
2283
2284 void InterpreterMacroAssembler::increment_backedge_counter( Register Rtmp, Register Rtmp2 ) {
2285 assert(UseCompiler, "incrementing must be useful");
2286 #ifdef CC_INTERP
2287 Address be_counter (G5_method, methodOopDesc::backedge_counter_offset() +
2288 InvocationCounter::counter_offset());
2289 Address inv_counter(G5_method, methodOopDesc::invocation_counter_offset() +
2290 InvocationCounter::counter_offset());
2291 #else
2292 Address be_counter (Lmethod, methodOopDesc::backedge_counter_offset() +
2293 InvocationCounter::counter_offset());
2294 Address inv_counter(Lmethod, methodOopDesc::invocation_counter_offset() +
2295 InvocationCounter::counter_offset());
2296 #endif /* CC_INTERP */
2297 int delta = InvocationCounter::count_increment;
2298 // Load each counter in a register
2299 ld( be_counter, Rtmp );
2300 ld( inv_counter, Rtmp2 );
2301
2302 // Add the delta to the backedge counter
2303 add( Rtmp, delta, Rtmp );
2304
2305 // Mask the invocation counter, add to backedge counter
2306 and3( Rtmp2, InvocationCounter::count_mask_value, Rtmp2 );
2307
2308 // and store the result to memory
2309 st( Rtmp, be_counter );
2310
2311 // Add backedge + invocation counter
2312 add( Rtmp, Rtmp2, Rtmp );
2313
2314 // Note that this macro must leave backedge_count + invocation_count in Rtmp!
2315 }
2316
2317 #ifndef CC_INTERP
2318 void InterpreterMacroAssembler::test_backedge_count_for_osr( Register backedge_count,
2319 Register branch_bcp,
2320 Register Rtmp ) {
2321 Label did_not_overflow;
2322 Label overflow_with_error;
2323 assert_different_registers(backedge_count, Rtmp, branch_bcp);
2324 assert(UseOnStackReplacement,"Must UseOnStackReplacement to test_backedge_count_for_osr");
2325
2326 AddressLiteral limit(&InvocationCounter::InterpreterBackwardBranchLimit);
2327 load_contents(limit, Rtmp);
2328 cmp(backedge_count, Rtmp);
2329 br(Assembler::lessUnsigned, false, Assembler::pt, did_not_overflow);
2330 delayed()->nop();
2331
2332 // When ProfileInterpreter is on, the backedge_count comes from the
2333 // methodDataOop, which value does not get reset on the call to
2334 // frequency_counter_overflow(). To avoid excessive calls to the overflow
2335 // routine while the method is being compiled, add a second test to make sure
2336 // the overflow function is called only once every overflow_frequency.
2337 if (ProfileInterpreter) {
2338 const int overflow_frequency = 1024;
2339 andcc(backedge_count, overflow_frequency-1, Rtmp);
2340 brx(Assembler::notZero, false, Assembler::pt, did_not_overflow);
2341 delayed()->nop();
2342 }
2343
2344 // overflow in loop, pass branch bytecode
2345 set(6,Rtmp);
2346 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::frequency_counter_overflow), branch_bcp, Rtmp);
2347
2348 // Was an OSR adapter generated?
2349 // O0 = osr nmethod
2350 tst(O0);
2351 brx(Assembler::zero, false, Assembler::pn, overflow_with_error);
2352 delayed()->nop();
2353
2354 // Has the nmethod been invalidated already?
2355 ld(O0, nmethod::entry_bci_offset(), O2);
2356 cmp(O2, InvalidOSREntryBci);
2357 br(Assembler::equal, false, Assembler::pn, overflow_with_error);
2358 delayed()->nop();
2359
2360 // migrate the interpreter frame off of the stack
2361
2362 mov(G2_thread, L7);
2363 // save nmethod
2364 mov(O0, L6);
2365 set_last_Java_frame(SP, noreg);
2366 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, SharedRuntime::OSR_migration_begin), L7);
2367 reset_last_Java_frame();
2368 mov(L7, G2_thread);
2369
2370 // move OSR nmethod to I1
2371 mov(L6, I1);
2372
2373 // OSR buffer to I0
2374 mov(O0, I0);
2375
2376 // remove the interpreter frame
2377 restore(I5_savedSP, 0, SP);
2378
2379 // Jump to the osr code.
2380 ld_ptr(O1, nmethod::osr_entry_point_offset(), O2);
2381 jmp(O2, G0);
2382 delayed()->nop();
2383
2384 bind(overflow_with_error);
2385
2386 bind(did_not_overflow);
2387 }
2388
2389
2390
2391 void InterpreterMacroAssembler::interp_verify_oop(Register reg, TosState state, const char * file, int line) {
2392 if (state == atos) { MacroAssembler::_verify_oop(reg, "broken oop ", file, line); }
2393 }
2394
2395
2396 // local helper function for the verify_oop_or_return_address macro
2397 static bool verify_return_address(methodOopDesc* m, int bci) {
2398 #ifndef PRODUCT
2399 address pc = (address)(m->constMethod())
2400 + in_bytes(constMethodOopDesc::codes_offset()) + bci;
2401 // assume it is a valid return address if it is inside m and is preceded by a jsr
2402 if (!m->contains(pc)) return false;
2403 address jsr_pc;
2404 jsr_pc = pc - Bytecodes::length_for(Bytecodes::_jsr);
2405 if (*jsr_pc == Bytecodes::_jsr && jsr_pc >= m->code_base()) return true;
2406 jsr_pc = pc - Bytecodes::length_for(Bytecodes::_jsr_w);
2407 if (*jsr_pc == Bytecodes::_jsr_w && jsr_pc >= m->code_base()) return true;
2408 #endif // PRODUCT
2409 return false;
2410 }
2411
2412
2413 void InterpreterMacroAssembler::verify_oop_or_return_address(Register reg, Register Rtmp) {
2414 if (!VerifyOops) return;
2415 // the VM documentation for the astore[_wide] bytecode allows
2416 // the TOS to be not only an oop but also a return address
2417 Label test;
2418 Label skip;
2419 // See if it is an address (in the current method):
2420
2421 mov(reg, Rtmp);
2422 const int log2_bytecode_size_limit = 16;
2423 srl(Rtmp, log2_bytecode_size_limit, Rtmp);
2424 br_notnull( Rtmp, false, pt, test );
2425 delayed()->nop();
2426
2427 // %%% should use call_VM_leaf here?
2428 save_frame_and_mov(0, Lmethod, O0, reg, O1);
2429 save_thread(L7_thread_cache);
2430 call(CAST_FROM_FN_PTR(address,verify_return_address), relocInfo::none);
2431 delayed()->nop();
2432 restore_thread(L7_thread_cache);
2433 br_notnull( O0, false, pt, skip );
2434 delayed()->restore();
2435
2436 // Perform a more elaborate out-of-line call
2437 // Not an address; verify it:
2438 bind(test);
2439 verify_oop(reg);
2440 bind(skip);
2441 }
2442
2443
2444 void InterpreterMacroAssembler::verify_FPU(int stack_depth, TosState state) {
2445 if (state == ftos || state == dtos) MacroAssembler::verify_FPU(stack_depth);
2446 }
2447 #endif /* CC_INTERP */
2448
2449 // Inline assembly for:
2450 //
2451 // if (thread is in interp_only_mode) {
2452 // InterpreterRuntime::post_method_entry();
2453 // }
2454 // if (DTraceMethodProbes) {
2455 // SharedRuntime::dtrace_method_entry(method, receiver);
2456 // }
2457 // if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
2458 // SharedRuntime::rc_trace_method_entry(method, receiver);
2459 // }
2460
2461 void InterpreterMacroAssembler::notify_method_entry() {
2462
2463 // C++ interpreter only uses this for native methods.
2464
2465 // Whenever JVMTI puts a thread in interp_only_mode, method
2466 // entry/exit events are sent for that thread to track stack
2467 // depth. If it is possible to enter interp_only_mode we add
2468 // the code to check if the event should be sent.
2469 if (JvmtiExport::can_post_interpreter_events()) {
2470 Label L;
2471 Register temp_reg = O5;
2472 const Address interp_only(G2_thread, JavaThread::interp_only_mode_offset());
2473 ld(interp_only, temp_reg);
2474 tst(temp_reg);
2475 br(zero, false, pt, L);
2476 delayed()->nop();
2477 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::post_method_entry));
2478 bind(L);
2479 }
2480
2481 {
2482 Register temp_reg = O5;
2483 SkipIfEqual skip_if(this, temp_reg, &DTraceMethodProbes, zero);
2484 call_VM_leaf(noreg,
2485 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
2486 G2_thread, Lmethod);
2487 }
2488
2489 // RedefineClasses() tracing support for obsolete method entry
2490 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
2491 call_VM_leaf(noreg,
2492 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
2493 G2_thread, Lmethod);
2494 }
2495 }
2496
2497
2498 // Inline assembly for:
2499 //
2500 // if (thread is in interp_only_mode) {
2501 // // save result
2502 // InterpreterRuntime::post_method_exit();
2503 // // restore result
2504 // }
2505 // if (DTraceMethodProbes) {
2506 // SharedRuntime::dtrace_method_exit(thread, method);
2507 // }
2508 //
2509 // Native methods have their result stored in d_tmp and l_tmp
2510 // Java methods have their result stored in the expression stack
2511
2512 void InterpreterMacroAssembler::notify_method_exit(bool is_native_method,
2513 TosState state,
2514 NotifyMethodExitMode mode) {
2515 // C++ interpreter only uses this for native methods.
2516
2517 // Whenever JVMTI puts a thread in interp_only_mode, method
2518 // entry/exit events are sent for that thread to track stack
2519 // depth. If it is possible to enter interp_only_mode we add
2520 // the code to check if the event should be sent.
2521 if (mode == NotifyJVMTI && JvmtiExport::can_post_interpreter_events()) {
2522 Label L;
2523 Register temp_reg = O5;
2524 const Address interp_only(G2_thread, JavaThread::interp_only_mode_offset());
2525 ld(interp_only, temp_reg);
2526 tst(temp_reg);
2527 br(zero, false, pt, L);
2528 delayed()->nop();
2529
2530 // Note: frame::interpreter_frame_result has a dependency on how the
2531 // method result is saved across the call to post_method_exit. For
2532 // native methods it assumes the result registers are saved to
2533 // l_scratch and d_scratch. If this changes then the interpreter_frame_result
2534 // implementation will need to be updated too.
2535
2536 save_return_value(state, is_native_method);
2537 call_VM(noreg,
2538 CAST_FROM_FN_PTR(address, InterpreterRuntime::post_method_exit));
2539 restore_return_value(state, is_native_method);
2540 bind(L);
2541 }
2542
2543 {
2544 Register temp_reg = O5;
2545 // Dtrace notification
2546 SkipIfEqual skip_if(this, temp_reg, &DTraceMethodProbes, zero);
2547 save_return_value(state, is_native_method);
2548 call_VM_leaf(
2549 noreg,
2550 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2551 G2_thread, Lmethod);
2552 restore_return_value(state, is_native_method);
2553 }
2554 }
2555
2556 void InterpreterMacroAssembler::save_return_value(TosState state, bool is_native_call) {
2557 #ifdef CC_INTERP
2558 // result potentially in O0/O1: save it across calls
2559 stf(FloatRegisterImpl::D, F0, STATE(_native_fresult));
2560 #ifdef _LP64
2561 stx(O0, STATE(_native_lresult));
2562 #else
2563 std(O0, STATE(_native_lresult));
2564 #endif
2565 #else // CC_INTERP
2566 if (is_native_call) {
2567 stf(FloatRegisterImpl::D, F0, d_tmp);
2568 #ifdef _LP64
2569 stx(O0, l_tmp);
2570 #else
2571 std(O0, l_tmp);
2572 #endif
2573 } else {
2574 push(state);
2575 }
2576 #endif // CC_INTERP
2577 }
2578
2579 void InterpreterMacroAssembler::restore_return_value( TosState state, bool is_native_call) {
2580 #ifdef CC_INTERP
2581 ldf(FloatRegisterImpl::D, STATE(_native_fresult), F0);
2582 #ifdef _LP64
2583 ldx(STATE(_native_lresult), O0);
2584 #else
2585 ldd(STATE(_native_lresult), O0);
2586 #endif
2587 #else // CC_INTERP
2588 if (is_native_call) {
2589 ldf(FloatRegisterImpl::D, d_tmp, F0);
2590 #ifdef _LP64
2591 ldx(l_tmp, O0);
2592 #else
2593 ldd(l_tmp, O0);
2594 #endif
2595 } else {
2596 pop(state);
2597 }
2598 #endif // CC_INTERP
2599 }